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Merge pull request #15022 from jeromecoutant/PR_STM32U5
STM32U5 new family introduction
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targets/TARGET_STM/CMakeLists.txt

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@@ -14,6 +14,7 @@ add_subdirectory(TARGET_STM32L0 EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32L1 EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32L4 EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32L5 EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32U5 EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32WB EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32WL EXCLUDE_FROM_ALL)
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targets/TARGET_STM/README.md

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@@ -116,6 +116,7 @@ This table summarizes the STM32Cube versions currently used in Mbed OS master br
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| L1 | 1.10.2 | https://github.com/STMicroelectronics/STM32CubeL1 |
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| L4 | 1.17.0 | https://github.com/STMicroelectronics/STM32CubeL4 |
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| L5 | 1.4.0 | https://github.com/STMicroelectronics/STM32CubeL5 |
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| U5 | 1.0.0 | https://github.com/STMicroelectronics/STM32CubeU5 |
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| WB | 1.11.1 | https://github.com/STMicroelectronics/STM32CubeWB |
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| WL | 1.0.0 | https://github.com/STMicroelectronics/STM32CubeWL |
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@@ -168,7 +169,7 @@ You can also check in https://github.com/ARMmbed/stm32customtargets
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STM32 root directory is https://github.com/ARMmbed/mbed-os/tree/master/targets/TARGET_STM
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This contains:
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- all STM32 families directories: F0, F1, F2, F3, F4, F7, G0, H7, L0, L1, L4, WB
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- all STM32 families directories: F0, F1, F2, F3, F4, F7, G0, G4, H7, L0, L1, L4, L5, U5, WB, WL
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- Mbed OS porting layer common for all
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Each STM32 family contains several "sub-families".
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# Copyright (c) 2020 ARM Limited. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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add_subdirectory(TARGET_STM32U575xG EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32U575xI EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32U585xI EXCLUDE_FROM_ALL)
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add_subdirectory(STM32Cube_FW EXCLUDE_FROM_ALL)
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add_library(mbed-stm32u5 INTERFACE)
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target_include_directories(mbed-stm32u5
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INTERFACE
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.
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)
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target_sources(mbed-stm32u5
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INTERFACE
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analogin_device.c
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analogout_device.c
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flash_api.c
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gpio_irq_device.c
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pwmout_device.c
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i2c_device.c
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serial_device.c
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spi_api.c
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)
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target_link_libraries(mbed-stm32u5 INTERFACE mbed-stm mbed-stm32u5cube-fw)
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/* mbed Microcontroller Library
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* SPDX-License-Identifier: BSD-3-Clause
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******************************************************************************
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*
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* Copyright (c) 2015-2021 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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#ifndef MBED_PERIPHERALNAMES_H
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#define MBED_PERIPHERALNAMES_H
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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ADC_1 = (int)ADC1_BASE,
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ADC_4 = (int)ADC4_BASE
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} ADCName;
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typedef enum {
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DAC_1 = (int)DAC1_BASE
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} DACName;
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typedef enum {
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UART_1 = (int)USART1_BASE,
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UART_2 = (int)USART2_BASE,
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UART_3 = (int)USART3_BASE,
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UART_4 = (int)UART4_BASE,
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UART_5 = (int)UART5_BASE,
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LPUART_1 = (int)LPUART1_BASE
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} UARTName;
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typedef enum {
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SPI_1 = (int)SPI1_BASE,
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SPI_2 = (int)SPI2_BASE,
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SPI_3 = (int)SPI3_BASE
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} SPIName;
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typedef enum {
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I2C_1 = (int)I2C1_BASE,
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I2C_2 = (int)I2C2_BASE,
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I2C_3 = (int)I2C3_BASE,
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I2C_4 = (int)I2C4_BASE
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} I2CName;
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typedef enum {
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PWM_1 = (int)TIM1_BASE,
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PWM_2 = (int)TIM2_BASE,
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PWM_3 = (int)TIM3_BASE,
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PWM_4 = (int)TIM4_BASE,
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PWM_5 = (int)TIM5_BASE,
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PWM_8 = (int)TIM8_BASE,
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PWM_15 = (int)TIM15_BASE,
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PWM_16 = (int)TIM16_BASE,
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PWM_17 = (int)TIM17_BASE
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} PWMName;
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typedef enum {
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CAN_1 = (int)FDCAN1_BASE
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} CANName;
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typedef enum {
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QSPI_1 = (int)OCTOSPI1_R_BASE,
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QSPI_2 = (int)OCTOSPI2_R_BASE
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} QSPIName;
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typedef enum {
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OSPI_1 = (int)OCTOSPI1_R_BASE,
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OSPI_2 = (int)OCTOSPI2_R_BASE
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} OSPIName;
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typedef enum {
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USB_FS = (int)USB_OTG_FS_BASE
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} USBName;
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#ifdef __cplusplus
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}
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#endif
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#endif

targets/TARGET_STM/TARGET_STM32U5/STM32Cube_FW/CMSIS/stm32u575xx.h

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targets/TARGET_STM/TARGET_STM32U5/STM32Cube_FW/CMSIS/stm32u585xx.h

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/**
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******************************************************************************
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* @file stm32u5xx.h
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* @author MCD Application Team
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* @brief CMSIS STM32U5xx Device Peripheral Access Layer Header File.
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*
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* The file is the unique include file that the application programmer
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* is using in the C source code, usually in main.c. This file contains:
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* - Configuration section that allows to select:
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* - The STM32U5xx device used in the target application
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* - To use or not the peripheral's drivers in application code(i.e.
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* code will be based on direct access to peripheral's registers
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* rather than drivers API), this option is controlled by
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* "#define USE_HAL_DRIVER"
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2021 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS
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* @{
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*/
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/** @addtogroup stm32u5xx
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* @{
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*/
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#ifndef STM32U5xx_H
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#define STM32U5xx_H
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/** @addtogroup Library_configuration_section
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* @{
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*/
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/**
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* @brief STM32 Family
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*/
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#if !defined (STM32U5)
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#define STM32U5
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#endif /* STM32U5 */
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/* Uncomment the line below according to the target STM32U5 device used in your
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application
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*/
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#if !defined (STM32U575xx) && !defined (STM32U585xx)
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/* #define STM32U575xx */ /*!< STM32U575CIU6 STM32U575CIT6 STM32U575RIT6 STM32U575VIT6 STM32U575ZIT6 STM32U575QII6 STM32U575AII6 STM32U575CIU6Q STM32U575CIT6Q STM32U575OIY6Q STM32U575VIT6Q STM32U575QII6Q STM32U575ZIT6Q STM32U575RIT6Q STM32U575CGU6 STM32U575CGT6 STM32U575RGT6 STM32U575VGT6 STM32U575ZGT6 STM32U575QGI6 STM32U575AGI6 STM32U575CGU6Q STM32U575CGT6Q STM32U575OGY6Q STM32U575VGT6Q STM32U575QGI6Q STM32U575ZGT6Q STM32U575RGT6Q STM32U575AGI6Q Devices */
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/* #define STM32U585xx */ /*!< STM32U585CIU6 STM32U585CIT6 STM32U585RIT6 STM32U585VIT6 STM32U585AII6 STM32U585QII6 STM32U585ZIT6 STM32U585OIY6Q STM32U585VIT6Q STM32U585QEI6Q STM32U585RIT6Q STM32U585AII6Q STM32U585CIU6Q STM32U585CIT6Q STM32U585ZET6Q Devices */
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#endif
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/* Tip: To avoid modifying this file each time you need to switch between these
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devices, you can define the device in your toolchain compiler preprocessor.
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*/
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#if !defined (USE_HAL_DRIVER)
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/**
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* @brief Comment the line below if you will not use the peripherals drivers.
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In this case, these drivers will not be included and the application code will
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be based on direct access to peripherals registers
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*/
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/*#define USE_HAL_DRIVER */
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#endif /* USE_HAL_DRIVER */
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/**
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* @brief CMSIS Device version number 1.0.0
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*/
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#define __STM32U5_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
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#define __STM32U5_CMSIS_VERSION_SUB1 (0x00) /*!< [23:16] sub1 version */
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#define __STM32U5_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
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#define __STM32U5_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
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#define __STM32U5_CMSIS_VERSION ((__STM32U5_CMSIS_VERSION_MAIN << 24U)\
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|(__STM32U5_CMSIS_VERSION_SUB1 << 16U)\
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|(__STM32U5_CMSIS_VERSION_SUB2 << 8U )\
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|(__STM32U5_CMSIS_VERSION_RC))
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/**
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* @}
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*/
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/** @addtogroup Device_Included
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* @{
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*/
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#if defined(STM32U575xx)
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#include "stm32u575xx.h"
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#elif defined(STM32U585xx)
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#include "stm32u585xx.h"
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#else
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#error "Please select first the target STM32U5xx device used in your application (in stm32u5xx.h file)"
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#endif
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/**
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* @}
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*/
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/** @addtogroup Exported_types
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* @{
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*/
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typedef enum
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{
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RESET = 0,
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SET = !RESET
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} FlagStatus, ITStatus;
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typedef enum
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{
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DISABLE = 0,
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ENABLE = !DISABLE
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} FunctionalState;
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#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
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typedef enum
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{
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SUCCESS = 0,
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ERROR = !SUCCESS
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} ErrorStatus;
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/**
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* @}
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*/
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/** @addtogroup Exported_macros
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* @{
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*/
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#define SET_BIT(REG, BIT) ((REG) |= (BIT))
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#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
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#define READ_BIT(REG, BIT) ((REG) & (BIT))
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#define CLEAR_REG(REG) ((REG) = (0x0))
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#define WRITE_REG(REG, VAL) ((REG) = (VAL))
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#define READ_REG(REG) ((REG))
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#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
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/* Use of CMSIS compiler intrinsics for register exclusive access */
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/* Atomic 32-bit register access macro to set one or several bits */
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#define ATOMIC_SET_BIT(REG, BIT) \
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do { \
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uint32_t val; \
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do { \
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val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \
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} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
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} while(0)
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/* Atomic 32-bit register access macro to clear one or several bits */
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#define ATOMIC_CLEAR_BIT(REG, BIT) \
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do { \
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uint32_t val; \
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do { \
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val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \
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} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
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} while(0)
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/* Atomic 32-bit register access macro to clear and set one or several bits */
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#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
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do { \
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uint32_t val; \
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do { \
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val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
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} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
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} while(0)
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/* Atomic 16-bit register access macro to set one or several bits */
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#define ATOMIC_SETH_BIT(REG, BIT) \
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do { \
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uint16_t val; \
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do { \
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val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \
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} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
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} while(0)
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/* Atomic 16-bit register access macro to clear one or several bits */
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#define ATOMIC_CLEARH_BIT(REG, BIT) \
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do { \
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uint16_t val; \
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do { \
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val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \
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} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
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} while(0)
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/* Atomic 16-bit register access macro to clear and set one or several bits */
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#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \
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do { \
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uint16_t val; \
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do { \
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val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
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} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
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} while(0)
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#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
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/**
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* @}
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*/
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#if defined (USE_HAL_DRIVER)
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#include "stm32u5xx_hal.h"
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#endif /* USE_HAL_DRIVER */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* STM32U5xx_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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