@@ -426,7 +426,7 @@ void ra_i2c_init(R_IIC0_Type *i2c_inst, uint32_t scl, uint32_t sda, uint32_t bau
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i2c_inst -> ICCR1_b .ICE = 1 ; // I2C enable
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ra_i2c_set_baudrate (i2c_inst , baudrate );
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i2c_inst -> ICSER = 0x00 ; // I2C reset bus status enable register
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- i2c_inst -> ICMR3_b .ACKWP = 0x01 ; // I2C allow to write ACKBT (transfer acknowledge bit)
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+ i2c_inst -> ICMR3_b .ACKWP = 0x00 ; // I2C not allow to write ACKBT (transfer acknowledge bit)
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i2c_inst -> ICIER = 0xFF ; // Enable all interrupts
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i2c_inst -> ICCR1_b .IICRST = 0 ; // I2C internal reset
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ra_i2c_irq_enable (i2c_inst );
@@ -480,6 +480,7 @@ void ra_i2c_xunit_read_byte(R_IIC0_Type *i2c_inst, xaction_unit_t *unit) {
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void ra_i2c_xunit_init (xaction_unit_t * unit , uint8_t * buf , uint32_t size , bool fread , void * next ) {
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unit -> m_bytes_transferred = 0 ;
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unit -> m_bytes_transfer = size ;
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+ unit -> m_bytes_total = size ;
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unit -> m_fread = fread ;
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unit -> buf = buf ;
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unit -> next = (void * )next ;
@@ -531,6 +532,37 @@ static void ra_i2c_iceri_isr(R_IIC0_Type *i2c_inst) {
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static void ra_i2c_icrxi_isr (R_IIC0_Type * i2c_inst ) {
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xaction_unit_t * unit = current_xaction_unit ;
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xaction_t * action = current_xaction ;
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+ // 1 byte or 2 bytes
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+ if (unit -> m_bytes_total <= 2 ) {
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+ if (action -> m_status == RA_I2C_STATUS_AddrWriteCompleted ) {
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+ action -> m_status = RA_I2C_STATUS_FirstReceiveCompleted ;
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+ i2c_inst -> ICMR3_b .WAIT = 1 ;
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+ // need dummy read processes for 1 byte and 2 bytes receive
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+ if (unit -> m_bytes_total == 2 ) {
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+ (void )i2c_inst -> ICDRR ; // dummy read for 2 bytes receive
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+ } else { // m_bytes_total == 1
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+ i2c_inst -> ICMR3_b .ACKWP = 0x01 ; // enable write ACKBT (transfer acknowledge bit)
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+ i2c_inst -> ICMR3_b .ACKBT = 1 ;
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+ i2c_inst -> ICMR3_b .ACKWP = 0x00 ; // disable write ACKBT (transfer acknowledge bit)
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+ (void )i2c_inst -> ICDRR ; // dummy read for 1 byte receive
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+ }
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+ return ;
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+ }
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+ if (unit -> m_bytes_transfer == 2 ) { // last two data
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+ i2c_inst -> ICMR3_b .ACKWP = 0x01 ; // enable write ACKBT (transfer acknowledge bit)
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+ i2c_inst -> ICMR3_b .ACKBT = 1 ;
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+ i2c_inst -> ICMR3_b .ACKWP = 0x00 ; // disable write ACKBT (transfer acknowledge bit)
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+ ra_i2c_xunit_read_byte (i2c_inst , unit );
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+ } else { // last data
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+ action -> m_status = RA_I2C_STATUS_LastReceiveCompleted ;
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+ if (action -> m_stop == true) {
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+ i2c_inst -> ICCR2_b .SP = 1 ; // request top condition
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+ }
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+ ra_i2c_xunit_read_byte (i2c_inst , unit );
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+ }
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+ return ;
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+ }
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+ // 3 bytes or more
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if (action -> m_status == RA_I2C_STATUS_AddrWriteCompleted ) {
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(void )i2c_inst -> ICDRR ; // dummy read
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action -> m_status = RA_I2C_STATUS_FirstReceiveCompleted ;
@@ -542,7 +574,9 @@ static void ra_i2c_icrxi_isr(R_IIC0_Type *i2c_inst) {
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}
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ra_i2c_xunit_read_byte (i2c_inst , unit );
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} else if (unit -> m_bytes_transfer == 2 ) {
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+ i2c_inst -> ICMR3_b .ACKWP = 0x01 ; // enable write ACKBT (transfer acknowledge bit)
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i2c_inst -> ICMR3_b .ACKBT = 1 ;
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+ i2c_inst -> ICMR3_b .ACKWP = 0x00 ; // disable write ACKBT (transfer acknowledge bit)
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ra_i2c_xunit_read_byte (i2c_inst , unit );
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} else {
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// last data
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