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stm32: Implement vfs.rom_ioctl with support for internal/external flash.
This commit implements `vfs.rom_ioctl()` to query, erase and write both internal and external flash, depending on how the board configures its flash memory. A board can configure ROM as follows. To use internal flash memory: #define MICROPY_HW_ROMFS_ENABLE_INTERNAL_FLASH (1) To use external flash memory (QSPI memory mapped): #define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (1) #define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ (&spi_obj) Then the partition must be defined as symbols in the linker script: _micropy_hw_romfs_part1_start _micropy_hw_romfs_part1_size And finally the partition needs to be enabled: #define MICROPY_HW_ROMFS_ENABLE_PART1 (1) There's support for a second, optional partition via: _micropy_hw_romfs_part2_start _micropy_hw_romfs_part2_size #define MICROPY_HW_ROMFS_ENABLE_PART1 (1) Signed-off-by: Damien George <[email protected]>
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‎ports/stm32/Makefile

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@@ -291,6 +291,7 @@ SRC_C += \
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storage.c \
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sdcard.c \
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sdram.c \
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vfs_rom_ioctl.c \
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fatfs_port.c \
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lcd.c \
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accel.c \

‎ports/stm32/mpconfigboard_common.h

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#define MICROPY_HW_ENTER_BOOTLOADER_VIA_RESET (1)
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#endif
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// Whether to enable ROMFS on the internal flash.
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#ifndef MICROPY_HW_ROMFS_ENABLE_INTERNAL_FLASH
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#define MICROPY_HW_ROMFS_ENABLE_INTERNAL_FLASH (0)
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#endif
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// Whether to enable ROMFS on external QSPI flash.
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#ifndef MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI
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#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (0)
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#endif
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// Whether to enable ROMFS partition 1.
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#ifndef MICROPY_HW_ROMFS_ENABLE_PART1
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#define MICROPY_HW_ROMFS_ENABLE_PART1 (0)
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#endif
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// Whether to enable ROMFS partition 2.
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#ifndef MICROPY_HW_ROMFS_ENABLE_PART2
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#define MICROPY_HW_ROMFS_ENABLE_PART2 (0)
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#endif
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// Whether to enable storage on the internal flash of the MCU
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#ifndef MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE
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#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (1)

‎ports/stm32/mpconfigport.h

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#define MICROPY_SCHEDULER_STATIC_NODES (1)
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#define MICROPY_SCHEDULER_DEPTH (8)
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#define MICROPY_VFS (1)
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#ifndef MICROPY_VFS_ROM
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#define MICROPY_VFS_ROM (MICROPY_HW_ROMFS_ENABLE_INTERNAL_FLASH || MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI)
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#endif
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// control over Python builtins
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#ifndef MICROPY_PY_BUILTINS_HELP_TEXT

‎ports/stm32/qspi.c

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#if defined(MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2)
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#define QSPI_MAP_ADDR (0x90000000)
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#ifndef MICROPY_HW_QSPI_PRESCALER
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#define MICROPY_HW_QSPI_PRESCALER 3 // F_CLK = F_AHB/3 (72MHz when CPU is 216MHz)
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#endif

‎ports/stm32/qspi.h

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#include "drivers/bus/qspi.h"
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#define QSPI_MAP_ADDR (0x90000000)
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#define QSPI_MAP_ADDR_MAX (0xa0000000)
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extern const mp_qspi_proto_t qspi_proto;
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void qspi_init(void);
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void qspi_memory_map(void);
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static inline bool qspi_is_valid_addr(uint32_t addr) {
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return QSPI_MAP_ADDR <= addr && addr < QSPI_MAP_ADDR_MAX;
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}
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#endif // MICROPY_INCLUDED_STM32_QSPI_H

‎ports/stm32/vfs_rom_ioctl.c

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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2025 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "py/obj.h"
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#include "py/objarray.h"
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#include "py/mperrno.h"
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#include "extmod/vfs.h"
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#include "drivers/memory/spiflash.h"
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#include "flash.h"
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#include "qspi.h"
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#include "storage.h"
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#if MICROPY_VFS_ROM_IOCTL
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#if MICROPY_HW_ROMFS_ENABLE_PART1 && !defined(MICROPY_HW_ROMFS_PART1_START)
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#define MICROPY_HW_ROMFS_PART1_START (uintptr_t)(&_micropy_hw_romfs_part1_start)
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#define MICROPY_HW_ROMFS_PART1_SIZE (uintptr_t)(&_micropy_hw_romfs_part1_size)
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extern uint8_t _micropy_hw_romfs_part1_start;
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extern uint8_t _micropy_hw_romfs_part1_size;
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#endif
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#if MICROPY_HW_ROMFS_ENABLE_PART2 && !defined(MICROPY_HW_ROMFS_PART2_START)
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#define MICROPY_HW_ROMFS_PART2_START (uintptr_t)(&_micropy_hw_romfs_part2_start)
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#define MICROPY_HW_ROMFS_PART2_SIZE (uintptr_t)(&_micropy_hw_romfs_part2_size)
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extern uint8_t _micropy_hw_romfs_part2_start;
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extern uint8_t _micropy_hw_romfs_part2_size;
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#endif
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#define ROMFS_MEMORYVIEW(base, size) {{&mp_type_memoryview}, 'B', 0, (size), (void *)(base)}
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static const mp_obj_array_t romfs_obj_table[] = {
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#if MICROPY_HW_ROMFS_ENABLE_PART1
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ROMFS_MEMORYVIEW(MICROPY_HW_ROMFS_PART1_START, MICROPY_HW_ROMFS_PART1_SIZE),
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#endif
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#if MICROPY_HW_ROMFS_ENABLE_PART2
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ROMFS_MEMORYVIEW(MICROPY_HW_ROMFS_PART2_START, MICROPY_HW_ROMFS_PART2_SIZE),
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#endif
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};
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mp_obj_t mp_vfs_rom_ioctl(size_t n_args, const mp_obj_t *args) {
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mp_int_t cmd = mp_obj_get_int(args[0]);
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if (cmd == MP_VFS_ROM_IOCTL_GET_NUMBER_OF_SEGMENTS) {
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return MP_OBJ_NEW_SMALL_INT(MP_ARRAY_SIZE(romfs_obj_table));
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}
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if (n_args < 2) {
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return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
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}
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mp_int_t romfs_id = mp_obj_get_int(args[1]);
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if (!(0 <= romfs_id && romfs_id < MP_ARRAY_SIZE(romfs_obj_table))) {
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return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
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}
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const mp_obj_array_t *romfs_obj = &romfs_obj_table[romfs_id];
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uintptr_t romfs_base = (uintptr_t)romfs_obj->items;
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uintptr_t romfs_len = romfs_obj->len;
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if (cmd == MP_VFS_ROM_IOCTL_GET_SEGMENT) {
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// Return the ROMFS memoryview object.
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return MP_OBJ_FROM_PTR(romfs_obj);
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}
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if (cmd == MP_VFS_ROM_IOCTL_WRITE_PREPARE) {
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// Erase sectors in given range.
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if (n_args < 3) {
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return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
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}
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uint32_t dest = romfs_base;
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uint32_t dest_max = dest + mp_obj_get_int(args[2]);
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if (dest_max > romfs_base + romfs_len) {
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return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
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}
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#if MICROPY_HW_ROMFS_ENABLE_INTERNAL_FLASH
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if (flash_is_valid_addr(dest)) {
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while (dest < dest_max) {
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int ret = flash_erase(dest);
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if (ret < 0) {
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return MP_OBJ_NEW_SMALL_INT(ret);
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}
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uint32_t sector_size = 0;
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flash_get_sector_info(dest, NULL, &sector_size);
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dest += sector_size;
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}
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return MP_OBJ_NEW_SMALL_INT(16);
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}
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#endif
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#if MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI
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if (qspi_is_valid_addr(dest)) {
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dest -= QSPI_MAP_ADDR;
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dest_max -= QSPI_MAP_ADDR;
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while (dest < dest_max) {
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int ret = mp_spiflash_erase_block(MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ, dest);
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if (ret < 0) {
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return MP_OBJ_NEW_SMALL_INT(ret);
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}
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dest += MP_SPIFLASH_ERASE_BLOCK_SIZE;
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}
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return MP_OBJ_NEW_SMALL_INT(4);
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}
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#endif
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}
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if (cmd == MP_VFS_ROM_IOCTL_WRITE) {
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// Write data to flash.
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if (n_args < 4) {
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return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
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}
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uint32_t dest = romfs_base + mp_obj_get_int(args[2]);
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mp_buffer_info_t bufinfo;
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mp_get_buffer_raise(args[3], &bufinfo, MP_BUFFER_READ);
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if (dest + bufinfo.len > romfs_base + romfs_len) {
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return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
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}
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#if MICROPY_HW_ROMFS_ENABLE_INTERNAL_FLASH
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if (flash_is_valid_addr(dest)) {
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int ret = flash_write(dest, bufinfo.buf, bufinfo.len / 4);
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return MP_OBJ_NEW_SMALL_INT(ret);
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}
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#endif
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#if MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI
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if (qspi_is_valid_addr(dest)) {
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dest -= QSPI_MAP_ADDR;
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int ret = mp_spiflash_write(MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ, dest, bufinfo.len, bufinfo.buf);
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return MP_OBJ_NEW_SMALL_INT(ret);
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}
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#endif
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}
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return MP_OBJ_NEW_SMALL_INT(-MP_EINVAL);
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}
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#endif // MICROPY_VFS_ROM_IOCTL

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