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[K20D50M] PinNames correction, UART pins definitions, GPIO IRQ speed up (as KLxx)
1 parent 079df1a commit 79ee368

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4 files changed

+119
-52
lines changed

4 files changed

+119
-52
lines changed

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/PinNames.h

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -197,10 +197,10 @@ typedef enum {
197197
LED_BLUE = PTA2,
198198

199199
// mbed original LED naming
200-
LED1 = LED_BLUE,
200+
LED1 = LED_RED,
201201
LED2 = LED_GREEN,
202-
LED3 = LED_RED,
203-
LED4 = LED_RED,
202+
LED3 = LED_BLUE,
203+
LED4 = LED_BLUE,
204204

205205
// USB Pins
206206
USBTX = PTB17,
@@ -231,6 +231,12 @@ typedef enum {
231231
A4 = PTB1,
232232
A5 = PTB0,
233233

234+
I2C_SCL = D15,
235+
I2C_SDA = D14,
236+
237+
TSI_ELEC0 = PTB16,
238+
TSI_ELEC1 = PTB17,
239+
234240
// Not connected
235241
NC = (int)0xFFFFFFFF
236242
} PinName;

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/analogin_api.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,8 @@
2020
#include "pinmap.h"
2121
#include "clk_freqs.h"
2222

23+
#define MAX_FADC 6000000
24+
2325
static const PinMap PinMap_ADC[] = {
2426
{PTC2, ADC0_SE4b, 0},
2527
{PTD1, ADC0_SE5b, 0},
@@ -34,8 +36,6 @@ static const PinMap PinMap_ADC[] = {
3436
{NC, NC, 0}
3537
};
3638

37-
#define MAX_FADC 6000000
38-
3939
void analogin_init(analogin_t *obj, PinName pin) {
4040
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
4141
MBED_ASSERT(obj->adc != (ADCName)NC);

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/gpio_irq_api.c

Lines changed: 62 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -29,46 +29,73 @@ static gpio_irq_handler irq_handler;
2929
#define IRQ_FALLING_EDGE PORT_PCR_IRQC(10)
3030
#define IRQ_EITHER_EDGE PORT_PCR_IRQC(11)
3131

32+
static const uint32_t search_bits[] = {0x0000FFFF, 0x000000FF, 0x0000000F, 0x00000003, 0x00000001};
33+
34+
3235
static void handle_interrupt_in(PORT_Type *port, int ch_base) {
33-
uint32_t mask = 0, i;
34-
35-
for (i = 0; i < 32; i++) {
36-
uint32_t pmask = (1 << i);
37-
if (port->ISFR & pmask) {
38-
mask |= pmask;
39-
uint32_t id = channel_ids[ch_base + i];
40-
if (id == 0)
41-
continue;
42-
43-
GPIO_Type *gpio = PTA;
44-
gpio_irq_event event = IRQ_NONE;
45-
uint32_t port_num = (port - PORTA) >> 12;
46-
switch (port->PCR[i] & PORT_PCR_IRQC_MASK) {
47-
case IRQ_RAISING_EDGE:
48-
event = IRQ_RISE;
49-
break;
50-
51-
case IRQ_FALLING_EDGE:
52-
event = IRQ_FALL;
53-
break;
54-
55-
case IRQ_EITHER_EDGE:
56-
gpio += (port_num * 0x40);
57-
event = (gpio->PDIR & pmask) ? (IRQ_RISE) : (IRQ_FALL);
58-
break;
59-
}
60-
if (event != IRQ_NONE)
61-
irq_handler(id, event);
36+
uint32_t isfr;
37+
uint32_t location;
38+
39+
while((isfr = port->ISFR) != 0) {
40+
location = 0;
41+
for (int i = 0; i < 5; i++) {
42+
if (!(isfr & (search_bits[i] << location)))
43+
location += 1 << (4 - i);
6244
}
45+
46+
uint32_t id = channel_ids[ch_base + location];
47+
if (id == 0) {
48+
continue;
49+
}
50+
51+
GPIO_Type *gpio = PTA;
52+
gpio_irq_event event = IRQ_NONE;
53+
uint32_t port_num = (port - PORTA) >> 12;
54+
switch (port->PCR[location] & PORT_PCR_IRQC_MASK) {
55+
case IRQ_RAISING_EDGE:
56+
event = IRQ_RISE;
57+
break;
58+
59+
case IRQ_FALLING_EDGE:
60+
event = IRQ_FALL;
61+
break;
62+
63+
case IRQ_EITHER_EDGE:
64+
gpio += (port_num * 0x40);
65+
event = (gpio->PDIR & (1 << location)) ? (IRQ_RISE) : (IRQ_FALL);
66+
break;
67+
}
68+
if (event != IRQ_NONE) {
69+
irq_handler(id, event);
70+
}
71+
port->ISFR = 1 << location;
6372
}
64-
port->ISFR = mask;
6573
}
6674

67-
void gpio_irqA(void) {handle_interrupt_in(PORTA, 0);}
68-
void gpio_irqB(void) {handle_interrupt_in(PORTB, 32);}
69-
void gpio_irqC(void) {handle_interrupt_in(PORTC, 64);}
70-
void gpio_irqD(void) {handle_interrupt_in(PORTD, 96);}
71-
void gpio_irqE(void) {handle_interrupt_in(PORTE, 128);}
75+
void gpio_irqA(void) {
76+
handle_interrupt_in(PORTA, 0);
77+
}
78+
79+
void gpio_irqB(void)
80+
{
81+
handle_interrupt_in(PORTB, 32);
82+
}
83+
84+
void gpio_irqC(void)
85+
{
86+
handle_interrupt_in(PORTC, 64);
87+
}
88+
89+
void gpio_irqD(void)
90+
{
91+
handle_interrupt_in(PORTD, 96);
92+
}
93+
94+
void gpio_irqE(void)
95+
{
96+
handle_interrupt_in(PORTE, 128);
97+
}
98+
7299

73100
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
74101
if (pin == NC)

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/serial_api.c

Lines changed: 46 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -26,12 +26,20 @@
2626

2727
static const PinMap PinMap_UART_TX[] = {
2828
{PTB17, UART_0, 3},
29-
{NC , NC , 0}
29+
{PTC4 , UART_1, 3},
30+
{PTD3 , UART_2, 3},
31+
{PTD7 , UART_0, 3},
32+
{PTE0 , UART_1, 3},
33+
{NC , NC , 0}
3034
};
3135

3236
static const PinMap PinMap_UART_RX[] = {
3337
{PTB16, UART_0, 3},
34-
{NC , NC , 0}
38+
{PTC3 , UART_1, 3},
39+
{PTD2 , UART_2, 3},
40+
{PTD6 , UART_0, 3},
41+
{PTE1 , UART_1, 3},
42+
{NC , NC , 0}
3543
};
3644

3745
#define UART_NUM 3
@@ -52,18 +60,33 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
5260
obj->uart = (UART_Type *)uart;
5361
// enable clk
5462
switch (uart) {
55-
case UART_0: SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK;
56-
SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK; SIM->SCGC4 |= SIM_SCGC4_UART0_MASK; break;
57-
case UART_1: SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK; SIM->SCGC4 |= SIM_SCGC4_UART1_MASK; break;
58-
case UART_2: SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK; SIM->SCGC4 |= SIM_SCGC4_UART2_MASK; break;
63+
case UART_0:
64+
SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK;
65+
SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK;
66+
SIM->SCGC4 |= SIM_SCGC4_UART0_MASK;
67+
break;
68+
case UART_1:
69+
SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK;
70+
SIM->SCGC4 |= SIM_SCGC4_UART1_MASK;
71+
break;
72+
case UART_2:
73+
SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK;
74+
SIM->SCGC4 |= SIM_SCGC4_UART2_MASK;
75+
break;
5976
}
6077
// Disable UART before changing registers
6178
obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
6279

6380
switch (uart) {
64-
case UART_0: obj->index = 0; break;
65-
case UART_1: obj->index = 1; break;
66-
case UART_2: obj->index = 2; break;
81+
case UART_0:
82+
obj->index = 0;
83+
break;
84+
case UART_1:
85+
obj->index = 1;
86+
break;
87+
case UART_2:
88+
obj->index = 2;
89+
break;
6790
}
6891

6992
// set default baud rate and format
@@ -131,9 +154,20 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
131154

132155
uint32_t parity_enable, parity_select;
133156
switch (parity) {
134-
case ParityNone: parity_enable = 0; parity_select = 0; break;
135-
case ParityOdd : parity_enable = 1; parity_select = 1; data_bits++; break;
136-
case ParityEven: parity_enable = 1; parity_select = 0; data_bits++; break;
157+
case ParityNone:
158+
parity_enable = 0;
159+
parity_select = 0;
160+
break;
161+
case ParityOdd :
162+
parity_enable = 1;
163+
parity_select = 1;
164+
data_bits++;
165+
break;
166+
case ParityEven:
167+
parity_enable = 1;
168+
parity_select = 0;
169+
data_bits++;
170+
break;
137171
default:
138172
break;
139173
}

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