diff --git a/.gitignore b/.gitignore
index 2d20cb18970e8..dd90a6cbae002 100644
--- a/.gitignore
+++ b/.gitignore
@@ -11,6 +11,9 @@ build/
build-*/
docs/genrst/
+# 8232_BLE_SDK
+#8232_BLE_SDK/
+
# Test failure outputs
tests/results/*
diff --git a/.vscode/settings.json b/.vscode/settings.json
new file mode 100644
index 0000000000000..29819fc514087
--- /dev/null
+++ b/.vscode/settings.json
@@ -0,0 +1,20 @@
+{
+ "MicroPython.executeButton": [
+ {
+ "text": "▶",
+ "tooltip": "Run",
+ "alignment": "left",
+ "command": "extension.executeFile",
+ "priority": 3.5
+ }
+ ],
+ "MicroPython.syncButton": [
+ {
+ "text": "$(sync)",
+ "tooltip": "sync",
+ "alignment": "left",
+ "command": "extension.execute",
+ "priority": 4
+ }
+ ]
+}
\ No newline at end of file
diff --git a/8232_BLE_SDK/8232_ble_sdk_v1.3.1_release_note.md b/8232_BLE_SDK/8232_ble_sdk_v1.3.1_release_note.md
new file mode 100644
index 0000000000000..88956ce73dfe6
--- /dev/null
+++ b/8232_BLE_SDK/8232_ble_sdk_v1.3.1_release_note.md
@@ -0,0 +1,65 @@
+## Feature
+
+- clean sensitive words
+
+## merge patch 0007
+
+- Update the flash driver to support the TH flash
+
+## merge patch 0006
+
+- Update the flash driver to support the Zbit 128K flash.
+
+- Update the PM driver.
+
+## merge patch 0005
+
+- Update the flash driver to support the Zbit 512K flash.
+
+## merge patch 0004
+
+- Fixed the bug of memory overflow when MTU Size > 23.
+
+## merge patch 0003
+
+- Fixed XTAL error
+
+- Fixed ATT code error
+
+- Open mutil mac addrsess support macro - SIMPLE_MULTI_MAC_EN
+
+## merge patch 0002
+
+- Added mutil mac address support, default disable.
+
+- Added 32K RC tracking delay function.
+
+- Update SPI driver
+
+- Update flash driver
+
+- Fixed resolving list bug
+
+- Fixed AES-CCM bug
+
+- Fixed hop and version exchange bug
+
+- Fixed ATT find by type value command and read by group type command bug
+
+- Fixed a bug that the connection parameter update flag was not cleared
+
+- Fixed key distribution issue when SC mode is switched to legency pairing mode
+
+- Fixed timestamp capture bug
+
+- Fixed a bug caused by debug information not being cleared
+
+## merge patch 0001
+
+- Fixed SMP vulnerability
+
+- Fixed the problem that UART does not work after sleep wakes up
+
+- Fixed 24M Cap
+
+- Add HCI command and event handle for PHY Update feature
diff --git a/8232_BLE_SDK/ble_sdk_hawk/.cproject b/8232_BLE_SDK/ble_sdk_hawk/.cproject
new file mode 100644
index 0000000000000..979db03693ad7
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/.cproject
@@ -0,0 +1,1125 @@
+
+
+
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diff --git a/8232_BLE_SDK/ble_sdk_hawk/.project b/8232_BLE_SDK/ble_sdk_hawk/.project
new file mode 100644
index 0000000000000..4e57e007d1f41
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/.project
@@ -0,0 +1,82 @@
+
+
+ ble_sdk_hawk
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+ ?name?
+
+
+
+ org.eclipse.cdt.make.core.append_environment
+ true
+
+
+ org.eclipse.cdt.make.core.autoBuildTarget
+ all
+
+
+ org.eclipse.cdt.make.core.buildArguments
+
+
+
+ org.eclipse.cdt.make.core.buildCommand
+ make
+
+
+ org.eclipse.cdt.make.core.buildLocation
+ ${workspace_loc:/ble_lt_ms/Debug}
+
+
+ org.eclipse.cdt.make.core.cleanBuildTarget
+ clean
+
+
+ org.eclipse.cdt.make.core.contents
+ org.eclipse.cdt.make.core.activeConfigSettings
+
+
+ org.eclipse.cdt.make.core.enableAutoBuild
+ false
+
+
+ org.eclipse.cdt.make.core.enableCleanBuild
+ true
+
+
+ org.eclipse.cdt.make.core.enableFullBuild
+ true
+
+
+ org.eclipse.cdt.make.core.fullBuildTarget
+ all
+
+
+ org.eclipse.cdt.make.core.stopOnError
+ true
+
+
+ org.eclipse.cdt.make.core.useDefaultBuildCmd
+ true
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ org.eclipse.cdt.core.cnature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/boot.link b/8232_BLE_SDK/ble_sdk_hawk/boot.link
new file mode 100644
index 0000000000000..fb195ee89db72
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/boot.link
@@ -0,0 +1,82 @@
+/********************************************************************************************************
+ * @file boot.link
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+/* to tell the linker the program begin from __start label in cstartup.s, thus do not treat it as a unused symbol */
+ENTRY(__start)
+
+SECTIONS
+{
+ . = 0x0;
+ .vectors :
+ {
+ *(.vectors)
+ *(.vectors.*) /* MUST as follows, when compile with -ffunction-sections -fdata-sections, session name may changed */
+ }
+ .ram_code :
+ {
+ *(.ram_code)
+ *(.ram_code.*)
+ }
+ PROVIDE(_ramcode_size_ = . );
+ PROVIDE(_ramcode_size_div_16_ = (. + 15 ) / 16);
+ PROVIDE(_ramcode_size_div_256_ = (. + 255) / 256);
+ PROVIDE(_ramcode_size_div_16_align_256_ = ( (. + 255) / 256) * 16);
+ .text :
+ {
+ *(.text)
+ *(.text.*)
+ }
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata.*)
+ }
+
+ . = (((. + 3) / 4)*4);
+ PROVIDE(_dstored_ = .);
+ PROVIDE(_code_size_ = .);
+
+ . = 0x808900 + _ramcode_size_div_256_ * 0x100; /* 0x100 alighned, must greater than or equal to:0x808000 + ram_code_size + irq_vector(0x100) + IC_tag(0x100) + IC_cache(0x800) == 0x808a00 + ram_code_size */
+ .data :
+ AT ( _dstored_ )
+ {
+ . = (((. + 3) / 4)*4);
+ PROVIDE(_start_data_ = . );
+ *(.data);
+ *(.data.*);
+ . = (((. + 3) / 4)*4);
+ PROVIDE(_end_data_ = . );
+ }
+
+ .bss :
+ {
+ . = (((. + 3) / 4)*4);
+ PROVIDE(_start_bss_ = .);
+ *(.sbss)
+ *(.sbss.*)
+ *(.bss)
+ *(.bss.*)
+ }
+ PROVIDE(_end_bss_ = .);
+ PROVIDE(_bin_size_ = _code_size_ + _end_data_ - _start_data_);
+ PROVIDE(_ictag_start_ = 0x808000 + (_ramcode_size_div_256_) * 0x100);
+ PROVIDE(_ictag_end_ = 0x808000 + (_ramcode_size_div_256_ + 1) * 0x100);
+}
\ No newline at end of file
diff --git a/8232_BLE_SDK/ble_sdk_hawk/boot/5316/cstartup_5316.S b/8232_BLE_SDK/ble_sdk_hawk/boot/5316/cstartup_5316.S
new file mode 100644
index 0000000000000..29724be0ced9a
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/boot/5316/cstartup_5316.S
@@ -0,0 +1,231 @@
+/********************************************************************************************************
+ * @file cstartup_5316.S
+ *
+ * @brief This is the boot file for TLSR8232
+ *
+ * @author sihui.wang ;junwei.lu
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#ifdef MCU_STARTUP_5316
+
+#ifndef __LOAD_RAM_SIZE__
+#define __LOAD_RAM_SIZE__ 0xc
+#endif
+
+ .code 16
+@********************************************************************************************************
+@ MACROS AND DEFINIITIONS
+@********************************************************************************************************
+@.include "version.in"
+
+ @ Mode, correspords to bits 0-5 in CPSR
+ .equ MODE_BITS, 0x1F @ Bit mask for mode bits in CPSR
+ .equ IRQ_MODE, 0x12 @ Interrupt Request mode
+ .equ SVC_MODE, 0x13 @ Supervisor mode
+
+ .equ IRQ_STK_SIZE, 0x180
+ .equ __LOAD_RAM, __LOAD_RAM_SIZE__
+
+@********************************************************************************************************
+@ TC32 EXCEPTION VECTORS
+@********************************************************************************************************
+
+ .section .vectors,"ax"
+ .global __reset
+ .global __irq
+ .global __start
+ .global __LOAD_RAM
+
+__start: @ MUST, referenced by boot.link
+
+ .extern irq_handler
+
+ .extern _ramcode_size_div_16_
+ .extern _ramcode_size_div_256_
+ .extern _ramcode_size_div_16_align_256_
+ .extern _ictag_start_
+ .extern _ictag_end_
+
+ .org 0x0
+ tj __reset
+ @.word (BUILD_VERSION)
+ .org 0x8
+ .word (0x544c4e4b)
+ .word (0x00880000 + _ramcode_size_div_16_align_256_)
+
+ .org 0x10
+ tj __irq
+ .org 0x18
+ .word (_bin_size_)
+@********************************************************************************************************
+@ LOW-LEVEL INITIALIZATION
+@********************************************************************************************************
+ .extern main
+
+
+ .org 0x20
+__reset:
+@ tloadr r0, DAT0 + 36
+@ tmov r1, #1024 @ set sws to GPIO
+@ tstorer r1, [r0, #0]
+
+@ tloadr r0, DAT0 + 40 @**** enable watchdog at the very first time
+@ tloadr r1, DAT0 + 44
+@ tstorer r1, [r0, #0]
+
+ tloadr r0, FLL_D
+ tloadr r1, FLL_D+4
+ tloadr r2, FLL_D+8
+
+FLL_STK:
+ tcmp r1, r2
+ tjge FLL_STK_END
+ tstorer r0, [r1, #0]
+ tadd r1, #4
+ tj FLL_STK
+FLL_STK_END:
+
+ tloadr r0, DAT0
+ tmcsr r0
+ tloadr r0, DAT0 + 8
+ tmov r13, r0
+
+ tloadr r0, DAT0 + 4
+ tmcsr r0
+ tloadr r0, DAT0 + 12
+ tmov r13, r0
+
+ tmov r0, #0
+ tloadr r1, DAT0 + 16
+ tloadr r2, DAT0 + 20
+
+ZERO:
+ tcmp r1, r2
+ tjge ZERO_END
+ tstorer r0, [r1, #0]
+ tadd r1, #4
+ tj ZERO
+ZERO_END:
+
+ tloadr r1, DAT0 + 28
+ tloadr r2, DAT0 + 32
+
+ZERO_TAG:
+ tcmp r1, r2
+ tjge ZERO_TAG_END
+ tstorer r0, [r1, #0]
+ tadd r1, #4
+ tj ZERO_TAG
+ZERO_TAG_END:
+
+SETIC:
+ tloadr r1, DAT0 + 24
+ tloadr r0, DAT0 + 36 @ IC tag start
+ tstorerb r0, [r1, #0]
+ tadd r0, #1 @ IC tag end
+ tstorerb r0, [r1, #1]
+ @tmov r0, #0;
+ @tstorerb r0, [r1, #2]
+
+
+ tloadr r1, DATA_I
+ tloadr r2, DATA_I+4
+ tloadr r3, DATA_I+8
+COPY_DATA:
+ tcmp r2, r3
+ tjge COPY_DATA_END
+ tloadr r0, [r1, #0]
+ tstorer r0, [r2, #0]
+ tadd r1, #4
+ tadd r2, #4
+ tj COPY_DATA
+COPY_DATA_END:
+
+#if 0
+SETSPISPEED:
+ tloadr r1, DAT0 + 36
+ tmov r0, #0xbb @0x0b for fast read; 0xbb for dual dat/adr
+ tstorerb r0, [r1, #0]
+ tmov r0, #3 @3 for dual dat/adr
+ tstorerb r0, [r1, #1]
+#endif
+
+ tjl main
+END: tj END
+
+ .balign 4
+DAT0:
+ .word 0x12 @IRQ @0
+ .word 0x13 @SVC @4
+ .word (irq_stk + IRQ_STK_SIZE)
+ .word (0x80c000) @12 stack end
+ .word (_start_bss_) @16
+ .word (_end_bss_) @20
+ .word (0x80060c) @24
+ .word _ictag_start_ @28 @ IC tag start
+ .word _ictag_end_ @32 @ IC tag end
+ .word _ramcode_size_div_256_ @36
+@ .word (0x808000 + __LOAD_RAM * 0x100) @28 @ IC tag start
+@ .word (0x808000 + (__LOAD_RAM + 1) * 0x100) @32 @ IC tag end
+@ .word (0x80000e) @36
+@ .word (0x80058c) @36 gpio
+@ .word (0x800620) @40 watchdog
+@ .word (0x802c01) @44 watchdog
+DATA_I:
+ .word _dstored_
+ .word _start_data_
+ .word _end_data_
+
+FLL_D:
+ .word 0xffffffff
+ .word (_start_data_)
+ .word (0x80c000)
+
+ .align 4
+__irq:
+ tpush {r14}
+ tpush {r0-r7}
+ tmrss r0
+
+ tmov r1, r8
+ tmov r2, r9
+ tmov r3, r10
+ tmov r4, r11
+ tmov r5, r12
+ tpush {r0-r5}
+
+ tjl irq_handler
+
+ tpop {r0-r5}
+ tmov r8, r1
+ tmov r9, r2
+ tmov r10,r3
+ tmov r11,r4
+ tmov r12,r5
+
+ tmssr r0
+ tpop {r0-r7}
+ treti {r15}
+
+ASMEND:
+
+ .section .bss
+ .align 4
+ .lcomm irq_stk, IRQ_STK_SIZE
+ .end
+
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/common/assert.h b/8232_BLE_SDK/ble_sdk_hawk/common/assert.h
new file mode 100644
index 0000000000000..21bd930c92d61
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/common/assert.h
@@ -0,0 +1,81 @@
+/********************************************************************************************************
+ * @file assert.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 30, 2010
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "config/user_config.h" // for __DEBUG__
+
+///////////////////////////////////////////////////////////////////////////////////
+#if (__DEBUG__)
+#include "printf.h"
+
+#define assert(expression) \
+ do{if(!(expression)) __assert (expression, __FILE__, __LINE__)}while(0)
+
+#define __assert(expression, file, lineno) {printf ("%s:%u: assertion failed!\n", file, lineno);}
+
+#else
+#define assert(ignore) ((void) 0)
+#endif
+
+//////////////////// To do compiler warning //////////////////
+// http://stackoverflow.com/questions/5966594/how-can-i-use-pragma-message-so-that-the-message-points-to-the-filelineno
+// http://gcc.gnu.org/ml/gcc-help/2010-10/msg00196.html
+// http://stackoverflow.com/questions/3030099/c-c-pragma-in-define-macro
+
+#define _STRINGIFY(x) #x
+#define STRINGIFY(x) _STRINGIFY(x)
+
+#ifdef __GNUC__
+#define COMPILE_MESSAGE(x) _Pragma (#x)
+#endif
+
+#if (__SHOW_TODO__)
+#ifdef __GNUC__
+#define TODO(x) COMPILE_MESSAGE(message ("--TODO-- " #x))
+#else
+#define TODO(x) __pragma(message("--TODO-- "_STRINGIFY(x) " ::function: " __FUNCTION__ "@"STRINGIFY(__LINE__)))
+#endif
+#else
+#define TODO(x)
+#endif
+
+#if (__SHOW_WARN__)
+#ifdef __GNUC__
+#define WARN(x) COMPILE_MESSAGE(message ("--WARN-- " #x))
+#else
+#define WARN(x) __pragma(message("--WARN-- "_STRINGIFY(x) " ::function: " __FUNCTION__ "@"STRINGIFY(__LINE__)))
+#endif
+#else
+#define WARN(x)
+#endif
+
+#if (__SHOW_WARN__)
+#ifdef __GNUC__
+#define NOTE(x) COMPILE_MESSAGE(message ("--NOTE-- " #x))
+#else
+#define NOTE(x) __pragma(message("--NOTE-- "_STRINGIFY(x) " ::function: " __FUNCTION__ "@"STRINGIFY(__LINE__)))
+#endif
+#else
+#define NOTE(x)
+#endif
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/common/bit.h b/8232_BLE_SDK/ble_sdk_hawk/common/bit.h
new file mode 100644
index 0000000000000..4028abe1dfc9a
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/common/bit.h
@@ -0,0 +1,239 @@
+/********************************************************************************************************
+ * @file bit.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 30, 2010
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+#include "macro_trick.h"
+
+#define BIT(n) ( 1<<(n) )
+
+// BITSx are internal used macro, please use BITS instead
+#define BITS1(a) BIT(a)
+#define BITS2(a, b) (BIT(a) | BIT(b))
+#define BITS3(a, b, c) (BIT(a) | BIT(b) | BIT(c))
+#define BITS4(a, b, c, d) (BIT(a) | BIT(b) | BIT(c) | BIT(d))
+#define BITS5(a, b, c, d, e) (BIT(a) | BIT(b) | BIT(c) | BIT(d) | BIT(e))
+#define BITS6(a, b, c, d, e, f) (BIT(a) | BIT(b) | BIT(c) | BIT(d) | BIT(e) | BIT(f))
+#define BITS7(a, b, c, d, e, f, g) (BIT(a) | BIT(b) | BIT(c) | BIT(d) | BIT(e) | BIT(f) | BIT(g))
+#define BITS8(a, b, c, d, e, f, g, h) (BIT(a) | BIT(b) | BIT(c) | BIT(d) | BIT(e) | BIT(f) | BIT(g) | BIT(h))
+
+#define BITS(...) VARARG(BITS, __VA_ARGS__)
+
+
+// bits range: BITS_RNG(4, 5) 0b000111110000, start from 4, length = 5
+#define BIT_RNG(s, e) (BIT_MASK_LEN((e)-(s)+1) << (s))
+
+#define BM_MASK_V(x, mask) ( (x) | (mask) )
+#define BM_CLR_MASK_V(x, mask) ( (x) & ~(mask) )
+
+#define BM_SET(x, mask) ( (x) |= (mask) )
+#define BM_CLR(x, mask) ( (x) &= ~(mask) )
+#define BM_IS_SET(x, mask) ( (x) & (mask) )
+#define BM_IS_CLR(x, mask) ( (~x) & (mask) )
+#define BM_FLIP(x, mask) ( (x) ^= (mask) )
+
+// !!!! v is already a masked value, no need to shift
+#define BM_MASK_VAL(x, mask, v) ( ((x) & ~(mask)) | (v))
+#define BM_SET_MASK_VAL(x, mask, v) ( (x) = BM_MASK_VAL(x, mask, v) )
+
+
+#define BIT_SET(x, n) ((x) |= BIT(n))
+#define BIT_CLR(x, n) ((x) &= ~ BIT(n))
+#define BIT_IS_SET(x, n) ((x) & BIT(n))
+#define BIT_FLIP(x, n) ((x) ^= BIT(n))
+#define BIT_SET_HIGH(x) ((x) |= BIT((sizeof((x))*8-1))) // set the highest bit
+#define BIT_CLR_HIGH(x) ((x) &= ~ BIT((sizeof((x))*8-1))) // clr the highest bit
+#define BIT_IS_SET_HIGH(x) ((x) & BIT((sizeof((x))*8-1))) // check the higest bit
+
+#define BIT_MASK_LEN(len) (BIT(len)-1)
+#define BIT_MASK(start, len) (BIT_MASK_LEN(len) << (start) )
+
+//! Prepare a bitmask for insertion or combining.
+#define BIT_PREP(x, start, len) ((x) & BIT_MASK(start, len))
+
+//! Extract a bitfield of length \a len starting at bit \a start from \a y.
+#define BIT_GET(x, start, len) (((x) >> (start)) & BIT_MASK_LEN(len))
+#define BIT_GET_LOW(x, len) ((x) & BIT_MASK_LEN(len))
+
+//! Insert a new bitfield value \a x into \a y.
+#define BIT_MERGE(y, x, start, len) \
+ ( y = ((y) &~ BIT_MASK(start, len)) | BIT_PREP(x, start, len) )
+
+#define BIT_IS_EVEN(x) (((x)&1)==0)
+#define BIT_IS_ODD(x) (!BIT_IS_EVEN((x)))
+#define BIT_IS_POW2(x) (!((x) & ((x)-1)))
+#define BIT_TURNOFF_1(x) ((x) &= ((x)-1))
+#define BIT_ISOLATE_1(x) ((x) &= (-(x)))
+#define BIT_PROPAGATE_1(x) ((x) |= ((x)-1))
+#define BIT_ISOLATE_0(x) ((x) = ~(x) & ((x)+1))
+#define BIT_TURNON_0(x) ((x) |= ((x)+1))
+#define CLAMP_TO_ONE(x) (!!(x)) // compiler defined, not stardard. 0 --> 0, 1 --> 0xffffffff
+
+#define ONES(x) BIT_MASK_LEN(x)
+#define ONES_32 0xffffffff
+#define ALL_SET 0xffffffff
+
+
+
+// Return the bit index of the lowest 1 in y. ex: 0b00110111000 --> 3
+#define BIT_LOW_BIT(y) (((y) & BIT(0))?0:(((y) & BIT(1))?1:(((y) & BIT(2))?2:(((y) & BIT(3))?3: \
+ (((y) & BIT(4))?4:(((y) & BIT(5))?5:(((y) & BIT(6))?6:(((y) & BIT(7))?7: \
+ (((y) & BIT(8))?8:(((y) & BIT(9))?9:(((y) & BIT(10))?10:(((y) & BIT(11))?11: \
+ (((y) & BIT(12))?12:(((y) & BIT(13))?13:(((y) & BIT(14))?14:(((y) & BIT(15))?15: \
+ (((y) & BIT(16))?16:(((y) & BIT(17))?17:(((y) & BIT(18))?18:(((y) & BIT(19))?19: \
+ (((y) & BIT(20))?20:(((y) & BIT(21))?21:(((y) & BIT(22))?22:(((y) & BIT(23))?23: \
+ (((y) & BIT(24))?24:(((y) & BIT(25))?25:(((y) & BIT(26))?26:(((y) & BIT(27))?27: \
+ (((y) & BIT(28))?28:(((y) & BIT(29))?29:(((y) & BIT(30))?30:(((y) & BIT(31))?31:32 \
+ ))))))))))))))))))))))))))))))))
+
+// Return the bit index of the highest 1 in (y). ex: 0b00110111000 --> 8
+#define BIT_HIGH_BIT(y) (((y) & BIT(31))?31:(((y) & BIT(30))?30:(((y) & BIT(29))?29:(((y) & BIT(28))?28: \
+ (((y) & BIT(27))?27:(((y) & BIT(26))?26:(((y) & BIT(25))?25:(((y) & BIT(24))?24: \
+ (((y) & BIT(23))?23:(((y) & BIT(22))?22:(((y) & BIT(21))?21:(((y) & BIT(20))?20: \
+ (((y) & BIT(19))?19:(((y) & BIT(18))?18:(((y) & BIT(17))?17:(((y) & BIT(16))?16: \
+ (((y) & BIT(15))?15:(((y) & BIT(14))?14:(((y) & BIT(13))?13:(((y) & BIT(12))?12: \
+ (((y) & BIT(11))?11:(((y) & BIT(10))?10:(((y) & BIT(9))?9:(((y) & BIT(8))?8: \
+ (((y) & BIT(7))?7:(((y) & BIT(6))?6:(((y) & BIT(5))?5:(((y) & BIT(4))?4: \
+ (((y) & BIT(3))?3:(((y) & BIT(2))?2:(((y) & BIT(1))?1:(((y) & BIT(0))?0:32 \
+ ))))))))))))))))))))))))))))))))
+
+#define BM_MASK_FLD(x, mask) (((x) & (mask)) >> BIT_LOW_BIT(mask))
+#define BM_SET_MASK_FLD(x, mask, v) ( (x) = BM_MASK_VAL(x,mask,v) )
+
+//////////////////////
+#define MV(m, v) (((v) << BIT_LOW_BIT(m)) & (m))
+
+// warning MASK_VALn are internal used macro, please use MASK_VAL instead
+#define MASK_VAL2(m, v) (MV(m,v))
+#define MASK_VAL4(m1,v1,m2,v2) (MV(m1,v1)|MV(m2,v2))
+#define MASK_VAL6(m1,v1,m2,v2,m3,v3) (MV(m1,v1)|MV(m2,v2)|MV(m3,v3))
+#define MASK_VAL8(m1,v1,m2,v2,m3,v3,m4,v4) (MV(m1,v1)|MV(m2,v2)|MV(m3,v3)|MV(m4,v4))
+#define MASK_VAL10(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5) (MV(m1,v1)|MV(m2,v2)|MV(m3,v3)|MV(m4,v4)|MV(m5,v5))
+#define MASK_VAL12(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5,m6,v6) (MV(m1,v1)|MV(m2,v2)|MV(m3,v3)|MV(m4,v4)|MV(m5,v5)|MV(m6,v6))
+#define MASK_VAL14(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5,m6,v6,m7,v7) (MV(m1,v1)|MV(m2,v2)|MV(m3,v3)|MV(m4,v4)|MV(m5,v5)|MV(m6,v6)|MV(m7,v7))
+#define MASK_VAL16(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5,m6,v6,m7,v7,m8,v8) (MV(m1,v1)|MV(m2,v2)|MV(m3,v3)|MV(m4,v4)|MV(m5,v5)|MV(m6,v6)|MV(m7,v7)|MV(m8,v8))
+
+#define MASK_VAL(...) VARARG(MASK_VAL, __VA_ARGS__)
+
+#define FLD_MASK_VAL(x, mask, v) BM_MASK_VAL(x, mask, MV(mask,v))
+
+#define SET_FLD(x, mask) BM_SET(x, mask)
+#define CLR_FLD(x, mask) BM_CLR(x, mask)
+#define FLIP_FLD(x, mask) BM_FLIP(x, mask)
+
+#define GET_FLD(x, mask) BM_MASK_FLD(x, mask)
+
+#define SET_FLD_V(...) VARARG(SET_FLD_V, __VA_ARGS__)
+
+
+// ����һ���겻һ���������ʾֱ�Ӹ�ֵ
+#define SET_FLD_FULL_V3(x, m, v) ((x) = MASK_VAL2(m,v))
+#define SET_FLD_FULL_V5(x, m1, v1, m2, v2) ((x) = MASK_VAL4(m1,v1,m2,v2))
+#define SET_FLD_FULL_V7(x, m1, v1, m2, v2, m3, v3) ((x) = MASK_VAL6(m1,v1,m2,v2,m3,v3))
+#define SET_FLD_FULL_V9(x, m1, v1, m2, v2, m3, v3, m4, v4) ((x) = MASK_VAL8(m1,v1,m2,v2,m3,v3,m4,v4))
+#define SET_FLD_FULL_V11(x, m1, v1, m2, v2, m3, v3, m4, v4, m5, v5) ((x) = MASK_VAL10(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5))
+#define SET_FLD_FULL_V13(x, m1, v1, m2, v2, m3, v3, m4, v4, m5, v5, m6, v6) ((x) = MASK_VAL12(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5,m6,v6))
+#define SET_FLD_FULL_V(...) VARARG(SET_FLD_FULL_V, __VA_ARGS__)
+
+////////////////////////////////////////////////////////////////////////
+#define BIT8_IFY(y) ( \
+ ((y&0x0000000FLU)?1:0) + ((y&0x000000F0LU)? 2:0) + ((y&0x00000F00LU)? 4:0) + \
+ ((y&0x0000F000LU)?8:0) + ((y&0x000F0000LU)?16:0) + ((y&0x00F00000LU)?32:0) + \
+ ((y&0x0F000000LU)?64:0) + ((y&0xF0000000LU)?128:0) \
+ )
+
+#define HEX_X(i) (0x##i##LU)
+
+#define BIT_8(j) ((unsigned char)BIT8_IFY(HEX_X(j)))
+
+#ifndef WIN32
+ // warning SET_FLD_Vn are internal used macro, please use SET_FLD_V instead
+ #define SET_FLD_V3(x, m, v) \
+ BM_SET_MASK_FLD(x,m,MV(m,v))
+
+ #define SET_FLD_V5(x, m1, v1, m2, v2) \
+ BM_SET_MASK_FLD(x, m1|m2, MV(m1,v1)| MV(m2,v2))
+
+ #define SET_FLD_V7(x, m1, v1, m2, v2, m3, v3) \
+ BM_SET_MASK_FLD(x, m1|m2|m3, MV(m1,v1)| MV(m2,v2)| MV(m3,v3))
+
+ #define SET_FLD_V9(x, m1, v1, m2, v2, m3, v3, m4, v4) \
+ BM_SET_MASK_FLD(x, m1|m2|m3|m4, MV(m1,v1)| MV(m2,v2)| MV(m3,v3)| MV(m4,v4))
+
+ #define SET_FLD_V11(x, m1, v1, m2, v2, m3, v3, m4, v4, m5, v5) \
+ BM_SET_MASK_FLD(x, m1|m2|m3|m4|m5, MV(m1,v1)| MV(m2,v2)| MV(m3,v3)| MV(m4,v4)| MV(m5,v5))
+
+ #define SET_FLD_V13(x, m1, v1, m2, v2, m3, v3, m4, v4, m5, v5, m6, v6) \
+ BM_SET_MASK_FLD(x, m1|m2|m3|m4|m5|m6, MV(m1,v1)| MV(m2,v2)| MV(m3,v3)| MV(m4,v4)| MV(m5,v5)| MV(m6,v6))
+#else
+ #define SET_FLD_V3(x, m, v) \
+ __pragma(warning(push)) \
+ __pragma(warning(disable:4244)) \
+ BM_SET_MASK_FLD(x,m,MV(m,v)) \
+ __pragma(warning(pop))
+
+ #define SET_FLD_V5(x, m1, v1, m2, v2) \
+ __pragma(warning(push)) \
+ __pragma(warning(disable:4244)) \
+ BM_SET_MASK_FLD(x, m1|m2, MV(m1,v1)| MV(m2,v2)) \
+ __pragma(warning(pop))
+
+ #define SET_FLD_V7(x, m1, v1, m2, v2, m3, v3) \
+ __pragma(warning(push)) \
+ __pragma(warning(disable:4244)) \
+ BM_SET_MASK_FLD(x, m1|m2|m3, MV(m1,v1)| MV(m2,v2)| MV(m3,v3)) \
+ __pragma(warning(pop))
+
+ #define SET_FLD_V9(x, m1, v1, m2, v2, m3, v3, m4, v4) \
+ __pragma(warning(push)) \
+ __pragma(warning(disable:4244)) \
+ BM_SET_MASK_FLD(x, m1|m2|m3|m4, MV(m1,v1)| MV(m2,v2)| MV(m3,v3)| MV(m4,v4)) \
+ __pragma(warning(pop))
+
+ #define SET_FLD_V11(x, m1, v1, m2, v2, m3, v3, m4, v4, m5, v5) \
+ __pragma(warning(push)) \
+ __pragma(warning(disable:4244)) \
+ BM_SET_MASK_FLD(x, m1|m2|m3|m4|m5, MV(m1,v1)| MV(m2,v2)| MV(m3,v3)| MV(m4,v4)| MV(m5,v5)) \
+ __pragma(warning(pop))
+
+ #define SET_FLD_V13(x, m1, v1, m2, v2, m3, v3, m4, v4, m5, v5, m6, v6) \
+ __pragma(warning(push)) \
+ __pragma(warning(disable:4244)) \
+ BM_SET_MASK_FLD(x, m1|m2|m3|m4|m5|m6, MV(m1,v1)| MV(m2,v2)| MV(m3,v3)| MV(m4,v4)| MV(m5,v5)| MV(m6,v6)) \
+ __pragma(warning(pop))
+#endif
+
+#if 0
+ //! Massage \a x for use in bitfield \a name.
+ #define BFN_PREP(x, name) ( ((x)<>name##_SHIFT )
+
+ //! Set bitfield \a name from \a y to \a x: y.name= x.
+ #define BFN_SET(y, x, name) (y = ((y)&~name##_MASK) | BFN_PREP(x,name) )
+
+ // Usage: prio get/set like before:
+ prio= BFN_GET(attr2, ATTR2_PRIO);
+ BFN_SET(attr2, x, ATTR2_PRIO);
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/common/config/user_config.h b/8232_BLE_SDK/ble_sdk_hawk/common/config/user_config.h
new file mode 100644
index 0000000000000..26208b871e189
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/common/config/user_config.h
@@ -0,0 +1,26 @@
+/********************************************************************************************************
+ * @file user_config.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 30, 2010
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "../../vendor/common/user_config.h"
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/common/log_id.h b/8232_BLE_SDK/ble_sdk_hawk/common/log_id.h
new file mode 100644
index 0000000000000..db6cddd73aed7
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/common/log_id.h
@@ -0,0 +1,91 @@
+/********************************************************************************************************
+ * @file log_id.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 30, 2010
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/*
+ ID == -1 is invalid
+ if you want to shut down logging a specified id, assigne -1 to it
+*/
+
+
+///////////////////////////////////////////////////////////////
+
+// Please donot change the following system defines
+//
+
+#define TR_T_invalid -1
+#define TR_T_EVENT_0 0
+#define TR_T_EVENT_1 1
+#define TR_T_EVENT_2 2
+#define TR_T_EVENT_3 3
+#define TR_T_EVENT_4 4
+#define TR_T_EVENT_5 5
+#define TR_T_EVENT_6 6
+#define TR_T_EVENT_7 7
+#define TR_T_EVENT_8 8
+#define TR_T_EVENT_E 9
+
+#define TR_T_POLL_0 10
+#define TR_T_POLL_1 11
+#define TR_T_POLL_2 12
+#define TR_T_POLL_3 13
+#define TR_T_POLL_4 14
+#define TR_T_POLL_5 15
+#define TR_T_POLL_6 16
+#define TR_T_POLL_7 17
+#define TR_T_POLL_8 18
+#define TR_T_POLL_E 19
+
+#define TR_T_TIMER_0 20
+#define TR_T_TIMER_1 21
+#define TR_T_TIMER_2 22
+#define TR_T_TIMER_3 23
+#define TR_T_TIMER_4 24
+#define TR_T_TIMER_5 25
+#define TR_T_TIMER_6 26
+#define TR_T_TIMER_7 27
+#define TR_T_TIMER_8 28
+#define TR_T_TIMER_E 29 // user define tick log id, from 30 - 40, 10 valid for using
+
+#define TR_T_user0 30
+
+#define TR_24_TIMERS_ADDR 0 // this ID cant be used because timer id == 0 is reserved for indicating id not added
+#define TR_24_TIMER0_ADDR 1
+#define TR_24_TIMER1_ADDR 2
+#define TR_24_TIMER2_ADDR 3
+#define TR_24_TIMER3_ADDR 4
+#define TR_24_TIMER4_ADDR 5
+#define TR_24_TIMER5_ADDR 6
+#define TR_24_TIMER6_ADDR 7
+#define TR_24_TIMER7_ADDR 8
+#define TR_24_TIMER8_ADDR 9
+#define TR_24_TIMER9_ADDR 10
+#define TR_24_TIMER10_ADDR 11
+#define TR_24_TIMER11_ADDR 12
+#define TR_24_TIMER12_ADDR 13
+#define TR_24_TIMER13_ADDR 14
+#define TR_24_TIMER14_ADDR 15
+
+#define TR_24_user1 16 // user define data log id, from 16 -- 64,
+#define TR_24_user2 17
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/common/macro_trick.h b/8232_BLE_SDK/ble_sdk_hawk/common/macro_trick.h
new file mode 100644
index 0000000000000..863f4337618ec
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/common/macro_trick.h
@@ -0,0 +1,73 @@
+/********************************************************************************************************
+ * @file macro_trick.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 30, 2010
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+///////////////// variadic macro ////////////////////////
+
+#if 1
+// a little more complex version that works with GCC and visual studio
+
+/// http://stackoverflow.com/questions/9183993/msvc-variadic-macro-expansion
+#define COUNT_ARGS_IMPL2(_1, _2, _3, _4, _5, _6, _7, _8 , _9, _10, _11, _12, _13, _14, _15, _16, _17, _18, _19, _20, N, ...) N
+#define COUNT_ARGS_IMPL(args) COUNT_ARGS_IMPL2 args
+#define COUNT_ARGS(...) COUNT_ARGS_IMPL((__VA_ARGS__, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0))
+
+#define MACRO_CHOOSE_HELPER2(base, count) base##count
+#define MACRO_CHOOSE_HELPER1(base, count) MACRO_CHOOSE_HELPER2(base, count)
+#define MACRO_CHOOSE_HELPER(base, count) MACRO_CHOOSE_HELPER1(base, count)
+
+#define MACRO_GLUE(x, y) x y
+#define VARARG(base, ...) MACRO_GLUE(MACRO_CHOOSE_HELPER(base, COUNT_ARGS(__VA_ARGS__)),(__VA_ARGS__))
+// usage
+/*
+ #define fun1(a) xxxx
+ #define fun2(a, b) xxxx
+ #define fun3(a, b, c) xxxx
+
+ #define fun(...) VARARG(fun, __VA_ARGS__)
+
+ int main(){
+ fun(1); // calls fun1(1)
+ fun(1, 2); // calls fun2(1,2)
+ fun(1, 2, 3); // calls fun3(1,2,3)
+ }
+
+*/
+
+
+#else
+// a concise version that only works with GCC
+
+/// http://stackoverflow.com/questions/2124339/c-preprocessor-va-args-number-of-arguments
+
+#define VA_NARGS_IMPL(_1, _2, _3, _4, _5, _6, _7, _8 , _9, _10, N, ...) N
+#define VA_NARGS(...) VA_NARGS_IMPL(X,##__VA_ARGS__, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+#define VARARG_IMPL2(base, count, ...) base##count(__VA_ARGS__)
+#define VARARG_IMPL(base, count, ...) VARARG_IMPL2(base, count, __VA_ARGS__)
+#define VARARG(base, ...) VARARG_IMPL(base, VA_NARGS(__VA_ARGS__), __VA_ARGS__)
+
+#endif
+// #define NUMARGS(...) (sizeof((int[]){__VA_ARGS__})/sizeof(int))
+
+///////////////// end of variadic macro //////////////////////
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/common/printf.c b/8232_BLE_SDK/ble_sdk_hawk/common/printf.c
new file mode 100644
index 0000000000000..64c4be4ef40fc
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/common/printf.c
@@ -0,0 +1,224 @@
+/********************************************************************************************************
+ * @file printf.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 30, 2010
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+
+/*
+ putchar is the only external dependency for this file,
+ if you have a working putchar, leave it commented out.
+ If not, uncomment the define below and
+ replace outbyte(c) by your own function call.
+
+ #define putchar(c) outbyte(c)
+ */
+#include "printf.h"
+#include
+
+static void printchar(char **str, int c)
+{
+ if(str){
+ **str = c;
+ ++(*str);
+ }else{
+ putchar(c);
+ }
+}
+
+#define PAD_RIGHT 1
+#define PAD_ZERO 2
+
+static int prints(char **out, const char *string, int width, int pad)
+{
+ register int pc = 0, padchar = ' ';
+
+ if (width > 0) {
+ register int len = 0;
+ register const char *ptr;
+ for (ptr = string; *ptr; ++ptr)
+ ++len;
+ if (len >= width)
+ width = 0;
+ else
+ width -= len;
+ if (pad & PAD_ZERO)
+ padchar = '0';
+ }
+ if (!(pad & PAD_RIGHT)) {
+ for (; width > 0; --width) {
+ printchar(out, padchar);
+ ++pc;
+ }
+ }
+ for (; *string; ++string) {
+ printchar(out, *string);
+ ++pc;
+ }
+ for (; width > 0; --width) {
+ printchar(out, padchar);
+ ++pc;
+ }
+
+ return pc;
+}
+
+/* the following should be enough for 32 bit int */
+#define PRINT_BUF_LEN 12
+
+static int printi(char **out, int i, int b, int sg, int width, int pad, int letbase)
+{
+ char print_buf[PRINT_BUF_LEN];
+ register char *s;
+ register int t, neg = 0, pc = 0;
+ register unsigned int u = i;
+
+ if (i == 0) {
+ print_buf[0] = '0';
+ print_buf[1] = '\0';
+ return prints(out, print_buf, width, pad);
+ }
+
+ if (sg && b == 10 && i < 0) {
+ neg = 1;
+ u = -i;
+ }
+
+ s = print_buf + PRINT_BUF_LEN - 1;
+ *s = '\0';
+
+ while (u) {
+ t = u % b;
+ if (t >= 10)
+ t += letbase - '0' - 10;
+ *--s = t + '0';
+ u /= b;
+ }
+
+ if (neg) {
+ if (width && (pad & PAD_ZERO)) {
+ printchar(out, '-');
+ ++pc;
+ --width;
+ } else {
+ *--s = '-';
+ }
+ }
+
+ return pc + prints(out, s, width, pad);
+}
+
+static int print(char **out, const char *format, va_list args)
+{
+ register int width, pad;
+ register int pc = 0;
+ char scr[2];
+
+ for (; *format != 0; ++format) {
+ if (*format == '%') {
+ ++format;
+ width = pad = 0;
+ if (*format == '\0')
+ break;
+ if (*format == '%')
+ goto out;
+ if (*format == '-') {
+ ++format;
+ pad = PAD_RIGHT;
+ }
+ while (*format == '0') {
+ ++format;
+ pad |= PAD_ZERO;
+ }
+ for (; *format >= '0' && *format <= '9'; ++format) {
+ width *= 10;
+ width += *format - '0';
+ }
+ if (*format == 's') {
+ register char *s = (char *) va_arg( args, int );
+ pc += prints(out, s ? s : "(null)", width, pad);
+ continue;
+ }
+ if (*format == 'd') {
+ pc += printi(out, va_arg( args, int ), 10, 1, width, pad, 'a');
+ continue;
+ }
+ if (*format == 'x') {
+ pc += printi(out, va_arg( args, int ), 16, 0, width, pad, 'a');
+ continue;
+ }
+ if (*format == 'X') {
+ pc += printi(out, va_arg( args, int ), 16, 0, width, pad, 'A');
+ continue;
+ }
+ if (*format == 'u') {
+ pc += printi(out, va_arg( args, int ), 10, 0, width, pad, 'a');
+ continue;
+ }
+ if (*format == 'c') {
+ /* char are converted to int then pushed on the stack */
+ scr[0] = (char) va_arg( args, int );
+ scr[1] = '\0';
+ pc += prints(out, scr, width, pad);
+ continue;
+ }
+ } else {
+ out: printchar(out, *format);
+ ++pc;
+ }
+ }
+ if (out)
+ **out = '\0';
+ va_end( args );
+ return pc;
+}
+
+int my_printf(const char *format, ...)
+{
+ int cnt = 0;
+ va_list args;
+
+ va_start( args, format );
+ cnt = print(0, format, args);
+ va_end(args);
+
+ return cnt;
+}
+
+int my_sprintf(char *out, const char *format, ...)
+{
+ int cnt = 0;
+ va_list args;
+
+ va_start( args, format );
+ cnt = print(&out, format, args);
+ va_end(args);
+
+ return cnt;
+}
+
+void array_printf(unsigned char*data, unsigned int len)
+{
+ my_printf("{");
+ for(int i = 0; i < len; ++i){
+ my_printf("%02X,", data[i]);
+ }
+ my_printf("}\n");
+}
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/common/printf.h b/8232_BLE_SDK/ble_sdk_hawk/common/printf.h
new file mode 100644
index 0000000000000..5af9c65a50101
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/common/printf.h
@@ -0,0 +1,42 @@
+/********************************************************************************************************
+ * @file printf.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 30, 2010
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+
+#if(SIMULATE_UART_EN)
+ int my_printf(const char *fmt, ...);
+ int my_sprintf(char* s, const char *fmt, ...);
+ void array_printf(unsigned char*data, unsigned int len);
+ #define printf my_printf
+ #define sprintf my_sprintf
+ #define print_array array_printf
+#else
+ #define printf
+ #define sprintf
+ #define print_array
+#endif
+
+
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/common/static_assert.h b/8232_BLE_SDK/ble_sdk_hawk/common/static_assert.h
new file mode 100644
index 0000000000000..88e50012f02b9
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/common/static_assert.h
@@ -0,0 +1,41 @@
+/********************************************************************************************************
+ * @file static_assert.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 30, 2010
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+// static assertion. evaluate at compile time. It is very useful like, STATIC_ASSERT(sizeof(a) == 5);
+
+// #define STATIC_ASSERT(expr) { char static_assertion[(expr) ? 1 : -1]; ((void) static_assertion); } // (void) array; to remove compiler unused variable warning
+
+// more complicated version canbe used anywhere in the source
+#define STATIC_ASSERT_M(COND,MSG) typedef char static_assertion_##MSG[(!!(COND))*2-1]
+// token pasting madness:
+#define STATIC_ASSERT3(X,L) STATIC_ASSERT_M(X,static_assertion_at_line_##L)
+#define STATIC_ASSERT2(X,L) STATIC_ASSERT3(X,L)
+
+#define STATIC_ASSERT(X) STATIC_ASSERT2(X,__LINE__)
+
+#define STATIC_ASSERT_POW2(expr) STATIC_ASSERT(!((expr) & ((expr)-1))) // assert expr is 2**N
+#define STATIC_ASSERT_EVEN(expr) STATIC_ASSERT(!((expr) & 1))
+#define STATIC_ASSERT_ODD(expr) STATIC_ASSERT(((expr) & 1))
+#define STATIC_ASSERT_INT_DIV(a, b) STATIC_ASSERT((a) / (b) * (b) == (a))
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/common/string.c b/8232_BLE_SDK/ble_sdk_hawk/common/string.c
new file mode 100644
index 0000000000000..d482506bb23f2
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/common/string.c
@@ -0,0 +1,207 @@
+/********************************************************************************************************
+ * @file string.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 30, 2010
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "types.h"
+#include "string.h"
+#include "assert.h"
+
+
+char* strcpy(char * dst0, const char * src0) {
+ char *s = dst0;
+ while ((*dst0++ = *src0++))
+ ;
+ return s;
+}
+
+char * strchr(const char *s, int c) {
+ do {
+ if (*s == c) {
+ return (char*) s;
+ }
+ } while (*s++);
+ return (0);
+}
+
+int memcmp(const void * m1, const void *m2, u32 len) {
+ u8 *st1 = (u8 *) m1;
+ u8 *st2 = (u8 *) m2;
+
+ while(len--){
+ if(*st1 != *st2){
+ return (*st1 - *st2);
+ }
+ st1++;
+ st2++;
+ }
+ return 0;
+}
+
+void * memchr(register const void * src_void, int c, unsigned int length) {
+ const unsigned char *src = (const unsigned char *) src_void;
+
+ while (length-- > 0) {
+ if (*src == c)
+ return (void *) src;
+ src++;
+ }
+ return NULL;
+}
+
+void * memmove(void * dest, const void * src, unsigned int n) {
+ char * d = (char *)dest;
+ char * s = (char *)src;
+
+ while (n--)
+ *d++ = *s++;
+
+ return dest;
+}
+
+void bbcopy(register char * src, register char * dest, int len) {
+ if (dest < src)
+ while (len--)
+ *dest++ = *src++;
+ else {
+ char *lasts = src + (len - 1);
+ char *lastd = dest + (len - 1);
+ while (len--)
+ *(char *) lastd-- = *(char *) lasts--;
+ }
+}
+
+void bcopy(register char * src, register char * dest, int len) {
+ bbcopy(src, dest, len);
+}
+
+void * memset(void * dest, int val, unsigned int len) {
+ register unsigned char *ptr = (unsigned char*) dest;
+ while (len-- > 0)
+ *ptr++ = (unsigned char)val;
+ return dest;
+}
+
+void * memcpy(void * out, const void * in, unsigned int length) {
+ bcopy((char *) in, (char *) out, (int) length);
+ return out;
+}
+
+// for performance, assume lenght % 4 == 0, and no memory overlapped
+void memcpy4(void * d, const void * s, unsigned int length){
+ int* dst = (int*)d;
+ int* src = (int*)s;
+ assert((((int)dst) >> 2) << 2 == ((int)dst)); // address must alighn to 4
+ assert((((int)src) >> 2) << 2 == ((int)src)); // address must alighn to 4
+ assert((length >> 2) << 2 == length); // lenght % 4 == 0
+ assert(( ((char*)dst) + length <= (const char*)src) || (((const char*)src) + length <= (char*)dst)); // no overlapped
+ unsigned int len = length >> 2;
+ while(len --){
+ *dst++ = *src++;
+ }
+}
+
+unsigned int strlen(const char *str) {
+
+ unsigned int len = 0;
+
+ if (str != NULL) {
+ while (*str++) {
+
+ len++;
+
+ }
+ }
+
+ return len;
+}
+
+int strcmp(const char* firstString, const char* secondString) {
+ while (*firstString == *secondString) {
+ if (*firstString == '\0') {
+ return 0;
+ }
+ ++firstString;
+ ++secondString;
+ }
+ if (((unsigned char) *firstString - (unsigned char) *secondString) < 0) {
+ return -1;
+ }
+ return 1;
+}
+
+char * strncpy(char *s, const char *t, unsigned int n) {
+ char *p = s;
+ unsigned int i = 0;
+
+ if (!s)
+ return s;
+
+ while (t && i < n) {
+ *s++ = *t++;
+ i++;
+ }
+
+ if (!t) {
+ do
+ *s++ = '\0';
+ while (i++ < n);
+ }
+ return p;
+}
+
+int ismemzero4(void *data, unsigned int len){
+ int *p = (int*)data;
+ len = len >> 2;
+ for(int i = 0; i < len; ++i){
+ if(*p){
+ return 0;
+ }
+ ++p;
+ }
+ return 1;
+}
+
+int ismemf4(void *data, unsigned int len){
+ int *p = (int*)data;
+ len = len >> 2;
+ for(int i = 0; i < len; ++i){
+ if(*p != 0xffffffff){
+ return 0;
+ }
+ ++p;
+ }
+ return 1;
+}
+
+void * memset4(void * dest, int val, unsigned int len) {
+ int *p = (int*)dest;
+ len = len >> 2;
+ for(int i = 0; i < len; ++i){
+ *p++ = val;
+ }
+ return dest;
+}
+
+void zeromem4(void *data, unsigned int len){
+ memset4(data, 0, len);
+}
+
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/common/string.h b/8232_BLE_SDK/ble_sdk_hawk/common/string.h
new file mode 100644
index 0000000000000..46ac3ebf24aea
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/common/string.h
@@ -0,0 +1,58 @@
+/********************************************************************************************************
+ * @file string.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 30, 2010
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+void * memmove(void * dest, const void * src, unsigned int n);
+void * memset(void * d, int c, unsigned int n);
+void * memcpy(void * des_ptr, const void * src_ptr, unsigned int);
+
+// do not return void*, otherwise, we must use a variable to store the dest porinter, that is not performance
+void memcpy4(void * dest, const void * src, unsigned int);
+void * memchr(const void *_s, int _c, unsigned int _n);
+int memcmp(const void *_s1, const void *_s2, unsigned int _n);
+
+char * strcat(char *_s1, const char *_s2);
+char * strchr(const char *_s, int _c);
+int strcmp(const char *_s1, const char *_s2);
+int strcoll(const char *_s1, const char *_s2);
+char * strcpy(char *_s1, const char *_s2);
+unsigned int strcspn(const char *_s1, const char *_s2);
+char * strerror(int _errcode);
+unsigned int strlen(const char *_s);
+char * strncat(char *_s1, const char *_s2, unsigned int _n);
+int strncmp(const char *_s1, const char *_s2, unsigned int _n);
+char * strncpy(char *_s1, const char *_s2, unsigned int _n);
+char * strpbrk(const char *_s1, const char *_s2);
+char * strrchr(const char *_s, int _c);
+unsigned int strspn(const char *_s1, const char *_s2);
+char * strstr(const char *_s1, const char *_s2);
+char * strtok(char *_s1, const char *_s2);
+unsigned int strxfrm(char *_s1, const char *_s2, unsigned int _n);
+char * strchr (register const char *s, int c);
+void * memchr (register const void * src_void, int c, unsigned int length);
+int ismemzero4(void *data, unsigned int len);
+int ismemf4(void *data, unsigned int len);
+void * memset4(void * dest, int val, unsigned int len);
+void zeromem4(void *data, unsigned int len);
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/common/types.h b/8232_BLE_SDK/ble_sdk_hawk/common/types.h
new file mode 100644
index 0000000000000..3693578179542
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/common/types.h
@@ -0,0 +1,97 @@
+/********************************************************************************************************
+ * @file types.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 30, 2010
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+typedef unsigned char u8 ;
+
+typedef signed char s8;
+
+typedef unsigned short u16;
+
+typedef signed short s16;
+
+typedef int s32;
+
+typedef unsigned int u32;
+
+typedef long long s64;
+
+typedef unsigned long long u64;
+
+#ifndef NULL
+#define NULL 0
+#endif
+
+#ifndef __cplusplus
+
+typedef u8 bool;
+
+#ifndef FALSE
+#define FALSE 0
+#endif
+#ifndef TRUE
+#define TRUE (!FALSE)
+#endif
+
+#define false FALSE
+#define true TRUE
+
+#endif
+
+// There is no way to directly recognise whether a typedef is defined
+// http://stackoverflow.com/questions/3517174/how-to-check-if-a-datatype-is-defined-with-typedef
+#ifdef __GNUC__
+typedef u16 wchar_t;
+#endif
+
+#ifndef WIN32
+typedef u32 size_t;
+#endif
+
+#define U32_MAX ((u32)0xffffffff)
+#define U16_MAX ((u16)0xffff)
+#define U8_MAX ((u8)0xff)
+#define U31_MAX ((u32)0x7fffffff)
+#define U15_MAX ((u16)0x7fff)
+#define U7_MAX ((u8)0x7f)
+
+
+#ifdef WIN32
+# ifndef FALSE
+# define FALSE 0
+# endif
+
+# ifndef TRUE
+# define TRUE 1
+# endif
+#endif
+
+#define SUCCESS 0x00
+#define FAILURE 0x01
+
+typedef u32 UTCTime;
+typedef u32 arg_t;
+typedef u32 status_t;
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/common/utility.c b/8232_BLE_SDK/ble_sdk_hawk/common/utility.c
new file mode 100644
index 0000000000000..55d0ef4bd6690
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/common/utility.c
@@ -0,0 +1,208 @@
+/********************************************************************************************************
+ * @file utility.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 30, 2010
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "utility.h"
+
+
+
+
+/****************************************************************************
+ * @fn addrExtCmp
+ *
+ * @brief Compare two extended addresses.
+ *
+ * input parameters
+ *
+ * @param pAddr1 - Pointer to first address.
+ * @param pAddr2 - Pointer to second address.
+ *
+ * output parameters
+ *
+ * @return TRUE if addresses are equal, FALSE otherwise
+ */
+u8 addrExtCmp(const u8 * pAddr1, const u8 * pAddr2)
+{
+ u8 i;
+
+ for (i = 8; i != 0; i--)
+ {
+ if (*pAddr1++ != *pAddr2++)
+ {
+ return FALSE;
+ }
+ }
+ return TRUE;
+}
+
+
+
+void freeTimerEvent(void **arg)
+{
+ if ( *arg != NULL ) {
+#if (__DEBUG_BUFM__)
+ if ( SUCCESS != ev_buf_free((u8*)*arg) ) {
+ while(1);
+ }
+#else
+ ev_buf_free((u8*)*arg);
+#endif
+ *arg = NULL;
+ }
+}
+
+void freeTimerTask(void **arg)
+{
+ if ( *arg == NULL ) {
+ return;
+ }
+// EV_SCHEDULE_HIGH_TASK((ev_task_callback_t)freeTimerEvent, (void*)arg);
+}
+
+
+
+// general swap/endianess utils
+
+void swapN(unsigned char *p, int n)
+{
+ int i, c;
+ for (i=0; i> 8;
+ buffer[pos++] = value;
+}
+
+
+void flip_addr(u8 *dest, u8 *src){
+ dest[0] = src[5];
+ dest[1] = src[4];
+ dest[2] = src[3];
+ dest[3] = src[2];
+ dest[4] = src[1];
+ dest[5] = src[0];
+}
+
+void store_16(u8 *buffer, u16 pos, u16 value){
+ buffer[pos++] = value;
+ buffer[pos++] = value >> 8;
+}
+
+
+
+void my_fifo_init (my_fifo_t *f, int s, u8 n, u8 *p)
+{
+ f->size = s;
+ f->num = n;
+ f->wptr = 0;
+ f->rptr = 0;
+ f->p = p;
+}
+
+u8* my_fifo_wptr (my_fifo_t *f)
+{
+ if (((f->wptr - f->rptr) & 255) < f->num)
+ {
+ return f->p + (f->wptr & (f->num-1)) * f->size;
+ }
+ return 0;
+}
+
+void my_fifo_next (my_fifo_t *f)
+{
+ f->wptr++;
+}
+
+int my_fifo_push (my_fifo_t *f, u8 *p, int n)
+{
+ if (((f->wptr - f->rptr) & 255) >= f->num)
+ {
+ return -1;
+ }
+
+ if (n >= f->size)
+ {
+ return -1;
+ }
+ u8 *pd = f->p + (f->wptr++ & (f->num-1)) * f->size;
+ *pd++ = n & 0xff;
+ *pd++ = (n >> 8) & 0xff;
+ memcpy (pd, p, n);
+ return 0;
+}
+
+void my_fifo_pop (my_fifo_t *f)
+{
+ f->rptr++;
+}
+
+u8 * my_fifo_get (my_fifo_t *f)
+{
+ if (f->rptr != f->wptr)
+ {
+ u8 *p = f->p + (f->rptr & (f->num-1)) * f->size;
+ return p;
+ }
+ return 0;
+}
diff --git a/8232_BLE_SDK/ble_sdk_hawk/common/utility.h b/8232_BLE_SDK/ble_sdk_hawk/common/utility.h
new file mode 100644
index 0000000000000..671889118cff5
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/common/utility.h
@@ -0,0 +1,156 @@
+/********************************************************************************************************
+ * @file utility.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 30, 2010
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+#include "types.h"
+
+#define abs(a) (((a)>0)?((a)):(-(a)))
+
+#define cat2(i,j) i##j
+#define cat3(i,j,k) i##j##k
+
+#ifndef min
+#define min(a,b) ((a) < (b) ? (a) : (b))
+#endif
+
+#ifndef min2
+#define min2(a,b) ((a) < (b) ? (a) : (b))
+#endif
+
+#ifndef min3
+#define min3(a,b,c) min2(min2(a, b), c)
+#endif
+
+#ifndef max2
+#define max2(a,b) ((a) > (b) ? (a): (b))
+#endif
+
+#ifndef max3
+#define max3(a,b,c) max2(max2(a, b), c)
+#endif
+
+#define OFFSETOF(s, m) ((unsigned int) &((s *)0)->m)
+#define ROUND_INT(x, r) (((x) + (r) - 1) / (r) * (r))
+#define ROUND_TO_POW2(x, r) (((x) + (r) - 1) & ~((r) - 1))
+
+// direct memory access
+#define U8_GET(addr) (*(volatile unsigned char *)(addr))
+#define U16_GET(addr) (*(volatile unsigned short *)(addr))
+#define U32_GET(addr) (*(volatile unsigned int *)(addr))
+
+#define U8_SET(addr, v) (*(volatile unsigned char *)(addr) = (unsigned char)(v))
+#define U16_SET(addr, v) (*(volatile unsigned short *)(addr) = (unsigned short)(v))
+#define U32_SET(addr, v) (*(volatile unsigned int *)(addr) = (v))
+
+#define U8_INC(addr) U8_GET(addr) += 1
+#define U16_INC(addr) U16_GET(addr) += 1
+#define U32_INC(addr) U32_GET(addr) += 1
+
+#define U8_DEC(addr) U8_GET(addr) -= 1
+#define U16_DEC(addr) U16_GET(addr) -= 1
+#define U32_DEC(addr) U32_GET(addr) -= 1
+
+#define U8_CPY(addr1,addr2) U8_SET(addr1, U8_GET(addr2))
+#define U16_CPY(addr1,addr2) U16_SET(addr1, U16_GET(addr2))
+#define U32_CPY(addr1,addr2) U32_SET(addr1, U32_GET(addr2))
+
+#define MAKE_U16(h,l) ((unsigned short)(((h) << 8) | (l)))
+#define MAKE_U32(a,b,c,d) ((unsigned int)(((a) << 24) | ((b) << 16) | ((c) << 8) | (d)))
+
+#define BOUND(x, l, m) ((x) < (l) ? (l) : ((x) > (m) ? (m) : (x)))
+#define SET_BOUND(x, l, m) ((x) = BOUND(x, l, m))
+#define BOUND_INC(x, m) do{++(x); (x) = (x) < (m) ? (x) :0;} while(0)
+#define BOUND_INC_POW2(x, m) do{ \
+ STATIC_ASSERT_POW2(m); \
+ (x) = ((x)+1) & (m-1); \
+ }while(0)
+
+#define IS_POWER_OF_2(x) (!(x & (x-1)))
+#define IS_LITTLE_ENDIAN (*(unsigned short*)"\0\xff" > 0x100)
+
+#define IMPLIES(x, y) (!(x) || (y))
+
+// x > y ? 1 : (x ==y : 0 ? -1)
+#define COMPARE(x, y) (((x) > (y)) - ((x) < (y)))
+#define SIGN(x) COMPARE(x, 0)
+
+// better than xor swap: http://stackoverflow.com/questions/3912699/why-swap-with-xor-works-fine-in-c-but-in-java-doesnt-some-puzzle
+#define SWAP(x, y, T) do { T tmp = (x); (x) = (y); (y) = tmp; } while(0)
+#define SORT2(a, b, T) do { if ((a) > (b)) SWAP((a), (b), T); } while (0)
+
+#define foreach(i, n) for(int i = 0; i < (n); ++i)
+#define foreach_range(i, s, e) for(int i = (s); i < (e); ++i)
+#define foreach_arr(i, arr) for(int i = 0; i < ARRAY_SIZE(arr); ++i)
+// round robbin foreach, ����һ��ָ���ĵ㿪ʼ������, h ��һ����̬������ȫ�ֱ�����Ҫ��ס��һ�ε�λ�á�h ��ʼֵ��n !!!
+#define foreach_hint(i, n, h) for(int i = 0, ++h, h=h> 8) & 0xFF)
+#define U16_LO(a) ((a) & 0xFF)
+
+#define U32_BYTE0(a) ((a) & 0xFF)
+#define U32_BYTE1(a) (((a) >> 8) & 0xFF)
+#define U32_BYTE2(a) (((a) >> 16) & 0xFF)
+#define U32_BYTE3(a) (((a) >> 24) & 0xFF)
+
+
+
+void swapN (unsigned char *p, int n);
+void swapX(const u8 *src, u8 *dst, int len);
+
+void swap24(u8 dst[3], const u8 src[3]);
+void swap32(u8 dst[4], const u8 src[4]);
+void swap48(u8 dst[6], const u8 src[6]);
+void swap56(u8 dst[7], const u8 src[7]);
+
+void swap64(u8 dst[8], const u8 src[8]);
+
+void swap128(u8 dst[16], const u8 src[16]);
+
+void net_store_16(u8 *buffer, u16 pos, u16 value);
+
+void flip_addr(u8 *dest, u8 *src);
+
+void store_16(u8 *buffer, u16 pos, u16 value);
+void freeTimerTask(void **arg);
+
+
+typedef struct {
+ u32 size;
+ u16 num;
+ u8 wptr;
+ u8 rptr;
+ u8* p;
+} my_fifo_t;
+
+void my_fifo_init (my_fifo_t *f, int s, u8 n, u8 *p);
+u8* my_fifo_wptr (my_fifo_t *f);
+void my_fifo_next (my_fifo_t *f);
+int my_fifo_push (my_fifo_t *f, u8 *p, int n);
+void my_fifo_pop (my_fifo_t *f);
+u8 * my_fifo_get (my_fifo_t *f);
+
+#define MYFIFO_INIT(name,size,n) u8 name##_b[size * n]={0};my_fifo_t name = {size,n,0,0, name##_b}
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/config.h b/8232_BLE_SDK/ble_sdk_hawk/config.h
new file mode 100644
index 0000000000000..9db0cb8d67972
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/config.h
@@ -0,0 +1,44 @@
+/********************************************************************************************************
+ * @file config.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#define CHIP_TYPE_5316 1
+#define CHIP_TYPE_5317 2
+
+#ifndef CHIP_TYPE
+#define CHIP_TYPE 1000
+#endif
+
+
+
+#define MCU_CORE_5316 1
+#define MCU_CORE_5317 2
+
+#if(CHIP_TYPE == CHIP_TYPE_5316)
+ #define MCU_CORE_TYPE MCU_CORE_5316
+#elif(CHIP_TYPE == CHIP_TYPE_5317)
+ #define MCU_CORE_TYPE MCU_CORE_5317
+#else
+ #define MCU_CORE_TYPE 1000
+#endif
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/div_mod.S b/8232_BLE_SDK/ble_sdk_hawk/div_mod.S
new file mode 100644
index 0000000000000..e3795b076891d
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/div_mod.S
@@ -0,0 +1,452 @@
+/********************************************************************************************************
+ * @file div_mode.S
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#define UDIV #0
+#define SDIV #1
+#define UMOD #2
+#define SMOD #3
+
+#define MUL2_STEP 8
+
+ .code 16
+ .text
+
+ .align 2
+ .global __modsi3
+ .code 16
+ .thumb_func
+ .type __modsi3, %function
+__modsi3:
+ tmov r2, SMOD
+ tj div
+ .size __modsi3, .-__modsi3
+
+ .align 2
+ .global __divsi3
+ .code 16
+ .thumb_func
+ .type __divsi3, %function
+__divsi3:
+ tmov r2, SDIV
+ tj div
+ .size __divsi3, .-__divsi3
+
+ .align 2
+ .global __umodsi3
+ .code 16
+ .thumb_func
+ .type __umodsi3, %function
+__umodsi3:
+ tmov r2, UMOD
+ tj div
+ .size __umodsi3, .-__umodsi3
+
+ .align 2
+ .global __udivsi3
+ .code 16
+ .thumb_func
+ .type __udivsi3, %function
+__udivsi3:
+ tmov r2, UDIV
+ tj div
+ .size __udivsi3, .-__udivsi3
+
+ .align 2
+ .global div
+ .code 16
+ .thumb_func
+ .type div, %function
+div:
+ tmrcs r3
+ tpush {r3, r4}
+ tmov r4, #0x80
+ tor r3, r4
+ tmcsr r3
+
+ tloadr r3, .L11
+ tstorer r0, [r3]
+ tadd r3, r3, #4
+ tstorer r1, [r3]
+ tsub r3, r3, #8
+ tstorerb r2, [r3]
+
+.L2:
+ tloadrb r0, [r3]
+ tcmp r0, #0
+ tjne .L2
+ tcmp r2, #1
+ tjls .L4
+ tadd r3, r3, #8
+ tloadr r0, [r3]
+ tj .L6
+.L4:
+ tadd r3, r3, #4
+ tloadr r0, [r3]
+
+.L6:
+ tpop {r3, r4}
+ tmcsr r3
+ tjex lr
+
+ .align 4
+.L11:
+ .word(0x800664)
+ .word(0x800660)
+ .word(0x800668)
+ .size div, .-div
+
+#if 1
+ .align 4
+ .global mul32x32_64
+ .thumb_func
+ .type mul32x32_64, %function
+mul32x32_64:
+ tmul r0, r1
+ tloadr r1, [pc, #4]
+ tloadr r1, [r1, #0]
+ tjex lr
+ .word(0x008006fc)
+#endif
+
+#if 1
+ .align 4
+ .global mz_mul1
+ .thumb_func
+ .type mz_mul1, %function
+mz_mul1:
+ tpush {r4, r5, r6, r7}
+ tmov r4, r8
+ tpush {r4}
+ tmov r4, #1
+ tmov r8, r4 //r8 = 1
+ tloadr r6, [pc, #4] //r6 REG_ADDR32(0x6fc)
+ tmovs r5, #0 //clear carry
+ tj MZ_MUL1_END
+ .word(0x008006fc)
+MZ_MUL1_START:
+ tmul r4, r3 // l0 = a0 * b
+ tloadr r7, [r0, #0] // y0
+ tadd r4, r5 // l0 + c => c0
+ tsubc r5, r5 // c0 - 1
+ tadd r4, r7 // l0 + c + y0 => c1
+ tloadr r7, [r6, #0] // r7 = h0
+ tadd r5, r8 // c0 - 1 + 1 = c0 (nc)
+ tstorem r0!, {r4} // store y0
+ taddc r5, r7 // cn = c0 + h1 + c1
+MZ_MUL1_END:
+ tloadm r1!, {r4} // load *a
+ tsub r2, #1 // r2--
+ tcmp r2, #0
+ tjge MZ_MUL1_START // carry set
+ tstorem r0!, {r5}
+
+ tpop {r4}
+ tmov r8, r4
+ tpop {r4, r5, r6, r7}
+ tjex lr
+#endif
+
+ .align 4
+ .global mz_mul2
+ .thumb_func
+ .type mz_mul2, %function
+mz_mul2:
+ tpush {r4, r5, r6, r7}
+ tmov r4, r8
+ tmov r5, r9
+ tmov r6, r10
+
+ tmov r7, r11
+ tpush {r4, r5, r6, r7}
+ tmov r8, r2 //r8 = n, loop number
+ tmov r2, #1
+
+ tmov r10, r2 // r10 = 1
+ tsub r2, #(MUL2_STEP + 1)
+ tmov r9, r2 //r9 = -MUL2_STEP
+ tmov r2, #0
+
+ tmov r2, #0
+ tloadr r6, [pc, #4] //r6 REG_ADDR32(0x6fc)
+ tmov r11,r2 //r11 = 0
+ tj MZ_MUL2_LOOP
+ //tj MZ_MUL2_LOOP2
+ .word(0x008006fc)
+
+MZ_MUL2_START:
+ //a0
+ tmul r4, r3 // l0 = a0 * b
+ tloadr r7, [r0, #0] // y0
+ tadd r4, r2 // l0 + c => c0
+ tsubc r2, r2 // c0 - 1
+ tadd r4, r7 // l0 + c + y0 => c1
+ tloadr r7, [r6, #0] // r7 = h0
+ tadd r2, r10 // c0 - 1 + 1 = c0 (nc)
+ tstorem r0!, {r4} // store y0 y1
+ taddc r2, r7 // cn = c0 + h1 + c1
+
+ tmul r5, r3 // l1 = a1 * b
+ tloadr r7, [r0, #0] // y1
+ tadd r5, r2 // l1 + cn => c2
+ tsubc r2, r2 // c2 - 1
+ tadd r5, r7 // l1 + c + y1 => c3
+ tloadr r7, [r6, #0] // r7 = h0
+ tadd r2, r10 // c0 - 1 + 1 = c0 (nc)
+ tstorem r0!, {r5} // store y0 y1
+ tloadm r1!, {r4, r5} // load *a
+ taddc r2, r7 // cn2 = c2 + h1 + c3
+
+ //a0
+ tmul r4, r3 // l0 = a0 * b
+ tloadr r7, [r0, #0] // y0
+ tadd r4, r2 // l0 + c => c0
+ tsubc r2, r2 // c0 - 1
+ tadd r4, r7 // l0 + c + y0 => c1
+ tloadr r7, [r6, #0] // r7 = h0
+ tadd r2, r10 // c0 - 1 + 1 = c0 (nc)
+ tstorem r0!, {r4} // store y0 y1
+ taddc r2, r7 // cn = c0 + h1 + c1
+
+ tmul r5, r3 // l1 = a1 * b
+ tloadr r7, [r0, #0] // y1
+ tadd r5, r2 // l1 + cn => c2
+ tsubc r2, r2 // c2 - 1
+ tadd r5, r7 // l1 + c + y1 => c3
+ tloadr r7, [r6, #0] // r7 = h0
+ tadd r2, r10 // c0 - 1 + 1 = c0 (nc)
+ tstorem r0!, {r5} // store y0 y1
+ tloadm r1!, {r4, r5} // load *a
+ taddc r2, r7 // cn2 = c2 + h1 + c3
+
+ //a0
+ tmul r4, r3 // l0 = a0 * b
+ tloadr r7, [r0, #0] // y0
+ tadd r4, r2 // l0 + c => c0
+ tsubc r2, r2 // c0 - 1
+ tadd r4, r7 // l0 + c + y0 => c1
+ tloadr r7, [r6, #0] // r7 = h0
+ tadd r2, r10 // c0 - 1 + 1 = c0 (nc)
+ tstorem r0!, {r4} // store y0 y1
+ taddc r2, r7 // cn = c0 + h1 + c1
+
+ tmul r5, r3 // l1 = a1 * b
+ tloadr r7, [r0, #0] // y1
+ tadd r5, r2 // l1 + cn => c2
+ tsubc r2, r2 // c2 - 1
+ tadd r5, r7 // l1 + c + y1 => c3
+ tloadr r7, [r6, #0] // r7 = h0
+ tadd r2, r10 // c0 - 1 + 1 = c0 (nc)
+ tstorem r0!, {r5} // store y0 y1
+ tloadm r1!, {r4, r5} // load *a
+ taddc r2, r7 // cn2 = c2 + h1 + c3
+
+///// next 2
+ tmul r4, r3 // l0 = a0 * b
+ tloadr r7, [r0, #0] // y0
+ tadd r4, r2 // l0 + c => c0
+ tsubc r2, r2 // c0 - 1
+ tadd r4, r7 // l0 + c + y0 => c1
+ tloadr r7, [r6, #0] // r7 = h0
+ tadd r2, r10 // c0 - 1 + 1 = c0 (nc)
+ tstorem r0!, {r4} // store y0 y1
+ taddc r2, r7 // cn = c0 + h1 + c1
+
+ tmul r5, r3 // l1 = a1 * b
+ tloadr r7, [r0, #0] // y1
+ tadd r5, r2 // l1 + cn => c2
+ tsubc r2, r2 // c2 - 1
+ tadd r5, r7 // l1 + c + y1 => c3
+ tloadr r7, [r6, #0] // r7 = h0
+ tadd r2, r10 // c0 - 1 + 1 = c0 (nc)
+ tstorem r0!, {r5} // store y0 y1
+ taddc r2, r7 // cn2 = c2 + h1 + c3
+
+MZ_MUL2_LOOP:
+ tloadm r1!, {r4, r5} // load *a
+ tadd r8, r9 // r8 -= MUL2_STEP
+ tcmp r8, r11 // const 0
+ tjge MZ_MUL2_START // carry set
+
+ tmov r5, r8
+ tadd r5, #MUL2_STEP
+ tsub r1, #8
+ tj MZ_MUL2_LOOP2
+
+MZ_MUL2_START2:
+ tmul r4, r3 // l0 = a0 * b
+ tloadr r7, [r0, #0] // y0
+ tadd r4, r2 // l0 + c => c0
+ tsubc r2, r2 // c0 - 1
+ tadd r4, r7 // l0 + c + y0 => c1
+ tloadr r7, [r6, #0] // r7 = h0
+ tadd r2, r10 // c0 - 1 + 1 = c0 (nc)
+ tstorem r0!, {r4} // store y0
+ taddc r2, r7 // cn = c0 + h1 + c1
+
+MZ_MUL2_LOOP2:
+ tloadm r1!, {r4} // load *a
+ tsub r5, #1 // r7--
+ tcmp r5, #0
+ tjge MZ_MUL2_START2 // carry set
+
+MZ_MUL2_END:
+ //tmov r2, #13
+ tstorem r0!, {r2}
+
+ tpop {r4, r5, r6, r7}
+ tmov r8, r4
+ tmov r9, r5
+ tmov r10, r6
+ tmov r11, r7
+ tpop {r4, r5, r6, r7}
+ tjex lr
+ tnop
+
+
+
+#if 1
+
+///////// asm crc24 function 2
+ .section .ram_code,"ax" //in ram code
+ .align 2
+ .global blt_packet_crc24_opt
+ .code 16
+ .thumb_func
+ .type blt_packet_crc24_opt, %function
+blt_packet_crc24_opt:
+ tpush {r3, r4, r5, r6, r7, lr}
+ tmov r5, r8
+ tpush {r5}
+ tmov r5, r1
+ tneg r1, r0
+ tmov r4, #3
+ tand r1, r4 //number of byte CRC of pre_process to align CRC to word boundary
+ tsub r5, r1
+ tjge CRC24_SAVE_WORD_NUM
+ tadd r1, r5
+ tmov r5, #0
+CRC24_SAVE_WORD_NUM:
+ tmov r8, r5 //save to r8
+ //tloadr r3, CRC24_DAT
+ tadd r4, r0, #0
+ tmov r0, #0
+ tmov r7, #60 //r7 = 15 * 4
+CRC24_BYTE_LOOP: //r4: src; r6: dat; r2: crc; r5: tmp
+ tcmp r0, r1
+ tjeq CRC24_BYTE_END
+ tloadrb r6, [r4, r0] //r6 = dat[r0]
+ txor r6, r2 //r6 = crc ^ dat
+ tshftl r5, r6, #2 //r5 = r6 << 2
+ tand r5, r7 //r2 = r2 & 60
+ tloadr r5, [r5, r3] //load table
+ tasr r2, r2, #4 //r2 >> 4 (crc >> 4)
+ tshftr r6, r6, #2 // r6 = r6 >> 2
+ txor r2, r5 //r2 = r5 ^ r2
+ tand r6, r7 //r6 = r6 & 60
+
+ tloadr r6, [r6, r3]
+ tasr r2, r2, #4 //r2 >> 4 (crc >> 4)
+ tadd r0, #1
+ txor r2, r6 //r2 = r6 ^ r2
+ tjne CRC24_BYTE_LOOP
+CRC24_BYTE_END:
+ tmov r1, r8
+ tcmp r1, #0
+ tjeq CRC24_END
+ tmov r5, #0
+ tmov r8, r5
+ tadd r4, r0
+ tmov r0, #0
+CRC24_WORD_LOOP:
+ tsub r1, #4
+ tjlt CRC24_WORD_END
+ tloadr r0, [r4, #0] //r0 = dat[r0]
+ tadd r4, #4
+ tshftr r6, r0, #0 // r6 = r0 >> 0
+ CRC24_WORD_nib0:
+ txor r6, r2 //r6 = crc ^ dat
+ tshftl r5, r6, #2 //r5 = r6 << 2
+ tand r5, r7 //r2 = r2 & 60
+ tloadr r5, [r5, r3] //load table
+ tasr r2, r2, #4 //r2 >> 4 (crc >> 4)
+ tshftr r6, r6, #2 // r6 = r6 >> 2
+ tand r6, r7 //r6 = r6 & 60
+ tloadr r6, [r6, r3]
+ txor r2, r5 //r2 = r5 ^ r2
+ CRC24_WORD_nib1:
+ tasr r2, r2, #4 //r2 >> 4 (crc >> 4)
+ tshftr r5, r0, #8 //dat >> 8
+ txor r2, r6 //r2 = r6 ^ r2
+ CRC24_WORD_nib2:
+ txor r5, r2 //r6 = crc ^ dat
+ tshftl r6, r5, #2 //r5 << 2
+ tand r6, r7
+ tloadr r6, [r6, r3]
+ tasr r2, r2, #4 //r2 >> 4 (crc >> 4)
+ tshftr r5, r5, #2
+ tand r5, r7 //r6 = r6 & 60
+ tloadr r5, [r5, r3]
+ txor r2, r6 //r2 = r6 ^ r2
+ CRC24_WORD_nib3:
+ tasr r2, r2, #4 //r2 >> 4 (crc >> 4)
+ tshftr r6, r0, #16 //dat >> 8
+ txor r2, r5 //r2 = r6 ^ r2
+ CRC24_WORD_nib4:
+ txor r6, r2 //r6 = crc ^ dat
+ tshftl r5, r6, #2 //r5 = r6 << 2
+ tand r5, r7 //r2 = r2 & 60
+ tloadr r5, [r5, r3] //load table
+ tasr r2, r2, #4 //r2 >> 4 (crc >> 4)
+ tshftr r6, r6, #2 // r6 = r6 >> 2
+ tand r6, r7 //r6 = r6 & 60
+ tloadr r6, [r6, r3]
+ txor r2, r5 //r2 = r5 ^ r2
+ CRC24_WORD_nib5:
+ tasr r2, r2, #4 //r2 >> 4 (crc >> 4)
+ tshftr r5, r0, #24 //dat >> 8
+ txor r2, r6 //r2 = r6 ^ r2
+ CRC24_WORD_nib6:
+ txor r5, r2 //r6 = crc ^ dat
+ tshftl r6, r5, #2 //r5 << 2
+ tand r6, r7
+ tloadr r6, [r6, r3]
+ tasr r2, r2, #4 //r2 >> 4 (crc >> 4)
+ tshftr r5, r5, #2
+ tand r5, r7 //r5 = r5 & 60
+ tloadr r5, [r5, r3]
+ txor r2, r6 //r2 = r6 ^ r2
+ CRC24_WORD_nib7:
+ tasr r2, r2, #4 //r2 >> 4 (crc >> 4)
+ tmov r0, #0
+ txor r2, r5 //r2 = r6 ^ r2
+ tj CRC24_WORD_LOOP
+ CRC24_WORD_END:
+ tadd r1, #4
+ tj CRC24_BYTE_LOOP
+CRC24_END:
+ tadd r0, r2, #0
+ tpop {r5}
+ tmov r8, r5
+ tpop {r3, r4, r5, r6, r7, pc}
+ tnop
+
+
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers.h b/8232_BLE_SDK/ble_sdk_hawk/drivers.h
new file mode 100644
index 0000000000000..6e897bf3b6c38
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers.h
@@ -0,0 +1,34 @@
+/********************************************************************************************************
+ * @file drivers.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include "config.h"
+
+#if (__TL_LIB_5316__ || (MCU_CORE_TYPE == MCU_CORE_5316))
+#include "drivers/5316/driver_5316.h"
+#elif(__TL_LIB_5317__ || (MCU_CORE_TYPE == MCU_CORE_5317))
+#include "drivers/5317/driver_5317.h"
+#endif
+
+
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/adc.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/adc.c
new file mode 100644
index 0000000000000..04459f2e584c6
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/adc.c
@@ -0,0 +1,530 @@
+/********************************************************************************************************
+ * @file adc.c
+ *
+ * @brief This is the ADC driver file for TLSR8232
+ *
+ * @author junyuan.zhang ; junwei.lu
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ * @par History:
+ * 1.initial release(DEC. 26 2018)
+ *
+ * @version A001
+ *
+ *******************************************************************************************************/
+
+#include "adc.h"
+
+#define ADC_SINGLE_END 0
+
+
+volatile unsigned short adc_cal_value = 0xffff;
+
+unsigned char ADC_Vref = 0; //ADC Vref
+unsigned char ADC_VBAT_Scale = 0; //ADC VBAT scale
+unsigned char ADC_Pre_Scale = 1; //ADC pre scale
+
+GPIO_PinTypeDef ADC_GPIO_tab[10] = {
+
+ GPIO_PA6,GPIO_PA7,
+ GPIO_PB0,GPIO_PB1,
+ GPIO_PB2,GPIO_PB3,
+ GPIO_PB4,GPIO_PB5,
+ GPIO_PB6,GPIO_PB7
+};
+
+const unsigned char Vref_tab[4] = {2,3,4,1};
+const unsigned char VBAT_Scale_tab[4] = {1,4,3,2};
+
+/**
+ * @brief This function serves to ADC init.
+ * @param[in] none
+ * @return none
+ */
+void adc_init(void ){
+
+ /****** sar adc Reset ********/
+ //reset whole digital adc module
+ adc_reset();
+
+ /******enable signal of 24M clock to sar adc********/
+ adc_clk_en(1);
+
+ /******set adc clk as 4MHz******/
+ adc_set_clk_div(5);
+
+ /******set adc L R channel Gain Stage bias current trimming******/
+ //adc_set_pga_left_power_on(0);
+ //adc_set_pga_right_power_on(0); Hawk ûÓÐÓÒͨµÀPGA
+ adc_set_atb(ADC_SEL_ATB_1); ///resolve adc value jitter at low temperature
+ adc_set_left_gain_bias(ADC_GAIN_STAGE_BIAS_PER100);
+ //adc_set_right_gain_bias(ADC_GAIN_STAGE_BIAS_PER100);
+}
+
+/**
+ * @brief This function is used for IO port configuration of ADC IO port voltage sampling.
+ * @param[in] GPIO_PinTypeDef pin
+ * @return none
+ */
+void adc_base_pin_init(GPIO_PinTypeDef pin)
+{
+ //ADC GPIO Init
+ gpio_set_func(pin, AS_GPIO);
+ gpio_set_input_en(pin,0);
+ gpio_set_output_en(pin,0);
+ gpio_write(pin,0);
+}
+
+/**
+ * @brief This function is used for IO port configuration of ADC supply voltage sampling.
+ * @param[in] GPIO_PinTypeDef pin
+ * @return none
+ */
+void adc_vbat_pin_init(GPIO_PinTypeDef pin)
+{
+ gpio_set_func(pin, AS_GPIO);
+ gpio_set_input_en(pin,0);
+ gpio_set_output_en(pin,1);
+ gpio_write(pin,1);
+}
+
+
+/**
+ * @brief This function is used for ADC configuration of ADC IO voltage sampling.
+ * @param[in] GPIO_PinTypeDef pin
+ * @return none
+ */
+
+void adc_base_init(GPIO_PinTypeDef pin)
+{
+ unsigned char i;
+ unsigned char gpio_num=0;
+
+ //set R_max_mc,R_max_c,R_max_s
+ adc_set_misc_rns_capture_state_length(0xf0); //max_mc
+// adc_set_left_right_capture_state_length(AMIC_ADC_SampleLength[0]); //max_c 96K
+ adc_set_all_set_state_length(0x0a); //max_s
+
+ //set total length for sampling state machine and channel
+ adc_set_chn_en(ADC_MISC_CHN);
+ adc_set_max_state_cnt(0x02);
+
+ //set channel Vref
+ adc_set_all_vref(ADC_MISC_CHN, ADC_VREF_1P2V);
+ ADC_Vref = (unsigned char)ADC_VREF_1P2V;
+
+ //set Vbat divider select,
+ adc_set_vref_vbat_div(ADC_VBAT_DIVIDER_OFF);
+ ADC_VBAT_Scale = VBAT_Scale_tab[ADC_VBAT_DIVIDER_OFF];
+
+ //set channel mode and channel
+ adc_base_pin_init(pin); //ADC GPIO Init
+ for(i=0;i<11;i++)
+ {
+ if(pin == ADC_GPIO_tab[i])
+ {
+ gpio_num = i+1;
+ break;
+ }
+ }
+#if ADC_SINGLE_END
+ adc_set_all_input_mode(ADC_MISC_CHN, SINGLE_ENDED_MODE);
+ adc_set_all_single_end_ain(ADC_MISC_CHN, gpio_num);
+#else
+ adc_set_all_input_mode(ADC_MISC_CHN, DIFFERENTIAL_MODE);
+ adc_set_all_differential_p_n_ain(ADC_MISC_CHN, gpio_num, GND);
+#endif
+
+ //set resolution for RNG
+ adc_set_all_resolution(ADC_MISC_CHN, RES14);
+
+ //Number of ADC clock cycles in sampling phase
+ adc_set_all_tsample_cycle(ADC_MISC_CHN, SAMPLING_CYCLES_6);
+ //set Analog input pre-scaling
+ adc_set_all_ain_pre_scaler(ADC_PRESCALER_1F8);
+ ADC_Pre_Scale = 1<<(unsigned char)ADC_PRESCALER_1F8;
+
+ //set RNG mode
+ adc_set_mode(ADC_NORMAL_MODE);
+
+}
+
+
+/**
+ * @brief This function is used for ADC configuration of ADC supply voltage sampling.
+ * @param[in] GPIO_PinTypeDef pin
+ * @return none
+ */
+
+void adc_vbat_init(GPIO_PinTypeDef pin)
+{
+ unsigned char i;
+ unsigned char gpio_no=0;
+
+ //set R_max_mc,R_max_c,R_max_s
+ adc_set_misc_rns_capture_state_length(0xf0); //max_mc
+ adc_set_all_set_state_length(0x0a); //max_s
+
+ //set total length for sampling state machine and channel
+ adc_set_chn_en(ADC_MISC_CHN);
+ adc_set_max_state_cnt(0x02);
+
+ //set channel Vref
+ adc_set_all_vref(ADC_MISC_CHN, ADC_VREF_1P2V);
+
+ //set Vbat divider select,
+ adc_set_vref_vbat_div(ADC_VBAT_DIVIDER_OFF);
+ ADC_VBAT_Scale = VBAT_Scale_tab[ADC_VBAT_DIVIDER_OFF];
+
+ //set channel mode and channel
+ adc_vbat_pin_init(pin);
+ for(i=0;i<10;i++)
+ {
+ if(pin == ADC_GPIO_tab[i])
+ {
+ gpio_no = i+1;
+ break;
+ }
+ }
+
+ adc_set_all_input_mode(ADC_MISC_CHN, DIFFERENTIAL_MODE);
+ adc_set_all_differential_p_n_ain(ADC_MISC_CHN, gpio_no, GND);
+
+ //set resolution for RNG
+ adc_set_all_resolution(ADC_MISC_CHN, RES14);
+
+ //Number of ADC clock cycles in sampling phase
+ adc_set_all_tsample_cycle(ADC_MISC_CHN, SAMPLING_CYCLES_6);
+
+ //set Analog input pre-scaling and
+ adc_set_all_ain_pre_scaler(ADC_PRESCALER_1F8);
+
+ //set RNG mode
+ adc_set_mode(ADC_NORMAL_MODE);
+
+}
+
+
+
+/**
+ * @brief This function serves to set the channel reference voltage.
+ * @param[in] enum variable of ADC input channel.
+ * @param[in] enum variable of ADC reference voltage.
+ * @return none
+ */
+void adc_set_all_vref(ADC_ChTypeDef ch_n, ADC_RefVolTypeDef v_ref)
+{
+ if(ch_n & ADC_LEFT_CHN)
+ {
+ adc_set_left_vref(v_ref);
+ }
+ if(ch_n & ADC_RIGHT_CHN)
+ {
+ adc_set_right_vref(v_ref);
+ }
+ if(ch_n & ADC_MISC_CHN)
+ {
+ adc_set_misc_vref(v_ref);
+ }
+
+
+ if(v_ref == ADC_VREF_1P2V)
+ {
+ //Vref buffer bias current trimming: 150%
+ //Vref buffer bias current trimming: 150%
+ //Comparator preamp bias current trimming: 100%
+ analog_write(anareg_fa, (analog_read(anareg_fa)&(0xC0)) | 0x3d );
+ }
+ else
+ {
+ //Vref buffer bias current trimming: 100%
+ //Vref buffer bias current trimming: 100%
+ //Comparator preamp bias current trimming: 100%
+ analog_write(anareg_fa, (analog_read(anareg_fa)&(0xC0)) | 0x15 );
+ }
+
+}
+
+/**
+ * @brief This function serves to set resolution.
+ * @param[in] enum variable of ADC input channel.
+ * @param[in] enum variable of ADC resolution.
+ * @return none
+ */
+void adc_set_all_resolution(ADC_ChTypeDef ch_n, ADC_ResTypeDef v_res)
+{
+ if(ch_n & ADC_LEFT_CHN)
+ {
+ adc_set_left_resolution(v_res);
+ }
+ if(ch_n & ADC_RIGHT_CHN)
+ {
+ adc_set_right_resolution(v_res);
+ }
+ if(ch_n & ADC_MISC_CHN)
+ {
+ adc_set_misc_resolution(v_res);
+ }
+}
+
+/**
+ * @brief This function serves to set sample_cycle.
+ * @param[in] enum variable of ADC input channel.
+ * @param[in] enum variable of ADC Sampling cycles.
+ * @return none
+ */
+void adc_set_all_tsample_cycle(ADC_ChTypeDef ch_n, ADC_SampCycTypeDef adcST)
+{
+ if(ch_n & ADC_LEFT_CHN)
+ {
+ adc_set_left_tsample_cycle(adcST);
+ }
+ if(ch_n & ADC_RIGHT_CHN)
+ {
+ adc_set_right_tsample_cycle(adcST);
+ }
+ if(ch_n & ADC_MISC_CHN)
+ {
+ adc_set_misc_tsample_cycle(adcST);
+ }
+}
+
+/**
+ * @brief This function serves to set input_mode.
+ * @param[in] enum variable of ADC input channel.
+ * @param[in] enum variable of ADC channel input mode.
+ * @return none
+ */
+void adc_set_all_input_mode(ADC_ChTypeDef ch_n, ADC_InputModeTypeDef m_input)
+{
+ if(ch_n & ADC_LEFT_CHN)
+ {
+ adc_set_left_input_mode(m_input);
+ }
+ if(ch_n & ADC_RIGHT_CHN)
+ {
+ adc_set_right_input_mode(m_input);
+ }
+ if(ch_n & ADC_MISC_CHN)
+ {
+ adc_set_misc_input_mode(m_input);
+ }
+}
+
+/**
+ * @brief This function serves to set input channel in single_ended_input_mode.
+ * @param[in] enum variable of ADC input channel.
+ * @param[in] enum variable of ADC analog positive input channel.
+ * @return none
+ */
+void adc_set_all_single_end_ain(ADC_ChTypeDef ch_n, ADC_InputPchTypeDef InPCH)
+{
+
+ if(ch_n & ADC_LEFT_CHN)
+ {
+ adc_set_left_n_ain(GND);
+ adc_set_left_p_ain(InPCH);
+ adc_set_left_input_mode(SINGLE_ENDED_MODE);
+ }
+ if(ch_n & ADC_RIGHT_CHN)
+ {
+ adc_set_right_n_ain(GND);
+ adc_set_right_p_ain(InPCH);
+ adc_set_right_input_mode(SINGLE_ENDED_MODE);
+ }
+ if(ch_n & ADC_MISC_CHN)
+ {
+ adc_set_misc_n_ain(GND);
+ adc_set_misc_p_ain(InPCH);
+ adc_set_misc_input_mode(SINGLE_ENDED_MODE);
+ }
+}
+
+/**
+ * @brief This function serves to set input channel in differential_mode.
+ * @param[in] enum variable of ADC input channel.
+ * @param[in] enum variable of ADC analog positive input channel.
+ * @param[in] enum variable of ADC analog negative input channel.
+ * @return none
+ */
+void adc_set_all_differential_p_n_ain(ADC_ChTypeDef ch_n, ADC_InputPchTypeDef InPCH,ADC_InputNchTypeDef InNCH)
+{
+
+ if(ch_n & ADC_LEFT_CHN)
+ {
+ adc_set_left_n_ain(InNCH);
+ adc_set_left_p_ain(InPCH);
+ adc_set_left_input_mode(DIFFERENTIAL_MODE);
+ }
+ if(ch_n & ADC_RIGHT_CHN)
+ {
+ adc_set_right_n_ain(InNCH);
+ adc_set_right_p_ain(InPCH);
+ adc_set_right_input_mode(DIFFERENTIAL_MODE);
+ }
+ if(ch_n & ADC_MISC_CHN)
+ {
+ adc_set_misc_n_ain(InNCH);
+ adc_set_misc_p_ain(InPCH);
+ adc_set_misc_input_mode(DIFFERENTIAL_MODE);
+ }
+}
+
+/**
+ * @brief This function serves to set state length.
+ * @param[in] Value of length of "capture" state for RNS & MISC channel.
+ * @param[in] Value of length of "capture" state for L & R channel.
+ * @param[in] Value of length of "capture" state for L & R & MISC channel.
+ * @return none
+ */
+void adc_set_all_set_and_capture_state_length(unsigned short r_max_mc, unsigned short r_max_c,unsigned char r_max_s)
+{
+ unsigned char data[3]={0};
+ if(r_max_mc&0x3ff) //r_max_mc[9:0]serves to set length of state for RNS and Misc channel.
+ {
+ data[0] = (unsigned char)r_max_mc;
+ data[2] = (unsigned char)(r_max_mc>>2)&0xc0;
+ }
+ if(r_max_c&0x3ff) //r_max_c*9:0+ serves to set length of state for left and right channel.
+ {
+ data[1] = (unsigned char)r_max_c;
+ data[2] |= (unsigned char)(r_max_c>>4)&0x30;
+ }
+ if(r_max_s) //r_max_s serves to set length of state for left, right and Misc channel.
+ {
+ data[2] |= (unsigned char)(r_max_s&0x0f);
+ }
+
+ analog_write(anareg_ef, data[0]);
+ analog_write(anareg_f0, data[1]);
+ analog_write(anareg_f1, data[2]);
+}
+
+
+/**
+ * @brief This function serves to set pre_scaling.
+ * @param[in] enum variable of ADC pre_scaling factor.
+ * @return none
+ */
+void adc_set_all_ain_pre_scaler(ADC_PreScalingTypeDef v_scl)
+{
+
+
+ analog_write(anareg_fa, (analog_read(anareg_fa)&(~FLD_SEL_AIN_SCALE)) | (v_scl<<6) );
+
+ //setting adc_sel_atb ,if stat is 0,clear adc_sel_atb,else set adc_sel_atb[0]if(stat)
+ unsigned char tmp;
+ if(v_scl)
+ {
+ //ana_F9<4> must be 1
+ tmp = analog_read(0xF9);
+ tmp = tmp|0x10; //open tmp = tmp|0x10;
+ analog_write (0xF9, tmp);
+ }
+ else
+ {
+ //ana_F9 <4> <5> must be 0
+ tmp = analog_read(0xF9);
+ tmp = tmp&0xcf;
+ analog_write (0xF9, tmp);
+ }
+
+}
+
+#define ADC_SAMPLE_NUM 8 // the value should be x*8
+
+/**
+ * @brief This function serves to set adc sampling and get results.
+ * @param[in] none.
+ * @return the result of sampling.
+ */
+volatile signed short dat_buf[ADC_SAMPLE_NUM];
+unsigned int adc_set_sample_and_get_result(void) ////_attribute_ram_code_
+{
+ unsigned short temp;
+ //volatile signed int adc_dat_buf[ADC_SAMPLE_NUM];
+ unsigned int adc_vol_mv;
+ unsigned short adc_sample[ADC_SAMPLE_NUM] = {0};
+ unsigned int adc_result;
+ int i,j;
+
+ adc_reset();
+ aif_reset();
+ adc_power_on(1); ///add by QW.
+
+ unsigned int t0 = clock_time();
+
+ for(i=0;i=0 && adc_sample[j] > temp;j--){
+ adc_sample[j+1] = adc_sample[j];
+ }
+ adc_sample[j+1] = temp;
+ }
+ }
+ }
+
+ adc_power_on(0); ///power down sar moudle
+ adc_aif_set_m_chn_en(0); //misc channel data dfifo disable
+
+///// get average value from raw data(abandon some small and big data ), then filter with history data //////
+ ///if ADC_SAMPLE_NUM is 8, the calculate method below is right. but if the ADC_SAMPLE_NUM is other value???
+ unsigned int adc_average = (adc_sample[2] + adc_sample[3] + adc_sample[4] + adc_sample[5])/4;
+
+ adc_result = adc_average;
+
+ //////////////// adc sample data convert to voltage(mv) ////////////////
+ // (1180mV Vref, 1/8 scaler) (BIT<12~0> valid data)
+ // = adc_result * 1160 * 8 / 0x2000
+ // = adc_result * 4680 >>12
+ // = adc_result * 295 >>8
+
+ if((adc_cal_value!=0xffff)&&(adc_cal_value != 0x0000)) //Already calibrated
+ {
+ adc_vol_mv = adc_result*1000/adc_cal_value; //this used 1000mV calibrated value
+ }
+ else
+ {
+ adc_vol_mv = (adc_result * 295)>>8;
+ }
+
+ return adc_vol_mv;
+}
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/adc.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/adc.h
new file mode 100644
index 0000000000000..4a0b6095c7a70
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/adc.h
@@ -0,0 +1,1001 @@
+/********************************************************************************************************
+ * @file adc.h
+ *
+ * @brief This is the ADC driver header file for TLSR8232
+ *
+ * @author junyuan.zhang ; junwei.lu
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ * @par History:
+ * 1.initial release(DEC. 26 2018)
+ *
+ * @version A001
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "pm.h"
+#include "bsp.h"
+#include "analog.h"
+#include "register.h"
+#include "gpio.h"
+#include "clock.h"
+
+#define ADC_1000MV_CAL_ADDR 0x770c2 //1000mV volatge measured saved address.
+extern volatile unsigned short adc_cal_value; ///when there is calibration value in flash, it will be used.
+
+/**
+ * ADC reference voltage
+ */
+typedef enum{
+ ADC_VREF_0P6V,
+ ADC_VREF_0P9V,
+ ADC_VREF_1P2V,
+ ADC_VREF_VBAT_N,
+}ADC_RefVolTypeDef;
+
+/**
+ * ADC Vbat divider
+ */
+typedef enum{
+ ADC_VBAT_DIVIDER_OFF = 0,
+ ADC_VBAT_DIVIDER_1F4,
+ ADC_VBAT_DIVIDER_1F3,
+ ADC_VBAT_DIVIDER_1F2
+}ADC_VbatDivTypeDef;
+
+/**
+ * ADC analog input negative channel
+ */
+
+typedef enum {
+ NOINPUTN,
+ A6N,
+ A7N,
+ B0N,
+ B1N,
+ B2N,
+ B3N,
+ B4N,
+ B5N,
+ B6N,
+ B7N,
+ PGA0N,
+ PGA1N,
+ TEMSENSORN,
+ RSSI_N,
+ GND,
+}ADC_InputNchTypeDef;
+
+/**
+ * ADC analog input positive channel
+ */
+
+typedef enum {
+ NOINPUTP,
+ A6P,
+ A7P,
+ B0P,
+ B1P,
+ B2P,
+ B3P,
+ B4P,
+ B5P,
+ B6P,
+ B7P,
+ PGA0P,
+ PGA1P,
+ TEMSENSORP,
+ RSSI_P,
+ VBAT,
+}ADC_InputPchTypeDef;
+
+/**
+ * ADC resolution
+ */
+typedef enum{
+ RES8,
+ RES10,
+ RES12,
+ RES14
+}ADC_ResTypeDef;
+
+/**
+ * ADC channel input mode
+ */
+typedef enum{
+ SINGLE_ENDED_MODE = 0, //single-ended mode
+ DIFFERENTIAL_MODE = 1, //differential mode
+}ADC_InputModeTypeDef;
+
+/**
+ * ADC Sampling cycles
+ */
+typedef enum{
+ SAMPLING_CYCLES_3,
+ SAMPLING_CYCLES_6,
+ SAMPLING_CYCLES_9,
+ SAMPLING_CYCLES_12,
+ SAMPLING_CYCLES_15,
+ SAMPLING_CYCLES_18,
+ SAMPLING_CYCLES_21,
+ SAMPLING_CYCLES_24,
+ SAMPLING_CYCLES_27,
+ SAMPLING_CYCLES_30,
+ SAMPLING_CYCLES_33,
+ SAMPLING_CYCLES_36,
+ SAMPLING_CYCLES_39,
+ SAMPLING_CYCLES_42,
+ SAMPLING_CYCLES_45,
+ SAMPLING_CYCLES_48,
+}ADC_SampCycTypeDef;
+
+/**
+ * ADC input channel: Left/Right/MISC/RNS
+ */
+typedef enum{
+ ADC_LEFT_CHN = BIT(0),
+ ADC_RIGHT_CHN = BIT(1),
+ ADC_MISC_CHN = BIT(2),
+ ADC_RNS_CHN = BIT(3),
+}ADC_ChTypeDef;
+
+/**
+ * ADC Prescaler
+ */
+typedef enum{
+ ADC_PRESCALER_1,
+ ADC_PRESCALER_1F2,
+ ADC_PRESCALER_1F4,
+ ADC_PRESCALER_1F8
+}ADC_PreScalingTypeDef;
+
+/**
+ * ADC current trim
+ */
+typedef enum{
+ ADC_CUR_TRIM_PER75,
+ ADC_CUR_TRIM_PER100,
+ ADC_CUR_TRIM_PER125,
+ ADC_CUR_TRIM_PER150
+}ADC_Cur_TrimTypeDef;
+
+typedef enum{
+ ADC_GAIN_STAGE_BIAS_PER75 = 0,
+ ADC_GAIN_STAGE_BIAS_PER100,
+ ADC_GAIN_STAGE_BIAS_PER125,
+ ADC_GAIN_STAGE_BIAS_PER150,
+}ADC_Gain_BiasTypeDef;
+
+/**
+ * ADC mode: Normal mode/RNS mode
+ */
+typedef enum{
+ ADC_NORMAL_MODE = 0,
+ ADC_RNS_MODE = BIT(4),
+}ADC_ModeTypeDef;
+
+/**
+ * ADC RNS channel source
+ */
+typedef enum {
+ ADC_RNS_SAR_MODE = 0,
+ ADC_RNS_R_MODE_0 = 2,
+ ADC_RNS_R_MODE_1 = 3,
+ ADC_RNS_DAT12_MODE = 4,
+ ADC_RNS_DAT5_MODE = 6,
+}ADC_RNS_SrcTypeDef;
+
+
+typedef enum {
+ ADC_RNS_READ_UPDATE = BIT(3),
+ ADC_RNS_CLOCK_UPDATE = BIT(4),
+}ADC_RNS_UpdateTypeDef;
+
+
+
+#define anareg_fc 0xfc
+enum{
+ FLD_PGA_ITRIM_GAIN_L = BIT_RNG(0,1),
+// FLD_PGA_ITRIM_GAIN_R = BIT_RNG(2,3),
+ FLD_ADC_MODE = BIT(4),
+ FLD_SAR_ADC_POWER_DOWN = BIT(5),
+ FLD_POWER_DOWN_PGA_CHN_L = BIT(6),
+// FLD_POWER_DOWN_PGA_CHN_R = BIT(7),
+};
+
+/**
+ * @brief This function sets sar_adc power.
+ * @param[in] on - 1 : power on; 0 : power off.
+ * @return none
+ */
+static inline void adc_power_on(unsigned char on)
+{
+ analog_write (anareg_fc, (analog_read(anareg_fc)&(~FLD_SAR_ADC_POWER_DOWN)) | (!on)<<5 );
+}
+
+/**
+ * @brief This function reset adc module
+ * @param[in] none.
+ * @return none.
+ */
+static inline void adc_reset(void)
+{
+ reg_rst2 =FLD_RST2_ADC;
+ reg_rst2 = 0;
+}
+/**
+ * @brief This function reset aif module
+ * @param[in] none.
+ * @return none.
+ */
+static inline void aif_reset(void)
+{
+ reg_rst0= FLD_RST0_AIF;
+ reg_rst0=0;
+}
+
+#define anareg_80 0x80 ///I think that adc clock should be closed after adc ending
+enum{
+ FLD_CLK_24M_TO_SAR_EN = BIT(7),
+};
+
+/**
+ * @brief This function enable adc source clock: external 24M
+ * @param[in] variable of source clock state 1: enable; 0: disable.
+ * @return none.
+ */
+static inline void adc_clk_en(unsigned int en)
+{
+ if(en)
+ {
+ analog_write(anareg_80, analog_read(anareg_80) | FLD_CLK_24M_TO_SAR_EN);
+ }
+ else
+ {
+ analog_write(anareg_80, analog_read(anareg_80) & ~FLD_CLK_24M_TO_SAR_EN);
+ }
+}
+
+
+#define anareg_f4 0xf4 ///checked. no use in other place
+enum{
+ FLD_ADC_SAMPLE_CLK_DIV = BIT_RNG(0,2),
+};
+/**
+ * @brief This function sets adc sample clk. adc sample clk = 24M/(1+div) div: 0~7.
+ * @param[in] div - the divider of adc sample clock.
+ * @return none
+ */
+static inline void adc_set_clk_div(unsigned char div)
+{
+ analog_write(anareg_f4, (analog_read(0xf4) & (~FLD_ADC_SAMPLE_CLK_DIV)) | (div & 0x07) );
+}
+
+
+#define anareg_e7 0xe7 ///checked. there is not used in other place
+enum{
+ FLD_ADC_VREF_CHN_L = BIT_RNG(0,1),
+ FLD_ADC_VREF_CHN_R = BIT_RNG(2,3),
+ FLD_ADC_VREF_CHN_M = BIT_RNG(4,5),
+};
+/**
+ * @brief This function sets ADC reference voltage for the MISC channel
+ * @param[in] v_ref - enum variable of adc reference voltage.
+ * @return none
+ */
+static inline void adc_set_misc_vref(ADC_RefVolTypeDef v_ref)
+{
+ analog_write(anareg_e7, ((analog_read(anareg_e7)&(~FLD_ADC_VREF_CHN_M)) | (v_ref<<4)) );
+}
+
+/**
+ * @brief This function sets ADC reference voltage for the L channel
+ * @param[in] v_ref - enum variable of adc reference voltage.
+ * @return none
+ */
+static inline void adc_set_left_vref(ADC_RefVolTypeDef v_ref)
+{
+ analog_write(anareg_e7, ((analog_read(anareg_e7)&(~FLD_ADC_VREF_CHN_L)) | (v_ref)) );
+}
+
+/**
+ * @brief This function sets ADC reference voltage for the R channel
+ * @param[in] v_ref - enum variable of adc reference voltage.
+ * @return none
+ */
+static inline void adc_set_right_vref(ADC_RefVolTypeDef v_ref)
+{
+ analog_write(anareg_e7, ((analog_read(anareg_e7)&(~FLD_ADC_VREF_CHN_R)) | (v_ref<<2) ));
+}
+
+/**
+ * @brief This function serves to set the channel reference voltage.
+ * @param[in] enum variable of ADC input channel.
+ * @param[in] enum variable of ADC reference voltage.
+ * @return none
+ */
+void adc_set_all_vref(ADC_ChTypeDef ch_n, ADC_RefVolTypeDef v_ref);
+
+#define anareg_f9 0xf9
+enum{
+ FLD_ADC_VREF_VBAT_DIV = BIT_RNG(2,3),
+ FLD_ADC_SEL_ATB = BIT(5),
+};
+
+typedef enum{
+ ADC_SEL_ATB_NONE = 0,
+ ADC_SEL_ATB_0,
+ ADC_SEL_ATB_1,
+ ADC_SEL_ATB_2
+}ADC_SelAtbTypeDef;
+
+static inline void adc_set_atb(ADC_SelAtbTypeDef stat)
+{
+ analog_write(anareg_f9, ((analog_read(anareg_f9)&(~FLD_ADC_SEL_ATB)) | (stat<<4)) );
+}
+/**
+ * @brief This function select Vbat voltage divider
+ * @param[in] vbat_div - enum variable of Vbat voltage divider.
+ * @return none
+ */
+static inline void adc_set_vref_vbat_div(ADC_VbatDivTypeDef vbat_div)
+{
+ analog_write (anareg_f9, (analog_read(anareg_f9)&(~FLD_ADC_VREF_VBAT_DIV)) | (vbat_div<<2) );
+}
+
+#define anareg_e8 0xe8
+#define anareg_e9 0xe9
+#define anareg_ea 0xea
+
+enum{
+ FLD_ADC_AIN_NEGATIVE = BIT_RNG(0,3),
+ FLD_ADC_AIN_POSITIVE = BIT_RNG(4,7),
+};
+
+/**
+ * @brief This function sets ADC analog negative input channel for the MISC channel
+ * @param[in] v_ain - enum variable of ADC analog negative input.
+ * @return none
+ */
+static inline void adc_set_misc_n_ain(ADC_InputNchTypeDef v_ain)
+{
+ analog_write (anareg_e8, (analog_read(anareg_e8)&(~FLD_ADC_AIN_NEGATIVE)) | (v_ain) );
+}
+
+/**
+ * @brief This function sets ADC analog positive input channel for the MISC channel
+ * @param[in] v_ain - enum variable of ADC analog positive input.
+ * @return none
+ */
+static inline void adc_set_misc_p_ain(ADC_InputPchTypeDef v_ain)
+{
+ analog_write (anareg_e8, (analog_read(anareg_e8)&(~FLD_ADC_AIN_POSITIVE)) | (v_ain<<4) );
+}
+
+/**
+ * @brief This function sets ADC analog negative input channel for the L channel
+ * @param[in] v_ain - enum variable of ADC analog negative input.
+ * @return none
+ */
+static inline void adc_set_left_n_ain(ADC_InputNchTypeDef v_ain)
+{
+ analog_write (anareg_e9, (analog_read(anareg_e9)&(~FLD_ADC_AIN_NEGATIVE)) | (v_ain) );
+}
+
+/**
+ * @brief This function sets ADC analog positive input channel for the L channel
+ * @param[in] v_ain - enum variable of ADC analog positive input.
+ * @return none
+ */
+static inline void adc_set_left_p_ain(ADC_InputPchTypeDef v_ain)
+{
+ analog_write (anareg_e9, (analog_read(anareg_e9)&(~FLD_ADC_AIN_POSITIVE)) | (v_ain<<4) );
+}
+
+/**
+ * @brief This function sets ADC analog negative input channel for the R channel
+ * @param[in] v_ain - enum variable of ADC analog negative input.
+ * @return none
+ */
+static inline void adc_set_right_n_ain(ADC_InputNchTypeDef v_ain)
+{
+ analog_write (anareg_ea, (analog_read(anareg_ea)&(~FLD_ADC_AIN_NEGATIVE)) | (v_ain) );
+}
+
+/**
+ * @brief This function sets ADC analog positive input channel for the R channel
+ * @param[in] v_ain - enum variable of ADC analog positive input.
+ * @return none
+ */
+static inline void adc_set_right_p_ain(ADC_InputPchTypeDef v_ain)
+{
+ analog_write (anareg_ea, (analog_read(anareg_ea)&(~FLD_ADC_AIN_POSITIVE)) | (v_ain<<4) );
+}
+
+/**
+ * @brief This function serves to set input channel in single_ended_input_mode.
+ * @param[in] enum variable of ADC input channel.
+ * @param[in] enum variable of ADC analog positive input channel.
+ * @return none
+ */
+void adc_set_all_single_end_ain(ADC_ChTypeDef ch_n, ADC_InputPchTypeDef InPCH);
+
+/**
+ * @brief This function serves to set input channel in differential_mode.
+ * @param[in] enum variable of ADC input channel.
+ * @param[in] enum variable of ADC analog positive input channel.
+ * @param[in] enum variable of ADC analog negative input channel.
+ * @return none
+ */
+void adc_set_all_differential_p_n_ain(ADC_ChTypeDef ch_n, ADC_InputPchTypeDef InPCH,ADC_InputNchTypeDef InNCH);
+
+/**
+ * @brief This function serves to set pre_scaling.
+ * @param[in] enum variable of ADC pre_scaling factor.
+ * @return none
+ */
+void adc_set_all_ain_pre_scaler(ADC_PreScalingTypeDef v_scl);
+
+#define anareg_eb 0xeb
+enum{
+ FLD_ADC_RES_L = BIT_RNG(0,1),
+ FLD_ADC_RES_R = BIT_RNG(4,5),
+};
+/**
+ * @brief This function sets ADC resolution for the L channel
+ * @param[in] v_res - enum variable of ADC resolution.
+ * @return none
+ */
+static inline void adc_set_left_resolution(ADC_ResTypeDef v_res)
+{
+ analog_write(anareg_eb, (analog_read(anareg_eb)&(~FLD_ADC_RES_L)) | (v_res) );
+}
+
+/**
+ * @brief This function sets ADC resolution for the R channel
+ * @param[in] v_res - enum variable of ADC resolution.
+ * @return none
+ */
+static inline void adc_set_right_resolution(ADC_ResTypeDef v_res)
+{
+ analog_write(anareg_eb, (analog_read(anareg_eb)&(~FLD_ADC_RES_R)) | (v_res<<4) );
+}
+
+#define anareg_ec 0xec
+enum{
+ FLD_ADC_RES_M = BIT_RNG(0,1),
+ FLD_ADC_EN_DIFF_CHN_L = BIT(4),
+ FLD_ADC_EN_DIFF_CHN_R = BIT(5),
+ FLD_ADC_EN_DIFF_CHN_M = BIT(6),
+};
+/**
+ * @brief This function sets ADC resolution for the MISC channel
+ * @param[in] v_res - enum variable of ADC resolution.
+ * @return none
+ */
+static inline void adc_set_misc_resolution(ADC_ResTypeDef v_res)
+{
+ analog_write(anareg_ec, (analog_read(anareg_ec)&(~FLD_ADC_RES_M)) | (v_res) );
+}
+
+/**
+ * @brief This function serves to set resolution.
+ * @param[in] enum variable of ADC input channel.
+ * @param[in] enum variable of ADC resolution.
+ * @return none
+ */
+void adc_set_all_resolution(ADC_ChTypeDef ch_n, ADC_ResTypeDef v_res);
+
+/**
+ * @brief This function sets ADC input mode for the MISC channel
+ * @param[in] m_input - enum variable of ADC channel input mode.
+ * @return none
+ */
+static inline void adc_set_misc_input_mode(ADC_InputModeTypeDef m_input)
+{
+ if(m_input){ //differential mode
+ analog_write(anareg_ec, analog_read(anareg_ec) | FLD_ADC_EN_DIFF_CHN_M );
+ }
+ else{ //single-ended mode
+ analog_write(anareg_ec, analog_read(anareg_ec) & (~FLD_ADC_EN_DIFF_CHN_M) );
+ }
+}
+
+/**
+ * @brief This function sets ADC input mode for the L channel
+ * @param[in] m_input - enum variable of ADC channel input mode.
+ * @return none
+ */
+static inline void adc_set_left_input_mode(ADC_InputModeTypeDef m_input)
+{
+ if(m_input){ //differential mode
+ analog_write(anareg_ec, (analog_read(anareg_ec) | FLD_ADC_EN_DIFF_CHN_L ));
+ }
+ else{ //single-ended mode
+ analog_write(anareg_ec, (analog_read(anareg_ec) & (~FLD_ADC_EN_DIFF_CHN_L)));
+ }
+}
+
+/**
+ * @brief This function sets ADC input mode for the R channel
+ * @param[in] m_input - enum variable of ADC channel input mode.
+ * @return none
+ */
+static inline void adc_set_right_input_mode(ADC_InputModeTypeDef m_input)
+{
+ if(m_input){ //differential mode
+ analog_write(anareg_ec, analog_read(anareg_ec) | FLD_ADC_EN_DIFF_CHN_R );
+ }
+ else{ //single-ended mode
+ analog_write(anareg_ec, analog_read(anareg_ec) & (~FLD_ADC_EN_DIFF_CHN_R) );
+ }
+}
+
+/**
+ * @brief This function serves to set input_mode.
+ * @param[in] enum variable of ADC input channel.
+ * @param[in] enum variable of ADC channel input mode.
+ * @return none
+ */
+void adc_set_all_input_mode(ADC_ChTypeDef ch_n, ADC_InputModeTypeDef m_input);
+
+
+#define anareg_ee 0xee
+enum{
+ FLD_ADC_TSAMPLE_CYCLE_CHN_M = BIT_RNG(0,3),
+};
+
+/**
+ * @brief This function sets ADC sample time(the number of adc clocks for sample cycles) for the MISC channel.
+ * @param[in] adcST - enum variable of adc sample cycles.
+ * @return none
+ */
+static inline void adc_set_misc_tsample_cycle(ADC_SampCycTypeDef adcST)
+{
+ analog_write(anareg_ee, (analog_read(anareg_ee)&(~FLD_ADC_TSAMPLE_CYCLE_CHN_M)) | (adcST) );
+}
+
+
+#define anareg_ed 0xed
+enum{
+ FLD_ADC_TSAMPLE_CYCLE_CHN_L = BIT_RNG(0,3),
+ FLD_ADC_TSAMPLE_CYCLE_CHN_R = BIT_RNG(4,7),
+};
+/**
+ * @brief This function sets ADC sample time(the number of adc clocks for sample cycles) for the L channel.
+ * @param[in] adcST - enum variable of adc sample cycles.
+ * @return none
+ */
+static inline void adc_set_left_tsample_cycle(ADC_SampCycTypeDef adcST)
+{
+ analog_write(anareg_ed, (analog_read(anareg_ed)&(~FLD_ADC_TSAMPLE_CYCLE_CHN_L)) | (adcST) );
+}
+
+/**
+ * @brief This function sets ADC sample time(the number of adc clocks for sample cycles) for the R channel.
+ * @param[in] adcST - enum variable of adc sample cycles.
+ * @return none
+ */
+static inline void adc_set_right_tsample_cycle(ADC_SampCycTypeDef adcST)
+{
+ analog_write(anareg_ed, (analog_read(anareg_ed)&(~FLD_ADC_TSAMPLE_CYCLE_CHN_R)) | (adcST<<4) );
+}
+
+/**
+ * @brief This function serves to set sample_cycle.
+ * @param[in] enum variable of ADC input channel.
+ * @param[in] enum variable of ADC Sampling cycles.
+ * @return none
+ */
+void adc_set_all_tsample_cycle(ADC_ChTypeDef ch_n, ADC_SampCycTypeDef adcST);
+
+#define anareg_ef 0xef
+enum{
+ FLD_R_MAX_MC0 = BIT_RNG(0,7),
+};
+
+#define anareg_f0 0xf0
+enum{
+ FLD_R_MAX_C0 = BIT_RNG(0,7),
+};
+
+#define anareg_f1 0xf1
+enum{
+ FLD_R_MAX_S = BIT_RNG(0,3),
+ FLD_R_MAX_C1 = BIT_RNG(4,5),
+ FLD_R_MAX_MC1 = BIT_RNG(6,7),
+};
+
+#define anareg_f2 0xf2
+enum{
+ FLD_ADC_CHN_EN_L = BIT(0),
+ FLD_ADC_CHN_EN_R = BIT(1),
+ FLD_ADC_CHN_EN_M = BIT(2),
+ FLD_ADC_CHN_EN_RNS = BIT(3),
+ FLD_ADC_MAX_SCNT = BIT_RNG(4,6),
+};
+/**
+ * @brief This function sets length of each ¡°set¡± state for L channel.
+ * @param[in] r_max_s - variable of length of "set" state for L channel.
+ * @return none
+ */
+static inline void adc_set_all_set_state_length(unsigned char r_max_s)
+{
+ analog_write(anareg_f1, (analog_read(anareg_f1)&(~FLD_R_MAX_S)) | (r_max_s) );
+}
+
+/**
+ * @brief This function sets length of each ¡°set¡± state for MISC channel.
+ * @param[in] r_max_mc - variable of length of "set" state for MISC channel.
+ * @return none
+ */
+static inline void adc_set_misc_rns_capture_state_length(unsigned short r_max_mc)
+{
+ analog_write(anareg_ef, (r_max_mc & 0x0ff));
+ analog_write(anareg_f1, ((analog_read(anareg_f1)&(~FLD_R_MAX_MC1)) | (r_max_mc>>8)<<6 ));
+}
+
+/**
+ * @brief This function sets length of each ¡°set¡± state for R channel.
+ * @param[in] r_max_c - variable of length of "set" state for R channel.
+ * @return none
+ */
+static inline void adc_set_left_right_capture_state_length(unsigned short r_max_c)
+{
+ analog_write(anareg_f0, r_max_c & 0xff);
+ analog_write(anareg_f1, (analog_read(anareg_f1)&(~FLD_R_MAX_C1)) | (r_max_c>>8)<<4 );
+}
+
+/**
+ * @brief This function serves to set state length.
+ * @param[in] r_max_mc - Value of length of "capture" state for RNS & MISC channel.
+ * @param[in] r_max_c - Value of length of "capture" state for L & R channel.
+ * @param[in] r_max_s - Value of length of "set" state for L & R & MISC channel.
+ * @return none
+ */
+void adc_set_all_set_and_capture_state_length(unsigned short r_max_mc, unsigned short r_max_c,unsigned char r_max_s);
+
+/**
+ * @brief This function sets ADC input channel.
+ * @param[in] ad_ch - enum variable of ADC input channel.
+ * @return none
+ */
+static inline void adc_set_chn_en(ADC_ChTypeDef ad_ch)
+{
+ analog_write(anareg_f2, (analog_read(anareg_f2)&0xf0) | ad_ch );
+}
+
+/**
+ * @brief This function sets total state index for sampling state.
+ * @param[in] s_cnt - sum of state index start with 0x0.
+ * @return none
+ */
+static inline void adc_set_max_state_cnt(unsigned char s_cnt)
+{
+ analog_write(anareg_f2, (analog_read(anareg_f2)&(~FLD_ADC_MAX_SCNT)) | ((s_cnt&0x07)<<4) );
+}
+
+/**
+ * @brief This function sets total state index for the channel.
+ * @param[in] ad_ch - enum variable of ADC input channel.
+ * @param[in] s_cnt - sum of the channel state index start with 0x0.
+ * @return none
+ */
+static inline void adc_set_chn_en_and_max_state_cnt(ADC_ChTypeDef ad_ch, unsigned char s_cnt)
+{
+ analog_write(anareg_f2, ad_ch | ((s_cnt&0x07)<<4) );
+}
+
+#define anareg_fa 0xfa
+enum{
+ FLD_ADC_ITRIM_PREAMP = BIT_RNG(0,1),
+ FLD_ADC_ITRIM_VREFBUF = BIT_RNG(2,3),
+ FLD_ADC_ITRIM_VCMBUF = BIT_RNG(4,5),
+ FLD_SEL_AIN_SCALE = BIT_RNG(6, 7),
+};
+/**
+ * @brief This function sets pre-scaling for comparator preamp bias current trimming.
+ * @param[in] bias - enum variable of current trimming.
+ * @return none
+ */
+static inline void adc_set_itrim_preamp(ADC_Cur_TrimTypeDef bias)
+{
+ analog_write(anareg_fa, (analog_read(anareg_fa)&(~FLD_ADC_ITRIM_PREAMP)) | (bias<<0) );
+}
+
+/**
+ * @brief This function sets pre-scaling for Vref buffer bias current trimming.
+ * @param[in] bias - enum variable of current trimming.
+ * @return none
+ */
+static inline void adc_set_itrim_vrefbuf(ADC_Cur_TrimTypeDef bias)
+{
+ analog_write(anareg_fa, (analog_read(anareg_fa)&(~FLD_ADC_ITRIM_VREFBUF)) | (bias<<2) );
+}
+
+/**
+ * @brief This function sets pre-scaling for Vref(Vcmbuf) buffer bias current trimming.
+ * @param[in] bias - enum variable of current trimming.
+ * @return none
+ */
+static inline void adc_set_itrim_vcmbuf(ADC_Cur_TrimTypeDef bias)
+{
+ analog_write(anareg_fa, (analog_read(anareg_fa)&(~FLD_ADC_ITRIM_VCMBUF)) | (bias<<4) );
+}
+
+/**
+ * @brief This function serves to set mode for ADC.
+ * @param[in] adc_m - 0: normal mode; 1: RNS mode.
+ * @return none
+ */
+static inline void adc_set_mode(ADC_ModeTypeDef adc_m)
+{
+ analog_write (anareg_fc, (analog_read(anareg_fc)&(~FLD_ADC_MODE)) | adc_m);
+}
+
+/**
+ * @brief This function sets PGA-Left-channel power.
+ * @param[in] on - 1 : power on; 0 : power off.
+ * @return none
+ */
+static inline void adc_set_pga_left_power_on(unsigned char on)
+{
+ analog_write (anareg_fc, (analog_read(anareg_fc)&(~FLD_POWER_DOWN_PGA_CHN_L)) | (!on)<<6 );
+}
+
+/**
+ * @brief This function sets PGA-Right-channel power.
+ * @param[in] on - 1 : power on; 0 : power off.
+ * @return none
+ */
+//static inline void adc_set_pga_right_power_on(unsigned char on)
+//{
+// analog_write (anareg_fc, (analog_read(anareg_fc)&(~FLD_POWER_DOWN_PGA_CHN_R)) | (!on)<<7 );
+//}
+
+
+#define anareg_fb 0xfb
+enum{
+ FLD_PGA_CAP_TRIM_EN_L = BIT(0),
+ //FLD_PGA_CAP_TRIM_EN_R = BIT(1),
+ FLD_PGA_ITRIM_BOOST_L = BIT_RNG(4,5),
+ //FLD_PGA_ITRIM_BOOST_R = BIT_RNG(6,7),
+};
+/**
+ * @brief This function sets left_boost_bias with PGA enable.
+ * @param[in] bias - Value of gain_stage.
+ * @return none
+ */
+static inline void adc_set_left_boost_bias(ADC_Gain_BiasTypeDef bias)
+{
+ analog_write(anareg_fb, (analog_read(anareg_fb)&(~FLD_PGA_ITRIM_BOOST_L)) | (bias<<4) | FLD_PGA_CAP_TRIM_EN_L );
+}
+
+/**
+ * @brief This function sets right_boost_bias with PGA enable.
+ * @param[in] bias - Value of gain_stage.
+ * @return none
+ */
+//static inline void adc_set_right_boost_bias(ADC_Gain_BiasTypeDef bias)
+//{
+// analog_write(anareg_fb, (analog_read(anareg_fb)&(~FLD_PGA_ITRIM_BOOST_R)) | (bias<<6) | FLD_PGA_CAP_TRIM_EN_R);
+//}
+
+/**
+ * @brief This function gets left_gain_bias with PGA enable.
+ * @param[in] bias - Value of gain_stage.
+ * @return none
+ */
+static inline void adc_set_left_gain_bias(ADC_Gain_BiasTypeDef bias)
+{
+ analog_write(anareg_fc, (analog_read(anareg_fc)&(~FLD_PGA_ITRIM_GAIN_L)) | (bias) );
+}
+
+/**
+ * @brief This function gets right_gain_bias with PGA enable.
+ * @param[in] bias - Value of gain_stage.
+ * @return none
+ */
+//static inline void adc_set_right_gain_bias(ADC_Gain_BiasTypeDef bias)
+//{
+// analog_write(anareg_fc, (analog_read(anareg_fc)&(~FLD_PGA_ITRIM_GAIN_R)) | (bias<<2) );
+//}
+
+#define anareg_fe 0xfe
+/**
+ * @brief This function serves to set the source and mode of the random number generator.
+ * @param[in] ADC_RNS_SrcTypeDef src.
+ * @param[in] ADC_RNS_UpdateTypeDef update_type.
+ * @return none.
+ */
+static inline void adc_set_rns(ADC_RNS_SrcTypeDef src,ADC_RNS_UpdateTypeDef update_type)
+{
+ analog_write(anareg_fe, src | update_type); //Set
+}
+
+#define anareg_f5 0xf5
+#define anareg_f6 0xf6
+/**
+ * @brief This function serves to read the value of the random number generator.
+ * @param[in] none.
+ * @return unsigned short RngValue random number.
+ */
+static inline unsigned short adc_get_rns_result(void)
+{
+ return ( analog_read(anareg_f6)<<8 | analog_read(anareg_f5) );
+}
+
+/**
+ * @brief This function serves to ADC init.
+ * @param[in] none
+ * @return none
+ */
+void adc_init(void );
+
+/**
+ * @brief This function is used for IO port configuration of ADC IO port voltage sampling.
+ * @param[in] GPIO_PinTypeDef pin
+ * @return none
+ */
+void adc_base_pin_init(GPIO_PinTypeDef pin);
+
+/**
+ * @brief This function is used for IO port configuration of ADC supply voltage sampling.
+ * @param[in] GPIO_PinTypeDef pin
+ * @return none
+ */
+void adc_vbat_pin_init(GPIO_PinTypeDef pin);
+
+/**
+ * @brief This function is used for ADC configuration of ADC IO voltage sampling.
+ * @param[in] GPIO_PinTypeDef pin
+ * @return none
+ */
+
+void adc_base_init(GPIO_PinTypeDef pin);
+
+/**
+ * @brief This function is used for ADC configuration of ADC supply voltage sampling.
+ * @param[in] GPIO_PinTypeDef pin
+ * @return none
+ */
+
+void adc_vbat_init(GPIO_PinTypeDef pin);
+
+/**
+ * @brief This function serves to set adc sampling and get results.
+ * @param[in] none.
+ * @return the result of sampling.
+ */
+unsigned int adc_set_sample_and_get_result(void);
+
+
+#define reg_aif_m_chn_addr REG_ADDR16(0x34)
+#define reg_aif_m_chn_size REG_ADDR8(0x36)
+#define reg_aif_m_chn_ctrl REG_ADDR8(0x37)
+enum{
+ FLD_M_CHANNEL_FIFO_EN = BIT(0),
+ FLD_M_CHANNEL_WPTR_EN = BIT(1),
+ FLD_M_CHANNEL_WPTR_CLR = BIT(2),
+ FLD_M_CHANNEL_MONO = BIT(3),
+};
+
+#define reg_aif_m_chn_wptr REG_ADDR16(0x3a)
+/**
+ * @brief This function performs to set MISC channel.
+ * @param[in] pbuff - address in FIFO2.
+ * @param[in] size_buff - depth of FIFO2.
+ * @return none.
+ */
+static inline void adc_aif_set_misc_buf(unsigned short* pbuff,unsigned int size_buff)
+{
+ reg_aif_m_chn_addr = (unsigned short)((unsigned int)pbuff);
+ reg_aif_m_chn_size = (size_buff>>3)-1;
+ reg_aif_m_chn_wptr = 0; //clear dfifo2 write pointer
+}
+/**
+ * @brief This function performs to enable audio input of DFIFO2.
+ * @param[in] none.
+ * @return none.
+ */
+static inline void adc_aif_set_m_chn_en(unsigned char en)
+{
+ if(en)
+ {
+ reg_aif_m_chn_ctrl |= (FLD_M_CHANNEL_FIFO_EN|FLD_M_CHANNEL_WPTR_EN|FLD_M_CHANNEL_MONO);///FLD_M_CHANNEL_MONO:in short, in word(4byte)
+ }
+ else
+ {
+ reg_aif_m_chn_ctrl &= ~(FLD_M_CHANNEL_FIFO_EN|FLD_M_CHANNEL_WPTR_EN);
+ }
+
+}
+
+
+#define reg_aif_adc_ctrl REG_ADDR8(0x3d)
+enum{
+ FLD_USE_RAW_DATA = BIT(2),
+};
+static inline void adc_aif_set_use_raw_data_en(void){
+ reg_aif_adc_ctrl |= FLD_USE_RAW_DATA;
+}
+
+
+/** \defgroup GP1 ADC Examples
+ *
+ * @{
+ */
+
+/*! \page adc Table of Contents
+ - [API-ADC-CASE1:ADC BASE MODE](#ADC_BASE_MODE)
+ - [API-ADC-CASE2:ADC VBAT MODE](#ADC_VBAT_MODE)
+ - [API-ADC-CASE3:ADC RNG MODE](#ADC_RNG_MODE)
+ - [API-ADC-CASE4:ADC TEMP MODE](#ADC_TEMP_MODE)
+
+
API-ADC-CASE1:ADC BASE MODE
+
+| Function | Sub-Function | APIs || Description | Update Status |
+| :------- | :----------- | :---------- | :---------- |:---------- | :------------ |
+| irq_handler() | None ||| Interrupt handler function [**Mandatory**] | 2019-1-10 |
+| main() | system_init() ||| CPU initialization function [**Mandatory**] | ^ |
+| ^ | clock_init() | clock_init(SYS_CLK_24M_XTAL) || Clock initialization function, System Clock is 24M RC by default [**optional**] | ^ |
+| ^ | rf_mode_init() | rf_mode_init(RF_MODE_BLE_1M) || RF mode initialization [**optional**] | ^ |
+| ^ | gpio_init() ||| GPIO initialization: set the initialization status of all GPIOs [**optional**] | ^ |
+| ^ | user_init() | adc_init()|| initiate ADC module | ^ |
+| ^ | ^ | adc_base_init()| adc_base_init(GPIO_PB0)| initiate ADC module in the BASE mode | ^ |
+| ^ | ^ | adc_power_on() | adc_power_on(1) | Power on ADC module | ^ |
+| ^ | main_loop() | base_val = adc_set_sample_and_get_result() || get the result in main program loop | ^ |
+
+
API-ADC-CASE2:ADC VBAT MODE
+
+| Function | Sub-Function | APIs || Description | Update Status |
+| :------- | :----------- | :---------- | :---------- |:---------- | :------------ |
+| irq_handler() | None ||| Interrupt handler function [**Mandatory**] | 2019-1-10 |
+| main() | system_init() ||| CPU initialization function [**Mandatory**] | ^ |
+| ^ | clock_init() | clock_init(SYS_CLK_24M_XTAL) || Clock initialization function, System Clock is 24M RC by default [**optional**] | ^ |
+| ^ | rf_mode_init() | rf_mode_init(RF_MODE_BLE_1M) || RF mode initialization [**optional**] | ^ |
+| ^ | gpio_init() ||| GPIO initialization: set the initialization status of all GPIOs [**optional**] | ^ |
+| ^ | user_init() | adc_init()|| initiate ADC module | ^ |
+| ^ | ^ | adc_vbat_init()| adc_vbat_init(GPIO_PB0)| initiate ADC module in the BASE mode | ^ |
+| ^ | ^ | adc_power_on() | adc_power_on(1) | Power on ADC module | ^ |
+| ^ | main_loop() | vbat_val = adc_set_sample_and_get_result() || get the result in main program loop | ^ |
+
+
API-ADC-CASE3:ADC RNG MODE
+
+| Function | Sub-Function | APIs || Description | Update Status |
+| :------- | :----------- | :---------- | :---------- |:---------- | :------------ |
+| irq_handler() | None ||| Interrupt handler function [**Mandatory**] | 2019-1-10 |
+| main() | system_init() ||| CPU initialization function [**Mandatory**] | ^ |
+| ^ | clock_init() | clock_init(SYS_CLK_24M_XTAL) || Clock initialization function, System Clock is 24M RC by default [**optional**] | ^ |
+| ^ | rf_mode_init() | rf_mode_init(RF_MODE_BLE_1M) || RF mode initialization [**optional**] | ^ |
+| ^ | gpio_init() ||| GPIO initialization: set the initialization status of all GPIOs [**optional**] | ^ |
+| ^ | user_init() | rng_init()|| initiate RNG | ^ |
+| ^ | main_loop() | rns_val = rand() || get the result in main program loop | ^ |
+
+
API-ADC-CASE4:ADC TEMP MODE
+
+
History Record
+
+| Date | Description | Author |
+| :--- | :---------- | :----- |
+| 2019-1-10 | initial release | ZJY/LJW |
+
+
+*/
+
+ /** @}*/ //end of GP1
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/analog.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/analog.c
new file mode 100644
index 0000000000000..3a64cbcc858a5
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/analog.c
@@ -0,0 +1,114 @@
+/********************************************************************************************************
+ * @file analog.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#include "analog.h"
+
+#include "compiler.h"
+#include "register.h"
+#include "irq.h"
+
+/**
+ * @brief This function serves to wait for analog register ready.
+ * @param[in] none.
+ * @return none.
+ */
+static inline void analog_wait(){
+ while(reg_ana_ctrl & FLD_ANA_BUSY){}
+}
+
+/**
+ * @brief This function serves to analog register read.
+ * @param[in] addr - address need to be read.
+ * @return the result of read.
+ */
+_attribute_ram_code_ unsigned char analog_read(unsigned char addr){
+ unsigned char r = irq_disable();
+
+ reg_ana_addr = addr;
+ reg_ana_ctrl = (FLD_ANA_START);
+// Can't use one line setting "reg_ana_ctrl32 = ((FLD_ANA_START | FLD_ANA_RSV) << 16) | addr;"
+// This will fail because of time sequence and more over size is bigger
+ analog_wait();
+
+ unsigned char data = reg_ana_data;
+
+ reg_ana_ctrl = 0; // finish
+
+ irq_restore(r);
+
+ return data;
+}
+
+/**
+ * @brief This function serves to analog register write.
+ * @param[in] addr - address need to be write.
+ * @param[in] v - the value need to be write.
+ * @return none.
+ */
+_attribute_ram_code_ void analog_write(unsigned char addr, unsigned char v){
+ unsigned char r = irq_disable();
+
+ reg_ana_addr = addr;
+ reg_ana_data = v;
+ reg_ana_ctrl = (FLD_ANA_START | FLD_ANA_RW);
+// Can't use one line setting "reg_ana_ctrl32 = ((FLD_ANA_START | FLD_ANA_RW) << 16) | (v << 8) | addr;"
+// This will fail because of time sequence and more over size is bigger
+ analog_wait();
+ reg_ana_ctrl = 0; // finish
+
+
+ irq_restore(r);
+}
+
+void analog_read_multi(unsigned char addr, unsigned char *v, int len){
+ unsigned char r = irq_disable();
+
+ reg_ana_ctrl = 0; // issue clock
+ reg_ana_addr = addr;
+ while(len--){
+ reg_ana_ctrl = FLD_ANA_CYC | FLD_ANA_START;
+ analog_wait();
+
+ *v++ = reg_ana_data;
+
+ }
+ reg_ana_ctrl = 0; // finish
+
+ irq_restore(r);
+}
+
+void analog_write_multi(unsigned char addr, unsigned char *v, int len){
+ unsigned char r = irq_disable();
+
+ reg_ana_addr = addr;
+ while(len--){
+ reg_ana_data = *v++;
+
+ reg_ana_ctrl = FLD_ANA_CYC | FLD_ANA_START | FLD_ANA_RW; // multi write
+ analog_wait();
+ }
+ reg_ana_ctrl = 0; // finish
+
+ irq_restore(r);
+}
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/analog.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/analog.h
new file mode 100644
index 0000000000000..942f21e274e7f
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/analog.h
@@ -0,0 +1,46 @@
+/********************************************************************************************************
+ * @file analog.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+#include "compiler.h"
+
+
+/**
+ * @brief This function serves to analog register read.
+ * @param[in] addr - address need to be read.
+ * @return the result of read.
+ */
+_attribute_ram_code_ unsigned char analog_read(unsigned char addr);
+
+/**
+ * @brief This function serves to analog register write.
+ * @param[in] addr - address need to be write.
+ * @param[in] v - the value need to be write.
+ * @return none.
+ */
+_attribute_ram_code_ void analog_write(unsigned char addr, unsigned char v);
+
+
+#define WriteAnalogReg analog_write
+#define ReadAnalogReg analog_read
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/bsp.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/bsp.c
new file mode 100644
index 0000000000000..e50e11b964596
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/bsp.c
@@ -0,0 +1,101 @@
+/********************************************************************************************************
+ * @file bsp.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#include "bsp.h"
+#include "clock.h"
+#include "analog.h"
+
+/**
+ * @brief This function performs a series of operations of writing digital or analog registers
+ * according to a command table
+ * @param[in] pt - pointer to a command table containing several writing commands
+ * @param[in] size - number of commands in the table
+ * @return number of commands are carried out
+ */
+int load_tbl_cmd_set(const TBLCMDSET * pt, int size){
+ int l=0;
+
+ while (l 3
+#define BIT_LOW_BIT(y) (((y) & BIT(0))?0:(((y) & BIT(1))?1:(((y) & BIT(2))?2:(((y) & BIT(3))?3: \
+ (((y) & BIT(4))?4:(((y) & BIT(5))?5:(((y) & BIT(6))?6:(((y) & BIT(7))?7: \
+ (((y) & BIT(8))?8:(((y) & BIT(9))?9:(((y) & BIT(10))?10:(((y) & BIT(11))?11: \
+ (((y) & BIT(12))?12:(((y) & BIT(13))?13:(((y) & BIT(14))?14:(((y) & BIT(15))?15: \
+ (((y) & BIT(16))?16:(((y) & BIT(17))?17:(((y) & BIT(18))?18:(((y) & BIT(19))?19: \
+ (((y) & BIT(20))?20:(((y) & BIT(21))?21:(((y) & BIT(22))?22:(((y) & BIT(23))?23: \
+ (((y) & BIT(24))?24:(((y) & BIT(25))?25:(((y) & BIT(26))?26:(((y) & BIT(27))?27: \
+ (((y) & BIT(28))?28:(((y) & BIT(29))?29:(((y) & BIT(30))?30:(((y) & BIT(31))?31:32 \
+ ))))))))))))))))))))))))))))))))
+
+// Return the bit index of the highest 1 in (y). ex: 0b00110111000 --> 8
+#define BIT_HIGH_BIT(y) (((y) & BIT(31))?31:(((y) & BIT(30))?30:(((y) & BIT(29))?29:(((y) & BIT(28))?28: \
+ (((y) & BIT(27))?27:(((y) & BIT(26))?26:(((y) & BIT(25))?25:(((y) & BIT(24))?24: \
+ (((y) & BIT(23))?23:(((y) & BIT(22))?22:(((y) & BIT(21))?21:(((y) & BIT(20))?20: \
+ (((y) & BIT(19))?19:(((y) & BIT(18))?18:(((y) & BIT(17))?17:(((y) & BIT(16))?16: \
+ (((y) & BIT(15))?15:(((y) & BIT(14))?14:(((y) & BIT(13))?13:(((y) & BIT(12))?12: \
+ (((y) & BIT(11))?11:(((y) & BIT(10))?10:(((y) & BIT(9))?9:(((y) & BIT(8))?8: \
+ (((y) & BIT(7))?7:(((y) & BIT(6))?6:(((y) & BIT(5))?5:(((y) & BIT(4))?4: \
+ (((y) & BIT(3))?3:(((y) & BIT(2))?2:(((y) & BIT(1))?1:(((y) & BIT(0))?0:32 \
+ ))))))))))))))))))))))))))))))))
+
+#define COUNT_ARGS_IMPL2(_1, _2, _3, _4, _5, _6, _7, _8 , _9, _10, _11, _12, _13, _14, _15, _16, _17, _18, _19, _20, N, ...) N
+#define COUNT_ARGS_IMPL(args) COUNT_ARGS_IMPL2 args
+#define COUNT_ARGS(...) COUNT_ARGS_IMPL((__VA_ARGS__, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0))
+
+#define MACRO_CHOOSE_HELPER2(base, count) base##count
+#define MACRO_CHOOSE_HELPER1(base, count) MACRO_CHOOSE_HELPER2(base, count)
+#define MACRO_CHOOSE_HELPER(base, count) MACRO_CHOOSE_HELPER1(base, count)
+
+#define MACRO_GLUE(x, y) x y
+#define VARARG(base, ...) MACRO_GLUE(MACRO_CHOOSE_HELPER(base, COUNT_ARGS(__VA_ARGS__)),(__VA_ARGS__))
+
+#define MV(m, v) (((v) << BIT_LOW_BIT(m)) & (m))
+
+// warning MASK_VALn are internal used macro, please use MASK_VAL instead
+#define MASK_VAL2(m, v) (MV(m,v))
+#define MASK_VAL4(m1,v1,m2,v2) (MV(m1,v1)|MV(m2,v2))
+#define MASK_VAL6(m1,v1,m2,v2,m3,v3) (MV(m1,v1)|MV(m2,v2)|MV(m3,v3))
+#define MASK_VAL8(m1,v1,m2,v2,m3,v3,m4,v4) (MV(m1,v1)|MV(m2,v2)|MV(m3,v3)|MV(m4,v4))
+#define MASK_VAL10(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5) (MV(m1,v1)|MV(m2,v2)|MV(m3,v3)|MV(m4,v4)|MV(m5,v5))
+#define MASK_VAL12(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5,m6,v6) (MV(m1,v1)|MV(m2,v2)|MV(m3,v3)|MV(m4,v4)|MV(m5,v5)|MV(m6,v6))
+#define MASK_VAL14(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5,m6,v6,m7,v7) (MV(m1,v1)|MV(m2,v2)|MV(m3,v3)|MV(m4,v4)|MV(m5,v5)|MV(m6,v6)|MV(m7,v7))
+#define MASK_VAL16(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5,m6,v6,m7,v7,m8,v8) (MV(m1,v1)|MV(m2,v2)|MV(m3,v3)|MV(m4,v4)|MV(m5,v5)|MV(m6,v6)|MV(m7,v7)|MV(m8,v8))
+
+#define MASK_VAL(...) VARARG(MASK_VAL, __VA_ARGS__)
+
+
+
+
+
+#define REG_BASE_ADDR 0x800000
+
+
+
+#define REG_ADDR8(a) (*(volatile unsigned char*) (REG_BASE_ADDR + (a)))
+#define REG_ADDR16(a) (*(volatile unsigned short*)(REG_BASE_ADDR + (a)))
+#define REG_ADDR32(a) (*(volatile unsigned long*) (REG_BASE_ADDR + (a)))
+
+#define write_reg8(addr,v) (*(volatile unsigned char*) (REG_BASE_ADDR + (addr)) = (unsigned char)(v))
+#define write_reg16(addr,v) (*(volatile unsigned short*) (REG_BASE_ADDR + (addr)) = (unsigned short)(v))
+#define write_reg32(addr,v) (*(volatile unsigned long*) (REG_BASE_ADDR + (addr)) = (v))
+
+#define read_reg8(addr) (*(volatile unsigned char*) (REG_BASE_ADDR + (addr)))
+#define read_reg16(addr) (*(volatile unsigned short*)(REG_BASE_ADDR + (addr)))
+#define read_reg32(addr) (*(volatile unsigned long*) (REG_BASE_ADDR + (addr)))
+
+
+#define WRITE_REG8 write_reg8
+#define WRITE_REG16 write_reg16
+#define WRITE_REG32 write_reg32
+
+#define READ_REG8 read_reg8
+#define READ_REG16 read_reg16
+#define READ_REG32 read_reg32
+
+
+
+#define TCMD_UNDER_RD 0x80
+#define TCMD_UNDER_WR 0x40
+#define TCMD_UNDER_BOTH 0xc0
+#define TCMD_MASK 0x3f
+
+#define TCMD_WRITE 0x3
+#define TCMD_WAIT 0x7
+#define TCMD_WAREG 0x8
+
+/**
+ * command table for special registers
+ */
+typedef struct TBLCMDSET {
+ unsigned short adr;
+ unsigned char dat;
+ unsigned char cmd;
+} TBLCMDSET;
+/**
+ * @brief This function performs a series of operations of writing digital or analog registers
+ * according to a command table
+ * @param[in] pt - pointer to a command table containing several writing commands
+ * @param[in] size - number of commands in the table
+ * @return number of commands are carried out
+ */
+int load_tbl_cmd_set(const TBLCMDSET * pt, int size);
+
+/**
+ * @brief This function writes a byte data to analog register
+ * @param[in] addr - the address of the analog register needs to write
+ * @param[in] value - the data will be written to the analog register
+ * @param[in] e - the end address of value
+ * @param[in] s - the start address of the value
+ * @return none
+ */
+void sub_wr_ana(unsigned int addr, unsigned char value, unsigned char e, unsigned char s);
+/**
+ * @brief This function writes a byte data to a specified analog register
+ * @param[in] addr - the address of the analog register needs to write
+ * @param[in] value - the data will be written to the analog register
+ * @param[in] e - the end address of value
+ * @param[in] s - the start address of the value
+ * @return none
+ */
+void sub_wr(unsigned int addr, unsigned char value, unsigned char e, unsigned char s);
+
+
+
+#endif /* BSP_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/clock.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/clock.c
new file mode 100644
index 0000000000000..efff4f57b9565
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/clock.c
@@ -0,0 +1,179 @@
+/********************************************************************************************************
+ * @file clock.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#include "register.h"
+#include "compiler.h"
+#include "clock.h"
+#include "irq.h"
+#include "analog.h"
+
+int SYS_TICK_DIV = 0;
+
+/**
+ * @brief This function to select the system clock source.
+ * @param[in] SYS_CLK - the clock source of the system clock.
+ * @return none
+ */
+void clock_init(SYS_CLK_TYPEDEF SYS_CLK)
+{
+ if(SYS_CLK == SYS_CLK_16M_Crystal){
+ SYS_TICK_DIV = 1;
+ }
+ else if(SYS_CLK == SYS_CLK_32M_Crystal){
+ SYS_TICK_DIV = 2;
+ }
+ else if(SYS_CLK == SYS_CLK_48M_Crystal){
+ SYS_TICK_DIV = 3;
+ }
+ else{
+ //debug. Do not support this system clock rate.
+ }
+
+ reg_clk_sel = (unsigned char)SYS_CLK;
+
+ /* WatchDog Configuration */
+ #if(MODULE_WATCHDOG_ENABLE)
+ wd_startEx(WATCHDOG_INIT_TIMEOUT);
+ #endif
+
+ /* Timer0 initialization for BLE */
+ reg_tmr_ctrl8 &= (~FLD_TMR0_EN);
+ reg_tmr0_tick = (clock_time()*SYS_TICK_DIV);
+ reg_irq_mask |= FLD_IRQ_TMR0_EN; //Enable Timer0 Interrupt
+ write_reg8(0x63c,0x01); //continuous tick mode
+ reg_tmr_ctrl8 |= FLD_TMR0_EN; //Enable Timer0
+}
+
+/**
+ * @brief This function is to accelerate the oscillation process by using PWM
+ * @param[in] none
+ * @return none
+ */
+void pwm_kick_32k_pad(void)
+{
+ unsigned char reg_66 = READ_REG8(0x66);
+ WRITE_REG8(0x66,0x43); ///select 16M system clock.
+
+ //1.set pb6, pb7 as pwm output
+ unsigned char reg_58e = READ_REG8(0x58e);
+ WRITE_REG8(0x58e,reg_58e&0x3f);
+ unsigned char reg_5ab = READ_REG8(0x5ab);
+ WRITE_REG8(0x5ab,reg_5ab&0x0f);
+ WRITE_REG8(0x781,0xf3);//pwm clk div
+
+ unsigned short reg_794 = READ_REG16(0x794);
+ WRITE_REG16(0x794,0x01);//pwm0's high time or low time
+ unsigned short reg_796 = READ_REG16(0x796);
+ WRITE_REG16(0x796,0x02);//pwm0's cycle time
+ WRITE_REG8(0x780,0x01);//enable pwm0
+ WaitMs(5); //25
+ unsigned short reg_798 = READ_REG16(0x798);
+ WRITE_REG16(0x798,0x01);//pwm1's high time or low time
+ unsigned short reg_79a = READ_REG16(0x79a);
+ WRITE_REG16(0x79a,0x02);//pwm1's cycle time
+ WRITE_REG8(0x780,0x03);//enable pwm1
+
+ //2.wait for pwm wake up xtal
+ WaitMs(5); //25
+ //3.recover pb6, pb7 as xtal pin
+ WRITE_REG8(0x780,0x02);
+ WRITE_REG16(0x794,reg_794);
+ WRITE_REG16(0x796,reg_796);
+ WRITE_REG8(0x780,0x00);
+ WRITE_REG16(0x798,reg_798);
+ WRITE_REG16(0x79a,reg_79a);
+
+ WRITE_REG8(0x781,0x00);
+ WRITE_REG8(0x66,reg_66);
+ WRITE_REG8(0x58a,READ_REG8(0x58a)|0xc0);
+ WRITE_REG8(0x58e,reg_58e|0xc0);
+
+}
+
+unsigned int clock_time_exceed(unsigned int ref, unsigned int span_us)
+{
+ return ((unsigned int)(clock_time() - ref) > span_us * sys_tick_per_us);
+}
+
+
+_attribute_ram_code_ void sleep_us (unsigned int us)
+{
+ unsigned int t = clock_time();
+ while(!clock_time_exceed(t, us)){}
+}
+
+
+/**
+ * @Brief: 24M RC Calibration.(error: 0.01%)
+ * @Param: None.
+ * @Return: None.
+ */
+void MCU_24M_RC_ClockCalibrate(void)
+{
+ unsigned char temp = 0;
+
+ /* Reset to default value */
+ analog_write(0x83,0x34);
+
+ /* cap from analog register */
+ temp = analog_read(0x02);
+ temp |= (1<<4);
+ analog_write(0x02,temp);
+
+ /*Disable 24M RC calibration.*/
+ temp = analog_read(0x83);
+ temp &= ~(1<<0);
+ temp &= ~(1<<1);
+ analog_write(0x83,temp);
+
+ for(volatile int i=0; i<100; i++);
+
+ /* Enable 24M RC calibration. */
+ temp = analog_read(0x83);
+ temp |= (1<<0);
+ analog_write(0x83,temp);
+
+ /* Wait Calibration completely. */
+ for(volatile int i=0; i<10000; i++)
+ {
+ if((analog_read(0x84) & 0x01))
+ {
+ unsigned char CalValue = 0;
+ CalValue = analog_read(0x85);
+ analog_write(0x30,CalValue);
+
+ break;
+ }
+ }
+
+ /* Disable 24M RC calibration. */
+ temp = analog_read(0x83);
+ temp &= ~(1<<0);
+ analog_write(0x83,temp);
+
+ /* cap from pm_top */
+ temp = analog_read(0x02);
+ temp &= ~(1<<4);
+ analog_write(0x02,temp);
+}
+
+/*----------------------------- End of File ----------------------------------*/
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/clock.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/clock.h
new file mode 100644
index 0000000000000..a1669562ea147
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/clock.h
@@ -0,0 +1,104 @@
+/********************************************************************************************************
+ * @file clock.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "driver_config.h"
+#include "compiler.h"
+#include "register.h"
+#include "../../common/config/user_config.h"
+#include "watchdog.h"
+
+extern int SYS_TICK_DIV;
+
+typedef enum{
+ SYS_CLK_16M_Crystal = 0x43,
+ SYS_CLK_32M_Crystal = 0x60,
+ SYS_CLK_48M_Crystal = 0x20,
+}SYS_CLK_TYPEDEF;
+
+
+
+/* 5316 system clock source define. */
+#define SYS_CLK_SRC_24M_RC 0
+#define SYS_CLK_SRC_FHS 1
+#define SYS_CLK_SRC_FHS_DIV 2
+#define SYS_CLK_SRC_FHS_2V3_DIV 3
+
+/* 5316 FHS clock source define. */
+//use for 0x66[7]
+#define FHS_CLK_SRC_L_48M_OR_24M_PAD 0
+#define FHS_CLK_SRC_L_24M_RC 1
+
+//use for 0x70[0]
+#define FHS_CLK_SRC_H_48M_OR_24M_RC 0
+#define FHS_CLK_SRC_H_24M_PAD 1
+
+//system timer clock source is constant 16M, never change (Use for software timer)
+enum{
+ CLOCK_16M_SYS_TIMER_CLK_1S = 16000000,
+ CLOCK_16M_SYS_TIMER_CLK_1MS = 16000,
+ CLOCK_16M_SYS_TIMER_CLK_1US = 16,
+};
+#define sys_tick_per_us 16
+
+enum{
+ CLOCK_MODE_SCLK = 0,
+ CLOCK_MODE_GPIO = 1,
+ CLOCK_MODE_WIDTH_GPI = 2,
+ CLOCK_MODE_TICK = 3
+};
+
+void clock_init(SYS_CLK_TYPEDEF SYS_CLK);
+
+static inline unsigned int clock_time(void)
+{
+ return reg_system_tick;
+}
+
+unsigned int clock_time_exceed(unsigned int ref, unsigned int span_us);
+
+void pwm_kick_32k_pad(void);
+
+void sleep_us (unsigned int microsec); // use register counter to delay
+
+void MCU_24M_RC_ClockCalibrate(void);
+
+/* Delay precisely -----------------------------------------------------------*/
+#define WaitUs sleep_us
+#define WaitMs(ms) sleep_us((ms)*1000)
+#define sleep_ms(ms) sleep_us((ms)*1000)
+
+#define _ASM_NOP_ asm("tnop")
+
+#define CLOCK_DLY_1_CYC _ASM_NOP_
+#define CLOCK_DLY_2_CYC _ASM_NOP_;_ASM_NOP_
+#define CLOCK_DLY_3_CYC _ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define CLOCK_DLY_4_CYC _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define CLOCK_DLY_5_CYC _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define CLOCK_DLY_6_CYC _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define CLOCK_DLY_7_CYC _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define CLOCK_DLY_8_CYC _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define CLOCK_DLY_9_CYC _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define CLOCK_DLY_10_CYC _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+
+/*----------------------------- End of File ----------------------------------*/
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/compiler.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/compiler.h
new file mode 100644
index 0000000000000..e094a3163cb4f
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/compiler.h
@@ -0,0 +1,35 @@
+/********************************************************************************************************
+ * @file compiler.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+#define _attribute_packed_ __attribute__((packed))
+#define _attribute_aligned_(s) __attribute__((aligned(s)))
+#define _attribute_session_(s) __attribute__((section(s)))
+#define _attribute_ram_code_ _attribute_session_(".ram_code")
+#define _attribute_ram_code_sec_noinline_ _attribute_session_(".ram_code") __attribute__((noinline))
+#define _attribute_custom_code_ _attribute_session_(".custom") volatile
+#define _attribute_no_inline_ __attribute__((noinline))
+
+#define _inline_ inline // C99 meaning
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/dfifo.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/dfifo.h
new file mode 100644
index 0000000000000..ba3cd7bf1fcdb
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/dfifo.h
@@ -0,0 +1,76 @@
+/********************************************************************************************************
+ * @file dfifo.h
+ *
+ * @brief This is the source header for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#ifndef DFIFO_H
+#define DFIFO_H
+
+#include "register.h"
+
+
+
+#if 0
+
+static inline void dfifo_config_dfifo0(signed short* pbuff,unsigned int size_buff)
+{
+ reg_dfifo0_addr = (unsigned short)((unsigned int)pbuff);
+ reg_dfifo0_size = (size_buff>>4)-1;
+}
+
+static inline void dfifo_config_dfifo1(signed short* pbuff,unsigned int size_buff)
+{
+ reg_dfifo1_addr = (unsigned short)((unsigned int)pbuff);
+ reg_dfifo1_size = (size_buff>>4)-1;
+}
+
+static inline void dfifo_config_dfifo2(signed short* pbuff,unsigned int size_buff)
+{
+ reg_dfifo2_addr = (unsigned short)((unsigned int)pbuff);
+ reg_dfifo2_size = (size_buff>>4)-1;
+}
+
+
+
+
+static inline void adc_config_misc_channel_buf(signed short* pbuff,unsigned int size_buff)
+{
+ reg_dfifo_misc_chn_addr = (unsigned short)((unsigned int)pbuff);
+ reg_dfifo_misc_chn_size = (size_buff>>4)-1;
+
+ reg_dfifo_mode |= FLD_AUD_DFIFO2_IN; // misc chn can only use dfifo2
+}
+
+
+
+/**
+ * @brief configure the mic buffer's address and size
+ * @param[in] pbuff - the first address of SRAM buffer to store MIC data.
+ * @param[in] size_buff - the size of pbuff.
+ * @return none
+ */
+static inline void audio_config_mic_buf(signed short* pbuff,unsigned int size_buff)
+{
+ reg_dfifo_audio_addr = (unsigned short)((unsigned int)pbuff);
+ reg_dfifo_audio_size = (size_buff>>4)-1;
+}
+#endif
+
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/dma.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/dma.h
new file mode 100644
index 0000000000000..070cfadc2834c
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/dma.h
@@ -0,0 +1,159 @@
+/********************************************************************************************************
+ * @file dma.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#ifndef _DMA_H_
+#define _DMA_H_
+
+/********************************************************************************************************
+ * @file dma.h
+ *
+ * @brief This is the header file for TLSR8258
+ *
+ * @author public@telink-semi.com;
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ * @par History:
+ * 1.initial release(DEC. 26 2018)
+ *
+ * @version A001
+ *
+ *******************************************************************************************************/
+typedef enum{
+ DMA0_UART_RX,
+ DMA1_UART_TX,
+ DMA2_RF_RX,
+ DMA3_RF_TX,
+ DMA4_AES_DECO,
+ DMA5_AES_CODE,
+ DMA6,
+ DMA7_PWM,
+}DMA_chn_Typdef;
+
+/**
+ * @brief This function resets the DMA module.
+ * @param[in] none
+ * @return none
+ */
+static inline void dma_reset(void)
+{
+ reg_rst1 |= FLD_RST1_DMA;
+ reg_rst1 &= (~FLD_RST1_DMA);
+}
+
+
+
+static inline void dma_irq_enable(unsigned int msk)
+{
+ reg_dma_chn_irq_msk |= msk;
+}
+static inline void dma_irq_disable(unsigned int msk)
+{
+ reg_dma_chn_irq_msk &= ~msk;
+}
+
+
+/*****************************************************************
+chn: see defines of reg_dma_chn_irq_msk in register_8258.h
+
+ enum{
+ FLD_DMA_CHN0 = BIT(0), FLD_DMA_CHN_UART_RX = BIT(0),
+ FLD_DMA_CHN1 = BIT(1), FLD_DMA_CHN_UART_TX = BIT(1),
+ FLD_DMA_CHN2 = BIT(2), FLD_DMA_CHN_RF_RX = BIT(2),
+ FLD_DMA_CHN3 = BIT(3), FLD_DMA_CHN_RF_TX = BIT(3),
+ FLD_DMA_CHN4 = BIT(4), FLD_DMA_CHN_AES_DECO = BIT(4),
+ FLD_DMA_CHN5 = BIT(5), FLD_DMA_CHN_AES_CODE = BIT(5),
+ FLD_DMA_CHN7 = BIT(7), FLD_DMA_PWM = BIT(7),
+ };
+
+
+en = 1: enable
+en = 0: disable
+ *****************************************************************/
+/**
+ * @brief This function performs to enable DMA interrupt.
+ * @param[in] chn - variable to config the DMA interrupt channel.
+ * @param[in] en - en: 1 enable. 0 disable.
+ * @return none.
+ */
+static inline void dma_chn_irq_enable(unsigned char chn, unsigned int en)
+{
+ reg_dma_irq_status = chn;
+
+ if(en){
+ reg_dma_chn_en |= chn;
+ reg_dma_chn_irq_msk |= chn;
+ }
+ else{
+ reg_dma_chn_en &= ~chn;
+ reg_dma_chn_irq_msk &= ~chn;
+ }
+}
+
+
+
+
+/**
+ * @brief Clear IRQ status of uart.
+ * @param[in] irq_src - select tx or rx irq.
+ * @return none
+ */
+static inline void dma_chn_irq_status_clr(unsigned char irq_status)
+{
+ reg_dma_irq_status = irq_status;
+}
+
+
+/**
+ * @brief Get IRQ status of uart.
+ * @param[in] irq_src - select tx or rx irq.
+ * @return none
+ */
+static inline unsigned char dma_chn_irq_status_get(void)
+{
+ return reg_dma_irq_status;
+}
+
+/**
+ * @brief This function serves to set the size of dma buffer
+ * @param[in] size - select tx or rx irq. caution: max size = 2048
+ * @return none
+ */
+static inline void dma_set_buff_size(DMA_chn_Typdef chn,unsigned int size)
+{
+ reg_dma_size(chn) = (unsigned char)(size/16);
+}
+
+
+#endif
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/driver_5316.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/driver_5316.h
new file mode 100644
index 0000000000000..12adc77910e8f
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/driver_5316.h
@@ -0,0 +1,54 @@
+/********************************************************************************************************
+ * @file driver_5316.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef DRIVERS_5316_H_
+#define DRIVERS_5316_H_
+
+
+#include"drivers/5316/driver_config.h"
+#include "drivers/5316/bsp.h"
+#include "drivers/5316/analog.h"
+#include "drivers/5316/compiler.h"
+#include "drivers/5316/register.h"
+#include "drivers/5316/gpio.h"
+#include "drivers/5316/pwm.h"
+#include "drivers/5316/irq.h"
+#include "drivers/5316/clock.h"
+#include "drivers/5316/random.h"
+#include "drivers/5316/flash.h"
+#include "drivers/5316/rf_drv.h"
+#include "drivers/5316/pm.h"
+#include "drivers/5316/adc.h"
+#include "drivers/5316/i2c.h"
+#include "drivers/5316/spi.h"
+#include "drivers/5316/uart.h"
+#include "drivers/5316/register.h"
+#include "drivers/5316/watchdog.h"
+#include "drivers/5316/usbkeycode.h"
+#include "drivers/5316/register.h"
+#include "drivers/5316/dfifo.h"
+#include "drivers/5316/dma.h"
+#include "drivers/5316/timer.h"
+#include "drivers/5316/emi.h"
+
+
+
+#endif /* DRIVERS_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/driver_config.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/driver_config.h
new file mode 100644
index 0000000000000..b2af1e9c5544a
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/driver_config.h
@@ -0,0 +1,26 @@
+/********************************************************************************************************
+ * @file driver_config.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "common/types.h"//include data type define.
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/emi.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/emi.c
new file mode 100644
index 0000000000000..e64b3fad292de
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/emi.c
@@ -0,0 +1,391 @@
+/*
+ * emi.c
+ *
+ * Created on: 2019-8-12
+ * Author: Administrator
+ */
+
+#include "register.h"
+#include "analog.h"
+#include "clock.h"
+#include "pm.h"
+#include "rf_drv.h"
+#include "emi.h"
+
+#define STATE0 0x1234
+#define STATE1 0x5678
+#define STATE2 0xabcd
+#define STATE3 0xef01
+
+unsigned char pkt_phytest [64] = {
+ 39, 0, 0, 0,
+ 0, 37,
+ 0, 1, 2, 3, 4, 5, 6, 7
+};
+
+static signed char rssi=0;
+static unsigned int emi_rx_cnt=0,emi_rssibuf=0;
+
+static unsigned int state0,state1,state2,state3;
+static unsigned char emi_zigbee_tx_packet[48] __attribute__ ((aligned (4))) = {19,0,0,0,20,0,0};
+static unsigned char emi_ble_tx_packet [48] __attribute__ ((aligned (4))) = {39, 0, 0, 0,0, 37};
+static unsigned char emi_rx_packet[64] __attribute__ ((aligned (4)));
+
+void rf_emi_single_tone(RF_TxPowerTypeDef power_level,signed char rf_chn)
+{
+ //reset manual tx
+ WRITE_REG8(0xf02,0x45);
+ WaitUs(100);
+ WRITE_REG8(0xf02,0x55);
+
+ WRITE_REG16(0x4d6, 2400+rf_chn);
+ rf_set_power_level_index (power_level);
+
+ //tx_cyc1_manual on
+ WriteAnalogReg(0xa5, 0x04); //tx_cyc1 manual enable
+ sub_wr(0x4e8, 1, 2, 2);//manual tx_cyc1 from bb
+
+ WriteAnalogReg(0xa5,0x44); // for carrier mode
+ WRITE_REG8 (0x4e8, 0x04); // for carrier mode
+}
+
+static unsigned int tpGetCnt(unsigned char precision)
+{
+ unsigned int tpCnt0, tpCnt1, tpCnt2,tpCnt, done;
+
+ done = 0;
+ sub_wr_ana(0x94, precision, 3, 0);
+ sub_wr_ana(0x93, 0 , 7, 7);
+ sub_wr_ana(0x93, 1 , 7, 7); // set cal_en
+
+ while(done==0)
+ {
+ tpCnt2 = ReadAnalogReg(0xaf);
+ tpCnt1 = ReadAnalogReg(0xae);
+ tpCnt0 = ReadAnalogReg(0xad);
+ tpCnt = (tpCnt2<<16)+(tpCnt1<<8) + tpCnt0;
+
+ done = tpCnt & 0x800000;
+ }
+ tpCnt = tpCnt & 0x7fffff;
+ return tpCnt;
+}
+
+unsigned char rf_tp_calibration(RF_ModeTypeDef mode, unsigned char chn)
+{
+
+ unsigned char pGain;
+ unsigned int cnt,vcnt,fdev,fref, ii,iGain,cntExp;
+ unsigned char precision;
+
+ precision = 0;
+ fref = 24;
+ vcnt = 65536;//524288>>(precision+3);
+ //fdev = fdev/2000; //1000 for 1MHz, 2000 for 2MHz
+ pGain = 0x40;
+
+ sub_wr_ana(0xab, 0x3, 1, 0);//turn off PA according to wenfeng, TODO test option: [1] [2] pd individually
+
+// if((mode==RF_MODE_BLE_1M) | (mode==RF_MODE_BLE_1M_NO_PN))
+ if(mode==RF_MODE_BLE_1M)
+ {
+ fdev = 1000;
+ }
+ else
+ {
+ fdev = 2000;
+ }
+
+ rf_drv_init(mode);
+ WRITE_REG16(0x4d6,chn+2400);
+
+ WRITE_REG8(0xf02,0x45);
+ WaitUs(100);
+ WRITE_REG8(0xf02,0x55);
+
+ //open pll loop
+ WriteAnalogReg(0x90, 0x40); //an_tp_cyc set 1
+ WriteAnalogReg(0xa5, 0x4c); //tx_mod[6] tx cyc1[2] manual
+ WriteAnalogReg(0x9e,0x00) ; //reg_dc set 0 fro tpcal otherwise, carryover for intgN
+ WRITE_REG8(0x4e8,0x4c);
+
+ if(mode==RF_MODE_BLE_2M)
+ sub_wr_ana(0x8f, 0x12, 4, 0);
+ else
+ sub_wr_ana(0x8f, 0x0b, 4, 0);
+
+ WriteAnalogReg(0x93, pGain);
+ sub_wr(0x400,2,6,5);
+
+ WaitMs(300);
+ cnt = tpGetCnt(precision);
+ cntExp = cnt + vcnt*fdev/48000;
+ sub_wr(0x400,1,5,5);
+
+ for(ii=0; ii<=5; ii++)
+ {
+ WaitMs(10);
+ cnt = tpGetCnt(precision);
+ iGain = 1<<(5-ii);
+ ReadAnalogReg( 0x93);
+
+ if(cnt > cntExp)
+ {
+ pGain = pGain -iGain;
+ WriteAnalogReg(0x93, pGain);
+ }
+ else if (cnt < cntExp)
+ {
+ pGain = pGain + iGain;
+ WriteAnalogReg(0x93, pGain); //initial gain
+ }
+ }
+
+ WriteAnalogReg(0x90, 0x00); //an_tp_cyc set 0
+ WRITE_REG8(0x4e8, 0x0c); //txmod[6] set 0
+ sub_wr_ana(0xab, 0x0, 1, 0);//turn on PA
+
+ return (ReadAnalogReg( 0x93) & 0x7f);
+}
+
+static void rf_tx_mode(RF_ModeTypeDef RF_Mode)
+{
+// if ((RF_Mode==RF_MODE_BLE_1M) | (RF_Mode==RF_MODE_BLE_1M_NO_PN))
+ if (RF_Mode==RF_MODE_BLE_1M)
+ {
+ WriteAnalogReg(0x9e,0x56); //reg_dc *128/126
+ WriteAnalogReg(0xa3,0xeb); //[7:6] diable gauflt [5] LUT 2M or 1M
+ WRITE_REG8(0x404, 0xd0);//ble1m[4]
+ }
+ else if(RF_Mode==RF_MODE_BLE_2M)
+ {
+ WriteAnalogReg(0x9e,0xad); //reg_dc *128/126
+ WriteAnalogReg(0xa3,0xdb); //[7:6] diable gauflt [5] LUT 2M or 1M TODO to check
+ WRITE_REG8(0x404, 0xc0);//ble1m[4]
+ }
+ WriteAnalogReg(0x90,0x00); //tpcyc
+ WriteAnalogReg(0xa5,0x44); //mod_en
+ WRITE_REG8(0x4e8, 0x44);//mod_en
+ WriteAnalogReg(0xa0,0x03); //[4:0] dac delay
+}
+
+int pnGen(int state)
+{
+ int feed = 0;
+ feed = (state&0x4000) >> 1;
+ state ^= feed;
+ state <<= 1;
+ state = (state&0xfffe) + ((state&0x8000)>>15);
+ return state;
+}
+
+static void rf_continue_setting(RF_ModeTypeDef mode)
+{
+ unsigned char i;
+
+
+ WRITE_REG8 (0x400,0x0f);//0b for 2Mbps, 03 for Zigbee, 0f for New2M and BLE Nrd
+ WRITE_REG8(0x402, 0x21);
+
+ WRITE_REG16(0x50c, (unsigned short*)pkt_phytest); //set DMA addr
+ WRITE_REG8(0x50e, 0x01); //size
+ WRITE_REG8(0x50f, 0x80); //mode
+
+ state0 = STATE0;
+ state1 = STATE1;
+
+ pkt_phytest[0] = 12;
+ pkt_phytest[1] = 0;
+ pkt_phytest[2] = 0;
+ pkt_phytest[3] = 0;
+
+ for(i=0;i<16;i= i+4)
+ {
+ pkt_phytest[4+i] = state1 &0xff;
+ pkt_phytest[5+i] = (state1>>8) &0xff;
+ pkt_phytest[6+i] = state0 &0xff;
+ pkt_phytest[7+i] = (state0>>8) &0xff;
+
+ state0 = pnGen(state0);
+ state1 = pnGen(state1);
+ }
+
+ state0 = STATE0;
+ state1 = STATE1;
+ state2 = STATE2;
+ state3 = STATE3;
+
+ WRITE_REG8(0x524,0x08);
+}
+
+void rf_emi_tx_continue_setup(RF_ModeTypeDef rf_mode, RF_TxPowerTypeDef power_level,signed char rf_chn,unsigned char pkt_type)
+{
+
+ WRITE_REG8(0x4e8, 0x02);
+ WriteAnalogReg(0xa5,0x00);
+
+ //reset zb & dma
+ write_reg16(0x800060, 0x0480);
+ write_reg16(0x800060, 0x0000);
+
+ rf_set_power_level_index (power_level);
+ //rf_drv_init(rf_mode);
+
+ rf_set_channel(rf_chn, 0);
+ rf_set_txmode();
+
+ WRITE_REG16(0x408, pkt_type);
+ rf_continue_setting(rf_mode);
+
+}
+
+void rf_continue_mode_run(void)
+{
+ if(read_reg8(0x408) == 1)
+ {
+ pkt_phytest[12] = 0x0f;
+ pkt_phytest[13] = 0x0f;
+ pkt_phytest[14] = 0x0f;
+ pkt_phytest[15] = 0x0f;
+ }
+ else if(read_reg8(0x408)==2)
+ {
+ pkt_phytest[12] = 0x55;
+ pkt_phytest[13] = 0x55;
+
+ pkt_phytest[14] = 0x55;
+ pkt_phytest[15] = 0x55;
+ }
+ else
+ {
+ pkt_phytest[12] = state1 &0xff;
+ pkt_phytest[13] = (state1>>8) &0xff;
+
+ pkt_phytest[14] = state0 &0xff;
+ pkt_phytest[15] = (state0>>8) &0xff;
+
+ state0 = pnGen(state0);
+ state1 = pnGen(state1);
+ }
+}
+
+void rf_emi_tx_brust_setup(RF_ModeTypeDef rf_mode,RF_TxPowerTypeDef power_level,signed char rf_chn,unsigned char pkt_type)
+{
+ unsigned char i;
+ unsigned char tx_data=0;
+ WRITE_REG8 (0x402, 0x2b);
+ WriteAnalogReg(0xa5,0x00);
+ WRITE_REG8 (0x4e8, 0x02);
+
+ write_reg32(0x408,0x29417671 );//access code 0xf8118ac9
+ rf_set_power_level_index (power_level);
+
+ WRITE_REG8 (0x50e, 0xff); // dma size
+ WRITE_REG8 (0x50f, 0x80); // dma mode
+
+ //rf_drv_init(rf_mode);
+// rf_set_channel(rf_chn,0);
+
+ if(pkt_type==1)
+ tx_data = 0x0f;
+ else if(pkt_type==2)
+ tx_data = 0x55;
+
+
+ switch(rf_mode)
+ {
+ case RF_MODE_BLE_1M:
+ case RF_MODE_BLE_2M:
+ emi_ble_tx_packet[4] = pkt_type;//type
+ for( i=0;i<37;i++)
+ {
+ emi_ble_tx_packet[6+i]=tx_data;
+ }
+ break;
+ default:
+ break;
+ }
+ rf_set_trx_state(RF_MODE_AUTO, rf_chn);
+}
+
+static void gen_prbs9 (unsigned char *p, int n)
+{
+ //PRBS9: (x >> 1) | (((x<<4) ^ (x<<8)) & 0x100)
+ unsigned short x = 0x1ff;
+ int i;
+ int j;
+ for ( i=0; i> 1) | (((x<<4) ^ (x<<8)) & 0x100);
+ }
+ *p++ = d;
+ }
+}
+
+void rf_emi_tx_brust_loop(RF_ModeTypeDef rf_mode,unsigned char pkt_type)
+{
+ write_reg8(0xf00, 0x80); // stop SM
+
+ if((rf_mode==RF_MODE_BLE_1M)||(rf_mode==RF_MODE_BLE_2M))//ble
+ {
+ rf_start_stx ((void *)emi_ble_tx_packet, read_reg32(0x740) + 10);
+ WaitUs(625);//
+ if(pkt_type==0)
+ gen_prbs9(&emi_ble_tx_packet[6],37);
+ }
+}
+
+void rf_emi_rx(RF_ModeTypeDef mode,signed char rf_chn)
+{
+
+ WriteAnalogReg(0xa5,0x00);
+ WRITE_REG8 (0x4e8, 0x02);
+
+ rf_set_ble_access_code_value(0x29417671);
+ rf_set_rx_buff(emi_rx_packet,64,0);
+// rf_drv_init(mode);
+// rf_set_channel(rf_chn,0);//set freq
+// rf_set_rxmode();
+
+ rf_set_trx_state(RF_MODE_RX, rf_chn);
+ rssi = 0;
+ emi_rssibuf = 0;
+ emi_rx_cnt = 0;
+}
+
+void rf_emi_rx_loop(void)
+{
+ if(read_reg8(0xf20)&BIT(0))
+ {
+ if((REG_ADDR8(0x45c)&0x0f)==0)
+ {
+ emi_rssibuf += emi_rx_packet[4];
+ if(emi_rx_cnt)
+ {
+ if(emi_rssibuf!=0)
+ emi_rssibuf>>=1;
+ }
+ rssi = emi_rssibuf-110;
+ emi_rx_cnt++;
+ }
+ write_reg8(0x800f20, 1);
+ write_reg8 (0x800f00, 0x80);
+ }
+}
+
+unsigned int rf_emi_get_rxpkt_cnt(void)
+{
+ return emi_rx_cnt;
+}
+
+char rf_emi_get_rssi_avg(void)
+{
+ return rssi;
+}
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/emi.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/emi.h
new file mode 100644
index 0000000000000..00beda80aad31
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/emi.h
@@ -0,0 +1,24 @@
+/*
+ * emi.h
+ *
+ * Created on: 2019-8-12
+ * Author: Administrator
+ */
+
+#ifndef EMI_H_
+#define EMI_H_
+
+#include "bsp.h"
+#include "register.h"
+
+void rf_emi_single_tone(RF_TxPowerTypeDef power_level,signed char rf_chn);
+void rf_continue_mode_run(void);
+void rf_emi_tx_continue_setup(RF_ModeTypeDef rf_mode, RF_TxPowerTypeDef power_level,signed char rf_chn,unsigned char pkt_type);
+void rf_emi_tx_brust_setup(RF_ModeTypeDef rf_mode,RF_TxPowerTypeDef power_level,signed char rf_chn,unsigned char pkt_type);
+void rf_emi_tx_brust_loop(RF_ModeTypeDef rf_mode,unsigned char pkt_type);
+void rf_emi_rx(RF_ModeTypeDef mode,signed char rf_chn);
+void rf_emi_rx_loop(void);
+unsigned int rf_emi_get_rxpkt_cnt(void);
+char rf_emi_get_rssi_avg(void);
+
+#endif /* EMI_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash.c
new file mode 100644
index 0000000000000..51a69045f9fd0
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash.c
@@ -0,0 +1,512 @@
+/********************************************************************************************************
+ * @file flash.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author Driver Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Unless for usage inside a TELINK integrated circuit, redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of TELINK, nor the names of its contributors may be
+ * used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * TELINK integrated circuit. All other usages are subject to written permission
+ * from TELINK and different commercial license may apply.
+ *
+ * 5. Licensee shall be solely responsible for any claim to the extent arising out of or
+ * relating to such deletion(s), modification(s) or alteration(s).
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *******************************************************************************************************/
+#include "flash.h"
+#include "watchdog.h"
+#include "clock.h"
+
+/*
+ * If add flash type, need pay attention to the read uid command and the bit number of status register
+ Flash Type uid CMD MID Company
+ MD25D40D 0x4b 0x134051 GD
+ GD25D10C 0x4b 0x1140C8 GD
+ GD25D10B 0x4b 0x1140C8 GD
+ TH25D40HB 0x4b 0x1360CD UT
+ ZB25WD40B 0x4b 0x13325E ZB
+ ZB25WD10A 0x4b 0x11325E ZB
+ ZB25WD20A 0x4b 0x12325E ZB The actual capacity is 256K, but the nominal value is 128KB.
+ The software cannot do capacity adaptation and requires special customer special processing.
+
+ The uid of the early ZB25WD40B (mid is 0x13325E) is 8 bytes. If you read 16 bytes of uid,
+ the next 8 bytes will be read as 0xff. Later, the uid of ZB25WD40B has been switched to 16 bytes.
+ */
+unsigned int flash_support_mid[FLASH_CNT] = {0x134051, 0x1140C8, 0x11325E, 0x13325E, 0x12325E, 0x1360CD};
+
+flash_hander_t flash_read_page = flash_read_data;
+flash_hander_t flash_write_page = flash_page_program;
+
+
+/*******************************************************************************************************************
+ * Primary interface
+ ******************************************************************************************************************/
+
+/**
+ * @brief This function to determine whether the flash is busy..
+ * @return 1:Indicates that the flash is busy. 0:Indicates that the flash is free
+ */
+_attribute_ram_code_ static inline int flash_is_busy(){
+ return mspi_read() & 0x01; //the busy bit, pls check flash spec
+}
+
+/**
+ * @brief This function serves to set flash write command.
+ * @param[in] cmd - set command.
+ * @return none.
+ */
+_attribute_ram_code_sec_noinline_ static void flash_send_cmd(unsigned char cmd){
+ mspi_high();
+ sleep_us(1);
+ mspi_low();
+ mspi_write(cmd);
+ mspi_wait();
+}
+
+/**
+ * @brief This function serves to send flash address.
+ * @param[in] addr - the flash address.
+ * @return none.
+ */
+_attribute_ram_code_sec_noinline_ static void flash_send_addr(unsigned int addr){
+ mspi_write((unsigned char)(addr>>16));
+ mspi_wait();
+ mspi_write((unsigned char)(addr>>8));
+ mspi_wait();
+ mspi_write((unsigned char)(addr));
+ mspi_wait();
+}
+
+/**
+ * @brief This function serves to wait flash done.(make this a asynchorous version).
+ * @return none.
+ */
+_attribute_ram_code_sec_noinline_ static void flash_wait_done(void)
+{
+ sleep_us(100);
+ flash_send_cmd(FLASH_READ_STATUS_CMD_LOWBYTE);
+
+ int i;
+ for(i = 0; i < 10000000; ++i){
+ if(!flash_is_busy()){
+ break;
+ }
+ }
+ mspi_high();
+}
+
+/**
+ * @brief This function is used to read data from flash or read the status of flash.
+ * @param[in] cmd - the read command.
+ * @param[in] addr - starting address.
+ * @param[in] addr_en - whether need to send an address.
+ * @param[in] dummy_cnt - the length(in byte) of dummy.
+ * @param[out] data - the start address of the data buffer.
+ * @param[in] data_len - the length(in byte) of content needs to read out.
+ * @return none.
+ */
+_attribute_ram_code_sec_noinline_ void flash_mspi_read_ram(unsigned char cmd, unsigned long addr, unsigned char addr_en, unsigned char dummy_cnt, unsigned char *data, unsigned long data_len)
+{
+ unsigned char r = irq_disable();
+
+ wd_clear();
+
+ flash_send_cmd(cmd);
+ if(addr_en)
+ {
+ flash_send_addr(addr);
+ }
+ for(int i = 0; i < dummy_cnt; ++i)
+ {
+ mspi_write(0x00); /* dummy */
+ mspi_wait();
+ }
+ mspi_write(0x00); /* to issue clock */
+ mspi_wait();
+ mspi_ctrl_write(0x0a); /* auto mode */
+ mspi_wait();
+ for(int i = 0; i < data_len; ++i)
+ {
+ *data++ = mspi_get();
+ mspi_wait();
+ }
+ mspi_high();
+
+ irq_restore(r);
+}
+
+/**
+ * @brief This function is used to write data or status to flash.
+ * @param[in] cmd - the write command.
+ * @param[in] addr - starting address.
+ * @param[in] addr_en - whether need to send an address.
+ * @param[out] data - the start address of the data buffer.
+ * @param[in] data_len - the length(in byte) of content needs to read out.
+ * @return none.
+ * @note important: "data" must not reside at flash, such as constant string.If that case, pls copy to memory first before write.
+ */
+_attribute_ram_code_sec_noinline_ void flash_mspi_write_ram(unsigned char cmd, unsigned long addr, unsigned char addr_en, unsigned char *data, unsigned long data_len)
+{
+ unsigned char r = irq_disable();
+
+ wd_clear();
+
+ flash_send_cmd(FLASH_WRITE_ENABLE_CMD);
+ flash_send_cmd(cmd);
+ if(addr_en)
+ {
+ flash_send_addr(addr);
+ }
+ for(int i = 0; i < data_len; ++i)
+ {
+ mspi_write(data[i]);
+ mspi_wait();
+ }
+ mspi_high();
+ flash_wait_done();
+
+ irq_restore(r);
+}
+
+/**
+ * @brief This function serves to erase a sector.
+ * @param[in] addr - the start address of the sector needs to erase.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_sector(unsigned long addr)
+{
+ flash_mspi_write_ram(FLASH_SECT_ERASE_CMD, addr, 1, NULL, 0);
+}
+
+/**
+ * @brief This function reads the content from a page to the buf.
+ * @param[in] addr - the start address of the page.
+ * @param[in] len - the length(in byte) of content needs to read out from the page.
+ * @param[out] buf - the start address of the buffer.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_data(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+ flash_mspi_read_ram(FLASH_READ_CMD, addr, 1, 0, buf, len);
+}
+
+/**
+ * @brief This function writes the buffer's content to the flash.
+ * @param[in] addr - the start address of the area.
+ * @param[in] len - the length(in byte) of content needs to write into the flash.
+ * @param[in] buf - the start address of the content needs to write into.
+ * @return none.
+ * @note the funciton support cross-page writing,which means the len of buf can bigger than 256.
+ *
+ * Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_page_program(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+ unsigned int ns = PAGE_SIZE - (addr&(PAGE_SIZE - 1));
+ int nw = 0;
+
+ do{
+ nw = len > ns ? ns :len;
+ flash_mspi_write_ram(FLASH_WRITE_CMD, addr, 1, buf, nw);
+ ns = PAGE_SIZE;
+ addr += nw;
+ buf += nw;
+ len -= nw;
+ }while(len > 0);
+}
+
+#if FLASH_LOCK_EN
+/**
+ * @brief This function reads the status of flash.
+ * @param[in] cmd - the cmd of read status.
+ * @return the value of status.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status(unsigned char cmd)
+{
+ unsigned char status = 0;
+ flash_mspi_read_ram(cmd, 0, 0, 0, &status, 1);
+ return status;
+}
+
+/**
+ * @brief This function write the status of flash.
+ * @param[in] type - the type of status.8 bit or 16 bit.
+ * @param[in] data - the value of status.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status(flash_status_typedef_e type , unsigned short data)
+{
+ unsigned char buf[2];
+
+ buf[0] = data;
+ buf[1] = data>>8;
+ if(type == FLASH_TYPE_8BIT_STATUS){
+ flash_mspi_write_ram(FLASH_WRITE_STATUS_CMD_LOWBYTE, 0, 0, buf, 1);
+ }else if(type == FLASH_TYPE_16BIT_STATUS_ONE_CMD){
+ flash_mspi_write_ram(FLASH_WRITE_STATUS_CMD_LOWBYTE, 0, 0, buf, 2);
+ }
+}
+
+/**
+ * @brief This function serves to read data from the Security Registers of the flash.
+ * @param[in] addr - the start address of the Security Registers.
+ * @param[in] len - the length of the content to be read.
+ * @param[out] buf - the starting address of the content to be read.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp(unsigned long addr, unsigned long len, unsigned char* buf)
+{
+ flash_mspi_read_ram(FLASH_READ_SECURITY_REGISTERS_CMD, addr, 1, 1, buf, len);
+}
+
+/**
+ * @brief This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in] addr - the start address of the Security Registers.
+ * @param[in] len - the length of content to be written.
+ * @param[in] buf - the starting address of the content to be written.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+ unsigned int ns = PAGE_SIZE_OTP - (addr & (PAGE_SIZE_OTP - 1));
+ int nw = 0;
+
+ do{
+ nw = len > ns ? ns :len;
+ flash_mspi_write_ram(FLASH_WRITE_SECURITY_REGISTERS_CMD, addr, 1, buf, nw);
+ ns = PAGE_SIZE_OTP;
+ addr += nw;
+ buf += nw;
+ len -= nw;
+ }while(len > 0);
+}
+
+/**
+ * @brief This function serves to erase the data of the Security Registers that you choose.
+ * @param[in] addr - the address that you want to erase.
+ * @return none.
+ * @Attention Even you choose the middle area of the Security Registers,it will erase the whole area.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp(unsigned long addr)
+{
+ flash_mspi_write_ram(FLASH_ERASE_SECURITY_REGISTERS_CMD, addr, 1, NULL, 0);
+}
+#endif
+
+
+/**
+ * @brief This function serves to read MID of flash(MAC id). Before reading UID of flash,
+ * you must read MID of flash. and then you can look up the related table to select
+ * the idcmd and read UID of flash.
+ * @return MID of the flash(4 bytes).
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned int flash_read_mid(void)
+{
+ unsigned int flash_mid = 0;
+ flash_mspi_read_ram(FLASH_GET_JEDEC_ID, 0, 0, 0, (unsigned char*)(&flash_mid), 3);
+ return flash_mid;
+}
+
+/**
+ * @brief This function serves to read UID of flash.Before reading UID of flash, you must read MID of flash.
+ * and then you can look up the related table to select the idcmd and read UID of flash.
+ * @param[in] idcmd - different flash vendor have different read-uid command. E.g: GD/PUYA:0x4B; XTX: 0x5A.
+ * @param[in] buf - store UID of flash.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_uid(unsigned char idcmd, unsigned char *buf)
+{
+ if(idcmd == FLASH_READ_UID_CMD_GD_PUYA_ZB_TH) //< GD/PUYA/ZB/TH
+ {
+ flash_mspi_read_ram(idcmd, 0x00, 1, 1, buf, 16);
+ }
+}
+
+/*******************************************************************************************************************
+ * Secondary interface
+ ******************************************************************************************************************/
+
+/**
+ * @brief This function serves to read flash mid and uid,and check the correctness of mid and uid.
+ * @param[out] flash_mid - Flash Manufacturer ID.
+ * @param[out] flash_uid - Flash Unique ID.
+ * @return 0: flash no uid or not a known flash model 1:the flash model is known and the uid is read.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+int flash_read_mid_uid_with_check(unsigned int *flash_mid, unsigned char *flash_uid)
+{
+ unsigned char no_uid[16]={0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01};
+ int i,f_cnt=0;
+ *flash_mid = flash_read_mid();
+
+ for(i=0; i>16 reflects flash capacity.
+ */
+typedef enum {
+ FLASH_SIZE_64K = 0x10,
+ FLASH_SIZE_128K = 0x11,
+ FLASH_SIZE_256K = 0x12,
+ FLASH_SIZE_512K = 0x13,
+ FLASH_SIZE_1M = 0x14,
+ FLASH_SIZE_2M = 0x15,
+ FLASH_SIZE_4M = 0x16,
+ FLASH_SIZE_8M = 0x17,
+} Flash_CapacityDef;
+
+typedef void (*flash_hander_t)(unsigned long, unsigned long, unsigned char*);
+extern flash_hander_t flash_read_page;
+extern flash_hander_t flash_write_page;
+
+/*******************************************************************************************************************
+ * Primary interface
+ ******************************************************************************************************************/
+/**
+ * @brief This function serve to change the read function and write function.
+ * @param[in] read - the read function.
+ * @param[in] write - the write function.
+ * @none
+ */
+static inline void flash_change_rw_func(flash_hander_t read, flash_hander_t write)
+{
+ flash_read_page = read;
+ flash_write_page = write;
+}
+
+/**
+ * @brief This function serves to erase a sector.
+ * @param[in] addr - the start address of the sector needs to erase.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_sector(unsigned long addr);
+
+/**
+ * @brief This function reads the content from a page to the buf.
+ * @param[in] addr - the start address of the page.
+ * @param[in] len - the length(in byte) of content needs to read out from the page.
+ * @param[out] buf - the start address of the buffer.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_data(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief This function writes the buffer's content to the flash.
+ * @param[in] addr - the start address of the area.
+ * @param[in] len - the length(in byte) of content needs to write into the flash.
+ * @param[in] buf - the start address of the content needs to write into.
+ * @return none.
+ * @note the funciton support cross-page writing,which means the len of buf can bigger than 256.
+ *
+ * Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_page_program(unsigned long addr, unsigned long len, unsigned char *buf);
+
+
+/**
+ * @brief This function serves to read MID of flash(MAC id). Before reading UID of flash,
+ * you must read MID of flash. and then you can look up the related table to select
+ * the idcmd and read UID of flash
+ * @return MID of the flash.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned int flash_read_mid(void);
+
+/**
+ * @brief This function serves to read UID of flash.Before reading UID of flash, you must read MID of flash.
+ * and then you can look up the related table to select the idcmd and read UID of flash.
+ * @param[in] idcmd - different flash vendor have different read-uid command. E.g: GD/PUYA:0x4B; XTX: 0x5A
+ * @param[in] buf - store UID of flash.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_uid(unsigned char idcmd, unsigned char *buf);
+
+/*******************************************************************************************************************
+ * Secondary interface
+ ******************************************************************************************************************/
+
+/**
+ * @brief This function serves to read flash mid and uid,and check the correctness of mid and uid.
+ * @param[out] flash_mid - Flash Manufacturer ID.
+ * @param[out] flash_uid - Flash Unique ID.
+ * @return 0: flash no uid or not a known flash model 1:the flash model is known and the uid is read.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+int flash_read_mid_uid_with_check( unsigned int *flash_mid, unsigned char *flash_uid);
+
+/**
+ * @brief This function serves to get flash vendor.
+ * @param[in] none.
+ * @return 0 - err, other - flash vendor.
+ */
+unsigned int flash_get_vendor(unsigned int flash_mid);
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid11325e.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid11325e.c
new file mode 100644
index 0000000000000..ce62e9aaf897a
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid11325e.c
@@ -0,0 +1,126 @@
+/********************************************************************************************************
+ * @file flash_mid11325e.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author Driver Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Unless for usage inside a TELINK integrated circuit, redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of TELINK, nor the names of its contributors may be
+ * used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * TELINK integrated circuit. All other usages are subject to written permission
+ * from TELINK and different commercial license may apply.
+ *
+ * 5. Licensee shall be solely responsible for any claim to the extent arising out of or
+ * relating to such deletion(s), modification(s) or alteration(s).
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+#if FLASH_LOCK_EN
+/**
+ * @brief This function reads the status of flash.
+ * @return the value of status.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid11325e(void)
+{
+ return flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+}
+
+/**
+ * @brief This function write the status of flash.
+ * @param[in] data - the value of status.
+ * @param[in] bit - the range of bits to be modified when writing status.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid11325e(unsigned char data, mid11325e_write_status_bit_e bit)
+{
+ unsigned char status = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+ data |= (status & ~(bit));
+ flash_write_status(FLASH_TYPE_8BIT_STATUS, data);
+}
+
+/**
+ * @brief This function serves to set the protection area of the flash.
+ * @param[in] data - refer to the protection area definition in the .h file.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid11325e(mid11325e_lock_block_e data)
+{
+ flash_write_status_mid11325e(data, FLASH_WRITE_STATUS_BP_MID11325E);
+}
+
+/**
+ * @brief This function serves to flash release protection.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid11325e(void)
+{
+ flash_write_status_mid11325e(FLASH_LOCK_NONE_MID11325E, FLASH_WRITE_STATUS_BP_MID11325E);
+}
+
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid11325e.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid11325e.h
new file mode 100644
index 0000000000000..3c265d4fb8e5d
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid11325e.h
@@ -0,0 +1,140 @@
+/********************************************************************************************************
+ * @file flash_mid11325e.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author Driver Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Unless for usage inside a TELINK integrated circuit, redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of TELINK, nor the names of its contributors may be
+ * used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * TELINK integrated circuit. All other usages are subject to written permission
+ * from TELINK and different commercial license may apply.
+ *
+ * 5. Licensee shall be solely responsible for any claim to the extent arising out of or
+ * relating to such deletion(s), modification(s) or alteration(s).
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *******************************************************************************************************/
+#ifndef __MID11325E_H__
+#define __MID11325E_H__
+
+/*
+ * @brief MID = 0x11325e Flash include ZB25WD10A.
+ */
+
+
+/**
+ * @brief define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+ FLASH_LOCK_NONE_MID11325E = 0x00,
+ FLASH_LOCK_LOW_120K_MID11325E = 0x04, //000000h-01DFFFh
+ FLASH_LOCK_LOW_112K_MID11325E = 0x08, //000000h-01BFFFh
+ FLASH_LOCK_LOW_96K_MID11325E = 0x0c, //000000h-017FFFh
+ FLASH_LOCK_LOW_64K_MID11325E = 0x10, //000000h-00FFFFh
+ FLASH_LOCK_ALL_128K_MID11325E = 0x1c, //000000h-01FFFFh
+}mid11325e_lock_block_e;
+
+/**
+ * @brief the range of bits to be modified when writing status.
+ */
+typedef enum{
+ FLASH_WRITE_STATUS_BP_MID11325E = 0x1c,
+}mid11325e_write_status_bit_e;
+
+
+#if FLASH_LOCK_EN
+/**
+ * @brief This function reads the status of flash.
+ * @return the value of status.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid11325e(void);
+
+/**
+ * @brief This function write the status of flash.
+ * @param[in] data - the value of status.
+ * @param[in] bit - the range of bits to be modified when writing status.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid11325e(unsigned char data, mid11325e_write_status_bit_e bit);
+
+/**
+ * @brief This function serves to set the protection area of the flash.
+ * @param[in] data - refer to the protection area definition in the .h file.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid11325e(mid11325e_lock_block_e data);
+
+/**
+ * @brief This function serves to flash release protection.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid11325e(void);
+#endif
+
+#endif
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid1140c8.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid1140c8.c
new file mode 100644
index 0000000000000..1d8c95ce7f45a
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid1140c8.c
@@ -0,0 +1,126 @@
+/********************************************************************************************************
+ * @file flash_mid1140c8.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author Driver Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Unless for usage inside a TELINK integrated circuit, redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of TELINK, nor the names of its contributors may be
+ * used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * TELINK integrated circuit. All other usages are subject to written permission
+ * from TELINK and different commercial license may apply.
+ *
+ * 5. Licensee shall be solely responsible for any claim to the extent arising out of or
+ * relating to such deletion(s), modification(s) or alteration(s).
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+#if FLASH_LOCK_EN
+/**
+ * @brief This function reads the status of flash.
+ * @return the value of status.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid1140c8(void)
+{
+ return flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+}
+
+/**
+ * @brief This function write the status of flash.
+ * @param[in] data - the value of status.
+ * @param[in] bit - the range of bits to be modified when writing status.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid1140c8(unsigned char data, mid1140c8_write_status_bit_e bit)
+{
+ unsigned char status = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+ data |= (status & ~(bit));
+ flash_write_status(FLASH_TYPE_8BIT_STATUS, data);
+}
+
+/**
+ * @brief This function serves to set the protection area of the flash.
+ * @param[in] data - refer to the protection area definition in the .h file.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid1140c8(mid1140c8_lock_block_e data)
+{
+ flash_write_status_mid1140c8(data, FLASH_WRITE_STATUS_BP_MID1140C8);
+}
+
+/**
+ * @brief This function serves to flash release protection.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid1140c8(void)
+{
+ flash_write_status_mid1140c8(FLASH_LOCK_NONE_MID1140C8, FLASH_WRITE_STATUS_BP_MID1140C8);
+}
+
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid1140c8.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid1140c8.h
new file mode 100644
index 0000000000000..48bae8dda69cb
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid1140c8.h
@@ -0,0 +1,139 @@
+/********************************************************************************************************
+ * @file flash_mid1140c8.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author Driver Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Unless for usage inside a TELINK integrated circuit, redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of TELINK, nor the names of its contributors may be
+ * used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * TELINK integrated circuit. All other usages are subject to written permission
+ * from TELINK and different commercial license may apply.
+ *
+ * 5. Licensee shall be solely responsible for any claim to the extent arising out of or
+ * relating to such deletion(s), modification(s) or alteration(s).
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *******************************************************************************************************/
+#ifndef __MID1140C8_H__
+#define __MID1140C8_H__
+
+/*
+ * @brief MID = 0x1140c8 Flash include GD25D10C and GD25D10B.
+ */
+
+
+/**
+ * @brief define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+ FLASH_LOCK_NONE_MID1140C8 = 0x00,
+ FLASH_LOCK_LOW_120K_MID1140C8 = 0x04, //000000h-01DFFFh
+ FLASH_LOCK_LOW_112K_MID1140C8 = 0x08, //000000h-01BFFFh
+ FLASH_LOCK_LOW_96K_MID1140C8 = 0x0c, //000000h-017FFFh
+ FLASH_LOCK_LOW_64K_MID1140C8 = 0x10, //000000h-00FFFFh
+ FLASH_LOCK_ALL_128K_MID1140C8 = 0x1c, //000000h-01FFFFh
+}mid1140c8_lock_block_e;
+
+/**
+ * @brief the range of bits to be modified when writing status.
+ */
+typedef enum{
+ FLASH_WRITE_STATUS_BP_MID1140C8 = 0x1c,
+}mid1140c8_write_status_bit_e;
+
+#if FLASH_LOCK_EN
+/**
+ * @brief This function reads the status of flash.
+ * @return the value of status.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid1140c8(void);
+
+/**
+ * @brief This function write the status of flash.
+ * @param[in] data - the value of status.
+ * @param[in] bit - the range of bits to be modified when writing status.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid1140c8(unsigned char data, mid1140c8_write_status_bit_e bit);
+
+/**
+ * @brief This function serves to set the protection area of the flash.
+ * @param[in] data - refer to the protection area definition in the .h file.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid1140c8(mid1140c8_lock_block_e data);
+
+/**
+ * @brief This function serves to flash release protection.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid1140c8(void);
+#endif
+
+#endif
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid13325e.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid13325e.c
new file mode 100644
index 0000000000000..492ff982a0d02
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid13325e.c
@@ -0,0 +1,125 @@
+/********************************************************************************************************
+ * @file flash_mid13325e.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author Driver Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Unless for usage inside a TELINK integrated circuit, redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of TELINK, nor the names of its contributors may be
+ * used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * TELINK integrated circuit. All other usages are subject to written permission
+ * from TELINK and different commercial license may apply.
+ *
+ * 5. Licensee shall be solely responsible for any claim to the extent arising out of or
+ * relating to such deletion(s), modification(s) or alteration(s).
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+#if FLASH_LOCK_EN
+/**
+ * @brief This function reads the status of flash.
+ * @return the value of status.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid13325e(void)
+{
+ return flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+}
+
+/**
+ * @brief This function write the status of flash.
+ * @param[in] data - the value of status.
+ * @param[in] bit - the range of bits to be modified when writing status.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid13325e(unsigned char data, mid13325e_write_status_bit_e bit)
+{
+ unsigned char status = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+ data |= (status & ~(bit));
+ flash_write_status(FLASH_TYPE_8BIT_STATUS, data);
+}
+
+/**
+ * @brief This function serves to set the protection area of the flash.
+ * @param[in] data - refer to the protection area definition in the .h file.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid13325e(mid13325e_lock_block_e data)
+{
+ flash_write_status_mid13325e(data, FLASH_WRITE_STATUS_BP_MID13325E);
+}
+
+/**
+ * @brief This function serves to flash release protection.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid13325e(void)
+{
+ flash_write_status_mid13325e(FLASH_LOCK_NONE_MID13325E, FLASH_WRITE_STATUS_BP_MID13325E);
+}
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid13325e.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid13325e.h
new file mode 100644
index 0000000000000..b52784f60bd76
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid13325e.h
@@ -0,0 +1,141 @@
+/********************************************************************************************************
+ * @file flash_mid13325e.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author Driver Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Unless for usage inside a TELINK integrated circuit, redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of TELINK, nor the names of its contributors may be
+ * used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * TELINK integrated circuit. All other usages are subject to written permission
+ * from TELINK and different commercial license may apply.
+ *
+ * 5. Licensee shall be solely responsible for any claim to the extent arising out of or
+ * relating to such deletion(s), modification(s) or alteration(s).
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *******************************************************************************************************/
+#ifndef __MID13325E_H__
+#define __MID13325E_H__
+
+/*
+ * @brief MID = 0x13325e Flash include ZB25WD40B.
+ */
+
+
+/**
+ * @brief define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+ FLASH_LOCK_NONE_MID13325E = 0x00,
+ FLASH_LOCK_LOW_504K_MID13325E = 0x04, //000000h-07DFFFh
+ FLASH_LOCK_LOW_496K_MID13325E = 0x08, //000000h-07BFFFh
+ FLASH_LOCK_LOW_480K_MID13325E = 0x0c, //000000h-077FFFh
+ FLASH_LOCK_LOW_448K_MID13325E = 0x10, //000000h-06FFFFh
+ FLASH_LOCK_LOW_384K_MID13325E = 0x14, //000000h-05FFFFh
+ FLASH_LOCK_LOW_256K_MID13325E = 0x18, //000000h-03FFFFh
+ FLASH_LOCK_ALL_512K_MID13325E = 0x1c, //000000h-07FFFFh
+}mid13325e_lock_block_e;
+
+/**
+ * @brief the range of bits to be modified when writing status.
+ */
+typedef enum{
+ FLASH_WRITE_STATUS_BP_MID13325E = 0x1c,
+}mid13325e_write_status_bit_e;
+
+#if FLASH_LOCK_EN
+/**
+ * @brief This function reads the status of flash.
+ * @return the value of status.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid13325e(void);
+
+/**
+ * @brief This function write the status of flash.
+ * @param[in] data - the value of status.
+ * @param[in] bit - the range of bits to be modified when writing status.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid13325e(unsigned char data, mid13325e_write_status_bit_e bit);
+
+/**
+ * @brief This function serves to set the protection area of the flash.
+ * @param[in] data - refer to the protection area definition in the .h file.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid13325e(mid13325e_lock_block_e data);
+
+/**
+ * @brief This function serves to flash release protection.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid13325e(void);
+#endif
+
+#endif
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid134051.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid134051.c
new file mode 100644
index 0000000000000..6affa0a0d0df6
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid134051.c
@@ -0,0 +1,125 @@
+/********************************************************************************************************
+ * @file flash_mid134051.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author Driver Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Unless for usage inside a TELINK integrated circuit, redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of TELINK, nor the names of its contributors may be
+ * used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * TELINK integrated circuit. All other usages are subject to written permission
+ * from TELINK and different commercial license may apply.
+ *
+ * 5. Licensee shall be solely responsible for any claim to the extent arising out of or
+ * relating to such deletion(s), modification(s) or alteration(s).
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+#if FLASH_LOCK_EN
+/**
+ * @brief This function reads the status of flash.
+ * @return the value of status.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid134051(void)
+{
+ return flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+}
+
+/**
+ * @brief This function write the status of flash.
+ * @param[in] data - the value of status.
+ * @param[in] bit - the range of bits to be modified when writing status.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid134051(unsigned char data, mid134051_write_status_bit_e bit)
+{
+ unsigned char status = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+ data |= (status & ~(bit));
+ flash_write_status(FLASH_TYPE_8BIT_STATUS, data);
+}
+
+/**
+ * @brief This function serves to set the protection area of the flash.
+ * @param[in] data - refer to the protection area definition in the .h file.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid134051(mid134051_lock_block_e data)
+{
+ flash_write_status_mid134051(data, FLASH_WRITE_STATUS_BP_MID134051);
+}
+
+/**
+ * @brief This function serves to flash release protection.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid134051(void)
+{
+ flash_write_status_mid134051(FLASH_LOCK_NONE_MID134051, FLASH_WRITE_STATUS_BP_MID134051);
+}
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid134051.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid134051.h
new file mode 100644
index 0000000000000..1318e33f25ae0
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid134051.h
@@ -0,0 +1,141 @@
+/********************************************************************************************************
+ * @file flash_mid134051.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author Driver Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Unless for usage inside a TELINK integrated circuit, redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of TELINK, nor the names of its contributors may be
+ * used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * TELINK integrated circuit. All other usages are subject to written permission
+ * from TELINK and different commercial license may apply.
+ *
+ * 5. Licensee shall be solely responsible for any claim to the extent arising out of or
+ * relating to such deletion(s), modification(s) or alteration(s).
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *******************************************************************************************************/
+#ifndef __MID134051_H__
+#define __MID134051_H__
+
+/*
+ * @brief MID = 0x134051 Flash include MD25D40D.
+ */
+
+
+/**
+ * @brief define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+ FLASH_LOCK_NONE_MID134051 = 0x00,
+ FLASH_LOCK_LOW_504K_MID134051 = 0x04, //000000h-07DFFFh
+ FLASH_LOCK_LOW_496K_MID134051 = 0x08, //000000h-07BFFFh
+ FLASH_LOCK_LOW_480K_MID134051 = 0x0c, //000000h-077FFFh
+ FLASH_LOCK_LOW_448K_MID134051 = 0x10, //000000h-06FFFFh
+ FLASH_LOCK_LOW_384K_MID134051 = 0x14, //000000h-05FFFFh
+ FLASH_LOCK_LOW_256K_MID134051 = 0x18, //000000h-03FFFFh
+ FLASH_LOCK_ALL_512K_MID134051 = 0x1c, //000000h-07FFFFh
+}mid134051_lock_block_e;
+
+/**
+ * @brief the range of bits to be modified when writing status.
+ */
+typedef enum{
+ FLASH_WRITE_STATUS_BP_MID134051 = 0x1c,
+}mid134051_write_status_bit_e;
+
+#if FLASH_LOCK_EN
+/**
+ * @brief This function reads the status of flash.
+ * @return the value of status.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid134051(void);
+
+/**
+ * @brief This function write the status of flash.
+ * @param[in] data - the value of status.
+ * @param[in] bit - the range of bits to be modified when writing status.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid134051(unsigned char data, mid134051_write_status_bit_e bit);
+
+/**
+ * @brief This function serves to set the protection area of the flash.
+ * @param[in] data - refer to the protection area definition in the .h file.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid134051(mid134051_lock_block_e data);
+
+/**
+ * @brief This function serves to flash release protection.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid134051(void);
+#endif
+
+#endif
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid1360cd.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid1360cd.c
new file mode 100644
index 0000000000000..d9350a7c18ed5
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid1360cd.c
@@ -0,0 +1,222 @@
+/********************************************************************************************************
+ * @file flash_mid1360cd.c
+ *
+ * @brief This is the source file for b85m
+ *
+ * @author Driver Group
+ * @date 2020
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Unless for usage inside a TELINK integrated circuit, redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of TELINK, nor the names of its contributors may be
+ * used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * TELINK integrated circuit. All other usages are subject to written permission
+ * from TELINK and different commercial license may apply.
+ *
+ * 5. Licensee shall be solely responsible for any claim to the extent arising out of or
+ * relating to such deletion(s), modification(s) or alteration(s).
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+#if FLASH_LOCK_EN
+/**
+ * @brief This function reads the status of flash.
+ * @return the value of status.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned short flash_read_status_mid1360cd(void)
+{
+ unsigned char status_low = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+ unsigned char status_high = flash_read_status(FLASH_READ_STATUS_CMD_HIGHBYTE);
+ return (status_low | (status_high << 8));
+}
+
+/**
+ * @brief This function write the status of flash.
+ * @param[in] data - the value of status.
+ * @param[in] bit - the range of bits to be modified when writing status.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid1360cd(unsigned short data, mid1360cd_write_status_bit_e bit)
+{
+ unsigned short status = flash_read_status_mid1360cd();
+ data |= (status & ~(bit));
+ flash_write_status(FLASH_TYPE_16BIT_STATUS_ONE_CMD, data);
+}
+
+/**
+ * @brief This function serves to set the protection area of the flash.
+ * @param[in] data - refer to the protection area definition in the .h file.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid1360cd(mid1360cd_lock_block_e data)
+{
+ flash_write_status_mid1360cd(data, FLASH_WRITE_STATUS_BP_MID1360CD);
+}
+
+/**
+ * @brief This function serves to flash release protection.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid1360cd(void)
+{
+ flash_write_status_mid1360cd(FLASH_LOCK_NONE_MID1360CD, FLASH_WRITE_STATUS_BP_MID1360CD);
+}
+
+/**
+ * @brief This function serves to read data from the Security Registers of the flash.
+ * @param[in] addr - the start address of the Security Registers.
+ * the address of the Security Registers #1 0x001000-0x0011ff
+ * the address of the Security Registers #2 0x002000-0x0021ff
+ * the address of the Security Registers #3 0x003000-0x0031ff
+ * @param[in] len - the length of the content to be read.
+ * @param[out] buf - the starting address of the content to be read.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp_mid1360cd(unsigned long addr, unsigned long len, unsigned char* buf)
+{
+ flash_read_otp(addr, len, buf);
+}
+
+/**
+ * @brief This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in] addr - the start address of the Security Registers.
+ * the address of the Security Registers #1 0x001000-0x0011ff
+ * the address of the Security Registers #2 0x002000-0x0021ff
+ * the address of the Security Registers #3 0x003000-0x0031ff
+ * @param[in] len - the length of content to be written.
+ * @param[in] buf - the starting address of the content to be written.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp_mid1360cd(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+ flash_write_otp(addr, len, buf);
+}
+
+/**
+ * @brief This function serves to erase the data of the Security Registers that you choose.
+ * You can erase 512-byte one time.
+ * @param[in] addr - the address that you want to erase.
+ * the address of the Security Registers #1 0x001000-0x0011ff
+ * the address of the Security Registers #2 0x002000-0x0021ff
+ * the address of the Security Registers #3 0x003000-0x0031ff
+ * @return none.
+ * @note Even you choose the middle area of the Security Registers,it will erase the whole area.
+ *
+ * Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp_mid1360cd(mid1360cd_otp_block_e addr)
+{
+ flash_erase_otp(addr);
+}
+
+/**
+ * @brief This function serves to provide the write protect control to the Security Registers.
+ * @param[in] data - the lock area of the Security Registers.
+ * @return none.
+ * @note once they are set to 1, the Security Registers will become read-only permanently,
+ * you can't write or erase the area anymore.
+ *
+ * Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_otp_mid1360cd(mid1360cd_lock_otp_e data)
+{
+ flash_write_status_mid1360cd(data, FLASH_WRITE_STATUS_OTP_MID1360CD);
+}
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid1360cd.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid1360cd.h
new file mode 100644
index 0000000000000..a07efa3640edc
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_mid1360cd.h
@@ -0,0 +1,264 @@
+/********************************************************************************************************
+ * @file flash_mid1360cd.h
+ *
+ * @brief This is the header file for b85m
+ *
+ * @author Driver Group
+ * @date 2020
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Unless for usage inside a TELINK integrated circuit, redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of TELINK, nor the names of its contributors may be
+ * used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * TELINK integrated circuit. All other usages are subject to written permission
+ * from TELINK and different commercial license may apply.
+ *
+ * 5. Licensee shall be solely responsible for any claim to the extent arising out of or
+ * relating to such deletion(s), modification(s) or alteration(s).
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *******************************************************************************************************/
+#ifndef __MID1360CD_H__
+#define __MID1360CD_H__
+
+/*
+ * @brief MID = 0x1360cd Flash include TH25D40HB.
+ */
+
+
+/**
+ * @brief define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+ FLASH_LOCK_NONE_MID1360CD = 0x0000, //000000h-000000h //0x0020 0x407c 0x4030...
+ FLASH_LOCK_UP_64K_MID1360CD = 0x0004, //070000h-07FFFFh
+ FLASH_LOCK_UP_128K_MID1360CD = 0x0008, //060000h-07FFFFh
+ FLASH_LOCK_UP_256K_MID1360CD = 0x000c, //040000h-07FFFFh //0x402c
+ FLASH_LOCK_LOW_64K_MID1360CD = 0x0024, //000000h-00FFFFh
+ FLASH_LOCK_LOW_128K_MID1360CD = 0x0028, //000000h-01FFFFh
+ FLASH_LOCK_LOW_256K_MID1360CD = 0x002c, //000000h-03FFFFh //0x400c
+ FLASH_LOCK_UP_4K_MID1360CD = 0x0044, //07F000h-07FFFFh
+ FLASH_LOCK_UP_8K_MID1360CD = 0x0048, //07E000h-07FFFFh
+ FLASH_LOCK_UP_16K_MID1360CD = 0x004c, //07C000h-07FFFFh
+ FLASH_LOCK_UP_32K_MID1360CD = 0x0050, //078000h-07FFFFh //0x0054 0x0058
+ FLASH_LOCK_LOW_4K_MID1360CD = 0x0064, //000000h-000FFFh
+ FLASH_LOCK_LOW_8K_MID1360CD = 0x0068, //000000h-001FFFh
+ FLASH_LOCK_LOW_16K_MID1360CD = 0x006c, //000000h-003FFFh
+ FLASH_LOCK_LOW_32K_MID1360CD = 0x0070, //000000h-007FFFh //0x0074 0x0078
+ FLASH_LOCK_LOW_448K_MID1360CD = 0x4004, //000000h-06FFFFh
+ FLASH_LOCK_LOW_384K_MID1360CD = 0x4008, //000000h-05FFFFh
+ FLASH_LOCK_UP_448K_MID1360CD = 0x4024, //010000h-07FFFFh
+ FLASH_LOCK_UP_384K_MID1360CD = 0x4028, //020000h-07FFFFh
+ FLASH_LOCK_LOW_508K_MID1360CD = 0x4044, //000000h-07EFFFh
+ FLASH_LOCK_LOW_504K_MID1360CD = 0x4048, //000000h-07DFFFh
+ FLASH_LOCK_LOW_496K_MID1360CD = 0x404c, //000000h-07BFFFh
+ FLASH_LOCK_LOW_480K_MID1360CD = 0x4050, //000000h-077FFFh //0x4054 0x4058
+ FLASH_LOCK_UP_508K_MID1360CD = 0x4064, //001000h-07FFFFh
+ FLASH_LOCK_UP_504K_MID1360CD = 0x4068, //002000h-07FFFFh
+ FLASH_LOCK_UP_496K_MID1360CD = 0x406c, //004000h-07FFFFh
+ FLASH_LOCK_UP_480K_MID1360CD = 0x4070, //008000h-07FFFFh //0x4074 0x4078
+ FLASH_LOCK_ALL_512K_MID1360CD = 0x007c, //000000h-07FFFFh //0x4000 0x4040 0x4020 0x4060...
+}mid1360cd_lock_block_e;
+
+/**
+ * @brief The starting address of the Security Registers.
+ */
+typedef enum{
+ FLASH_OTP_0x001000_512K_MID1360CD = 0x001000, //001000h-0011FFh
+ FLASH_OTP_0x002000_512K_MID1360CD = 0x002000, //002000h-0021FFh
+ FLASH_OTP_0x003000_512K_MID1360CD = 0x003000, //003000h-0031FFh
+}mid1360cd_otp_block_e;
+
+/**
+ * @brief the lock area of the Security Registers.
+ */
+typedef enum{
+ FLASH_LOCK_OTP_0x001000_512K_MID1360CD = 0x0800, //001000h-0011FFh
+ FLASH_LOCK_OTP_0x002000_512K_MID1360CD = 0x1000, //002000h-0021FFh
+ FLASH_LOCK_OTP_0x003000_512K_MID1360CD = 0x2000, //003000h-0031FFh
+}mid1360cd_lock_otp_e;
+
+/**
+ * @brief the range of bits to be modified when writing status.
+ */
+typedef enum{
+ FLASH_WRITE_STATUS_BP_MID1360CD = 0x407c,
+ FLASH_WRITE_STATUS_OTP_MID1360CD = 0x3800,
+}mid1360cd_write_status_bit_e;
+
+#if FLASH_LOCK_EN
+/**
+ * @brief This function reads the status of flash.
+ * @return the value of status.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned short flash_read_status_mid1360cd(void);
+
+/**
+ * @brief This function write the status of flash.
+ * @param[in] data - the value of status.
+ * @param[in] bit - the range of bits to be modified when writing status.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid1360cd(unsigned short data, mid1360cd_write_status_bit_e bit);
+
+/**
+ * @brief This function serves to set the protection area of the flash.
+ * @param[in] data - refer to the protection area definition in the .h file.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid1360cd(mid1360cd_lock_block_e data);
+
+/**
+ * @brief This function serves to flash release protection.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid1360cd(void);
+
+/**
+ * @brief This function serves to read data from the Security Registers of the flash.
+ * @param[in] addr - the start address of the Security Registers.
+ * the address of the Security Registers #1 0x001000-0x0011ff
+ * the address of the Security Registers #2 0x002000-0x0021ff
+ * the address of the Security Registers #3 0x003000-0x0031ff
+ * @param[in] len - the length of the content to be read.
+ * @param[out] buf - the starting address of the content to be read.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp_mid1360cd(unsigned long addr, unsigned long len, unsigned char* buf);
+
+/**
+ * @brief This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in] addr - the start address of the Security Registers.
+ * the address of the Security Registers #1 0x001000-0x0011ff
+ * the address of the Security Registers #2 0x002000-0x0021ff
+ * the address of the Security Registers #3 0x003000-0x0031ff
+ * @param[in] len - the length of content to be written.
+ * @param[in] buf - the starting address of the content to be written.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp_mid1360cd(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief This function serves to erase the data of the Security Registers that you choose.
+ * You can erase 512-byte one time.
+ * @param[in] addr - the address that you want to erase.
+ * the address of the Security Registers #1 0x001000-0x0011ff
+ * the address of the Security Registers #2 0x002000-0x0021ff
+ * the address of the Security Registers #3 0x003000-0x0031ff
+ * @return none.
+ * @note Even you choose the middle area of the Security Registers,it will erase the whole area.
+ *
+ * Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp_mid1360cd(mid1360cd_otp_block_e addr);
+
+/**
+ * @brief This function serves to provide the write protect control to the Security Registers.
+ * @param[in] data - the lock area of the Security Registers.
+ * @return none.
+ * @note once they are set to 1, the Security Registers will become read-only permanently,
+ * you can't write or erase the area anymore.
+ *
+ * Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_otp_mid1360cd(mid1360cd_lock_otp_e data);
+
+#endif
+
+#endif
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_type.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_type.h
new file mode 100644
index 0000000000000..22e2e44fa4120
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/flash/flash_type.h
@@ -0,0 +1,149 @@
+/********************************************************************************************************
+ * @file flash_type.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author Driver Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Unless for usage inside a TELINK integrated circuit, redistributions
+ * in binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of TELINK, nor the names of its contributors may be
+ * used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * TELINK integrated circuit. All other usages are subject to written permission
+ * from TELINK and different commercial license may apply.
+ *
+ * 5. Licensee shall be solely responsible for any claim to the extent arising out of or
+ * relating to such deletion(s), modification(s) or alteration(s).
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *******************************************************************************************************/
+#ifndef __FLASH_TYPE_H__
+#define __FLASH_TYPE_H__
+
+#include "../flash.h"
+#include "flash_mid1140c8.h" // GD25D10C / GD25D10B
+#include "flash_mid134051.h" // MD25D40D
+#include "flash_mid11325e.h" // ZB25WD10A
+#include "flash_mid13325e.h" // ZB25WD40B
+#include "flash_mid1360cd.h" // TH25D40HB
+
+#define FLASH_LOCK_EN 0
+
+
+#if FLASH_LOCK_EN
+/**
+ * @brief This function reads the status of flash.
+ * @param[in] cmd - the cmd of read status.
+ * @return the value of status.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status(unsigned char cmd);
+
+/**
+ * @brief This function write the status of flash.
+ * @param[in] type - the type of status.8 bit or 16 bit.
+ * @param[in] data - the value of status.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status(flash_status_typedef_e type , unsigned short data);
+
+/**
+ * @brief This function serves to read data from the Security Registers of the flash.
+ * @param[in] addr - the start address of the Security Registers.
+ * @param[in] len - the length of the content to be read.
+ * @param[out] buf - the starting address of the content to be read.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp(unsigned long addr, unsigned long len, unsigned char* buf);
+
+/**
+ * @brief This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in] addr - the start address of the Security Registers.
+ * @param[in] len - the length of content to be written.
+ * @param[in] buf - the starting address of the content to be written.
+ * @return none.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief This function serves to erase the data of the Security Registers that you choose.
+ * @param[in] addr - the address that you want to erase.
+ * @return none.
+ * @Attention Even you choose the middle area of the Security Registers,it will erase the whole area.
+ * @note Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ * Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ * Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ * than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ * to the specific application and hardware circuit.
+ *
+ * Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ * there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ * If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp(unsigned long addr);
+
+#endif
+
+#endif
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/gpio.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/gpio.c
new file mode 100644
index 0000000000000..d744e96b0cdfb
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/gpio.c
@@ -0,0 +1,876 @@
+/********************************************************************************************************
+ * @file gpio.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author junwei.lu
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#include "gpio.h"
+#include "config.h"
+#include "bsp.h"
+#include "compiler.h"
+#include "analog.h"
+
+void gpio_init(void){
+ //|Input| IE |OEN|Output| DS |GPIO function|
+
+ /* GPIOA Init ------------------------------------------------------------*/
+ //PA IE settings
+ reg_gpio_pa_ie = (PA0_INPUT_ENABLE<<0)| (PA1_INPUT_ENABLE<<1)|(PA2_INPUT_ENABLE<<2)|(PA3_INPUT_ENABLE<<3)|(PA4_INPUT_ENABLE<<4);
+ analog_write(analogRegAddr_gpioPA5_7_ie, (PA5_INPUT_ENABLE<<5)|(PA6_INPUT_ENABLE<<6)|(PA7_INPUT_ENABLE<<7));
+ //PA OEN settings
+ reg_gpio_pa_oen = (PA0_OUTPUT_ENABLE?0:BIT(0))|(PA1_OUTPUT_ENABLE?0:BIT(1))|(PA2_OUTPUT_ENABLE?0:BIT(2))|(PA3_OUTPUT_ENABLE?0:BIT(3))|
+ (PA4_OUTPUT_ENABLE?0:BIT(4))|(PA5_OUTPUT_ENABLE?0:BIT(5))|(PA6_OUTPUT_ENABLE?0:BIT(6))|(PA7_OUTPUT_ENABLE?0:BIT(7));
+ //PA Output settings
+ reg_gpio_pa_out = (PA0_DATA_OUT<<0)|(PA1_DATA_OUT<<1)|(PA2_DATA_OUT<<2)|(PA3_DATA_OUT<<3)|
+ (PA4_DATA_OUT<<4)|(PA5_DATA_OUT<<5)|(PA6_DATA_OUT<<6)|(PA7_DATA_OUT<<7);
+ //PA DS settings
+ reg_gpio_pa_ds = (PA0_DATA_STRENGTH<<0)|(PA1_DATA_STRENGTH<<1)|(PA2_DATA_STRENGTH<<2)|(PA3_DATA_STRENGTH<<3)|(PA4_DATA_STRENGTH<<4);
+ analog_write(analogRegAddr_gpioPA5_7_ds, (PA5_DATA_STRENGTH<<5)|(PA6_DATA_STRENGTH<<6)|(PA7_DATA_STRENGTH<<7));
+ //PA GPIO function
+ reg_gpio_pa_gpio = (PA0_FUNC == AS_GPIO?BIT(0):0)|(PA1_FUNC == AS_GPIO?BIT(1):0)|(PA2_FUNC == AS_GPIO?BIT(2):0)|(PA3_FUNC == AS_GPIO?BIT(3):0)|
+ (PA4_FUNC == AS_GPIO?BIT(4):0)|(PA5_FUNC == AS_GPIO?BIT(5):0)|(PA6_FUNC == AS_GPIO?BIT(6):0)|(PA7_FUNC == AS_GPIO?BIT(7):0);
+
+ /* GPIOB Init ------------------------------------------------------------*/
+ //PB IE settings
+ analog_write(analogRegAddr_gpioPB_ie,(PB0_INPUT_ENABLE<<0)|(PB1_INPUT_ENABLE<<1)|(PB2_INPUT_ENABLE<<2)|(PB3_INPUT_ENABLE<<3)|
+ (PB4_INPUT_ENABLE<<4)|(PB5_INPUT_ENABLE<<5)|(PB6_INPUT_ENABLE<<6)|(PB7_INPUT_ENABLE<<7));
+ //PB OEN settings
+ reg_gpio_pb_oen = (PB0_OUTPUT_ENABLE?0:BIT(0))|(PB1_OUTPUT_ENABLE?0:BIT(1))|(PB2_OUTPUT_ENABLE?0:BIT(2))|(PB3_OUTPUT_ENABLE?0:BIT(3))|
+ (PB4_OUTPUT_ENABLE?0:BIT(4))|(PB5_OUTPUT_ENABLE?0:BIT(5))|(PB6_OUTPUT_ENABLE?0:BIT(6))|(PB7_OUTPUT_ENABLE?0:BIT(7));
+ //PB Output settings
+ reg_gpio_pb_out = (PB0_DATA_OUT<<0)|(PB1_DATA_OUT<<1)|(PB2_DATA_OUT<<2)|(PB3_DATA_OUT<<3)|
+ (PB4_DATA_OUT<<4)|(PB5_DATA_OUT<<5)|(PB6_DATA_OUT<<6)|(PB7_DATA_OUT<<7);
+ //PB DS settings
+ analog_write(analogRegAddr_gpioPB_ds,(PB0_DATA_STRENGTH<<0)|(PB1_DATA_STRENGTH<<1)|(PB2_DATA_STRENGTH<<2)|(PB3_DATA_STRENGTH<<3)|
+ (PB4_DATA_STRENGTH<<4)|(PB5_DATA_STRENGTH<<5)|(PB6_DATA_STRENGTH<<6)|(PB7_DATA_STRENGTH<<7));
+ //PB GPIO function
+ reg_gpio_pb_gpio = (PB0_FUNC == AS_GPIO?BIT(0):0)|(PB1_FUNC == AS_GPIO?BIT(1):0)|(PB2_FUNC == AS_GPIO?BIT(2):0)|(PB3_FUNC == AS_GPIO?BIT(3):0)|
+ (PB4_FUNC == AS_GPIO?BIT(4):0)|(PB5_FUNC == AS_GPIO?BIT(5):0)|(PB6_FUNC == AS_GPIO?BIT(6):0)|(PB7_FUNC == AS_GPIO?BIT(7):0);
+
+ /* PC Init ---------------------------------------------------------------*/
+ reg_gpio_pc_setting1 =
+ (PC0_INPUT_ENABLE<<8) | (PC1_INPUT_ENABLE<<9) |(PC2_INPUT_ENABLE<<10)|(PC3_INPUT_ENABLE<<11) |
+ (PC4_INPUT_ENABLE<<12)| (PC5_INPUT_ENABLE<<13)|(PC6_INPUT_ENABLE<<14)|(PC7_INPUT_ENABLE<<15) |
+ ((PC0_OUTPUT_ENABLE?0:1)<<16)|((PC1_OUTPUT_ENABLE?0:1)<<17)|((PC2_OUTPUT_ENABLE?0:1)<<18)|((PC3_OUTPUT_ENABLE?0:1)<<19) |
+ ((PC4_OUTPUT_ENABLE?0:1)<<20)|((PC5_OUTPUT_ENABLE?0:1)<<21)|((PC6_OUTPUT_ENABLE?0:1)<<22)|((PC7_OUTPUT_ENABLE?0:1)<<23) |
+ (PC0_DATA_OUT<<24)|(PC1_DATA_OUT<<25)|(PC2_DATA_OUT<<26)|(PC3_DATA_OUT<<27)|
+ (PC4_DATA_OUT<<28)|(PC5_DATA_OUT<<29)|(PC6_DATA_OUT<<30)|(PC7_DATA_OUT<<31);
+ reg_gpio_pc_setting2 =
+ (PC0_DATA_STRENGTH<<8) |(PC1_DATA_STRENGTH<<9) |(PC2_DATA_STRENGTH<<10)|(PC3_DATA_STRENGTH<<11)|
+ (PC4_DATA_STRENGTH<<12)|(PC5_DATA_STRENGTH<<13)|(PC6_DATA_STRENGTH<<14)|(PC7_DATA_STRENGTH<<15)|
+ (PC0_FUNC==AS_GPIO ? BIT(16):0)|(PC1_FUNC==AS_GPIO ? BIT(17):0)|(PC2_FUNC==AS_GPIO ? BIT(18):0)|(PC3_FUNC==AS_GPIO ? BIT(19):0) |
+ (PC4_FUNC==AS_GPIO ? BIT(20):0)|(PC5_FUNC==AS_GPIO ? BIT(21):0)|(PC6_FUNC==AS_GPIO ? BIT(22):0)|(PC7_FUNC==AS_GPIO ? BIT(23):0);
+
+ /* PE Init ---------------------------------------------------------------*/
+ //PE IE settings
+// reg_gpio_pe_ie = (PE0_INPUT_ENABLE<<0)|(PE1_INPUT_ENABLE<<1)|(PE2_INPUT_ENABLE<<2)|(PE3_INPUT_ENABLE<<3);
+ //PE OEN settings
+// reg_gpio_pe_oen = (PE0_OUTPUT_ENABLE ?0:BIT(0))|(PE1_OUTPUT_ENABLE ?0:BIT(1))|(PE2_OUTPUT_ENABLE ?0:BIT(2))|(PE3_OUTPUT_ENABLE ?0:BIT(3));
+ //PE Output settings
+// reg_gpio_pe_out = (PE0_DATA_OUT<<0)|(PE1_DATA_OUT<<1)|(PE2_DATA_OUT<<2)|(PE3_DATA_OUT<<3);
+ //PE DS settings
+// reg_gpio_pe_ds = (PE0_DATA_STRENGTH<<0)|(PE1_DATA_STRENGTH<<1)|(PE2_DATA_STRENGTH<<2)|(PE3_DATA_STRENGTH<<3);
+ //PE GPIO function
+// reg_gpio_pe_gpio = (PE0_FUNC == AS_GPIO ?BIT(0):0)|(PE1_FUNC == AS_GPIO ?BIT(1):0)|(PE2_FUNC == AS_GPIO ?BIT(2):0)|(PE3_FUNC == AS_GPIO ?BIT(3):0);
+
+ analog_write(0x08, PULL_WAKEUP_SRC_PA5|
+ (PULL_WAKEUP_SRC_PA6<<2)|
+ (PULL_WAKEUP_SRC_PA7<<4)|
+ (PULL_WAKEUP_SRC_PB0<<6));
+
+ analog_write(0x09, PULL_WAKEUP_SRC_PB1|
+ (PULL_WAKEUP_SRC_PB2<<2)|
+ (PULL_WAKEUP_SRC_PB3<<4)|
+ (PULL_WAKEUP_SRC_PB4<<6));
+
+ analog_write(0x0a, PULL_WAKEUP_SRC_PB5|
+ (PULL_WAKEUP_SRC_PB6<<2)|
+ (PULL_WAKEUP_SRC_PB7<<4)|
+ (PULL_WAKEUP_SRC_PA0<<6));
+
+ analog_write(0x0b, PULL_WAKEUP_SRC_PA1|
+ (PULL_WAKEUP_SRC_PA2<<2)|
+ (PULL_WAKEUP_SRC_PA3<<4)|
+ (PULL_WAKEUP_SRC_PA4<<6));
+
+ analog_write(0x0c, PULL_WAKEUP_SRC_PC0|
+ (PULL_WAKEUP_SRC_PC1<<2)|
+ (PULL_WAKEUP_SRC_PC2<<4)|
+ (PULL_WAKEUP_SRC_PC3<<6));
+
+ analog_write(0x0d, PULL_WAKEUP_SRC_PC4|
+ (PULL_WAKEUP_SRC_PC5<<2)|
+ (PULL_WAKEUP_SRC_PC6<<4)|
+ (PULL_WAKEUP_SRC_PC7<<6));
+}
+
+
+void gpio_config_special_func(GPIO_PinTypeDef pin, GPIO_FuncTypeDef func){
+ unsigned char val = 0;
+ unsigned char mask = 0xff;
+
+ switch(pin)
+ {
+ case GPIO_PA0:
+ {
+ //0x5a8[1:0]
+ //0. PWM0
+ mask = (unsigned char)~(BIT(1)|BIT(0));
+ if(func == AS_PWM0){
+
+ }
+ }
+ break;
+ case GPIO_PA1:
+ {
+ //0x5a8[3:2]
+ //1. UART_CTS
+ mask= (unsigned char)~(BIT(3)|BIT(2));
+ if(func == AS_UART_CTS){
+ val = BIT(2);
+ }
+ }
+ break;
+
+ case GPIO_PA2:
+ {
+ //0x5a8[5:4]
+ //0. PWM1_N
+ //1. UART_RTS
+ mask= (unsigned char)~(BIT(5)|BIT(4));
+ if(func == AS_PWM1_N){
+
+ }else if(func == AS_UART_RTS){
+ val = BIT(4);
+ }
+ }
+ break;
+
+ case GPIO_PA3:
+ {
+ //0x5a8[7:6]
+ //1. UART_TX
+ //2. I2C_MCK (i2c master)
+ //3. DI(spi slave)/I2C_SD(i2c slave)
+ mask= (unsigned char)~(BIT(7)|BIT(6));
+ if(func == AS_UART_TX){
+ val = BIT(6);
+ }else if(func == AS_I2C_MCK){
+ val = BIT(7);
+ }else if(func == AS_SPI_DI || func == AS_I2C_SD){
+ val = BIT(6)|BIT(7);
+
+ }
+ }
+ break;
+
+
+ case GPIO_PA4:
+ {
+ //0x5a9[1:0]
+ //0. PWM2
+ //1. UART_RX
+ //2. I2C_MSD (i2c master)
+ //3. CK(spi slave)/I2C_CK(i2c slave)
+ mask= (unsigned char)~(BIT(1)|BIT(0));
+ if(func == AS_PWM2){
+
+ }else if(func == AS_UART_RX){
+ val = BIT(0);
+ }else if(func == AS_I2C_MSD){
+ val = BIT(1);
+ }else if(func == AS_SPI_CK || func == AS_I2C_CK){
+
+ val = BIT(0)| BIT(1);
+ }
+ }
+ break;
+
+ case GPIO_PA5:
+ {
+ //0x5a9[3:2]
+ //1. I2C_CK (i2c slave)
+ //2.
+ //3. I2C_MCK (i2c master )
+ mask= (unsigned char)~(BIT(3)|BIT(2));
+ if(func == AS_I2C_CK){
+ val = BIT(2);
+ }else if(func == AS_I2C_MCK){
+ val = BIT(2)| BIT(3);
+ }
+ }
+ break;
+ case GPIO_PA6:
+ {
+ //0x5a9[5:4]
+ //1. I2C_SD (i2c salve)
+ //2. RX_CYC2LNA
+ //3. I2C_MSD(i2c master)
+ mask= (unsigned char)~(BIT(5)|BIT(4));
+ if(func == AS_I2C_SD){
+ val = BIT(4);
+ }else if(func == AS_I2C_MSD){
+ val = BIT(4)|BIT(5);
+ }
+ }
+ break;
+
+ case GPIO_PA7:
+ {
+ //0x5a9[7:6]
+ mask = (unsigned char)~(BIT(7)|BIT(6));
+
+ }
+ break;
+
+ case GPIO_PB0:
+ {
+ //0x5aa[1:0]
+ //1. MCN
+ //2. RX_CYC2LNA
+ mask = (unsigned char)~(BIT(1)|BIT(0));
+ if(func == AS_SPI_MCN ){
+ val = BIT(0);
+ }
+
+ }
+ break;
+
+
+ case GPIO_PB1:
+ {
+ //0x5aa[3:2]
+ //0. PWM1
+ //1. MDO
+ //2. TX_CYC2PA
+ mask = (unsigned char)~(BIT(3)|BIT(2));
+ if(func == AS_PWM1){
+
+ }else if(func == AS_SPI_MDO){
+ val = BIT(2);
+ }
+ }
+ break;
+
+
+ case GPIO_PB2:
+ {
+ //0x5aa[5:4]
+ //0. PWM2
+ //1. MDI(spi master)
+ //2. UART_CTS
+ //3. I2C_MCK(i2c master)
+ mask = (unsigned char)~(BIT(5)|BIT(4));
+ if(func == AS_PWM2){
+
+ }else if(func == AS_SPI_MDI){
+ val = BIT(4);
+ }else if(func == AS_UART_CTS){
+ val = BIT(5);
+ }else if(func == AS_I2C_MCK){
+ val = BIT(4)|BIT(5);
+ }
+ }
+ break;
+
+
+ case GPIO_PB3:
+ {
+ //0x5aa[7:6]
+ //0. PWM0
+ //1. MCK(spi master)
+ //2. UART_RTS
+ //3. I2C_MSD(i2c master)
+ mask = (unsigned char)~(BIT(7)|BIT(6));
+ if(func == AS_PWM0){
+
+ }else if(func == AS_SPI_MCK ){
+ val = BIT(6);
+ }
+ else if(func == AS_UART_RTS){
+ val = BIT(7);
+ }else if(func == AS_I2C_MSD){
+ val = BIT(6)|BIT(7);
+ }
+ }
+ break;
+
+ case GPIO_PB4:
+ {
+ //0x5ab[1:0]
+ //0. PWM1_N
+ //1.
+ //2. UART_TX
+ mask = (unsigned char)~(BIT(1)|BIT(0));
+ if(func == AS_PWM1_N){
+
+ }else if(func == AS_UART_TX){
+ val = BIT(1);
+ }
+ }
+ break;
+
+
+ case GPIO_PB5:
+ {
+ //0x5ab[3:2]
+ //1.
+ //2. UART_RX
+ mask = (unsigned char)~(BIT(3)|BIT(2));
+ if(func == AS_UART_RX){
+ val = BIT(3);
+ }
+ }
+ break;
+
+ case GPIO_PB6:
+ {
+ //0x5ab[5:4]
+ //0. AS_PWM0_N
+ //1. I2C_MCK(i2c master)
+ //2. UART_RTS
+ mask = (unsigned char)~(BIT(5)|BIT(4));
+ if(func == AS_PWM0_N){
+
+ }else if(func == AS_I2C_MCK){
+ val = BIT(4);
+ }
+ else if(func == AS_UART_RTS){
+ val = BIT(5);
+ }
+ }
+ break;
+
+
+ case GPIO_PB7:
+ {
+ //0x5ab[7:6]
+ //0. PWM1
+ //1. I2C_MSD(i2c master)
+ //2. UART_CTS
+ mask = (unsigned char)~(BIT(7)|BIT(6));
+ if(func == AS_PWM1){
+
+ }else if(func == AS_I2C_MSD){
+ val = BIT(6);
+ }
+ else if(func == AS_UART_CTS){
+ val = BIT(7);
+ }
+ }
+ break;
+
+
+
+ case GPIO_PC1:
+ {
+ //0x5ac[3:2]
+ //0. AS_PWM2_N
+ mask = (unsigned char)~(BIT(3)|BIT(2));
+ if(func == AS_PWM2_N){
+ }
+ }
+ break;
+
+
+ case GPIO_PC2:
+ {
+ //0x5ac[5:4]
+ //0. SPI_CN(spi slave)
+ //1. PWM0_N
+ //2. MCN(spi master)
+ //3. UART_CTS
+ mask = (unsigned char)~(BIT(5)|BIT(4));
+ if(func == AS_SPI_CN){
+
+ }else if(func == AS_PWM0_N){
+ val = BIT(4);
+ }else if(func == AS_SPI_MCN ){
+ val = BIT(5);
+ }
+ else if(func == AS_UART_CTS){
+ val = BIT(4)|BIT(5);
+ }
+ }
+ break;
+
+
+ case GPIO_PC3:
+ {
+ //0x5ac[7:6]
+ //0. DO (spi slave)
+ //2. MDO(spi master)
+ //3. UART_RTS
+ mask = (unsigned char)~(BIT(7)|BIT(6));
+ if(func == AS_SPI_DO){
+
+ }
+ else if(func == AS_SPI_MDO){
+ val = BIT(7);
+ }
+ else if(func == AS_UART_RTS){
+ val = BIT(6)|BIT(7);
+ }
+ }
+ break;
+
+ case GPIO_PC4:
+ {
+ //0x5ad[1:0]
+ //0. DI(spi slave)/I2C_SD(i2c slave)
+ //1. I2C_MSD(i2c master)
+ //2. MDI(spi master)
+ //3. UART_TX
+ mask = (unsigned char)~(BIT(1)|BIT(0));
+
+ if(func == AS_SPI_DI || func == AS_I2C_SD ){
+
+ }else if(func == AS_I2C_MSD){
+ val = BIT(0);
+ }else if(func == AS_SPI_MDI){
+ val = BIT(1);
+ }
+ else if(func == AS_UART_TX){
+ val = BIT(1)|BIT(0);
+ }
+ }
+ break;
+
+ case GPIO_PC5:
+ {
+ //0x5ad[3:2]
+ //0. CK (spi slave)/I2C_CK(i2c slave)
+ //1. I2C_MCK(i2c master)
+ //2. MCK(spi master)
+ //3. UART_RX
+ mask = (unsigned char)~(BIT(3)|BIT(2));
+ if((func == AS_SPI_CK) || (func == AS_I2C_CK)){
+
+ }else if(func == AS_I2C_MCK){
+ val = BIT(2);
+ }else if(func == AS_SPI_MCK){
+ val = BIT(3);
+ }
+ else if(func == AS_UART_RX){
+ val = BIT(2)|BIT(3);
+ }
+ }
+ break;
+
+ case GPIO_PC6:
+ {
+ //0x5ad[5:4]
+ mask = (unsigned char)~(BIT(5)|BIT(4));
+ }
+ break;
+
+
+ case GPIO_PC7:
+ {
+ //0x5ad[7:6]
+ //0. SWS_IO
+ mask = (unsigned char)~(BIT(7)|BIT(6));
+ if(func == AS_SWS ){
+
+ }
+ }
+ break;
+
+ default: break;
+ }
+ unsigned short reg = 0x5a8 + ((pin>>8)<<1) + ((pin&0x0f0) ? 1 : 0 );
+ WRITE_REG8(reg, ( READ_REG8(reg) & mask) | val);
+}
+
+void gpio_set_func(GPIO_PinTypeDef pin, GPIO_FuncTypeDef func)
+{
+ unsigned char bit = pin & 0xff;
+ if(func == AS_GPIO){
+ BM_SET(reg_gpio_gpio_func(pin), bit);
+ return;
+ }else{
+ BM_CLR(reg_gpio_gpio_func(pin), bit);
+ }
+ ////
+ if(func > AS_GPIO){
+ gpio_config_special_func(pin, func);
+ }
+}
+
+/**
+ * @brief This function set the input function of a pin.
+ * @param[in] pin - the pin needs to set the input function
+ * @param[in] value - enable or disable the pin's input function(0: disable, 1: enable)
+ * @return none
+ */
+void gpio_set_input_en(GPIO_PinTypeDef pin, unsigned int value)
+{
+ unsigned short gpioGroup = pin & 0x0f00;
+ unsigned char bit = pin & 0xff;
+ unsigned char temp = 0;
+
+ if(gpioGroup == GPIO_GROUPA)
+ {
+ if(bit >= 1 && bit <= 16)//PA0-PA4
+ {
+ if(value)
+ {
+ BM_SET(reg_gpio_pa_ie, bit);
+ }
+ else
+ {
+ BM_CLR(reg_gpio_pa_ie, bit);
+ }
+ }
+ else//PA5-PA7
+ {
+ if(value)
+ {
+ temp = analog_read(analogRegAddr_gpioPA5_7_ie);
+ temp |= bit;
+ analog_write(analogRegAddr_gpioPA5_7_ie, temp);
+ }
+ else
+ {
+ temp = analog_read(analogRegAddr_gpioPA5_7_ie);
+ temp &= ~bit;
+ analog_write(analogRegAddr_gpioPA5_7_ie, temp);
+ }
+ }
+ }
+ else if(gpioGroup == GPIO_GROUPB)
+ {
+ if(value)
+ {
+ temp = analog_read(analogRegAddr_gpioPB_ie);
+ temp |= bit;
+ analog_write(analogRegAddr_gpioPB_ie, temp);
+ }
+ else
+ {
+ temp = analog_read(analogRegAddr_gpioPB_ie);
+ temp &= ~bit;
+ analog_write(analogRegAddr_gpioPB_ie, temp);
+ }
+ }
+ else
+ {
+ if(value)
+ {
+ BM_SET(reg_gpio_ie(pin), bit);
+ }
+ else
+ {
+ BM_CLR(reg_gpio_ie(pin), bit);
+ }
+ }
+}
+
+/**
+ * @brief This function to judge whether a pin's input is enable.
+ * @param[in] pin - the pin needs to enable its input.
+ * @return 1:enable the pin's input function.
+ * 0:disable the pin's input function.
+ */
+int gpio_is_input_en(GPIO_PinTypeDef pin)
+{
+ unsigned short gpioGroup = pin & 0x0f00;
+ unsigned char bit = pin & 0xff;
+
+ if(gpioGroup == GPIO_GROUPA)
+ {
+ if((bit >= 1) && (bit <= 16))//PA0-PA4
+ {
+ return BM_IS_SET(reg_gpio_ie(pin), bit);
+ }
+ else //PA5-PA7
+ {
+ unsigned char temp = analog_read(analogRegAddr_gpioPA5_7_ie);
+ return BM_IS_SET(temp, bit);
+ }
+ }
+ else if(gpioGroup == GPIO_GROUPB)
+ {
+ unsigned char temp = analog_read(analogRegAddr_gpioPB_ie);
+ return BM_IS_SET(temp, bit);
+ }
+
+ return BM_IS_SET(reg_gpio_ie(pin), bit);
+}
+
+/**
+ * @brief This function set the pin's driving strength.
+ * @param[in] pin - the pin needs to set the driving strength
+ * @param[in] value - the level of driving strength(1: strong 0: poor)
+ * @return none
+ */
+void gpio_set_data_strength(GPIO_PinTypeDef pin, unsigned int value)
+{
+ unsigned short gpioGroup = pin & 0x0f00;
+ unsigned char bit = pin & 0xff;
+ unsigned char temp = 0;
+
+ if(gpioGroup == GPIO_GROUPA)
+ {
+ if(bit >= 1 && bit <= 16)//PA0-PA4
+ {
+ if(value)
+ {
+ BM_SET(reg_gpio_pa_ds, bit);
+ }
+ else
+ {
+ BM_CLR(reg_gpio_pa_ds, bit);
+ }
+ }
+ else//PA5-PA7
+ {
+ if(value)
+ {
+ temp = analog_read(analogRegAddr_gpioPA5_7_ds);
+ temp |= bit;
+ analog_write(analogRegAddr_gpioPA5_7_ds, temp);
+ }
+ else
+ {
+ temp = analog_read(analogRegAddr_gpioPA5_7_ds);
+ temp &= ~bit;
+ analog_write(analogRegAddr_gpioPA5_7_ds, temp);
+ }
+ }
+ }
+ else if(gpioGroup == GPIO_GROUPB)
+ {
+ if(value)
+ {
+ temp = analog_read(analogRegAddr_gpioPB_ds);
+ temp |= bit;
+ analog_write(analogRegAddr_gpioPB_ds, temp);
+ }
+ else
+ {
+ temp = analog_read(analogRegAddr_gpioPB_ds);
+ temp &= ~bit;
+ analog_write(analogRegAddr_gpioPB_ds, temp);
+ }
+ }
+ else
+ {
+ if(value)
+ {
+ BM_SET(reg_gpio_ds(pin), bit);
+ }
+ else
+ {
+ BM_CLR(reg_gpio_ds(pin), bit);
+ }
+ }
+}
+/**
+ * @Brief: Set gpio pull resistor.
+ * @Param: gpio -> indicate the pin
+ * up_down -> 0 : float
+ * 1 : 1M pull up
+ * 2 : 10K pull up
+ * 3 : 100K pull down
+ *-----------------------------------------------
+ * BIT(7.6) BIT(5.4) BIT(3.2) BIT(1.0)
+ *-----------------------------------------------
+ *offset| 6 | | 4 | | 2 | | 0 |
+ *-----------------------------------------------
+ * 08 B0 A7 A6 A5
+ * 09 B4 B3 B2 B1
+ * 0a A0 B7 B6 B5
+ * 0b A4 A3 A2 A1
+ * 0c C3 C2 C1 C0
+ * 0d C7 C6 C5 C4
+ *-----------------------------------------------
+ */
+const unsigned char gpioPullResistorMapTab[3][8]=
+{
+ //b0 b1 b2 b3 b4 b5 b6 b7
+ {0xa6, 0xb0, 0xb2, 0xb4, 0xb6, 0x80, 0x82, 0x84 }, //GPIO_GROUPA
+ {0x86, 0x90, 0x92, 0x94, 0x96, 0xa0, 0xa2, 0xa4 }, //GPIO_GROUPB
+ {0xc0, 0xc2, 0xc4, 0xc6, 0xd0, 0xd2, 0xd4, 0xd6 } //GPIO_GROUPC
+};
+
+
+/**
+ * @brief This function set a pin's pull-up/down resistor.
+ * @param[in] gpio - the pin needs to set its pull-up/down resistor
+ * @param[in] up_down - the type of the pull-up/down resistor
+ * @return none
+ */
+//if GPIO_DP,please check usb_dp_pullup_en() valid or not first.
+void gpio_setup_up_down_resistor(GPIO_PinTypeDef gpio, GPIO_PullTypeDef up_down)
+{
+ unsigned char bit = gpio & 0xff;
+ unsigned char pinId = 0;
+ unsigned short gpioGroup = gpio & 0xf00;
+ unsigned char gpioGroupId = gpio >> 8;
+ unsigned char pullResistorAddr = 0;
+ unsigned char offset = 0;
+ unsigned char temp = 0;
+
+ for(volatile int i = 0; i<8; i++)
+ {
+ if((bit>>i) & 0x01)
+ {
+ pinId = i;
+ break;
+ }
+ }
+ if(pinId >= 8)//parameter error.
+ return;
+
+ temp = gpioPullResistorMapTab[gpioGroupId][pinId];
+ pullResistorAddr = (temp>>4) & 0x0f;
+ offset = temp & 0x0f;
+
+ temp = analog_read(pullResistorAddr);
+ temp &= ~(0x03<
+ analog_write(areg_gpio_pa5_6_7_ie, 0x00);
+ analog_write(areg_gpio_pb_ie, 0x00);
+ reg_gpio_pc_ie = 0x80;
+ }
+ }
+}
+
+/**
+ * @Brief:Disable or Enable 50k pull up resistor. only PA6-PA7 and PB0-PB7 have
+ * 50K pull up resistor.
+ * @Param: enable -> 0: disable;
+ * 1: enable. (default enable for MCU)
+ * @Reval: None.
+ */
+void gpio_set_50k_pullup(unsigned char enable)
+{
+ unsigned char temp = 0;
+
+ if(enable)
+ {
+ temp = analog_read(0x05);
+ temp &= ~0x80;
+ analog_write(0x05,temp);
+ }
+ else
+ {
+ temp = analog_read(0x05);
+ temp |= 0x80;
+ analog_write(0x05,temp);
+ }
+}
+
+
+
+/**
+ * @Brief: Set GPIO(digital) as wke-up source.
+ * @Param:
+ * @Param:
+ * @Param:
+ * @Return: None.
+ */
+void gpio_set_wakeup(GPIO_PinTypeDef pin, unsigned int pol, int en)
+{
+ unsigned char bit = pin & 0xff;
+ if (en) {
+ BM_SET(reg_gpio_irq_wakeup_en(pin), bit);
+ }
+ else {
+ BM_CLR(reg_gpio_irq_wakeup_en(pin), bit);
+ }
+
+ if(pol){
+ BM_CLR(reg_gpio_pol(pin), bit);
+ }else{
+ BM_SET(reg_gpio_pol(pin), bit);
+ }
+
+ gpio_set_func(pin,AS_GPIO);
+ gpio_set_input_en(pin,1);//must
+ reg_gpio_wakeup_and_irq_en |= FLD_GPIO_CORE_WAKEUP_EN;
+}
+
+
+void gpio_clear_gpio_irq_flag(void)
+{
+ REG_ADDR8(0x64A) |= BIT(2);
+}
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/gpio.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/gpio.h
new file mode 100644
index 0000000000000..9b52a8baff3e9
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/gpio.h
@@ -0,0 +1,498 @@
+/********************************************************************************************************
+ * @file gpio.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author junwei.lu
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "driver_config.h"
+#include "register.h"
+#include "gpio_default.h"
+
+typedef enum{
+ GPIO_GROUPA = 0x000,
+ GPIO_GROUPB = 0x100,
+ GPIO_GROUPC = 0x200,
+ GPIO_GROUPD = 0x300,
+ GPIO_GROUPE = 0x400,
+
+ GPIO_PA0 = 0x000 | BIT(0),
+ GPIO_PA1 = 0x000 | BIT(1),
+ GPIO_PA2 = 0x000 | BIT(2),
+ GPIO_PA3 = 0x000 | BIT(3),
+ GPIO_PA4 = 0x000 | BIT(4),
+ GPIO_PA5 = 0x000 | BIT(5),
+ GPIO_PA6 = 0x000 | BIT(6),
+ GPIO_PA7 = 0x000 | BIT(7),
+
+ GPIO_PB0 = 0x100 | BIT(0),
+ GPIO_PB1 = 0x100 | BIT(1),
+ GPIO_PB2 = 0x100 | BIT(2),
+ GPIO_PB3 = 0x100 | BIT(3),
+ GPIO_PB4 = 0x100 | BIT(4),
+ GPIO_PB5 = 0x100 | BIT(5),
+ GPIO_PB6 = 0x100 | BIT(6),
+ GPIO_PB7 = 0x100 | BIT(7),
+
+ GPIO_PC0 = 0x200 | BIT(0),
+ GPIO_PC1 = 0x200 | BIT(1),
+ GPIO_PC2 = 0x200 | BIT(2),
+ GPIO_PC3 = 0x200 | BIT(3),
+ GPIO_PC4 = 0x200 | BIT(4),
+ GPIO_PC5 = 0x200 | BIT(5),
+ GPIO_PC6 = 0x200 | BIT(6),
+ GPIO_PC7 = 0x200 | BIT(7),
+
+ GPIO_PE0 = 0x400 | BIT(0),
+ GPIO_PE1 = 0x400 | BIT(1),
+ GPIO_PE2 = 0x400 | BIT(2),
+ GPIO_PE3 = 0x400 | BIT(3),
+
+
+ GPIO_PE4 = 0x400 | BIT(4),
+ GPIO_PE5 = 0x400 | BIT(5),
+ GPIO_PE6 = 0x400 | BIT(6),
+
+ GPIO_PF0 = 0x500 | BIT(0),
+
+ GPIO_ALL = 0x500,
+ GPIO_NONE = 0xfff,
+}GPIO_PinTypeDef;
+
+
+typedef enum {
+ GPIO_PULL_UP_DOWN_FLOAT = 0,
+ GPIO_PULL_UP_1M = 1,
+ GPIO_PULL_UP_10K = 2,
+ GPIO_PULL_DOWN_100K = 3,
+}GPIO_PullTypeDef;
+
+typedef enum{
+ GPIO_Level_Low = 0x00,
+ GPIO_Level_High = 0x01,
+}GPIO_LevelTypeDef;
+
+typedef enum{
+ GPIO_Pol_rising = 0x00,
+ GPIO_Pol_falling = 0x01,
+}GPIO_PolTypeDef;
+
+typedef enum{
+ AS_GPIO = 0,
+ AS_AF = (!0),
+ AS_MSPI = 1,
+ AS_SWIRE = 2,
+ AS_UART = 3,
+ AS_PWM = 4,
+ AS_I2C = 5,
+ AS_SPI = 6,
+ AS_ETH_MAC= 7,
+ AS_I2S = 8,
+ AS_SDM = 9,
+ AS_DMIC = 10,
+ AS_USB = 11,
+ AS_SWS = 12,
+ AS_SWM = 13,
+ AS_TEST = 14,
+ AS_ADC = 15,
+ AS_KS = 16,
+ AS_DEBUG = 17,
+
+ AS_PWM0 = 20,
+ AS_PWM1 = 21,
+ AS_PWM2 = 22,
+
+ AS_PWM0_N = 26,
+ AS_PWM1_N = 27,
+ AS_PWM2_N = 28,
+
+
+ AS_32K_CLK_OUTPUT = 32,
+ AS_RESERVE_0 = 33,
+ AS_RESERVE_1 = 34,
+ AS_RESERVE_2 = 35,
+ AS_RESERVE_3 = 36,
+ AS_UART_CTS = 37,
+ AS_UART_RTS = 38,
+ AS_UART_TX = 39,
+ AS_UART_RX = 40,
+
+ AS_I2C_CK = 41,
+ AS_I2C_MCK = 42,
+ AS_I2C_MSD = 43,
+ AS_I2C_SD_OR_SPI_DI = 44,
+ AS_I2C_CK_OR_SPI_CK = 45,
+ AS_I2C_SD = 46,
+
+ AS_RX_CYC2LNA = 50,
+ AS_SYS_CLK_OUTPUT = 52,
+ AS_TX_CYC2PA = 53,
+ AS_SPI_MCN = 54,
+ AS_SPI_MDO = 55,
+ AS_SPI_MDI = 56,
+ AS_SPI_MCK = 57,
+
+ AS_SPI_CN = 58,
+ AS_SPI_DO = 59,
+ AS_SPI_DI = 60,
+ AS_SPI_CK = 61,
+
+ AS_RX_CYC2LNA_OR_SPI_CN = 63,
+ AS_TX_CYC2LNA_OR_SPI_DO = 64,
+ AS_UART_CTS_OR_SPI_DI = 65,
+ AS_UART_RTS_OR_SPI_CK = 66,
+
+}GPIO_FuncTypeDef;
+
+
+
+
+/* End of GPIO Alternative Function define */
+
+#define reg_gpio_in(i) REG_ADDR8(0x580+((i>>8)<<3))
+#define reg_gpio_ie(i) REG_ADDR8(0x581+((i>>8)<<3))
+
+#define analogRegAddr_gpioPA5_7_ie 0xb6
+#define analogRegAddr_gpioPB_ie 0xb9
+
+#define reg_gpio_oen(i) REG_ADDR8(0x582+((i>>8)<<3))
+#define reg_gpio_out(i) REG_ADDR8(0x583+((i>>8)<<3))
+#define reg_gpio_pol(i) REG_ADDR8(0x584+((i>>8)<<3))
+
+#define reg_gpio_ds(i) REG_ADDR8(0x585+((i>>8)<<3))
+#define analogRegAddr_gpioPA5_7_ds 0xb8
+#define analogRegAddr_gpioPB_ds 0xbb
+
+#define reg_gpio_gpio_func(i) REG_ADDR8(0x586+((i>>8)<<3))
+#define reg_gpio_config_func(i) REG_ADDR16(0x5a8 + ((i>>8)<<1))
+//#define reg_gpio_multi_func(i) REG_ADDR16(0x5a8 + ((i>>8)<<1))
+
+#define reg_gpio_irq_wakeup_en(i) REG_ADDR8(0x587+((i>>8)<<3)) // reg_irq_mask: FLD_IRQ_GPIO_EN
+
+#define reg_gpio_irq_risc0_en(i) REG_ADDR8(0x5b8 + (i >> 8)) // reg_irq_mask: FLD_IRQ_GPIO_RISC0_EN
+#define reg_gpio_irq_risc1_en(i) REG_ADDR8(0x5c0 + (i >> 8)) // reg_irq_mask: FLD_IRQ_GPIO_RISC1_EN
+#define reg_gpio_irq_risc2_en(i) REG_ADDR8(0x5c8 + (i >> 8)) // reg_irq_mask: FLD_IRQ_GPIO_RISC2_EN
+
+#define reg_gpio_wakeup_and_irq_en REG_ADDR8(0x5b5)
+enum{
+ FLD_GPIO_CORE_WAKEUP_EN = BIT(2),
+ FLD_GPIO_CORE_INTERRUPT_EN = BIT(3),
+};
+
+/**
+ * @brief This function servers to initialization all gpio.
+ * @param[in] none.
+ * @return none.
+ */
+void gpio_init(void);
+
+/**
+ * @brief This function servers to set the GPIO's function.
+ * @param[in] pin - the special pin.
+ * @param[in] func - the function of GPIO.
+ * @return none.
+ */
+void gpio_set_func(GPIO_PinTypeDef pin, GPIO_FuncTypeDef func);
+
+/**
+ * @brief This function set the output function of a pin.
+ * @param[in] pin - the pin needs to set the output function
+ * @param[in] value - enable or disable the pin's output function(0: enable, 1: disable)
+ * @return none
+ */
+static inline void gpio_set_output_en(GPIO_PinTypeDef pin, unsigned int value)
+{
+ unsigned char bit = pin & 0xff;
+ if(!value){
+ BM_SET(reg_gpio_oen(pin), bit);
+ }else{
+ BM_CLR(reg_gpio_oen(pin), bit);
+ }
+}
+
+/**
+ * @brief This function set the input function of a pin.
+ * @param[in] pin - the pin needs to set the input function
+ * @param[in] value - enable or disable the pin's input function(0: disable, 1: enable)
+ * @return none
+ */
+void gpio_set_input_en(GPIO_PinTypeDef pin, unsigned int value);
+
+/**
+ * @brief This function determines whether the output function of a pin is enabled.
+ * @param[in] pin - the pin needs to determine whether its output function is enabled.
+ * @return 1: the pin's output function is enabled ;
+ * 0: the pin's output function is disabled
+ */
+static inline int gpio_is_output_en(GPIO_PinTypeDef pin)
+{
+
+ return !BM_IS_SET(reg_gpio_oen(pin), pin & 0xff);
+}
+
+/**
+ * @brief This function to judge whether a pin's input is enable.
+ * @param[in] pin - the pin needs to enable its input.
+ * @return 1:enable the pin's input function.
+ * 0:disable the pin's input function.
+ */
+int gpio_is_input_en(GPIO_PinTypeDef pin);
+
+/**
+ * @brief This function set the pin's output level.
+ * @param[in] pin - the pin needs to set its output level
+ * @param[in] value - value of the output level(1: high 0: low)
+ * @return none
+ */
+static inline void gpio_write(GPIO_PinTypeDef pin, unsigned int value){
+ unsigned char bit = pin & 0xff;
+ if(value){
+ BM_SET(reg_gpio_out(pin), bit);
+ }else{
+ BM_CLR(reg_gpio_out(pin), bit);
+ }
+}
+
+/**
+ * @brief This function read the pin's input/output level.
+ * @param[in] pin - the pin needs to read its level
+ * @return the pin's level(1: high 0: low)
+ */
+static inline unsigned char gpio_read(GPIO_PinTypeDef pin){
+ return BM_IS_SET(reg_gpio_in(pin), pin & 0xff);
+}
+
+/**
+ * @brief This function set the pin toggle.
+ * @param[in] pin - the pin needs to toggle
+ * @return none
+ */
+static inline void gpio_toggle(GPIO_PinTypeDef pin) {
+ reg_gpio_out(pin) ^= (pin & 0xFF);
+}
+
+/**
+ * @brief This function set the pin's driving strength.
+ * @param[in] pin - the pin needs to set the driving strength
+ * @param[in] value - the level of driving strength(1: strong 0: poor)
+ * @return none
+ */
+void gpio_set_data_strength(GPIO_PinTypeDef pin, unsigned int value);
+
+static inline void gpio_core_wakeup_enable_all (int en)
+{
+ if (en) {
+ BM_SET(reg_gpio_wakeup_and_irq_en, FLD_GPIO_CORE_WAKEUP_EN);
+ }
+ else {
+ BM_CLR(reg_gpio_wakeup_and_irq_en, FLD_GPIO_CORE_WAKEUP_EN);
+ }
+}
+
+/**
+ * @brief This function set a pin's pull-up/down resistor.
+ * @param[in] gpio - the pin needs to set its pull-up/down resistor
+ * @param[in] up_down - the type of the pull-up/down resistor
+ * @return none
+ */
+void gpio_setup_up_down_resistor(GPIO_PinTypeDef gpio, GPIO_PullTypeDef up_down);
+
+/**
+ * @brief This function servers to set the specified GPIO as high resistor.
+ * @param[in] pin - select the specified GPIO
+ * @return none.
+ */
+void gpio_shutdown(GPIO_PinTypeDef pin);
+
+/**
+ * @Brief: This function serves to disable or enable 50k pull-up resistor. only PA6,PA7 and PB0~PB7 have
+ * 50K pull-up resistor.
+ * @Param[in]: en - 0: disable; 1: enable. (disable by default)
+ * @Return: none.
+ */
+void gpio_set_50k_pullup(unsigned char enable);
+
+/**
+ * @brief This function set a pin's IRQ.
+ * @param[in] pin - the pin needs to enable its IRQ
+ * @param[in] falling - value of the edge polarity(1: falling edge 0: rising edge)
+ * @return none
+ */
+static inline void gpio_set_interrupt(GPIO_PinTypeDef pin, unsigned int falling){
+ unsigned char bit = pin & 0xff;
+ BM_SET(reg_gpio_irq_wakeup_en(pin), bit);
+
+ reg_irq_mask |= FLD_IRQ_GPIO_EN ; //////refer to driver
+ reg_gpio_wakeup_irq |= FLD_GPIO_CORE_INTERRUPT_EN;
+
+ if(falling){
+ BM_SET(reg_gpio_pol(pin), bit);
+ }else{
+ BM_CLR(reg_gpio_pol(pin), bit);
+ }
+}
+/*****
+ * brief: this function just enable or disable one or some pins' interrupt function
+ * param-pin: GPIO pin
+ * param-en: 1:enable; 0:disable
+ */
+static inline void gpio_en_interrupt(GPIO_PinTypeDef pin, int en){ // reg_irq_mask: FLD_IRQ_GPIO_EN
+ unsigned char bit = pin & 0xff;
+ if(en){
+ BM_SET(reg_gpio_irq_wakeup_en(pin), bit);
+ }
+ else{
+ BM_CLR(reg_gpio_irq_wakeup_en(pin), bit);
+ }
+}
+/***
+ * brief: this function is the master switch(�ܿ���) of gpio interrupt
+ * param-en: 1: enable ; 0: disable
+ */
+static inline void gpio_core_irq_enable_all (int en)
+{
+ if (en) {
+ BM_SET(reg_gpio_wakeup_and_irq_en, FLD_GPIO_CORE_INTERRUPT_EN);
+ }
+ else {
+ BM_CLR(reg_gpio_wakeup_and_irq_en, FLD_GPIO_CORE_INTERRUPT_EN);
+ }
+}
+
+/**
+ * @brief This function set a pin's IRQ.
+ * @param[in] pin - the pin needs to enable its IRQ
+ * @param[in] falling - value of the edge polarity(1: falling edge 0: rising edge)
+ * @return none
+ */
+static inline void gpio_set_interrupt_risc0(GPIO_PinTypeDef pin, unsigned int falling){
+ unsigned char bit = pin & 0xff;
+ BM_SET(reg_gpio_irq_risc0_en(pin), bit);
+ reg_irq_mask |= FLD_IRQ_GPIO_RISC0_EN;
+
+ if(falling){
+ BM_SET(reg_gpio_pol(pin), bit);
+ }else{
+ BM_CLR(reg_gpio_pol(pin), bit);
+ }
+}
+/***
+ * brief: this function is used to enable or close risc0. user can use it with gpio_set_interrupt_risc0;
+ * gpio_set_interrupt_risc0() to set and enable risc0 interrupt. and gpio_en_interrupt_risc0(0) to close risc0 interrupt.
+ */
+static inline void gpio_en_interrupt_risc0(GPIO_PinTypeDef pin, int en){ // reg_irq_mask: FLD_IRQ_GPIO_RISC0_EN
+ unsigned char bit = pin & 0xff;
+ if(en){
+ BM_SET(reg_gpio_irq_risc0_en(pin), bit);
+ }
+ else{
+ BM_CLR(reg_gpio_irq_risc0_en(pin), bit);
+ }
+}
+
+/**
+ * @brief This function set a pin's IRQ.
+ * @param[in] pin - the pin needs to enable its IRQ
+ * @param[in] falling - value of the edge polarity(1: falling edge 0: rising edge)
+ * @return none
+ */
+static inline void gpio_set_interrupt_risc1(GPIO_PinTypeDef pin, unsigned int falling){
+ unsigned char bit = pin & 0xff;
+ BM_SET(reg_gpio_irq_risc1_en(pin), bit);
+ reg_irq_mask |= FLD_IRQ_GPIO_RISC1_EN;
+
+ if(falling){
+ BM_SET(reg_gpio_pol(pin), bit);
+ }else{
+ BM_CLR(reg_gpio_pol(pin), bit);
+ }
+}
+/***
+ * brief: this function is used to enable or close risc1. user can use it with gpio_set_interrupt_risc1;
+ * gpio_set_interrupt_risc1() to set and enable risc1 interrupt. and gpio_en_interrupt_risc1(0) to close risc1 interrupt.
+ */
+static inline void gpio_en_interrupt_risc1(GPIO_PinTypeDef pin, int en){ // reg_irq_mask: FLD_IRQ_GPIO_RISC1_EN
+ unsigned char bit = pin & 0xff;
+ if(en){
+ BM_SET(reg_gpio_irq_risc1_en(pin), bit);
+ }
+ else{
+ BM_CLR(reg_gpio_irq_risc1_en(pin), bit);
+ }
+}
+
+/**
+ * @brief This function set a pin's IRQ.
+ * @param[in] pin - the pin needs to enable its IRQ
+ * @param[in] falling - value of the edge polarity(1: falling edge 0: rising edge)
+ * @return none
+ */
+static inline void gpio_set_interrupt_risc2(GPIO_PinTypeDef pin, unsigned int falling){
+ unsigned char bit = pin & 0xff;
+ BM_SET(reg_gpio_irq_risc2_en(pin), bit);
+ reg_irq_mask |= FLD_IRQ_GPIO_RISC2_EN;
+
+ if(falling){
+ BM_SET(reg_gpio_pol(pin), bit);
+ }else{
+ BM_CLR(reg_gpio_pol(pin), bit);
+ }
+}
+
+/***
+ * brief: this function is used to enable or close risc2. user can use it with gpio_set_interrupt_risc2;
+ * gpio_set_interrupt_risc2() to set and enable risc2 interrupt. and gpio_en_interrupt_risc2(0) to close risc2 interrupt.
+ */
+static inline void gpio_en_interrupt_risc2(GPIO_PinTypeDef pin, int en){ // reg_irq_mask: FLD_IRQ_GPIO_RISC2_EN
+ unsigned char bit = pin & 0xff;
+ if(en){
+ BM_SET(reg_gpio_irq_risc2_en(pin), bit);
+ }
+ else{
+ BM_CLR(reg_gpio_irq_risc2_en(pin), bit);
+ }
+}
+
+//static inline void gpio_set_interrupt_pol(GPIO_PinTypeDef pin, unsigned int falling){
+// unsigned char bit = pin & 0xff;
+// if(falling){
+// BM_SET(reg_gpio_pol(pin), bit);
+// }else{
+// BM_CLR(reg_gpio_pol(pin), bit);
+// }
+//}
+
+
+static inline unsigned char gpio_read_cache(GPIO_PinTypeDef pin, unsigned char *p){
+ return p[pin>>8] & (pin & 0xff);
+}
+
+static inline void gpio_read_all(unsigned char *p){
+ p[0] = REG_ADDR8(0x580);//PA
+ p[1] = REG_ADDR8(0x588);//PB
+ p[2] = REG_ADDR8(0x590);//PC
+}
+
+
+
+
+void gpio_set_wakeup(GPIO_PinTypeDef pin, unsigned int pol, int en);
+void gpio_clear_gpio_irq_flag(void);
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/gpio_default.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/gpio_default.h
new file mode 100644
index 0000000000000..71a643eba1ea6
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/gpio_default.h
@@ -0,0 +1,492 @@
+/********************************************************************************************************
+ * @file gpio_default.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "../../common/config/user_config.h"
+
+
+/* PA ------------------------------------------------------------------------*/
+//PA Input Enable
+#ifndef PA0_INPUT_ENABLE
+#define PA0_INPUT_ENABLE 0
+#endif
+#ifndef PA1_INPUT_ENABLE
+#define PA1_INPUT_ENABLE 0
+#endif
+#ifndef PA2_INPUT_ENABLE
+#define PA2_INPUT_ENABLE 0
+#endif
+#ifndef PA3_INPUT_ENABLE
+#define PA3_INPUT_ENABLE 0
+#endif
+#ifndef PA4_INPUT_ENABLE
+#define PA4_INPUT_ENABLE 0
+#endif
+#ifndef PA5_INPUT_ENABLE
+#define PA5_INPUT_ENABLE 0
+#endif
+#ifndef PA6_INPUT_ENABLE
+#define PA6_INPUT_ENABLE 0
+#endif
+#ifndef PA7_INPUT_ENABLE
+#define PA7_INPUT_ENABLE 0
+#endif
+//PA Output Enable
+#ifndef PA0_OUTPUT_ENABLE
+#define PA0_OUTPUT_ENABLE 0
+#endif
+#ifndef PA1_OUTPUT_ENABLE
+#define PA1_OUTPUT_ENABLE 0
+#endif
+#ifndef PA2_OUTPUT_ENABLE
+#define PA2_OUTPUT_ENABLE 0
+#endif
+#ifndef PA3_OUTPUT_ENABLE
+#define PA3_OUTPUT_ENABLE 0
+#endif
+#ifndef PA4_OUTPUT_ENABLE
+#define PA4_OUTPUT_ENABLE 0
+#endif
+#ifndef PA5_OUTPUT_ENABLE
+#define PA5_OUTPUT_ENABLE 0
+#endif
+#ifndef PA6_OUTPUT_ENABLE
+#define PA6_OUTPUT_ENABLE 0
+#endif
+#ifndef PA7_OUTPUT_ENABLE
+#define PA7_OUTPUT_ENABLE 0
+#endif
+//PA Data strength
+#ifndef PA0_DATA_STRENGTH
+#define PA0_DATA_STRENGTH 1
+#endif
+#ifndef PA1_DATA_STRENGTH
+#define PA1_DATA_STRENGTH 1
+#endif
+#ifndef PA2_DATA_STRENGTH
+#define PA2_DATA_STRENGTH 1
+#endif
+#ifndef PA3_DATA_STRENGTH
+#define PA3_DATA_STRENGTH 1
+#endif
+#ifndef PA4_DATA_STRENGTH
+#define PA4_DATA_STRENGTH 1
+#endif
+#ifndef PA5_DATA_STRENGTH
+#define PA5_DATA_STRENGTH 1
+#endif
+#ifndef PA6_DATA_STRENGTH
+#define PA6_DATA_STRENGTH 1
+#endif
+#ifndef PA7_DATA_STRENGTH
+#define PA7_DATA_STRENGTH 1
+#endif
+//PA Output Data
+#ifndef PA0_DATA_OUT
+#define PA0_DATA_OUT 0
+#endif
+#ifndef PA1_DATA_OUT
+#define PA1_DATA_OUT 0
+#endif
+#ifndef PA2_DATA_OUT
+#define PA2_DATA_OUT 0
+#endif
+#ifndef PA3_DATA_OUT
+#define PA3_DATA_OUT 0
+#endif
+#ifndef PA4_DATA_OUT
+#define PA4_DATA_OUT 0
+#endif
+#ifndef PA5_DATA_OUT
+#define PA5_DATA_OUT 0
+#endif
+#ifndef PA6_DATA_OUT
+#define PA6_DATA_OUT 0
+#endif
+#ifndef PA7_DATA_OUT
+#define PA7_DATA_OUT 0
+#endif
+//PA Function select
+#ifndef PA0_FUNC
+#define PA0_FUNC AS_GPIO
+#endif
+#ifndef PA1_FUNC
+#define PA1_FUNC AS_GPIO
+#endif
+#ifndef PA2_FUNC
+#define PA2_FUNC AS_GPIO
+#endif
+#ifndef PA3_FUNC
+#define PA3_FUNC AS_GPIO
+#endif
+#ifndef PA4_FUNC
+#define PA4_FUNC AS_GPIO
+#endif
+#ifndef PA5_FUNC
+#define PA5_FUNC AS_GPIO
+#endif
+#ifndef PA6_FUNC
+#define PA6_FUNC AS_GPIO
+#endif
+#ifndef PA7_FUNC
+#define PA7_FUNC AS_GPIO
+#endif
+//PA pull resistor
+#ifndef PULL_WAKEUP_SRC_PA0
+#define PULL_WAKEUP_SRC_PA0 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA1
+#define PULL_WAKEUP_SRC_PA1 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA2
+#define PULL_WAKEUP_SRC_PA2 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA3
+#define PULL_WAKEUP_SRC_PA3 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA4
+#define PULL_WAKEUP_SRC_PA4 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA5
+#define PULL_WAKEUP_SRC_PA5 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA6
+#define PULL_WAKEUP_SRC_PA6 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA7
+#define PULL_WAKEUP_SRC_PA7 0
+#endif
+
+/* PB ------------------------------------------------------------------------*/
+//PB Input Enable
+#ifndef PB0_INPUT_ENABLE
+#define PB0_INPUT_ENABLE 0
+#endif
+#ifndef PB1_INPUT_ENABLE
+#define PB1_INPUT_ENABLE 0
+#endif
+#ifndef PB2_INPUT_ENABLE
+#define PB2_INPUT_ENABLE 0
+#endif
+#ifndef PB3_INPUT_ENABLE
+#define PB3_INPUT_ENABLE 0
+#endif
+#ifndef PB4_INPUT_ENABLE
+#define PB4_INPUT_ENABLE 0
+#endif
+#ifndef PB5_INPUT_ENABLE
+#define PB5_INPUT_ENABLE 0
+#endif
+#ifndef PB6_INPUT_ENABLE
+#define PB6_INPUT_ENABLE 0
+#endif
+#ifndef PB7_INPUT_ENABLE
+#define PB7_INPUT_ENABLE 0
+#endif
+//PB Output Enable
+#ifndef PB0_OUTPUT_ENABLE
+#define PB0_OUTPUT_ENABLE 0
+#endif
+#ifndef PB1_OUTPUT_ENABLE
+#define PB1_OUTPUT_ENABLE 0
+#endif
+#ifndef PB2_OUTPUT_ENABLE
+#define PB2_OUTPUT_ENABLE 0
+#endif
+#ifndef PB3_OUTPUT_ENABLE
+#define PB3_OUTPUT_ENABLE 0
+#endif
+#ifndef PB4_OUTPUT_ENABLE
+#define PB4_OUTPUT_ENABLE 0
+#endif
+#ifndef PB5_OUTPUT_ENABLE
+#define PB5_OUTPUT_ENABLE 0
+#endif
+#ifndef PB6_OUTPUT_ENABLE
+#define PB6_OUTPUT_ENABLE 0
+#endif
+#ifndef PB7_OUTPUT_ENABLE
+#define PB7_OUTPUT_ENABLE 0
+#endif
+//PB data strength
+#ifndef PB0_DATA_STRENGTH
+#define PB0_DATA_STRENGTH 1
+#endif
+#ifndef PB1_DATA_STRENGTH
+#define PB1_DATA_STRENGTH 1
+#endif
+#ifndef PB2_DATA_STRENGTH
+#define PB2_DATA_STRENGTH 1
+#endif
+#ifndef PB3_DATA_STRENGTH
+#define PB3_DATA_STRENGTH 1
+#endif
+#ifndef PB4_DATA_STRENGTH
+#define PB4_DATA_STRENGTH 1
+#endif
+#ifndef PB5_DATA_STRENGTH
+#define PB5_DATA_STRENGTH 1
+#endif
+#ifndef PB6_DATA_STRENGTH
+#define PB6_DATA_STRENGTH 1
+#endif
+#ifndef PB7_DATA_STRENGTH
+#define PB7_DATA_STRENGTH 1
+#endif
+//PB output data
+#ifndef PB0_DATA_OUT
+#define PB0_DATA_OUT 0
+#endif
+#ifndef PB1_DATA_OUT
+#define PB1_DATA_OUT 0
+#endif
+#ifndef PB2_DATA_OUT
+#define PB2_DATA_OUT 0
+#endif
+#ifndef PB3_DATA_OUT
+#define PB3_DATA_OUT 0
+#endif
+#ifndef PB4_DATA_OUT
+#define PB4_DATA_OUT 0
+#endif
+#ifndef PB5_DATA_OUT
+#define PB5_DATA_OUT 0
+#endif
+#ifndef PB6_DATA_OUT
+#define PB6_DATA_OUT 0
+#endif
+#ifndef PB7_DATA_OUT
+#define PB7_DATA_OUT 0
+#endif
+//PB function select
+#ifndef PB0_FUNC
+#define PB0_FUNC AS_GPIO
+#endif
+#ifndef PB1_FUNC
+#define PB1_FUNC AS_GPIO
+#endif
+#ifndef PB2_FUNC
+#define PB2_FUNC AS_GPIO
+#endif
+#ifndef PB3_FUNC
+#define PB3_FUNC AS_GPIO
+#endif
+#ifndef PB4_FUNC
+#define PB4_FUNC AS_GPIO
+#endif
+#ifndef PB5_FUNC
+#define PB5_FUNC AS_GPIO
+#endif
+#ifndef PB6_FUNC
+#define PB6_FUNC AS_GPIO
+#endif
+#ifndef PB7_FUNC
+#define PB7_FUNC AS_GPIO
+#endif
+//PB pull resistor
+#ifndef PULL_WAKEUP_SRC_PB0
+#define PULL_WAKEUP_SRC_PB0 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB1
+#define PULL_WAKEUP_SRC_PB1 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB2
+#define PULL_WAKEUP_SRC_PB2 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB3
+#define PULL_WAKEUP_SRC_PB3 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB4
+#define PULL_WAKEUP_SRC_PB4 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB5
+#define PULL_WAKEUP_SRC_PB5 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB6
+#define PULL_WAKEUP_SRC_PB6 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB7
+#define PULL_WAKEUP_SRC_PB7 0
+#endif
+
+/* PC ------------------------------------------------------------------------*/
+//PC Input Enable
+#ifndef PC0_INPUT_ENABLE
+#define PC0_INPUT_ENABLE 0
+#endif
+#ifndef PC1_INPUT_ENABLE
+#define PC1_INPUT_ENABLE 0
+#endif
+#ifndef PC2_INPUT_ENABLE
+#define PC2_INPUT_ENABLE 0
+#endif
+#ifndef PC3_INPUT_ENABLE
+#define PC3_INPUT_ENABLE 0
+#endif
+#ifndef PC4_INPUT_ENABLE
+#define PC4_INPUT_ENABLE 0
+#endif
+#ifndef PC5_INPUT_ENABLE
+#define PC5_INPUT_ENABLE 0
+#endif
+#ifndef PC6_INPUT_ENABLE
+#define PC6_INPUT_ENABLE 0
+#endif
+#ifndef PC7_INPUT_ENABLE
+#define PC7_INPUT_ENABLE 1 //SWS
+#endif
+
+//PC Output Enable
+#ifndef PC0_OUTPUT_ENABLE
+#define PC0_OUTPUT_ENABLE 0
+#endif
+#ifndef PC1_OUTPUT_ENABLE
+#define PC1_OUTPUT_ENABLE 0
+#endif
+#ifndef PC2_OUTPUT_ENABLE
+#define PC2_OUTPUT_ENABLE 0
+#endif
+#ifndef PC3_OUTPUT_ENABLE
+#define PC3_OUTPUT_ENABLE 0
+#endif
+#ifndef PC4_OUTPUT_ENABLE
+#define PC4_OUTPUT_ENABLE 0
+#endif
+#ifndef PC5_OUTPUT_ENABLE
+#define PC5_OUTPUT_ENABLE 0
+#endif
+#ifndef PC6_OUTPUT_ENABLE
+#define PC6_OUTPUT_ENABLE 0
+#endif
+#ifndef PC7_OUTPUT_ENABLE
+#define PC7_OUTPUT_ENABLE 0
+#endif
+
+//PC Data Strength
+#ifndef PC0_DATA_STRENGTH
+#define PC0_DATA_STRENGTH 1
+#endif
+#ifndef PC1_DATA_STRENGTH
+#define PC1_DATA_STRENGTH 1
+#endif
+#ifndef PC2_DATA_STRENGTH
+#define PC2_DATA_STRENGTH 1
+#endif
+#ifndef PC3_DATA_STRENGTH
+#define PC3_DATA_STRENGTH 1
+#endif
+#ifndef PC4_DATA_STRENGTH
+#define PC4_DATA_STRENGTH 1
+#endif
+#ifndef PC5_DATA_STRENGTH
+#define PC5_DATA_STRENGTH 1
+#endif
+#ifndef PC6_DATA_STRENGTH
+#define PC6_DATA_STRENGTH 1
+#endif
+#ifndef PC7_DATA_STRENGTH
+#define PC7_DATA_STRENGTH 1
+#endif
+
+//PC out data
+#ifndef PC0_DATA_OUT
+#define PC0_DATA_OUT 0
+#endif
+#ifndef PC1_DATA_OUT
+#define PC1_DATA_OUT 0
+#endif
+#ifndef PC2_DATA_OUT
+#define PC2_DATA_OUT 0
+#endif
+#ifndef PC3_DATA_OUT
+#define PC3_DATA_OUT 0
+#endif
+#ifndef PC4_DATA_OUT
+#define PC4_DATA_OUT 0
+#endif
+#ifndef PC5_DATA_OUT
+#define PC5_DATA_OUT 0
+#endif
+#ifndef PC6_DATA_OUT
+#define PC6_DATA_OUT 0
+#endif
+#ifndef PC7_DATA_OUT
+#define PC7_DATA_OUT 0
+#endif
+
+//PC default Function
+#ifndef PC0_FUNC
+#define PC0_FUNC AS_GPIO
+#endif
+#ifndef PC1_FUNC
+#define PC1_FUNC AS_GPIO
+#endif
+#ifndef PC2_FUNC
+#define PC2_FUNC AS_GPIO
+#endif
+#ifndef PC3_FUNC
+#define PC3_FUNC AS_GPIO
+#endif
+#ifndef PC4_FUNC
+#define PC4_FUNC AS_GPIO
+#endif
+#ifndef PC5_FUNC
+#define PC5_FUNC AS_GPIO
+#endif
+#ifndef PC6_FUNC
+#define PC6_FUNC AS_GPIO
+#endif
+#ifndef PC7_FUNC
+#define PC7_FUNC AS_SWS // SWS
+#endif
+
+//PC Pull-up/Pull-down Macro
+#ifndef PULL_WAKEUP_SRC_PC0
+#define PULL_WAKEUP_SRC_PC0 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC1
+#define PULL_WAKEUP_SRC_PC1 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC2
+#define PULL_WAKEUP_SRC_PC2 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC3
+#define PULL_WAKEUP_SRC_PC3 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC4
+#define PULL_WAKEUP_SRC_PC4 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC5
+#define PULL_WAKEUP_SRC_PC5 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC6
+#define PULL_WAKEUP_SRC_PC6 0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC7
+#define PULL_WAKEUP_SRC_PC7 PM_PIN_PULLUP_1M //SWS
+#endif
+
+#define PM_PIN_UP_DOWN_FLOAT 0x00
+#define PM_PIN_PULLUP_1M 0x01
+#define PM_PIN_PULLUP_10K 0x02
+#define PM_PIN_PULLDOWN_100K 0x03
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/i2c.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/i2c.c
new file mode 100644
index 0000000000000..008944fcd6d22
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/i2c.c
@@ -0,0 +1,417 @@
+/********************************************************************************************************
+ * @file i2c.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author peng.sun
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "clock.h"
+#include "i2c.h"
+#include "gpio.h"
+#include "common/string.h"
+#include "irq.h"
+
+/**
+ * @brief This function serves to select a pin port for I2C interface.
+ * @param[in] PinGrp - the pin port selected as I2C interface pin port.
+ * @return none
+ */
+void i2c_set_pin(I2C_GPIO_GroupTypeDef i2c_pin_group)
+{
+ GPIO_PinTypeDef sda, scl;
+
+ if(i2c_pin_group == I2C_GPIO_GROUP_M_A3A4){
+
+ scl = GPIO_PA3;
+ sda = GPIO_PA4;
+
+ }else if (i2c_pin_group ==I2C_GPIO_GROUP_M_A5A6 || i2c_pin_group ==I2C_GPIO_GROUP_S_A5A6 ){
+
+ scl = GPIO_PA5;
+ sda = GPIO_PA6;
+
+ }else if (i2c_pin_group ==I2C_GPIO_GROUP_M_B2B3){
+
+ scl = GPIO_PB2;
+ sda = GPIO_PB3;
+
+ }else if (i2c_pin_group ==I2C_GPIO_GROUP_M_B6B7){
+
+ scl = GPIO_PB6;
+ sda = GPIO_PB7;
+
+ }else if (i2c_pin_group ==I2C_GPIO_GROUP_M_C4C5 || i2c_pin_group ==I2C_GPIO_GROUP_S_C4C5 ){
+
+ scl = GPIO_PC5;
+ sda = GPIO_PC4;
+
+ }else if (i2c_pin_group ==I2C_GPIO_GROUP_S_A3A4){
+
+ scl = GPIO_PA4;
+ sda = GPIO_PA3;
+
+ }
+ else
+ { //ERR
+ sda = 0;
+ scl = 0;
+ }
+ gpio_setup_up_down_resistor(sda, PM_PIN_PULLUP_10K);
+ gpio_setup_up_down_resistor(scl, PM_PIN_PULLUP_10K);
+
+ if(i2c_pin_group ==I2C_GPIO_GROUP_M_A3A4 || i2c_pin_group ==I2C_GPIO_GROUP_M_A5A6 ||i2c_pin_group ==I2C_GPIO_GROUP_M_B2B3 ||i2c_pin_group ==I2C_GPIO_GROUP_M_B6B7 ||i2c_pin_group ==I2C_GPIO_GROUP_M_C4C5){
+
+ gpio_set_func(sda, AS_I2C_MSD); ///AS_GPIO
+ gpio_set_func(scl, AS_I2C_MCK);
+ }
+ else if (i2c_pin_group ==I2C_GPIO_GROUP_S_A3A4 || i2c_pin_group ==I2C_GPIO_GROUP_S_A5A6 || i2c_pin_group ==I2C_GPIO_GROUP_S_C4C5 ){
+
+ gpio_set_func(sda, AS_I2C_SD);
+ gpio_set_func(scl, AS_I2C_CK);
+ }
+ gpio_set_input_en(sda, 1);//enable sda input
+ gpio_set_input_en(scl, 1);//enable scl input
+
+}
+/**
+ * @brief This function set the id of slave device and the speed of I2C interface
+ * note: the param ID contain the bit of writting or reading.
+ * eg:the parameter 0x5C. the reading will be 0x5D and writting 0x5C.
+ * @param[in] SlaveID - the id of slave device.it contains write or read bit,the lsb is write or read bit.
+ * ID|0x01 indicate read. ID&0xfe indicate write.
+ * @param[in] DivClock - the division factor of I2C clock,
+ * I2C clock = System clock / (4*DivClock);if the datasheet you look at is 2*,pls modify it.
+ * @return none
+ */
+void i2c_master_init(unsigned char SlaveID, unsigned char DivClock)
+{
+ reg_i2c_speed = DivClock; //i2c clock = system_clock/(4*DivClock)
+ reg_i2c_id = SlaveID; //slave address
+ reg_i2c_mode |= FLD_I2C_MASTER_EN; //enable master mode
+
+ reg_clk_en0 |= FLD_CLK0_I2C_EN; //enable i2c clock
+ reg_spi_sp &= ~FLD_SPI_ENABLE; //force PADs act as I2C; i2c and spi share the hardware of IC
+
+}
+/**
+ * @brief the function config the ID of slave and mode of slave.
+ * @param[in] device_ID - it contains write or read bit,the lsb is write or read bit.
+ * ID|0x01 indicate read. ID&0xfe indicate write.
+ * @param[in] mode - set slave mode. slave has two modes, one is DMA mode, the other is MAPPING mode.
+ * @param[in] pBuf - if slave mode is MAPPING, set the first address of buffer master write or read slave.
+ * @return none
+ */
+void i2c_slave_init(unsigned char device_ID,I2C_SlaveMode mode,unsigned char * pMapBuf)
+{
+ reg_i2c_slave_id = device_ID; //slave device id
+
+
+ reg_clk_en0 |= FLD_CLK0_I2C_EN; //enable i2c clock
+ reg_spi_sp &= ~FLD_SPI_ENABLE; //force PADs act as I2C; i2c and spi share the hardware of IC
+
+
+ reg_i2c_mode &= (~FLD_I2C_MASTER_EN); //enable slave mode
+ //notice that: both dma and mapping mode need this to trigger data address auto increase(confirmed by congqing and sihui)
+ reg_i2c_mode |= FLD_I2C_ADDR_AUTO_INC ;
+
+ if(mode == I2C_SLAVE_MAP){
+ reg_i2c_mode |= FLD_I2C_SLAVE_MAPPING ;
+ reg_i2c_slave_map_addr = (unsigned int) pMapBuf & 0xffff;
+ }
+ else{
+ reg_i2c_mode &= ~FLD_I2C_SLAVE_MAPPING;
+ }
+}
+
+/**
+ * @brief This function serves to write one byte to the slave device at the specified address
+ * @param[in] Addr - i2c slave address where the one byte data will be written
+ * @param[in] AddrLen - length in byte of the address, which makes this function is
+ * compatible for slave device with both one-byte address and two-byte address
+ * @param[in] Data - the one byte data will be written via I2C interface
+ * @return none
+ */
+void i2c_dma_write_byte(unsigned int Addr, unsigned int AddrLen, unsigned char Data)
+{
+
+ reg_i2c_id &= (~FLD_I2C_WRITE_READ_BIT); //SlaveID & 0xfe,.i.e write data. R:High W:Low
+
+ //start + id(Write) + address
+
+ if (AddrLen == 1) {
+ reg_i2c_adr = (unsigned char)Addr;; //address
+ //lanuch start /id/04 start
+ reg_i2c_ctrl = (FLD_I2C_CMD_ID | FLD_I2C_CMD_ADDR | FLD_I2C_CMD_START);
+ }
+ else if (AddrLen == 2) {
+ reg_i2c_adr = (unsigned char)(Addr>>8); //address high
+ reg_i2c_do = (unsigned char)Addr; //address low
+ //lanuch start /id/04/05 start
+ reg_i2c_ctrl = (FLD_I2C_CMD_ID | FLD_I2C_CMD_ADDR | FLD_I2C_CMD_DO | FLD_I2C_CMD_START);
+ }
+
+ while(reg_i2c_status & FLD_I2C_CMD_BUSY );
+
+ //write data
+ reg_i2c_di = Data;
+ reg_i2c_ctrl = FLD_I2C_CMD_DI; //launch data read cycle
+ while(reg_i2c_status & FLD_I2C_CMD_BUSY );
+ //stop
+ reg_i2c_ctrl = FLD_I2C_CMD_STOP; //launch stop cycle
+ while(reg_i2c_status & FLD_I2C_CMD_BUSY );
+
+}
+/**
+ * @brief This function serves to read one byte from the slave device at the specified address
+ * @param[in] Addr - i2c slave address where the one byte data will be read
+ * @param[in] AddrLen - length in byte of the address, which makes this function is
+ * compatible for slave device with both one-byte address and two-byte address
+ * @return the one byte data read from the slave device via I2C interface
+ */
+unsigned char i2c_dma_read_byte(unsigned int Addr, unsigned int AddrLen)
+{
+ unsigned char ret = 0;
+ reg_i2c_id &= (~FLD_I2C_WRITE_READ_BIT); //SlaveID & 0xfe,.i.e write data. R:High W:Low
+
+
+ //start + id(Write) + address
+
+ if (AddrLen == 1) {
+ reg_i2c_adr = (unsigned char)Addr;; //address
+ //lanuch start /id/04 start
+ reg_i2c_ctrl = (FLD_I2C_CMD_ID | FLD_I2C_CMD_ADDR | FLD_I2C_CMD_START);
+ }
+ else if (AddrLen == 2) {
+ reg_i2c_adr = (unsigned char)(Addr>>8); //address high
+ reg_i2c_do = (unsigned char)Addr; //address low
+ //lanuch start /id/04/05 start
+ reg_i2c_ctrl = (FLD_I2C_CMD_ID | FLD_I2C_CMD_ADDR | FLD_I2C_CMD_DO | FLD_I2C_CMD_START);
+ }
+
+ while(reg_i2c_status & FLD_I2C_CMD_BUSY );
+
+ //start + id(Read)
+ reg_i2c_id |= FLD_I2C_WRITE_READ_BIT; //SlaveID & 0xfe,.i.e write data. Read:High Write:Low
+ reg_i2c_ctrl = (FLD_I2C_CMD_ID | FLD_I2C_CMD_START);
+ while(reg_i2c_status & FLD_I2C_CMD_BUSY );
+
+ //read data
+ reg_i2c_ctrl = (FLD_I2C_CMD_DI | FLD_I2C_CMD_READ_ID | FLD_I2C_CMD_ACK);
+ while(reg_i2c_status & FLD_I2C_CMD_BUSY );
+ ret = reg_i2c_di;
+
+ //stop
+ reg_i2c_ctrl = FLD_I2C_CMD_STOP; //launch stop cycle
+ while(reg_i2c_status & FLD_I2C_CMD_BUSY );
+
+ return ret;
+}
+
+/**
+ * @brief This function serves to write a packet of data to the specified address of slave device
+ * @param[in] Addr - the register that master write data to slave in. support one byte and two bytes. i.e param2 AddrLen may be 1 or 2.
+ * @param[in] AddrLen - the length of register. enum 0 or 1 or 2 or 3. based on the spec of i2c slave.
+ * @param[in] dataBuf - the first SRAM buffer address to write data to slave in.
+ * @param[in] dataLen - the length of data master write to slave.
+ * @return none
+ */
+void i2c_dma_write_buff (unsigned int Addr, unsigned int AddrLen, unsigned char * dataBuf, int dataLen)
+{
+ reg_i2c_id &= (~FLD_I2C_WRITE_READ_BIT); //SlaveID & 0xfe,.i.e write data. R:High W:Low
+
+ //start + id(Write) + address
+
+ if (AddrLen == 1) {
+ reg_i2c_adr = (unsigned char)Addr;; //address
+ //lanuch start /id/04 start
+ reg_i2c_ctrl = (FLD_I2C_CMD_ID | FLD_I2C_CMD_ADDR | FLD_I2C_CMD_START);
+ }
+ else if (AddrLen == 2) {
+ reg_i2c_adr = (unsigned char)(Addr>>8); //address high
+ reg_i2c_do = (unsigned char)Addr; //address low
+ //lanuch start /id/04/05 start
+ reg_i2c_ctrl = (FLD_I2C_CMD_ID | FLD_I2C_CMD_ADDR | FLD_I2C_CMD_DO | FLD_I2C_CMD_START);
+ }
+
+ while(reg_i2c_status & FLD_I2C_CMD_BUSY );
+
+ //write data
+ unsigned int buff_index = 0;
+ for(buff_index=0;buff_index>8); //address high
+ reg_i2c_do = (unsigned char)Addr; //address low
+ //lanuch start /id/04/05 start
+ reg_i2c_ctrl = (FLD_I2C_CMD_ID | FLD_I2C_CMD_ADDR | FLD_I2C_CMD_DO | FLD_I2C_CMD_START);
+ }
+
+ while(reg_i2c_status & FLD_I2C_CMD_BUSY );
+
+ //start + id(Read)
+ reg_i2c_id |= FLD_I2C_WRITE_READ_BIT; //SlaveID & 0xfe,.i.e write data. Read:High Write:Low
+ reg_i2c_ctrl = (FLD_I2C_CMD_ID | FLD_I2C_CMD_START);
+ while(reg_i2c_status & FLD_I2C_CMD_BUSY );
+
+
+ //read data
+ unsigned int bufIndex = 0;
+
+ dataLen--; //the length of reading data must larger than 0
+ //if not the last byte master read slave, master wACK to slave
+ while(dataLen){ //
+ reg_i2c_ctrl = (FLD_I2C_CMD_DI | FLD_I2C_CMD_READ_ID);
+ while(reg_i2c_status & FLD_I2C_CMD_BUSY );
+ dataBuf[bufIndex] = reg_i2c_di;
+ bufIndex++;
+ dataLen--;
+ }
+ //when the last byte, master will ACK to slave
+ reg_i2c_ctrl = (FLD_I2C_CMD_DI | FLD_I2C_CMD_READ_ID |FLD_I2C_CMD_ACK);
+ while(reg_i2c_status & FLD_I2C_CMD_BUSY );
+ dataBuf[bufIndex] = reg_i2c_di;
+
+ //termiante
+ reg_i2c_ctrl = FLD_I2C_CMD_STOP; //launch stop cycle
+ while(reg_i2c_status & FLD_I2C_CMD_BUSY );
+
+}
+
+/**
+ * @brief This function serves to write a packet of data to slave device working in mapping mode
+ * @param[in] dataBuf - the first SRAM buffer address to write data to slave in.
+ * @param[in] dataLen - the length of data master write to slave.
+ * @return none
+ */
+void i2c_map_write_buff(unsigned char * dataBuf, int dataLen)
+{
+ reg_i2c_id &= (~FLD_I2C_WRITE_READ_BIT); //SlaveID & 0xfe,.i.e write data. R:High W:Low
+
+ //lanuch start /id start
+ reg_i2c_ctrl = (FLD_I2C_CMD_ID | FLD_I2C_CMD_START );
+ while(reg_i2c_status & FLD_I2C_CMD_BUSY );
+
+ //write data
+ unsigned int buff_index = 0;
+ for(buff_index=0;buff_index>8)<<3)) &= ~(DEBUG_TX_PIN & 0xff) ;//Enable output
+
+ u32 pcTxReg = (0x583+((DEBUG_TX_PIN>>8)<<3));//register GPIO output level
+ u8 tmp_bit0 = read_reg8(pcTxReg) & (~(DEBUG_TX_PIN & 0xff));
+ u8 tmp_bit1 = read_reg8(pcTxReg) | (DEBUG_TX_PIN & 0xff);
+
+ u8 bit[10] = {0};
+ bit[0] = tmp_bit0;
+ bit[1] = (byte & 0x01)? tmp_bit1 : tmp_bit0;
+ bit[2] = ((byte>>1) & 0x01)? tmp_bit1 : tmp_bit0;
+ bit[3] = ((byte>>2) & 0x01)? tmp_bit1 : tmp_bit0;
+ bit[4] = ((byte>>3) & 0x01)? tmp_bit1 : tmp_bit0;
+ bit[5] = ((byte>>4) & 0x01)? tmp_bit1 : tmp_bit0;
+ bit[6] = ((byte>>5) & 0x01)? tmp_bit1 : tmp_bit0;
+ bit[7] = ((byte>>6) & 0x01)? tmp_bit1 : tmp_bit0;
+ bit[8] = ((byte>>7) & 0x01)? tmp_bit1 : tmp_bit0;
+ bit[9] = tmp_bit1;
+
+ //ע�⣺�˴��Ĺر����жϣ�����Ӱ��Ӧ�ò㡣���Dz����жϣ�һ���������жϾͻ�Ӱ�����ݷ���.��ҪȨ��
+ //u8 r = irq_disable();
+ t1 = reg_system_tick;
+ for(j = 0;j<10;j++)
+ {
+ t2 = t1;
+ while(t1 - t2 < BIT_INTERVAL){
+ t1 = reg_system_tick;
+ }
+ write_reg8(pcTxReg,bit[j]); //send bit0
+ }
+ //irq_restore(r);
+}
+#endif
+
+//the chip of Hawk serial Chip have no USB module.
+int putchar(int c)
+{
+ #if(SIMULATE_UART_EN)
+ uart_put_char(c);
+ #else
+ //uart_ndma_send_byte(c);
+ #endif
+ return c;
+}
+
+#endif
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/putchar.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/putchar.h
new file mode 100644
index 0000000000000..2855c7dc0b909
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/putchar.h
@@ -0,0 +1,45 @@
+/********************************************************************************************************
+ * @file putchar.h
+ *
+ * @brief This is the header file for TLSR8233
+ *
+ * @author junwei.lu
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include "driver_config.h"
+#include "common/config/user_config.h"
+
+#ifndef WIN32
+
+#ifndef SIMULATE_UART_EN
+ #define SIMULATE_UART_EN 0
+#endif
+
+#ifndef DEBUG_TX_PIN
+ #define DEBUG_TX_PIN GPIO_PB4
+#endif
+
+#ifndef DEBUG_BAUDRATE
+ #define DEBUG_BAUDRATE (115200)
+#endif
+
+int putchar(int c);
+
+#endif
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/pwm.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/pwm.h
new file mode 100644
index 0000000000000..eeb75040db199
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/pwm.h
@@ -0,0 +1,351 @@
+/********************************************************************************************************
+ * @file pwm.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author junyuan.zhang
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#ifndef PWM_H_
+#define PWM_H_
+
+#include "register.h"
+#include "clock.h"
+
+typedef enum {
+ PWM0_ID = 0x00,
+ PWM1_ID,
+ PWM2_ID,
+}pwm_id;
+
+/**
+ * @brief enum variable used for PWM work mode setting
+ */
+typedef enum{
+ PWM_NORMAL_MODE = 0x00,
+ PWM_COUNT_MODE = 0x01,
+ PWM_IR_MODE = 0x03,
+ PWM_IR_FIFO_MODE = 0x07,
+ PWM_IR_DMA_FIFO_MODE = 0x0F,
+}pwm_mode;
+
+/**
+ * @brief pwm interrupt source
+ */
+typedef enum{
+ PWM_IRQ_PWM0_PNUM = BIT(0),
+ PWM_IRQ_PWM0_IR_DMA_FIFO_DONE = BIT(1),
+ PWM_IRQ_PWM0_FRAME = BIT(2),
+ PWM_IRQ_PWM1_FRAME = BIT(3),
+ PWM_IRQ_PWM2_FRAME = BIT(4),
+}PWM_IRQ;
+
+
+/**
+ * @brief This function servers to set pwm mode.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] mode - variable of enum to indicates the pwm mode.
+ * @return none.
+ */
+static inline void pwm_set_mode(pwm_id id, pwm_mode mode)
+{
+ if(PWM0_ID == id){
+ reg_pwm0_mode = mode; //only PWM0 has count/IR/fifo IR mode
+ }
+}
+
+/**
+ * @brief This function servers to set pwm clock frequency
+ * @param[in] system_clock_hz - variable to set system clock hz.
+ * @param[in] pwm_clk - variable of the pwm clock.
+ * @return none.
+ */
+static inline void pwm_set_clk(int system_clock_hz, int pwm_clk){
+ reg_pwm_clk = (int)system_clock_hz /pwm_clk - 1;
+}
+
+
+/**
+ * @brief This function servers to set pwm count status(CMP) time.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] cmp_tick - variable of the CMP.
+ * @return none.
+ */
+static inline void pwm_set_cmp(pwm_id id, unsigned short cmp_tick){
+ reg_pwm_cmp(id) = cmp_tick;
+}
+
+/**
+ * @brief This function servers to set pwm cycle time.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] cycle_tick - variable of the cycle time.
+ * @return none.
+ */
+static inline void pwm_set_cycle(pwm_id id, unsigned short cycle_tick){
+ reg_pwm_max(id) = cycle_tick;
+}
+
+/**
+ * @brief This function servers to set pwm cycle time & count status.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] cycle_tick - variable of the cycle time.
+ * @param[in] cmp_tick - variable of the CMP.
+ * @return none.
+ */
+static inline void pwm_set_cycle_and_duty(pwm_id id, unsigned short cycle_tick, unsigned short cmp_tick){
+ reg_pwm_cycle(id) = MASK_VAL(FLD_PWM_CMP, cmp_tick, FLD_PWM_MAX, cycle_tick);
+}
+
+
+/**
+ * @brief This function servers to set pwm0 cycle time & count status.
+ * @param[in] cycle_tick - variable of the cycle time.
+ * @param[in] cmp_tick - variable of the CMP.
+ * @return none.
+ */
+static inline void pwm_set_pwm0_shadow_cycle_and_duty(unsigned short cycle_tick, unsigned short cmp_tick)
+{
+ reg_pwm_tcmp0_shadow = cmp_tick;
+ reg_pwm_tmax0_shadow = cycle_tick;
+}
+
+
+
+/**
+ * @brief This function servers to set the pwm pulse number.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] pulse_num - variable of the pwm pulse number.
+ * @return none.
+ */
+static inline void pwm_set_pulse_num(pwm_id id, unsigned short pulse_num)
+{
+ if(PWM0_ID == id)
+ {
+ reg_pwm_pulse_num = pulse_num;
+ }
+}
+
+/**
+ * @brief This function servers to start the pwm.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @return none.
+ */
+static inline void pwm_start(pwm_id id){
+ BM_SET(reg_pwm_enable, BIT(id));
+}
+
+
+/**
+ * @brief This function servers to stop the pwm.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @return none.
+ */
+static inline void pwm_stop(pwm_id id){
+ BM_CLR(reg_pwm_enable, BIT(id));
+}
+
+/**
+ * @brief This function servers to revert the PWMx.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @return none.
+ */
+static inline void pwm_revert(pwm_id id){
+ reg_pwm_invert |= BIT(id);
+}
+
+/**
+ * @brief This function servers to revert the PWMx_N.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @return none.
+ */
+static inline void pwm_n_revert(pwm_id id){
+ reg_pwm_n_invert |= BIT(id);
+}
+
+/**
+ * @brief This function servers to enable the pwm polarity.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] en: 1 enable. 0 disable.
+ * @return none.
+ */
+static inline void pwm_polo_enable(pwm_id id, int polarity){
+ if(polarity == 0){
+ BM_SET(reg_pwm_pol, BIT(id));//First low level.
+ }else{
+ BM_CLR(reg_pwm_pol, BIT(id));//First high level.
+ }
+}
+
+/**
+ * @brief This function servers to enable the pwm interrupt.
+ * @param[in] PWM_IRQ - variable of enum to select the pwm interrupt source.
+ * @return none.
+ */
+static inline void pwm_set_interrupt_enable(PWM_IRQ irq){
+ BM_SET(reg_pwm_irq_mask, irq);
+}
+
+/**
+ * @brief This function servers to disable the pwm interrupt.
+ * @param[in] PWM_IRQ - variable of enum to select the pwm interrupt source.
+ * @return none.
+ */
+static inline void pwm_interrupt_disable(PWM_IRQ irq){
+ BM_CLR(reg_pwm_irq_mask, irq);
+}
+
+/**
+ * @brief This function servers to clear the pwm interrupt.
+ * @param[in] PWM_IRQ - variable of enum to select the pwm interrupt source.
+ * @return none.
+ */
+static inline void pwm_clear_irq_status(PWM_IRQ irq)
+{
+ reg_pwm_irq_sta = irq;
+}
+
+
+
+
+
+
+
+/**********************************************************************************************
+ *
+ * PWM FIFO DMA MODE
+ *
+ *********************************************************************************************/
+
+typedef enum{
+ PWM0_PULSE_NORMAL = 0, // duty cycle and period from TCMP0/TMAX0 0x794~0x797
+ PWM0_PULSE_SHADOW = BIT(14), // duty cycle and period from TCMP0_SHADOW / TMAX0_SHADOW 0x7c4~0x7c7
+}Pwm0Pulse_SelectDef;
+
+
+/**
+ * @brief This function servers to config the pwm's dma wave form.
+ * @param[in] carrier_en - must 1 or 0.
+ * @param[in] Pwm0Pulse_SelectDef - type of pwm0's pulse.
+ * @param[in] pulse_num - the number of pulse.
+ * @return none.
+ */
+static inline unsigned short pwm_config_dma_fifo_waveform(int carrier_en, Pwm0Pulse_SelectDef pulse, unsigned short pulse_num)
+{
+ return ( carrier_en<<15 | pulse | (pulse_num & 0x3fff) );
+}
+
+
+/**
+ * @brief This function servers to set the pwm's dma address.
+ * @param[in] pdat - variable of pointer to indicate the address.
+ * @return none.
+ */
+static inline void pwm_set_dma_address(void * pdat)
+{
+ reg_dma_pwm_addr = (unsigned short)((unsigned int)pdat);
+ reg_dma_pwm_mode &= ~FLD_DMA_1WR_0RD_MEM;
+}
+
+/**
+ * @brief This function servers to start the pwm's IRQ sending.
+ * @param[in] none.
+ * @return none.
+ */
+static inline void pwm_start_dma_ir_sending(void)
+{
+ reg_dma_chn_en |= FLD_DMA_CHN_PWM;
+ reg_dma_tx_rdy0 |= FLD_DMA_CHN_PWM;
+}
+
+/**
+ * @brief This function servers to stop the pwm's IRQ sending.
+ * @param[in] none.
+ * @return none.
+ */
+static inline void pwm_stop_dma_ir_sending(void)
+{
+// reg_dma_tx_rdy0 &= ~FLD_DMA_PWM;
+
+ reg_rst0 = FLD_RST1_PWM;
+ sleep_us(20); //1us <-> 4 byte
+ reg_rst0 = 0;
+}
+
+
+////////////////////////////////////////////////////////
+////////////////////////////////////////////////////////
+
+/**
+ * @brief This function serves to set trigger level of interrupt for IR FiFo mode
+ * @param[in] none
+ * @return none
+ */
+static inline void pwm_ir_fifo_set_irq_trig_level(unsigned char trig_level)
+{
+ reg_pwm_ir_fifo_irq_trig_level = trig_level;
+}
+
+/**
+ * @brief This function serves to get the number of data in fifo.
+ * @param[in] none
+ * @return the number of data in fifo
+ */
+static inline unsigned char pwm_ir_fifo_get_data_num(void)
+{
+ return (reg_pwm_ir_fifo_data_status&FLD_PWM0_IR_FIFO_DATA_NUM);
+}
+
+/**
+ * @brief This function serves to determine whether data in fifo is empty.
+ * @param[in] none
+ * @return yes: 1 ,no: 0;
+ */
+static inline unsigned char pwm_ir_fifo_is_empty(void)
+{
+ return (reg_pwm_ir_fifo_data_status&FLD_PWM0_IR_FIFO_EMPTY);
+}
+
+/**
+ * @brief This function serves to determine whether data in fifo is full.
+ * @param[in] none
+ * @return yes: 1 ,no: 0;
+ */
+static inline unsigned char pwm_ir_fifo_is_full(void)
+{
+ return (reg_pwm_ir_fifo_data_status&FLD_PWM0_IR_FIFO_FULL);
+}
+
+/**
+ * @brief This function serves to write data into FiFo
+ * @param[in] pulse_num - the number of pulse
+ * @param[in] use_shadow - determine whether the configuration of shadow cmp and shadow max is used
+ * 1: use shadow, 0: not use
+ * @param[in] carrier_en - enable sending carrier, 1: enable, 0: disable
+ * @return none
+ */
+static inline void pwm_ir_fifo_set_data_entry(unsigned short pulse_num, unsigned char use_shadow, unsigned char carrier_en)
+{
+ static unsigned char index=0;
+ unsigned short cfg_data = pulse_num + ((use_shadow&BIT(0))<<14) + ((carrier_en&BIT(0))<<15);
+ while(pwm_ir_fifo_is_full());
+ reg_pwm_ir_fifo_dat(index) = cfg_data;
+ index++;
+ index&=0x01;
+}
+
+
+#endif /* PWM_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/random.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/random.h
new file mode 100644
index 0000000000000..907475a2ad311
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/random.h
@@ -0,0 +1,49 @@
+/********************************************************************************************************
+ * @file random.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author junyuna.zhang
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "compiler.h"
+
+/**
+ * @brief This function performs to preparatory initials random generator.
+ * @param[in] none.
+ * @return none.
+ */
+
+void random_generator_init(void);
+
+/**
+ * @brief This function performs to initialize the rand time in flash/sram.
+ * (example: system clock:16M, code in flash 23us, code in sram 4us)
+ * @param[in] none.
+ * @return the value of time.
+ */
+_attribute_ram_code_ unsigned int rand(void);
+
+/**
+ * @brief generate random number
+ * @param[in] len - length of buffer
+ * @param[out] data - buffer
+ * @return none
+ */
+void generateRandomNum(int len, unsigned char *data);
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/register.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/register.h
new file mode 100644
index 0000000000000..117939c6b1c84
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/register.h
@@ -0,0 +1,1424 @@
+/********************************************************************************************************
+ * @file register.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#if(__TL_LIB_5316__ || MCU_CORE_TYPE == MCU_CORE_5316)
+
+#pragma once
+
+#include "bsp.h"
+
+#if defined(__cplusplus)
+ extern "C" {
+#endif
+
+
+/*----------------------------------------------------------------------------*/
+/*------- IIC register define --------*/
+/*----------------------------------------------------------------------------*/
+#define reg_i2c_set REG_ADDR32(0x00)
+#define reg_i2c_speed REG_ADDR8(0x00)
+#define reg_i2c_id REG_ADDR8(0x01)//I2C Master device Id
+#define reg_i2c_slave_id REG_ADDR8(0x28)//I2C Slave device Id
+enum //Use for "reg_i2c_id" and "reg_i2c_slave_id"
+{
+ FLD_I2C_WRITE_READ_BIT = BIT(0),
+ FLD_I2C_ID = BIT_RNG(1,7),
+};
+
+#define reg_i2c_status REG_ADDR8(0x02)
+enum
+{
+ FLD_I2C_CMD_BUSY = BIT(0),
+ FLD_I2C_BUS_BUSY = BIT(1),
+ FLD_I2C_NAK = BIT(2),
+};
+
+#define reg_i2c_mode REG_ADDR8(0x03)
+enum
+{
+ FLD_I2C_ADDR_AUTO_INC = BIT(0),
+ FLD_I2C_MASTER_EN = BIT(1),//1:Enable master.
+ FLD_I2C_SLAVE_MAPPING = BIT(2),//1:Mapping mode;0:DMA mode.
+ FLD_I2C_HOLD_MASTER = BIT(3),
+ FLD_I2C_SLAVE_EN = BIT(4),//1:Enable slave.
+};
+
+#define reg_i2c_adr_dat REG_ADDR16(0x04)
+#define reg_i2c_dat_ctrl REG_ADDR32(0x04)
+#define reg_i2c_di_ctrl REG_ADDR16(0x06)
+#define reg_i2c_adr REG_ADDR8(0x04)
+#define reg_i2c_do REG_ADDR8(0x05)
+#define reg_i2c_di REG_ADDR8(0x06)
+#define reg_i2c_ctrl REG_ADDR8(0x07)
+enum //Use for "reg_i2c_ctrl"
+{
+ FLD_I2C_CMD_ID = BIT(0),
+ FLD_I2C_CMD_ADDR = BIT(1),
+ FLD_I2C_CMD_DO = BIT(2),
+ FLD_I2C_CMD_DI = BIT(3),
+ FLD_I2C_CMD_START = BIT(4),
+ FLD_I2C_CMD_STOP = BIT(5),
+ FLD_I2C_CMD_READ_ID = BIT(6),
+ FLD_I2C_CMD_ACK = BIT(7),
+};
+
+#define reg_i2c_slave_irq_status REG_ADDR8(0x21)
+#define reg_spi_slave_irq_status REG_ADDR8(0x21)
+enum{
+ FLD_HOST_CMD_IRQ = BIT(0), ///both host read & write can trigger this interrupt
+ FLD_HOST_READ_IRQ = BIT(1), ///just host read can trigger this interrupt.
+};
+
+#define reg_i2c_slave_map_addr REG_ADDR16(0x22)
+#define reg_i2c_slave_id REG_ADDR8(0x28)//I2C Slave device Id
+
+/*----------------------------------------------------------------------------*/
+/*------- SPI register define --------*/
+/*----------------------------------------------------------------------------*/
+#define reg_spi_data REG_ADDR8(0x08)
+#define reg_spi_ctrl REG_ADDR8(0x09)
+enum
+{
+ FLD_SPI_CS = BIT(0),
+ FLD_SPI_MASTER_MODE_EN = BIT(1),
+ FLD_SPI_DATA_OUT_DIS = BIT(2),
+ FLD_SPI_RD = BIT(3),
+ FLD_SPI_ADDR_AUTO_EN = BIT(4),
+ FLD_SPI_SHARE_MODE = BIT(5),
+ FLD_SPI_SLAVE_EN = BIT(6),
+ FLD_SPI_BUSY = BIT(7),
+};
+
+#define reg_spi_sp REG_ADDR8(0x0a)
+enum{
+ FLD_MASTER_SPI_CLK = BIT_RNG(0,6),
+ FLD_SPI_ENABLE = BIT(7),
+};
+
+#define reg_spi_inv_clk REG_ADDR8(0x0b)
+enum {
+ FLD_SPI_MODE_WORK_MODE = BIT_RNG(0,1),
+};
+
+
+/*----------------------------------------------------------------------------*/
+/*------- MSPI(Memory SPI) register define --------*/
+/*----------------------------------------------------------------------------*/
+#define reg_master_spi_data REG_ADDR8(0x0c)
+#define reg_master_spi_ctrl REG_ADDR8(0x0d)
+enum //Use for "reg_master_spi_ctrl"
+{
+ FLD_MASTER_SPI_CS = BIT(0),
+ FLD_MASTER_SPI_SDO = BIT(1),
+ FLD_MASTER_SPI_CONT = BIT(2),
+ FLD_MASTER_SPI_RD = BIT(3),
+ FLD_MASTER_SPI_BUSY = BIT(4),
+};
+
+#define reg_mspi_mode REG_ADDR8(0x0f)
+enum
+{
+ FLD_MSPI_Mode_Dual_Data = BIT(0),
+ FLD_MSPI_Mode_Dual_Addr = BIT(1),
+ FLD_MSPI_Speed = BIT_RNG(2,7),
+};
+
+
+/****************************************************
+ otp regs struct: begin addr : 0x10
+ *****************************************************/
+#define reg_otp_addr_para REG_ADDR16(0x10)
+enum{
+ FLD_OTP_PARA_ADDR = BIT_RNG(0,12),
+ FLD_OTP_PARA_PTM = BIT_RNG(13,15),
+};
+
+#define reg_otp_ctrl REG_ADDR8(0x12)
+enum{
+ FLD_OTP_CTRL_PCEN = BIT(0),
+ FLD_OTP_FAST_CLK = BIT(1),
+ FLD_OTP_OEN = BIT(2),
+ FLD_OTP_CLK = BIT(3),
+ FLD_OTP_PCEN_PWDN = BIT(4),
+ FLD_OTP_WEN_PWDN = BIT(5),
+ FLD_OTP_OEN_PWDN = BIT(6),
+ FLD_OTP_CLK_PWDN = BIT(7),
+};
+
+#define reg_otp_byte_dat REG_ADDR8(0x13)
+#define reg_otp_dat REG_ADDR32(0x14)
+#define reg_otp_blk_code REG_ADDR8(0x18)
+
+
+/*----------------------------------------------------------------------------*/
+/*------ Reset And Clock register define ------*/
+/*----------------------------------------------------------------------------*/
+#define reg_rst0 REG_ADDR8(0x60)
+enum{
+ FLD_RST0_SPI = BIT(0),
+ FLD_RST0_I2C = BIT(1),
+ FLD_RST0_MCU = BIT(4),
+ FLD_RST0_AIF = BIT(6),
+ FLD_RST0_ZB = BIT(7),
+};
+
+#define reg_rst1 REG_ADDR8(0x61)
+enum{
+ FLD_RST1_SYS_TIMER = BIT(0),
+ FLD_RST1_ALGM = BIT(1),
+ FLD_RST1_DMA = BIT(2),
+ FLD_RST1_RS232 = BIT(3),
+ FLD_RST1_PWM = BIT(4),
+ FLD_RST1_AES = BIT(5),
+ FLD_RST1_SWIRE = BIT(7),
+};
+
+#define reg_rst2 REG_ADDR8(0x62)
+enum{
+ FLD_RST2_ADC = BIT(3),
+ FLD_RST2_MCIC = BIT(4),
+ FLD_RST2_SOFT = BIT(5),
+};
+
+
+#define reg_clk_en0 REG_ADDR8(0x63)
+enum{
+ FLD_CLK0_SPI_EN = BIT(0), // 31 uA
+ FLD_CLK0_I2C_EN = BIT(1), // 36 uA
+ FLD_CLK0_HOSTIRQ_EN = BIT(2), // 11 uA
+ FLD_CLK0_MCU_EN = BIT(4),
+ FLD_CLK0_FPU_EN = BIT(5),
+ FLD_CLK0_AIF_EN = BIT(6),
+ FLD_CLK0_ZB_EN = BIT(7), // 140 uA
+
+};
+
+#define reg_clk_en1 REG_ADDR8(0x64)
+enum{
+ FLD_CLK1_SYS_TIMER_EN = BIT(0),
+ FLD_CLK1_ALGM_EN = BIT(1),
+ FLD_CLK1_DMA_EN = BIT(2),
+ FLD_CLK1_RS232_EN = BIT(3), // 77uA
+ FLD_CLK1_PWM_EN = BIT(4), // 65 uA
+ FLD_CLK1_AES_EN = BIT(5),
+ FLD_CLK1_32K_CLK_EN = BIT(6),
+ FLD_CLK1_SWIRE_EN = BIT(7),
+
+};
+
+#define reg_clk_en2 REG_ADDR8(0x65)
+enum{
+ FLD_CLK2_32K_QDEC_EN = BIT(0), // 20uA
+
+ FLD_CLK2_MCIC_EN = BIT(4), // add 900uA
+ FLD_CLK2_QDEC_EN = BIT(5), // 18 uA
+};
+
+#define reg_clk_sel REG_ADDR8(0x66)
+enum{
+ FLD_CLK_SEL_FHS_DIV = BIT_RNG(0,4),
+ FLD_CLK_SEL_SYS_CLK_SRC_SEL = BIT_RNG(5,6),
+ FLD_CLK_SEL_FHS_CLK_SRC_SEL = BIT(7),
+};
+
+#define reg_fhs_sel REG_ADDR8(0x70)
+enum{
+ FLD_FHS_SEL = BIT(0),
+};
+
+#define reg_wakeup_en REG_ADDR8(0x6e)
+enum{
+
+ //Digital wake-up source.
+ FLD_WAKEUP_SRC_GPIO = BIT(3),
+ FLD_WAKEUP_SRC_QDEC = BIT(4),
+ FLD_WAKEUP_SRC_RST_SYS = BIT(7),
+};
+
+#define reg_pwdn_ctrl REG_ADDR8(0x6f)
+enum
+{
+ FLD_PWDN_CTRL_REBOOT = BIT(5),
+ FLD_PWDN_CTRL_SLEEP = BIT(7),
+};
+
+/* RESET and CLKEN register bit define. --------------------------------------*/
+
+/* RST0 register bit define. */
+typedef union
+{
+ unsigned char All;
+ struct
+ {
+ unsigned char SPI_Bit :1;
+ unsigned char I2C_Bit :1;
+ unsigned char :1;
+ unsigned char :1;
+ unsigned char MCU_Bit :1;
+ unsigned char :1;
+ unsigned char AIF_Bit :1;
+ unsigned char ZB_Bit :1;
+ }Bit;
+}RST0_Type;
+
+/* RST1 register bit define. */
+typedef union
+{
+ unsigned char All;
+ struct
+ {
+ unsigned char SysTimer_16M_Bit :1;
+ unsigned char ALGM_Bit :1;
+ unsigned char DMA_Bit :1;
+ unsigned char UART_Bit :1;
+ unsigned char PWM_Bit :1;
+ unsigned char AES_Bit :1;
+ unsigned char :1;
+ unsigned char SWS_Bit :1;
+ }Bit;
+}RST1_Type;
+
+/* RST2 register bit define. */
+typedef union
+{
+ unsigned char All;
+ struct
+ {
+ unsigned char :1;
+ unsigned char :1;
+ unsigned char :1;
+ unsigned char ADC_Bit :1;
+ unsigned char MCIC_Bit :1;
+ unsigned char MCIC_SOFT_RST_Bit :1;
+ unsigned char :1;
+ unsigned char ALG_Bit :1;
+ }Bit;
+}RST2_Type;
+
+
+/* CLKEn0 register bit define. */
+typedef union
+{
+ unsigned char All;
+ struct
+ {
+ unsigned char SPI_Bit : 1;
+ unsigned char I2C_Bit : 1;
+ unsigned char HOST_IRQ : 1;
+ unsigned char : 1;
+ unsigned char MCU_Bit : 1;
+ unsigned char FPU_Bit : 1;
+ unsigned char AIF_Bit : 1;
+ unsigned char ZB_Bit : 1;
+ }Bit;
+}CLKEn0_Type;
+
+/* CLKEn1 register bit define. */
+typedef union
+{
+ unsigned char All;
+ struct
+ {
+ unsigned char SysTimer_16M_Bit : 1;
+ unsigned char ALGM_Bit : 1;
+ unsigned char DMA_Bit : 1;
+ unsigned char UART_Bit : 1;
+ unsigned char PWM_Bit : 1;
+ unsigned char AES_Bit : 1;
+ unsigned char SysTimer_32K_Bit : 1;
+ unsigned char SWS_Bit : 1;
+ }Bit;
+}CLKEn1_Type;
+
+/* CLKEn2 register bit define. */
+typedef union
+{
+ unsigned char All;
+ struct
+ {
+ unsigned char QDEC_32K_Bit : 1;
+ unsigned char DFIFO_Bit: 1;
+ unsigned char : 1;
+ unsigned char : 1;
+ unsigned char MCIC_Bit: 1;
+ unsigned char QDEC_SysClk_Bit : 1;
+ unsigned char : 1;
+ unsigned char : 1;
+ }Bit;
+}CLKEn2_Type;
+
+
+/* RESET and CLKEN register struct define. -----------------------------------*/
+
+/* RST register struct define. */
+typedef struct
+{
+ RST0_Type RST0;
+ RST1_Type RST1;
+ RST2_Type RST2;
+}RESET_TypeDef;
+
+/* CLKEn register struct define. */
+typedef struct
+{
+ CLKEn0_Type ClkEn0;
+ CLKEn1_Type ClkEn1;
+ CLKEn2_Type ClkEn2;
+}CLK_TypeDef;
+
+/* System Clock Select register bit define. */
+typedef union
+{
+ volatile unsigned char ClkSelAll;
+ struct
+ {
+ unsigned char SYS_CLK_SRC_DIV :5;
+ unsigned char SYS_CLK_SRC :2;
+ unsigned char FHS_CLK_SRC_L :1;
+ }ClkSelBits;
+}SYSCLK_TypeDef;
+
+#define RESET ((RESET_TypeDef*)(REG_BASE_ADDR + 0x60))
+#define CLOCK_EN ((CLK_TypeDef*)(REG_BASE_ADDR + 0x63))
+#define SYSCLK_SEL ((SYSCLK_TypeDef*)(REG_BASE_ADDR + 0x66))
+
+
+/****************************************************
+ OTP addr : 0x71
+ *****************************************************/
+#define reg_dcdc_clk REG_ADDR8(0x71)
+
+#define reg_mcu_wakeup_mask REG_ADDR32(0x78)
+
+
+/*----------------------------------------------------------------------------*/
+/*------ UART register define ------*/
+/*----------------------------------------------------------------------------*/
+#define reg_uart_data_buf0 REG_ADDR8(0x90)
+#define reg_uart_data_buf1 REG_ADDR8(0x91)
+#define reg_uart_data_buf2 REG_ADDR8(0x92)
+#define reg_uart_data_buf3 REG_ADDR8(0x93)
+
+#define reg_uart_data_buf(i) REG_ADDR8(0x90 + (i))
+#define reg_uart_clk_div REG_ADDR16(0x94)
+enum{
+ FLD_UART_CLK_DIV = BIT_RNG(0,14),
+ FLD_UART_CLK_DIV_EN = BIT(15)
+};
+
+#define reg_uart_ctrl0 REG_ADDR8(0x96)
+enum{
+ FLD_UART_BPWC = BIT_RNG(0,3),
+ FLD_UART_RX_DMA_EN = BIT(4),
+ FLD_UART_TX_DMA_EN = BIT(5),
+ FLD_UART_RX_IRQ_EN = BIT(6),
+ FLD_UART_TX_IRQ_EN = BIT(7),
+};
+
+#define reg_uart_ctrl1 REG_ADDR8(0x97)
+enum {
+ FLD_UART_CTRL1_CTS_SELECT = BIT(0),
+ FLD_UART_CTRL1_CTS_EN = BIT(1),
+ FLD_UART_CTRL1_PARITY_EN = BIT(2),
+ FLD_UART_CTRL1_PARITY_POLARITY = BIT(3), //1:odd parity 0:even parity
+ FLD_UART_CTRL1_STOP_BIT = BIT_RNG(4,5),
+ FLD_UART_CTRL1_TTL = BIT(6),
+ FLD_UART_CTRL1_LOOPBACK = BIT(7),
+};
+
+
+#define reg_uart_ctrl2 REG_ADDR16(0x98)
+enum {
+ FLD_UART_CTRL2_RTS_TRIG_LVL = BIT_RNG(0,3),
+ FLD_UART_CTRL2_RTS_PARITY = BIT(4),
+ FLD_UART_CTRL2_RTS_MANUAL_VAL = BIT(5),
+ FLD_UART_CTRL2_RTS_MANUAL_EN = BIT(6),
+ FLD_UART_CTRL2_RTS_EN = BIT(7),
+ FLD_UART_CTRL3_RX_IRQ_TRIG_LEVEL = BIT_RNG(8,11),
+ FLD_UART_CTRL3_TX_IRQ_TRIG_LEVEL = BIT_RNG(12,15),
+};
+
+#define reg_uart_ctrl3 REG_ADDR8(0x99)
+enum {
+ FLD_UART_RX_IRQ_TRIG_LEV = BIT_RNG(0,3),
+ FLD_UART_TX_IRQ_TRIG_LEV = BIT_RNG(4,7),
+};
+
+#define reg_uart_rx_timeout0 REG_ADDR8(0x9a)
+enum{
+ FLD_UART_TIMEOUT_BW = BIT_RNG(0,7), // timeout bit width
+};
+
+#define reg_uart_rx_timeout1 REG_ADDR8(0x9b)
+enum{
+ FLD_UART_TIMEOUT_MUL = BIT_RNG(0,1),
+};
+
+#define reg_uart_buf_cnt REG_ADDR8(0x9c)
+enum{
+ FLD_UART_RX_BUF_CNT = BIT_RNG(0,3),
+ FLD_UART_TX_BUF_CNT = BIT_RNG(4,7),
+};
+
+#define reg_uart_status0 REG_ADDR8(0x9d)
+enum{
+ FLD_UART_RBCNT = BIT_RNG(0,2),
+ FLD_UART_IRQ_FLAG = BIT(3),
+ FLD_UART_WBCNT = BIT_RNG(4,6),
+ FLD_UART_RX_ERR_CLR = BIT(6),
+ FLD_UART_RX_ERR_FLAG = BIT(7),
+};
+
+#define reg_uart_status1 REG_ADDR8(0x9e)
+enum{
+ FLD_UART_TX_DONE = BIT(0),
+ FLD_UART_TX_BUF_IRQ = BIT(1),
+ FLD_UART_RX_DONE = BIT(2),
+ FLD_UART_RX_BUF_IRQ = BIT(3),
+};
+
+#define reg_uart_state REG_ADDR8(0x9f)
+enum{
+ FLD_UART_TSTATE_I = BIT_RNG(0,2),
+ FLD_UART_RSTATE_I = BIT_RNG(4,7),
+};
+
+/*----------------------------------------------------------------------------*/
+/*------ SWS register define ------*/
+/*----------------------------------------------------------------------------*/
+#define reg_swire_data REG_ADDR8(0xb0)
+#define reg_swire_ctrl1 REG_ADDR8(0xb1)
+enum //Use for "reg_swire_ctrl1"
+{
+ FLD_SWIRE_WR = BIT(0),
+ FLD_SWIRE_RD = BIT(1),
+ FLD_SWIRE_CMD = BIT(2),
+ FLD_SWIRE_USB_DET = BIT(6),
+ FLD_SWIRE_USB_EN = BIT(7),
+};
+
+#define reg_swire_clk_div REG_ADDR8(0xb2)
+enum
+{
+ FLD_SWIRE_CLK_DIV_Pos = BIT_RNG(0,6),
+};
+
+#define reg_swire_id REG_ADDR8(0xb3)
+enum
+{
+ FLD_SWIRE_ID_SLAVE_ID_Pos = BIT_RNG(0,6),
+ FLD_SWIRE_ID_SLAVE_FIFO_EN_Pos = BIT(7),
+};
+
+/*----------------------------------------------------------------------------*/
+/*------ Analog register(ALG) Read/Write Control register define ------*/
+/*----------------------------------------------------------------------------*/
+#define reg_ana_ctrl32 REG_ADDR32(0xb8) // for performance, set addr and data at a time
+#define reg_ana_addr_data REG_ADDR16(0xb8) // for performance, set addr and data at a time
+#define reg_ana_addr REG_ADDR8(0xb8)
+#define reg_ana_data REG_ADDR8(0xb9)
+#define reg_ana_ctrl REG_ADDR8(0xba)
+enum // datasheet is not right. please use the following define.Use for "reg_ana_ctrl"
+{
+ FLD_ANA_BUSY = BIT(0),
+ FLD_ANA_RSV = BIT(4),
+ FLD_ANA_RW = BIT(5),
+ FLD_ANA_START = BIT(6),
+ FLD_ANA_CYC = BIT(7),
+};
+
+/****************************************************
+ USB regs struct: begin addr : 0x100
+ *****************************************************/
+#define reg_ctrl_ep_ptr REG_ADDR8(0x100)
+#define reg_ctrl_ep_dat REG_ADDR8(0x101)
+#define reg_ctrl_ep_ctrl REG_ADDR8(0x102)
+
+// same for all endpoints
+enum{
+ FLD_EP_DAT_ACK = BIT(0),
+ FLD_EP_DAT_STALL = BIT(1),
+ FLD_EP_STA_ACK = BIT(2),
+ FLD_EP_STA_STALL = BIT(3),
+};
+
+#define reg_ctrl_ep_irq_sta REG_ADDR8(0x103)
+enum{
+ FLD_CTRL_EP_IRQ_TRANS = BIT_RNG(0,3),
+ FLD_CTRL_EP_IRQ_SETUP = BIT(4),
+ FLD_CTRL_EP_IRQ_DATA = BIT(5),
+ FLD_CTRL_EP_IRQ_STA = BIT(6),
+ FLD_CTRL_EP_IRQ_INTF = BIT(7),
+};
+
+#define reg_ctrl_ep_irq_mode REG_ADDR8(0x104)
+enum{
+ FLD_CTRL_EP_AUTO_ADDR = BIT(0),
+ FLD_CTRL_EP_AUTO_CFG = BIT(1),
+ FLD_CTRL_EP_AUTO_INTF = BIT(2),
+ FLD_CTRL_EP_AUTO_STA = BIT(3),
+ FLD_CTRL_EP_AUTO_SYN = BIT(4),
+ FLD_CTRL_EP_AUTO_DESC = BIT(5),
+ FLD_CTRL_EP_AUTO_FEAT = BIT(6),
+ FLD_CTRL_EP_AUTO_STD = BIT(7),
+};
+
+#define reg_usb_ctrl REG_ADDR8(0x105)
+enum{
+ FLD_USB_CTRL_AUTO_CLK = BIT(0),
+ FLD_USB_CTRL_LOW_SPD = BIT(1),
+ FLD_USB_CTRL_LOW_JITT = BIT(2),
+ FLD_USB_CTRL_TST_MODE = BIT(3),
+};
+
+#define reg_usb_cyc_cali REG_ADDR16(0x106)
+#define reg_usb_mdev REG_ADDR8(0x10a)
+#define reg_usb_host_conn REG_ADDR8(0x10b)
+enum{
+ FLD_USB_MDEV_SELF_PWR = BIT(0),
+ FLD_USB_MDEV_SUSP_STA = BIT(1),
+};
+
+#define reg_usb_sups_cyc_cali REG_ADDR8(0x10c)
+#define reg_usb_intf_alt REG_ADDR8(0x10d)
+
+#define reg_usb_ep8123_ptr REG_ADDR32(0x110)
+#define reg_usb_ep8_ptr REG_ADDR8(0x110)
+#define reg_usb_ep1_ptr REG_ADDR8(0x111)
+#define reg_usb_ep2_ptr REG_ADDR8(0x112)
+#define reg_usb_ep3_ptr REG_ADDR8(0x113)
+#define reg_usb_ep4567_ptr REG_ADDR32(0x114)
+#define reg_usb_ep4_ptr REG_ADDR8(0x114)
+#define reg_usb_ep5_ptr REG_ADDR8(0x115)
+#define reg_usb_ep6_ptr REG_ADDR8(0x116)
+#define reg_usb_ep7_ptr REG_ADDR8(0x117)
+#define reg_usb_ep_ptr(i) REG_ADDR8(0x110+((i) & 0x07))
+
+#define reg_usb_ep8123_dat REG_ADDR32(0x118)
+#define reg_usb_ep8_dat REG_ADDR8(0x118)
+#define reg_usb_ep1_dat REG_ADDR8(0x119)
+#define reg_usb_ep2_dat REG_ADDR8(0x11a)
+#define reg_usb_ep3_dat REG_ADDR8(0x11b)
+#define reg_usb_ep4567_dat REG_ADDR32(0x11c)
+#define reg_usb_ep4_dat REG_ADDR8(0x11c)
+#define reg_usb_ep5_dat REG_ADDR8(0x11d)
+#define reg_usb_ep6_dat REG_ADDR8(0x11e)
+#define reg_usb_ep7_dat REG_ADDR8(0x11f)
+#define reg_usb_ep_dat(i) REG_ADDR8(0x118+((i) & 0x07))
+
+#define reg_usb_ep8_ctrl REG_ADDR8(0x120)
+#define reg_usb_ep1_ctrl REG_ADDR8(0x121)
+#define reg_usb_ep2_ctrl REG_ADDR8(0x122)
+#define reg_usb_ep3_ctrl REG_ADDR8(0x123)
+#define reg_usb_ep4_ctrl REG_ADDR8(0x124)
+#define reg_usb_ep5_ctrl REG_ADDR8(0x125)
+#define reg_usb_ep6_ctrl REG_ADDR8(0x126)
+#define reg_usb_ep7_ctrl REG_ADDR8(0x127)
+#define reg_usb_ep_ctrl(i) REG_ADDR8(0x120+((i) & 0x07))
+
+enum{
+ FLD_USB_EP_BUSY = BIT(0),
+ FLD_USB_EP_STALL = BIT(1),
+ FLD_USB_EP_DAT0 = BIT(2),
+ FLD_USB_EP_DAT1 = BIT(3),
+ FLD_USB_EP_MONO = BIT(6),
+ FLD_USB_EP_EOF_ISO = BIT(7),
+};
+
+#define reg_usb_ep8123_buf_addr REG_ADDR32(0x128)
+#define reg_usb_ep8_buf_addr REG_ADDR8(0x128)
+#define reg_usb_ep1_buf_addr REG_ADDR8(0x129)
+#define reg_usb_ep2_buf_addr REG_ADDR8(0x12a)
+#define reg_usb_ep3_buf_addr REG_ADDR8(0x12b)
+#define reg_usb_ep4567_buf_addr REG_ADDR32(0x12c)
+#define reg_usb_ep4_buf_addr REG_ADDR8(0x12c)
+#define reg_usb_ep5_buf_addr REG_ADDR8(0x12d)
+#define reg_usb_ep6_buf_addr REG_ADDR8(0x12e)
+#define reg_usb_ep7_buf_addr REG_ADDR8(0x12f)
+#define reg_usb_ep_buf_addr(i) REG_ADDR8(0x128+((i) & 0x07))
+
+#define reg_usb_ram_ctrl REG_ADDR8(0x130)
+enum{
+ FLD_USB_CEN_PWR_DN = BIT(0),
+ FLD_USB_CLK_PWR_DN = BIT(1),
+ FLD_USB_WEN_PWR_DN = BIT(3),
+ FLD_USB_CEN_FUNC = BIT(4),
+};
+
+#define reg_usb_iso_mode REG_ADDR8(0x138)
+#define reg_usb_irq REG_ADDR8(0x139)
+#define reg_usb_mask REG_ADDR8(0x13a)
+#define reg_usb_ep8_send_max REG_ADDR8(0x13b)
+#define reg_usb_ep8_send_thre REG_ADDR8(0x13c)
+#define reg_usb_ep8_fifo_mode REG_ADDR8(0x13d)
+#define reg_usb_ep_max_size REG_ADDR8(0x13e)
+
+enum{
+ FLD_USB_ENP8_FIFO_MODE = BIT(0),
+ FLD_USB_ENP8_FULL_FLAG = BIT(1),
+};
+
+/****************************************************
+ RF : begin addr : 0x4e8
+ *****************************************************/
+#define reg_rf_tx_mode1 REG_ADDR8(0x400)
+#define reg_rf_tx_mode REG_ADDR16(0x400)
+enum{
+ FLD_RF_TX_DMA_EN = BIT(0),
+ FLD_RF_TX_CRC_EN = BIT(1),
+ FLD_RF_TX_BANDWIDTH = BIT_RNG(2,3),
+ FLD_RF_TX_OUTPUT = BIT(4),
+ FLD_RF_TX_TST_OUT = BIT(5),
+ FLD_RF_TX_TST_EN = BIT(6),
+ FLD_RF_TX_TST_MODE = BIT(7),
+ FLD_RF_TX_ZB_PN_EN = BIT(8),
+ FLD_RF_TX_ZB_FEC_EN = BIT(9),
+ FLD_RF_TX_ZB_INTL_EN = BIT(10), // interleaving
+ FLD_RF_TX_1M2M_PN_EN = BIT(11),
+ FLD_RF_TX_1M2M_FEC_EN = BIT(12),
+ FLD_RF_TX_1M2M_INTL_EN = BIT(13), // interleaving
+};
+#define reg_rf_tx_buf_sta REG_ADDR32(0x41c)
+
+#define reg_rf_rx_sense_thr REG_ADDR8(0x422)
+#define reg_rf_rx_auto REG_ADDR8(0x426)
+enum{
+ FLD_RF_RX_IRR_GAIN = BIT(0),
+ FLD_RF_RX_IRR_PHASE = BIT(1),
+ FLD_RF_RX_DAC_I = BIT(2),
+ FLD_RF_RX_DAC_Q = BIT(3),
+ FLD_RF_RX_LNA_GAIN = BIT(4),
+ FLD_RF_RX_MIX2_GAIN = BIT(5),
+ FLD_RF_RX_PGA_GAIN = BIT(6),
+ FLD_RF_RX_CAL_EN = BIT(7),
+};
+#define reg_rf_rx_sync REG_ADDR8(0x427)
+enum{
+ FLD_RF_FREQ_COMP_EN = BIT(0),
+ FLD_RF_ADC_SYNC = BIT(1),
+ FLD_RF_ADC_INP_SIGNED = BIT(2),
+ FLD_RF_SWAP_ADC_IQ = BIT(3),
+ FLD_RF_NOTCH_FREQ_SEL = BIT(4),
+ FLD_RF_NOTCH_BAND_SEL = BIT(5),
+ FLD_RF_NOTCH_EN = BIT(6),
+ FLD_RF_DN_CONV_FREQ_SEL = BIT(7),
+};
+
+#define reg_rf_rx_mode REG_ADDR8(0x428)
+enum{
+ FLD_RF_RX_EN = BIT(0),
+ FLD_RF_RX_MODE_1M = BIT(1),
+ FLD_RF_RX_MODE_2M = BIT(2),
+ FLD_RF_RX_LOW_IF = BIT(3),
+ FLD_RF_RX_BYPASS_DCOC = BIT(4),
+ FLD_RF_RX_MAN_FINE_TUNE = BIT(5),
+ FLD_RF_RX_SINGLE_CAL = BIT(6),
+ FLD_RF_RX_LOW_PASS_FILTER = BIT(7),
+};
+
+#define reg_rf_rx_pilot REG_ADDR8(0x42b)
+enum{
+ FLD_RF_PILOT_LEN = BIT_RNG(0,3),
+ FLD_RF_ZB_SFD_CHK = BIT(4),
+ FLD_RF_1M_SFD_CHK = BIT(5),
+ FLD_RF_2M_SFD_CHK = BIT(6),
+ FLD_RF_ZB_OR_AUTO = BIT(7),
+};
+
+#define reg_rf_rx_chn_dc REG_ADDR32(0x42c)
+#define reg_rf_rx_q_chn_cal REG_ADDR8(0x42f)
+enum{
+ FLD_RF_RX_DCQ_HIGH = BIT_RNG(0,6),
+ FLD_RF_RX_DCQ_CAL_START = BIT(7),
+};
+#define reg_rf_rx_pel REG_ADDR16(0x434)
+#define reg_rf_rx_pel_gain REG_ADDR32(0x434)
+#define reg_rf_rx_rssi_offset REG_ADDR8(0x439)
+
+#define reg_rf_rx_hdx REG_ADDR8(0x43b)
+enum{
+ FLD_RX_HEADER_LEN = BIT_RNG(0,3),
+ FLD_RT_TICK_LO_SEL = BIT(4),
+ FLD_RT_TICK_HI_SEL = BIT(5),
+ FLD_RT_TICK_FRAME = BIT(6),
+ FLD_PKT_LEN_OUTP_EN = BIT(7),
+};
+
+#define reg_rf_rx_gctl REG_ADDR8(0x43c)
+enum{
+ FLD_RX_GCTL_CIC_SAT_LO_EN = BIT(0),
+ FLD_RX_GCTL_CIC_SAT_HI_EN = BIT(1),
+ FLD_RX_GCTL_AUTO_PWR = BIT(2),
+ FLD_RX_GCTL_ADC_RST_VAL = BIT(4),
+ FLD_RX_GCTL_ADC_RST_EN = BIT(5),
+ FLD_RX_GCTL_PWR_CHG_DET_S = BIT(6),
+ FLD_RX_GCTL_PWR_CHG_DET_N = BIT(7),
+};
+#define reg_rf_rx_peak REG_ADDR8(0x43d)
+enum{
+ FLD_RX_PEAK_DET_SRC_EN = BIT_RNG(0,2),
+ FLD_TX_PEAK_DET_EN = BIT(3),
+ FLD_PEAK_DET_NUM = BIT_RNG(4,5),
+ FLD_PEAK_MAX_CNT_PRD = BIT_RNG(6,7),
+};
+
+#define reg_rf_rx_status REG_ADDR8(0x443)
+enum{
+ FLD_RF_RX_STATE = BIT_RNG(0,3),
+ FLD_RF_RX_STA_RSV = BIT_RNG(4,5),
+ FLD_RF_RX_INTR = BIT(6),
+ FLD_RF_TX_INTR = BIT(7),
+};
+
+#define reg_rf_irq_mask REG_ADDR16(0xf1c)
+#define reg_rf_irq_status REG_ADDR16(0xf20)
+#define reg_rf_fsm_timeout REG_ADDR32(0xf2c)
+
+#define CLEAR_ALL_RFIRQ_STATUS ( reg_rf_irq_status = 0xffff )
+
+enum{
+ FLD_RF_IRQ_RX = BIT(0),
+ FLD_RF_IRQ_TX = BIT(1),
+ FLD_RF_IRQ_RX_TIMEOUT = BIT(2),
+ FLD_RF_IRQ_RX_CRC_2 = BIT(4),
+ FLD_RF_IRQ_CMD_DONE = BIT(5),
+ FLD_RF_IRQ_FSM_TIMEOUT = BIT(6),
+ FLD_RF_IRQ_RETRY_HIT = BIT(7),
+ FLD_RF_IRQ_FIRST_TIMEOUT = BIT(10),
+};
+
+
+enum{
+ FLD_RF_IRX_RX_TIMEOUT = BIT(2),
+ FLD_RF_IRX_CMD_DONE = BIT(5),
+ FLD_RF_IRX_RETRY_HIT = BIT(7),
+};
+
+// The value for FLD_RF_RX_STATE
+enum{
+ RF_RX_STA_IDLE = 0,
+ RF_RX_STA_SET_GAIN = 1,
+ RF_RX_STA_CIC_SETTLE = 2,
+ RF_RX_STA_LPF_SETTLE = 3,
+ RF_RX_STA_PE = 4,
+ RF_RX_STA_SYN_START = 5,
+ RF_RX_STA_GLOB_SYN = 6,
+ RF_RX_STA_GLOB_LOCK = 7,
+ RF_RX_STA_LOCAL_SYN = 8,
+ RF_RX_STA_LOCAL_LOCK = 9,
+ RF_RX_STA_ALIGN = 10,
+ RF_RX_STA_ADJUST = 11,
+ RF_RX_STA_DEMOD = 12, // de modulation
+ RF_RX_STA_FOOTER = 13,
+};
+
+#define reg_rx_rnd_mode REG_ADDR8(0x447)
+enum{
+ FLD_RX_RND_SRC = BIT(0),
+ FLD_RX_RND_MANU_MODE = BIT(1),
+ FLD_RX_RND_AUTO_RD = BIT(2),
+ FLD_RX_RND_FREE_MODE = BIT(3),
+ FLD_RX_RND_CLK_DIV = BIT_RNG(4,7),
+};
+#define reg_rnd_number REG_ADDR16(0x448)
+
+#define reg_bb_max_tick REG_ADDR16(0x44c)
+#define reg_rf_rtt REG_ADDR32(0x454)
+enum{
+ FLD_RTT_CAL = BIT_RNG(0,7),
+ FLD_RTT_CYC1 = BIT_RNG(8,15),
+ FLD_RTT_LOCK = BIT_RNG(16,23),
+ FLD_RT_SD_DLY_40M = BIT_RNG(24,27),
+ FLD_RT_SD_DLY_BYPASS = BIT(28),
+};
+
+#define reg_rf_chn_rssi REG_ADDR8(0x458)
+#define reg_rf_timestamp REG_ADDR32(0x460)
+
+#define reg_rf_rx_gain_agc(i) REG_ADDR32(0x480+((i)<<2))
+
+#define reg_rf_rx_dci REG_ADDR8(0x4cb) // different from the document, why
+#define reg_rf_rx_dcq REG_ADDR8(0x4cf) // different from the document, why
+
+#define reg_pll_rx_coarse_tune REG_ADDR16(0x4d0)
+#define reg_pll_rx_coarse_div REG_ADDR8(0x4d2)
+#define reg_pll_rx_fine_tune REG_ADDR16(0x4d4)
+#define reg_pll_rx_fine_div REG_ADDR8(0x4d6)
+#define reg_pll_tx_coarse_tune REG_ADDR16(0x4d8)
+#define reg_pll_tx_coarse_div REG_ADDR8(0x4da)
+#define reg_pll_tx_fine_tune REG_ADDR16(0x4dc)
+#define reg_pll_tx_fine_div REG_ADDR8(0x4de)
+
+#define reg_pll_rx_frac REG_ADDR32(0x4e0)
+#define reg_pll_tx_frac REG_ADDR32(0x4e4)
+
+#define reg_pll_tx_ctrl REG_ADDR8(0x4e8)
+#define reg_pll_ctrl16 REG_ADDR16(0x4e8)
+#define reg_pll_ctrl REG_ADDR32(0x4e8)
+enum{
+ FLD_PLL_TX_CYC0 =BIT(0),
+ FLD_PLL_TX_SOF =BIT(1),
+ FLD_PLL_TX_CYC1 =BIT(2),
+ FLD_PLL_TX_PRE_EN =BIT(3),
+ FLD_PLL_TX_VCO_EN =BIT(4),
+ FLD_PLL_TX_PWDN_DIV =BIT(5),
+ FLD_PLL_TX_MOD_EN =BIT(6),
+ FLD_PLL_TX_MOD_TRAN_EN =BIT(7),
+ FLD_PLL_RX_CYC0 =BIT(8),
+ FLD_PLL_RX_SOF =BIT(9),
+ FLD_PLL_RX_CYC1 =BIT(10),
+ FLD_PLL_RX_PRES_EN =BIT(11),
+ FLD_PLL_RX_VCO_EN =BIT(12),
+ FLD_PLL_RX_PWDN_DIV =BIT(13),
+ FLD_PLL_RX_PEAK_EN =BIT(14),
+ FLD_PLL_RX_TP_CYC =BIT(15),
+ FLD_PLL_SD_RSTB =BIT(16),
+ FLD_PLL_SD_INTG_EN =BIT(17),
+ FLD_PLL_CP_TRI =BIT(18),
+ FLD_PLL_PWDN_INTG1 =BIT(19),
+ FLD_PLL_PWDN_INTG2 =BIT(20),
+ FLD_PLL_PWDN_INTG_DIV =BIT(21),
+ FLD_PLL_PEAK_DET_EN =BIT(22),
+ FLD_PLL_OPEN_LOOP_EN =BIT(23),
+ FLD_PLL_RX_TICK_EN =BIT(24),
+ FLD_PLL_TX_TICK_EN =BIT(25),
+ FLD_PLL_RX_ALWAYS_ON =BIT(26),
+ FLD_PLL_TX_ALWAYS_ON =BIT(27),
+ FLD_PLL_MANUAL_MODE_EN =BIT(28),
+ FLD_PLL_CAL_DONE_EN =BIT(29),
+ FLD_PLL_LOCK_EN =BIT(30),
+};
+#define reg_pll_rx_ctrl REG_ADDR8(0x4e9)
+enum{
+ FLD_PLL_RX2_CYC0 =BIT(0),
+ FLD_PLL_RX2_SOF =BIT(1),
+ FLD_PLL_RX2_CYC1 =BIT(2),
+ FLD_PLL_RX2_PRES_EN =BIT(3),
+ FLD_PLL_RX2_VCO_EN =BIT(4),
+ FLD_PLL_RX2_PD_DIV =BIT(5),
+ FLD_PLL_RX2_PEAK_EN =BIT(6),
+ FLD_PLL_RX2_TP_CYC =BIT(7),
+};
+
+#define reg_pll_ctrl_a REG_ADDR8(0x4eb)
+enum{
+ FLD_PLL_A_RX_TICK_EN =BIT(0),
+ FLD_PLL_A_TX_TICK_EN =BIT(1),
+ FLD_PLL_A_RX_ALWAYS_ON =BIT(2),
+ FLD_PLL_A_TX_ALWAYS_ON =BIT(3),
+ FLD_PLL_A_MANUAL_MODE_EN =BIT(4),
+ FLD_PLL_A_CAL_DONE_EN =BIT(5),
+ FLD_PLL_A_LOCK_EN =BIT(6),
+};
+// pll polarity
+#define reg_pll_pol_ctrl REG_ADDR16(0x4ec)
+enum{
+ FLD_PLL_POL_TX_PRE_EN =BIT(0),
+ FLD_PLL_POL_TX_VCO_EN =BIT(1),
+ FLD_PLL_POL_TX_PD_DIV =BIT(2),
+ FLD_PLL_POL_MOD_EN =BIT(3),
+ FLD_PLL_POL_MOD_TRAN_EN =BIT(4),
+ FLD_PLL_POL_RX_PRE_EN =BIT(5),
+ FLD_PLL_POL_RX_VCO_EN =BIT(6),
+ FLD_PLL_POL_RX_PD_DIV =BIT(7),
+ FLD_PLL_POL_SD_RSTB =BIT(8),
+ FLD_PLL_POL_SD_INTG_EN =BIT(9),
+ FLD_PLL_POL_CP_TRI =BIT(10),
+ FLD_PLL_POL_TX_SOF =BIT(11),
+ FLD_PLL_POL_RX_SOF =BIT(12),
+};
+
+#define reg_rf_rx_cap REG_ADDR16(0x4f0) // ����
+#define reg_rf_tx_cap REG_ADDR16(0x4f0) // ����
+
+/*----------------------------------------------------------------------------*/
+/*------ DMA register define ------*/
+/*----------------------------------------------------------------------------*/
+#define reg_dma0_addr REG_ADDR16(0x500)
+#define reg_dma0_size REG_ADDR8 (0x502)
+#define reg_dma0_mode REG_ADDR8 (0x503)
+enum{ ///use for "reg_dma0_mode","reg_dma1_mode","reg_dma2_mode","reg_dma3_mode","reg_dma5_mode"
+ FLD_DMA_1WR_0RD_MEM = BIT(0),
+ FLD_DMA_PINGPONG_EN = BIT(1),
+ FLD_DMA_FIFO_EN = BIT(2),
+ FLD_DMA_AUTO_MODE = BIT(3),
+ FLD_DMA_RSVD = BIT(4),
+ FLD_DMA_BYTE_MODE = BIT(5)
+};
+//FLD_DMA_BYTE_MODE_EN =BIT(13),
+//FLD_DMA_FIFO8 =(BIT(15) | BIT(14) | FLD_DMA_WR_MEM | FLD_DMA_PINGPONG_EN),
+
+#define reg_dma1_addr REG_ADDR16(0x504)
+#define reg_dma1_size REG_ADDR8(0x506)
+#define reg_dma1_mode REG_ADDR8(0x507)
+
+#define reg_dma2_addr REG_ADDR16(0x508)
+#define reg_dma2_size REG_ADDR8(0x50a)
+#define reg_dma2_mode REG_ADDR8(0x50b)
+
+#define reg_dma2_ctrl REG_ADDR16(0x50a) ///stack use this macro.
+enum //Use for "reg_dma2_ctrl"
+{
+ FLD_DMA_BUF_SIZE =BIT_RNG(0,7),
+ FLD_DMA_WR_MEM =BIT(8), ///stack use this macro.
+};
+
+#define reg_dma3_addr REG_ADDR16(0x50c)
+#define reg_dma3_size REG_ADDR8(0x50e)
+#define reg_dma3_mode REG_ADDR8(0x50f)
+
+#define reg_dma5_addr REG_ADDR16(0x514)
+#define reg_dma5_size REG_ADDR8(0x516)
+#define reg_dma5_mode REG_ADDR8(0x517)
+
+
+
+#define reg_dma_size(v) REG_ADDR8(0x502+4*v)
+
+// The default channel assignment
+#define reg_dma_uart_rx_addr reg_dma0_addr
+#define reg_dma_uart_rx_size reg_dma0_size
+#define reg_dma_uart_rx_mode reg_dma0_mode
+
+#define reg_dma_uart_tx_addr reg_dma1_addr
+#define reg_dma_uart_tx_size reg_dma1_size
+#define reg_dma_uart_tx_mode reg_dma1_mode
+
+#define reg_dma_rf_rx_addr reg_dma2_addr
+#define reg_dma_rf_rx_size reg_dma2_size
+#define reg_dma_rf_rx_mode reg_dma2_mode
+
+#define reg_dma_rf_tx_addr reg_dma3_addr
+#define reg_dma_rf_tx_size reg_dma3_size
+#define reg_dma_rf_tx_mode reg_dma3_mode
+
+#define reg_dma_pwm_addr reg_dma5_addr
+#define reg_dma_pwm_size reg_dma5_size
+#define reg_dma_pwm_mode reg_dma5_mode
+
+
+#define reg_dma_chn_en REG_ADDR8(0x520)
+#define reg_dma_chn_irq_msk REG_ADDR8(0x521)
+#define reg_dma_tx_rdy0 REG_ADDR8(0x524)
+#define reg_dma_tx_rdy1 REG_ADDR8(0x525)
+#define reg_dma_rx_rdy0 REG_ADDR8(0x526)
+#define reg_dma_rx_rdy1 REG_ADDR8(0x527)
+
+#define reg_dma_irq_status reg_dma_rx_rdy0
+
+enum{
+ FLD_DMA_CHN0 = BIT(0), FLD_DMA_CHN_UART_RX = BIT(0),
+ FLD_DMA_CHN1 = BIT(1), FLD_DMA_CHN_UART_TX = BIT(1),
+ FLD_DMA_CHN2 = BIT(2), FLD_DMA_CHN_RF_RX = BIT(2),
+ FLD_DMA_CHN3 = BIT(3), FLD_DMA_CHN_RF_TX = BIT(3),
+ FLD_DMA_CHN4 = BIT(4),
+ FLD_DMA_CHN5 = BIT(5), FLD_DMA_CHN_PWM = BIT(5),
+ FLD_DMA_CHN6 = BIT(6),
+ FLD_DMA_CHN7 = BIT(7),
+};
+
+#define reg_dma_rx_rptr REG_ADDR8(0x528)
+#define reg_dma_rx_wptr REG_ADDR8(0x529)
+
+#define reg_dma_tx_rptr REG_ADDR8(0x52a)
+#define reg_dma_tx_wptr REG_ADDR8(0x52b)
+#define reg_dma_tx_fifo REG_ADDR16(0x52c)
+
+enum{
+ FLD_DMA_RPTR_CLR = BIT(4),
+ FLD_DMA_RPTR_NEXT = BIT(5),
+ FLD_DMA_RPTR_SET = BIT(6),
+};
+
+
+#define reg_rf_manual_irq_status REG_ADDR16(0x526) //Rx buf 0 data received
+#define FLD_RF_MANUAL_IRQ_RX BIT(2)
+
+
+/*----------------------------------------------------------------------------*/
+/*------ AES register define ------*/
+/*----------------------------------------------------------------------------*/
+#define reg_aes_ctrl REG_ADDR8(0x540)
+enum
+{ FLD_AES_Decrypt = BIT(0),
+ FLD_AES_Feed_Data = BIT(1),
+ FLD_AES_Finished = BIT(2),
+};
+#define reg_aes_data REG_ADDR32(0x548)
+#define reg_aes_key(key_id) REG_ADDR8(0x550 + key_id)
+#define reg_aes_key0 REG_ADDR8(0x550)
+#define reg_aes_key1 REG_ADDR8(0x551)
+#define reg_aes_key2 REG_ADDR8(0x552)
+#define reg_aes_key3 REG_ADDR8(0x553)
+#define reg_aes_key4 REG_ADDR8(0x554)
+#define reg_aes_key5 REG_ADDR8(0x555)
+#define reg_aes_key6 REG_ADDR8(0x556)
+#define reg_aes_key7 REG_ADDR8(0x557)
+#define reg_aes_key8 REG_ADDR8(0x558)
+#define reg_aes_key9 REG_ADDR8(0x559)
+#define reg_aes_key10 REG_ADDR8(0x55a)
+#define reg_aes_key11 REG_ADDR8(0x55b)
+#define reg_aes_key12 REG_ADDR8(0x55c)
+#define reg_aes_key13 REG_ADDR8(0x55d)
+#define reg_aes_key14 REG_ADDR8(0x55e)
+#define reg_aes_key15 REG_ADDR8(0x55f)
+
+
+/*----------------------------------------------------------------------------*/
+/*------- GPIO register define --------*/
+/*----------------------------------------------------------------------------*/
+#define reg_gpio_pa_in REG_ADDR8(0x580)
+#define reg_gpio_pa_ie REG_ADDR8(0x581)
+#define areg_gpio_pa5_6_7_ie 0xb6
+#define reg_gpio_pa_oen REG_ADDR8(0x582)
+#define reg_gpio_pa_out REG_ADDR8(0x583)
+#define reg_gpio_pa_pol REG_ADDR8(0x584)
+#define reg_gpio_pa_ds REG_ADDR8(0x585)
+#define reg_gpio_pa5_6_7_ds 0xb8
+#define reg_gpio_pa_gpio REG_ADDR8(0x586)
+#define reg_gpio_pa_irq_en REG_ADDR8(0x587)
+
+#define reg_gpio_pb_in REG_ADDR8(0x588)
+#define areg_gpio_pb_ie 0xb9
+#define reg_gpio_pb_ie REG_ADDR8(0x589)
+#define reg_gpio_pb_oen REG_ADDR8(0x58a)
+#define reg_gpio_pb_out REG_ADDR8(0x58b)
+#define reg_gpio_pb_pol REG_ADDR8(0x58c)
+#define areg_gpio_pb_ds 0xbb
+#define reg_gpio_pb_ds REG_ADDR8(0x58d)
+#define reg_gpio_pb_gpio REG_ADDR8(0x58e)
+#define reg_gpio_pb_irq_en REG_ADDR8(0x58f)
+
+#define reg_gpio_pc_in REG_ADDR8(0x590)
+#define reg_gpio_pc_ie REG_ADDR8(0x591)
+#define reg_gpio_pc_oen REG_ADDR8(0x592)
+#define reg_gpio_pc_out REG_ADDR8(0x593)
+#define reg_gpio_pc_pol REG_ADDR8(0x594)
+#define reg_gpio_pc_ds REG_ADDR8(0x595)
+#define reg_gpio_pc_gpio REG_ADDR8(0x596)
+#define reg_gpio_pc_irq_en REG_ADDR8(0x597)
+
+
+#define reg_gpio_pe_in REG_ADDR8(0x5a0)
+#define reg_gpio_pe_ie REG_ADDR8(0x5a1)
+#define reg_gpio_pe_oen REG_ADDR8(0x5a2)
+#define reg_gpio_pe_out REG_ADDR8(0x5a3)
+#define reg_gpio_pe_pol REG_ADDR8(0x5a4)
+#define reg_gpio_pe_ds REG_ADDR8(0x5a5)
+#define reg_gpio_pe_gpio REG_ADDR8(0x5a6)
+#define reg_gpio_pe_irq_en REG_ADDR8(0x5a7)
+
+#define reg_gpio_pc_setting1 REG_ADDR32(0x590)
+#define reg_gpio_pc_setting2 REG_ADDR32(0x594)
+
+typedef union
+{
+ unsigned short RegAll;
+ struct
+ {
+ unsigned short P0_AF :2;
+ unsigned short P1_AF :2;
+ unsigned short P2_AF :2;
+ unsigned short P3_AF :2;
+ unsigned short P4_AF :2;
+ unsigned short P5_AF :2;
+ unsigned short P6_AF :2;
+ unsigned short P7_AF :2;
+ }RegBits;
+}GPIO_AFTypeDef;
+
+#define GPIOA_AF ((GPIO_AFTypeDef *)(REG_BASE_ADDR + 0x5a8))
+#define GPIOB_AF ((GPIO_AFTypeDef *)(REG_BASE_ADDR + 0x5aa))
+#define GPIOC_AF ((GPIO_AFTypeDef *)(REG_BASE_ADDR + 0x5ac))
+
+//5316 must
+#define reg_gpio_wakeup_irq REG_ADDR8(0x5b5)
+enum{
+ FLD_GPIO_WAKEUP_EN = BIT(2),
+ FLD_GPIO_INTERRUPT_EN = BIT(3),
+};
+
+//5316 must
+#define reg_gpio_pb_multi_func_select REG_ADDR8(0x5b6)
+enum
+{
+ FLD_PB_MULTI_FUNC_SEL = BIT(3),//1:UART; 0:SPI(PB0-PB3)
+};
+
+/*----------------------------------------------------------------------------*/
+/*------- Timer and Watchdog register define --------*/
+/*----------------------------------------------------------------------------*/
+#define reg_tmr_ctrl REG_ADDR32(0x620)
+#define reg_tmr_ctrl16 REG_ADDR16(0x620) // ��Ϊ0x622 ��Ҫд
+#define reg_tmr_ctrl8 REG_ADDR8(0x620)
+enum{
+ FLD_TMR0_EN = BIT(0),
+ FLD_TMR0_MODE = BIT_RNG(1,2),
+ FLD_TMR1_EN = BIT(3),
+ FLD_TMR1_MODE = BIT_RNG(4,5),
+ FLD_TMR2_EN = BIT(6),
+ FLD_TMR2_MODE = BIT_RNG(7,8),
+ FLD_TMR_WD_CAPT = BIT_RNG(9,22),
+ FLD_TMR_WD_EN = BIT(23),
+ FLD_TMR0_STA = BIT(24),
+ FLD_TMR1_STA = BIT(25),
+ FLD_TMR2_STA = BIT(26),
+ FLD_CLR_WD = BIT(27),
+};
+
+#define reg_tmr_sta REG_ADDR8(0x623)
+enum{
+ FLD_TMR_STA_TMR0 = BIT(0),//write 1 clear.
+ FLD_TMR_STA_TMR1 = BIT(1),
+ FLD_TMR_STA_TMR2 = BIT(2),
+ FLD_TMR_STA_WD = BIT(3),
+};
+
+#define reg_tmr0_capt REG_ADDR32(0x624)
+#define reg_tmr1_capt REG_ADDR32(0x628)
+#define reg_tmr2_capt REG_ADDR32(0x62c)
+#define reg_tmr_capt(i) REG_ADDR32(0x624 + ((i) << 2))
+#define reg_tmr0_tick REG_ADDR32(0x630)
+#define reg_tmr1_tick REG_ADDR32(0x634)
+#define reg_tmr2_tick REG_ADDR32(0x638)
+#define reg_tmr_tick(i) REG_ADDR32(0x630 + ((i) << 2))
+
+//Watchdog
+#define reg_watchdog_reset_flg REG_ADDR8(0x72)
+#define WATCHDOG_TIMEOUT_COEFF 18 // check register definiton, 0x622
+#define WATCHDOG_DISABLE (reg_tmr_ctrl &= ~FLD_TMR_WD_EN)
+#define WATCHDOG_CLEAR (reg_tmr_sta |= FLD_TMR_STA_WD)
+
+
+/*----------------------------------------------------------------------------*/
+/*------- Interrupt registers define -------*/
+/*----------------------------------------------------------------------------*/
+#define reg_irq_mask REG_ADDR32(0x640)
+enum//Use for "reg_irq_mask"
+{
+ FLD_IRQ_TMR0_EN = BIT(0),
+ FLD_IRQ_TMR1_EN = BIT(1),
+ FLD_IRQ_TMR2_EN = BIT(2),
+ FLD_IRQ_SYSTEM_TIMER = BIT(3),
+ FLD_IRQ_DMA_EN = BIT(4),
+ FLD_IRQ_QDEC_EN = BIT(5),
+ FLD_IRQ_UART_EN = BIT(6),
+ FLD_IRQ_HOST_CMD_EN = BIT(7),
+
+ FLD_IRQ_RSVD_8 = BIT(8),
+ FLD_IRQ_RSVD_9 = BIT(9),
+ FLD_IRQ_RSVD_10 = BIT(10),
+ FLD_IRQ_RSVD_11 = BIT(11),
+ FLD_IRQ_SOFT_IRQ_EN = BIT(12),
+ FLD_IRQ_ZB_RT_EN = BIT(13),
+ FLD_IRQ_SW_PWM_EN = BIT(14),
+ FLD_IRQ_AN_EN = BIT(15),
+
+ FLD_IRQ_RSVD_16 = BIT(16),
+ FLD_IRQ_RSVD_17 = BIT(17),
+ FLD_IRQ_GPIO_EN = BIT(18),
+ FLD_IRQ_PM_EN = BIT(19),
+ FLD_IRQ_RSVD_20 = BIT(20),
+ FLD_IRQ_GPIO_RISC0_EN = BIT(21),
+ FLD_IRQ_GPIO_RISC1_EN = BIT(22),
+ FLD_IRQ_GPIO_RISC2_EN = BIT(23),
+
+// FLD_IRQ_EN = BIT(24),
+
+// //Can not be used
+ FLD_IRQ_USB_PWDN_EN = BIT(31),
+ FLD_IRQ_USB_RST_EN = BIT(31),
+};
+#define reg_irq_pri REG_ADDR32(0x644)
+#define reg_irq_src REG_ADDR32(0x648)
+enum//Use for "reg_irq_src"
+{
+ FLD_IRQ_SRC_TMR0 = BIT(0),
+ FLD_IRQ_SRC_TMR1 = BIT(1),
+ FLD_IRQ_SRC_TMR2 = BIT(2),
+ FLD_IRQ_SRC_SYSTEM_TIMER=BIT(3),
+ FLD_IRQ_SRC_DMA = BIT(4),
+ FLD_IRQ_SRC_QDEC = BIT(5),
+ FLD_IRQ_SRC_UART = BIT(6),
+ FLD_IRQ_SRC_HOST_CMD = BIT(7),
+
+ FLD_IRQ_SRC_RSVD_8 = BIT(8),
+ FLD_IRQ_SRC_RSVD_9 = BIT(9),
+ FLD_IRQ_SRC_RSVD_10 = BIT(10),
+ FLD_IRQ_SRC_RSVD_11 = BIT(11),
+ FLD_IRQ_SRC_SOFT_IRQ = BIT(12),
+ FLD_IRQ_SRC_ZB_RT = BIT(13),
+ FLD_IRQ_SRC_PWM = BIT(14),
+ FLD_IRQ_SRC_AN = BIT(15),
+
+ FLD_IRQ_SRC_RSVD_16 = BIT(16),
+ FLD_IRQ_SRC_RSVD_17 = BIT(17),
+ FLD_IRQ_SRC_GPIO = BIT(18),
+ FLD_IRQ_SRC_PM = BIT(19),
+ FLD_IRQ_SRC_RSVD_20 = BIT(20),
+ FLD_IRQ_SRC_GPIO_RISC0= BIT(21),
+ FLD_IRQ_SRC_GPIO_RISC1= BIT(22),
+ FLD_IRQ_SRC_GPIO_RISC2= BIT(23),
+};
+#define reg_irq_src3 REG_ADDR8(0x64a)
+#define reg_irq_en REG_ADDR8(0x643)
+
+
+
+/*----------------------------------------------------------------------------*/
+/*------- System timer register define --------*/
+/*----------------------------------------------------------------------------*/
+#define reg_system_tick REG_ADDR32(0x740)
+#define reg_32k_timer_counter_latch REG_ADDR32(0x744)//Read only
+#define reg_32k_timer_calibration_value REG_ADDR16(0x748)//Read only
+#define reg_sys_timer_ctrl REG_ADDR8(0x74a)
+enum//Use for "reg_sys_timer_ctrl"
+{
+ FLD_SYS_TIMER_EN = BIT(7),
+ FLD_SYS_TIMER_IRQ_EN = BIT(6),
+ FLD_SYS_TIMER_CAL_MODE = BIT_RNG(4,5),
+ FLD_SYS_TIMER_CAL_EN = BIT(3),
+ FLD_SYS_TIMER_AUTO_MODE = BIT(2),
+ FLD_RSVD = BIT(1),
+ FLD_SYS_TIMER_WRITE_32K_TICK_EN = BIT(0),
+};
+
+#define reg_sys_timer_cmd_state REG_ADDR8(0x74b)
+#define reg_32k_timer_tick REG_ADDR32(0x74c)
+
+
+
+//8267
+#define reg_system_tick_irq REG_ADDR32(0x744)
+#define reg_system_wakeup_tick REG_ADDR32(0x748)
+#define reg_system_tick_mode REG_ADDR8(0x74c)
+#define reg_system_tick_ctrl REG_ADDR8(0x74f)
+enum {
+ FLD_SYSTEM_TICK_START = BIT(0),
+ FLD_SYSTEM_TICK_STOP = BIT(1),
+ FLD_SYSTEM_TICK_RUNNING = BIT(1),
+
+ FLD_SYSTEM_TICK_IRQ_EN = BIT(1),
+};
+
+
+/*----------------------------------------------------------------------------*/
+/*------- PWM register define --------*/
+/*----------------------------------------------------------------------------*/
+#define reg_pwm_enable REG_ADDR8(0x780)
+#define reg_pwm_clk REG_ADDR8(0x781)
+#define reg_pwm0_mode REG_ADDR8(0x782)
+enum //Use for "reg_pwm_mode"
+{
+ FLD_PWM0_MODE = BIT_RNG(0,3),
+};
+
+#define reg_pwm_invert REG_ADDR8(0x783)
+#define reg_pwm_n_invert REG_ADDR8(0x784)
+#define reg_pwm_pol REG_ADDR8(0x785)//first polarity
+
+
+#define reg_pwm_phase(i) REG_ADDR16(0x789 + (i << 1))
+#define reg_pwm_cycle(i) REG_ADDR32(0x794 + (i << 2))
+#define reg_pwm_cmp(i) REG_ADDR16(0x794 + (i << 2))
+#define reg_pwm_max(i) REG_ADDR16(0x796 + (i << 2))
+enum{
+ FLD_PWM_CMP = BIT_RNG(0,15),
+ FLD_PWM_MAX = BIT_RNG(16,31),
+};
+
+//PWM PNum
+#define reg_pwm_pulse_num REG_ADDR16(0x7ac)
+
+//PWM interrupt manager
+#define reg_pwm_irq_mask REG_ADDR8(0x7b0)
+#define reg_pwm_irq_sta REG_ADDR8(0x7b1)
+enum{
+ FLD_IRQ_PWM0_PNUM = BIT(0),
+ FLD_IRQ_PWM0_IR_DMA_FIFO_DONE = BIT(1),
+ FLD_IRQ_PWM0_FRAME = BIT(2),
+ FLD_IRQ_PWM1_FRAME = BIT(3),
+ FLD_IRQ_PWM2_FRAME = BIT(4),
+};
+
+#define reg_pwm0_fifo_mode_irq_mask REG_ADDR8(0x7b2)
+enum{
+ FLD_IRQ_PWM0_IR_FIFO_EN = BIT(0),
+};
+
+#define reg_pwm0_fifo_mode_irq_sta REG_ADDR8(0x7b3)
+enum{
+ FLD_IRQ_PWM0_IR_FIFO_CNT = BIT(0),
+};
+
+
+#define reg_pwm_tcmp0_shadow REG_ADDR16(0x7c4)
+#define reg_pwm_tmax0_shadow REG_ADDR16(0x7c6)
+
+#define reg_pwm_ir_fifo_dat(i) REG_ADDR16(0x7c8+i*2)
+#define reg_pwm_ir_fifo_irq_trig_level REG_ADDR8(0x7cc)
+
+#define reg_pwm_ir_fifo_data_status REG_ADDR8(0x7cd)
+enum{
+ FLD_PWM0_IR_FIFO_DATA_NUM = BIT_RNG(0,3),
+ FLD_PWM0_IR_FIFO_EMPTY = BIT(4),
+ FLD_PWM0_IR_FIFO_FULL = BIT(5),
+};
+
+#define reg_pwm_ir_clr_fifo_data REG_ADDR8(0x7ce)
+enum{
+ FLD_PWM0_IR_FIFO_CLR_DATA = BIT(0),
+};
+
+/////////////////////////////////////////////////////////////////////////////
+
+///////////////////// PM register /////////////////////////
+
+//#define rega_deepsleep_flag 0x3f //0x34 - 0x39 (watch dog reset)
+////#define rega_deepsleep_flag 0x34 //0x3a - 0x3b (power-on reset)
+//#define flag_deepsleep_wakeup (analog_read(0x3f) & 0x40)
+//
+//#define rega_wakeup_en_val0 0x41
+//#define rega_wakeup_en_val1 0x42
+//#define rega_wakeup_en_val2 0x43
+//#define raga_gpio_wkup_pol 0x44
+//
+//#define raga_pga_gain0 0x86
+//#define raga_pga_gain1 0x87
+
+
+static inline void config_timer_interrupt (unsigned int tick) {
+ reg_tmr1_tick = 0;
+ reg_tmr1_capt = tick;
+ reg_tmr_ctrl8 |= FLD_TMR1_EN;
+ reg_irq_mask |= FLD_IRQ_TMR1_EN;
+}
+
+#define reg_audio_rd_ptr REG_ADDR16(0xb14)//DFIFO0 read pointer
+#define reg_audio_wr_ptr REG_ADDR16(0xb16)//DFIFO0 write pointer
+
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/rf_drv.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/rf_drv.h
new file mode 100644
index 0000000000000..e1218e6406144
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/rf_drv.h
@@ -0,0 +1,460 @@
+/********************************************************************************************************
+ * @file rf_drv.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author liang.zhong
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#ifndef _RF_DRV_H
+#define _RF_DRV_H
+
+#include "driver_config.h"
+#include "bsp.h"
+#include "analog.h"
+#include "gpio.h"
+////////////External Crystal Type///////////////////
+
+//#define RF_FAST_MODE_1M 1
+//#define RF_MODE_250K 1
+
+#ifdef RF_MODE_250K
+#define RF_FAST_MODE_2M 0
+#define RF_FAST_MODE_1M 0
+#endif
+
+#ifndef RF_FAST_MODE_1M
+#define RF_FAST_MODE_1M 1
+#endif
+
+#ifndef RF_FAST_MODE_2M
+#define RF_FAST_MODE_2M (!RF_FAST_MODE_1M)
+#endif
+
+#ifndef RF_LONG_PACKET_EN
+#define RF_LONG_PACKET_EN 0
+#endif
+
+
+
+#if (RF_FAST_MODE_2M)
+ #define RF_FAST_MODE 1
+ #define RF_TRX_MODE 0x80
+ #define RF_TRX_OFF 0x44 //f02
+#elif (RF_FAST_MODE_1M)
+ #define RF_FAST_MODE 1
+ #define RF_TRX_MODE 0x80
+ #define RF_TRX_OFF 0x45 //f02
+#else
+ #define RF_FAST_MODE 0
+ #define RF_TRX_MODE 0xe0
+ #define RF_TRX_OFF 0x45 //f02
+#endif
+
+
+enum{
+ RF_TX_MODE_NORMAL = 0,
+ RF_TX_MODE_CARRIER,
+ RF_TX_MODE_CONTINUE,
+
+ RF_POWER_LEVEL_MAX = 0,
+ RF_POWER_LEVEL_M2 = 1,
+ RF_POWER_LEVEL_M3 = 2,
+ RF_POWER_LEVEL_MIN = 100,
+};
+
+
+///////////////////////////////////////////////////////
+
+#define RF_CHN_AUTO_CAP 0xff00
+#define RF_CHN_TABLE 0x8000
+#define RF_SET_TX_MANAUL 0x4000
+
+#define FRE_OFFSET 0
+#define FRE_STEP 5
+#define MAX_RF_CHANNEL 16
+
+#define RF_CHANNEL_MAX 16
+#define RF_CHANNEL_MASK (RF_CHANNEL_MAX - 1)
+
+extern unsigned char rfhw_tx_power;
+extern unsigned char cap_tp[RF_CHANNEL_MAX];
+extern const unsigned char rf_chn[RF_CHANNEL_MAX];
+
+typedef enum {
+ RF_MODE_TX = 0,
+ RF_MODE_RX = 1,
+ RF_MODE_AUTO=2
+}RF_StatusTypeDef;
+
+typedef enum {
+ RFFE_RX_PA6 = GPIO_PA6,
+ RFFE_RX_PB0 = GPIO_PB0,
+} RF_LNARxPinDef;
+
+//TX_CYC2PA;
+typedef enum {
+ RFFE_TX_PA7 = GPIO_PA7,
+ RFFE_TX_PB1 = GPIO_PB1,
+} RF_PATxPinDef;
+
+typedef enum{
+ RF_MODE_BLE_1M = BIT(0),
+ RF_MODE_BLE_2M = BIT(1),
+ RF_MODE_PRIVATE_2M = BIT(5),
+}RF_ModeTypeDef;
+
+typedef enum {
+ RF_POWER_11P8dBm = 0,
+ RF_POWER_9P6dBm = 1,
+ RF_POWER_7P9dBm = 2,
+ RF_POWER_7dBm = 3,
+ RF_POWER_6P3dBm = 4,
+ RF_POWER_4P9dBm = 5,
+ RF_POWER_3P3dBm = 6,
+ RF_POWER_1P6dBm = 7,
+ RF_POWER_0dBm = 8,
+ RF_POWER_m1P5dBm = 9,
+ RF_POWER_m3P1dBm = 10,
+ RF_POWER_m5dBm = 11,
+ RF_POWER_m7P3dBm = 12,
+ RF_POWER_m9P6dBm = 13,
+ RF_POWER_m11P5dBm = 14,
+ RF_POWER_m13P3dBm = 15,
+ RF_POWER_m16dBm = 16,
+ RF_POWER_m17P8dBm = 17,
+ RF_POWER_m19P5dBm = 18,
+ RF_POWER_OFF = 19,
+}RF_TxPowerTypeDef;
+
+
+#define FR_TX_PA_MAX_POWER 0x40
+#define FR_TX_PA_MIN_POWER 0x41
+
+//#define RF_TX_PA_POWER_LOW WriteAnalogReg (0x9e, 0x02)
+//#define RF_TX_PA_POWER_HIGH WriteAnalogReg (0x9e, 0xf2)
+//#define RF_TX_PA_POWER_LEVEL(high) WriteAnalogReg (0x9e, high ? 0xbf : 0x02)
+//#define RF_TX_PA_POWER_LOW rfhw_tx_power = FR_TX_PA_MIN_POWER
+//#define RF_TX_PA_POWER_HIGH rfhw_tx_power = FR_TX_PA_MAX_POWER
+//#define RF_TX_PA_POWER_LEVEL(high) rfhw_tx_power = high ? FR_TX_PA_MAX_POWER : FR_TX_PA_MIN_POWER;
+
+#define SET_RF_TX_DMA_ADR(a) write_reg16 (0x80050c, a)
+
+
+#if 1
+static inline void rf_ldo_power_down(void)
+{
+ analog_write(0x06, 0xff);
+}
+
+static inline void rf_ldo_power_on(void)
+{
+ analog_write(0x06, 0x00);
+}
+
+static inline void rf_clk_disable(void)
+{
+// reg_clk_en0 &= ~FLD_CLK0_ZB_EN; //ERR
+// analog_write(0x80, 0x69); //ERR
+// analog_write(0x82, 0x53); //ERR
+}
+
+static inline void rf_clk_enable(void)
+{
+// reg_clk_en0 |= FLD_CLK0_ZB_EN;
+ analog_write(0x80, 0x61);
+ analog_write(0x82, 0x5f);
+}
+#endif
+
+
+#if RF_FAST_MODE_2M
+ #if RF_LONG_PACKET_EN
+ #define RF_PACKET_LENGTH_OK(p) (p[0] == p[12]+13)
+ #define RF_PACKET_CRC_OK(p) ((p[p[0]+3] & 0x51) == 0x40)
+ #else
+ #define RF_PACKET_LENGTH_OK(p) (p[0] == (p[12]&0x3f)+15)
+ #define RF_PACKET_CRC_OK(p) ((p[p[0]+3] & 0x51) == 0x40)
+ #endif
+#elif RF_FAST_MODE_1M
+ #define RF_PACKET_LENGTH_OK(p) (*((unsigned int*)&p[0]) == p[13]+17)
+ #define RF_PACKET_CRC_OK(p) ((p[*((unsigned int*)&p[0]) + 3] & 0x51) == 0x40)
+
+ #define RF_BLE_PACKET_LENGTH_OK(p) (*((unsigned int*)&p[0]) == p[13]+17)
+ #define RF_BLE_PACKET_CRC_OK(p) ((p[*((unsigned int*)&p[0]) + 3] & 0x51) == 0x40)
+#else
+ #define RF_PACKET_LENGTH_OK(p) (p[0] == p[12]+13)
+ #define RF_PACKET_CRC_OK(p) ((p[p[0]+3] & 0x51) == 0x10)
+#endif
+
+#define RF_PACKET_1M_LENGTH_OK(p) (p[0] == (p[13]&0x3f)+17)
+#define RF_PACKET_2M_LENGTH_OK(p) (p[0] == (p[12]&0x3f)+15)
+
+#define RF_TRX_OFF_MANUAL (0x55) //f02
+
+#define STOP_RF_STATE_MACHINE ( REG_ADDR8(0xf00) = 0x80 )
+
+#define rf_get_pipe(p) p[7]
+
+void rf_drv_init (RF_ModeTypeDef RF_Mode);
+void rf_update_tp_value(unsigned char tp0, unsigned char tp1);
+void rf_load_2m_tp_value (unsigned char tp0, unsigned char tp1);
+void rf_set_channel (signed char chn, unsigned short set);
+void rf_set_ble_channel (signed char chn);
+
+void rf_set_power_level_index (RF_TxPowerTypeDef level);
+char rf_get_tx_power_level(void);
+void rf_start_stx(void* addr, unsigned int tick);
+void rf_start_srx(unsigned int start_tick);
+void rf_start_stx2rx (void* addr, unsigned int tick);
+void rf_start_btx(void* addr, unsigned int tick);
+
+int rf_set_trx_state(RF_StatusTypeDef rf_status, signed char rf_channel);
+void rf_tx_pkt(unsigned char *RF_TxBufAddr);
+RF_StatusTypeDef rf_get_trx_state(void);
+
+void rf_ble_switch_phy(RF_ModeTypeDef phy);
+void rf_set_tp_gain (char chn);
+void rf_set_ack_packet (void* addr);
+
+void rf_set_manual_max_gain (void);
+void rf_set_agc (void);
+/**
+* @brief This function serves to set pin for RFFE of RF
+* @param tx_pin - select pin to send
+* @param rx_pin - select pin to receive
+* @return none
+*
+*/
+extern void rf_rffe_set_pin(RF_PATxPinDef tx_pin, RF_LNARxPinDef rx_pin);
+
+
+static inline void rf_adjust_tx_settle(u8 txSettle_us)
+{
+ write_reg16(0xf04, txSettle_us);
+}
+
+/**
+* @brief This function serves to start Tx of ble_mode.
+* @param[in] addr Tx packet address in RAM. Should be 4-byte aligned.
+* @param[in] tick Tick value of system timer. It determines when to
+* start ble mode and send packet.
+* @return none
+*/
+static inline void rf_start_brx (void* addr, unsigned int tick)
+{
+// write_reg32 (0xf04, 0x56); // tx_wait = 0; tx_settle = 86 us
+ write_reg32 (0xf28, 0x0fffffff); // first timeout
+ write_reg32(0xf18, tick); // Setting schedule trigger time
+ write_reg8(0xf16, read_reg8(0xf16) | 0x04); // Enable cmd_schedule mode
+ write_reg8 (0xf00, 0x82); // ble rx
+ write_reg16 (0x50c, (unsigned short)((unsigned int)addr));
+}
+
+
+//manual rx mode
+static inline void rf_set_rxmode (void)
+{
+ write_reg8 (0x428, read_reg8(0x428) | BIT(0));
+ write_reg8 (0xf02, 0x45 | BIT(5)); // RX enable
+}
+
+//manual tx mode
+static inline void rf_set_txmode (void)
+{
+ write_reg8(0xf02, 0x45 | BIT(4)); // TX enable
+}
+
+//maunal mode off
+static inline void rf_set_tx_rx_off(void)
+{
+ write_reg8(0x800f16, 0x29);
+ write_reg8(0x800428, read_reg8(0x428)&0xfe); // rx disable
+ write_reg8(0x800f02, 0x45); // reset tx/rx state machine
+}
+
+//auto mode off
+static inline void rf_set_tx_rx_off_auto_mode(void)
+{
+ write_reg8 (0xf00, 0x80);
+}
+
+static inline void rf_stop_trx (void)
+{
+ write_reg8 (0x800f00, 0x80); // stop
+}
+
+static inline void rf_reset_sn (void)
+{
+ write_reg8 (0x800f01, 0x3f);
+ write_reg8 (0x800f01, 0x00);
+}
+
+///////////////////// RF BaseBand ///////////////////////////////
+static inline void reset_baseband(void)
+{
+ REG_ADDR8(0x60) = BIT(7); //reset baseband
+ REG_ADDR8(0x60) = 0; //release reset signal
+}
+
+static inline unsigned char is_rf_receiving_pkt(void)
+{
+ //if the value of [3:0] of the reg_0x443 is 0b1010 or 0b1011 or 0b1100, it means that the RF is in the receiving packet phase.(confirmed by junwen)
+// return (((read_reg8(0x443)>>3)& 1) == 1); ///the bit3=1 not indicate rx
+ unsigned char tmp_val = 0;
+ tmp_val = (read_reg8(0x443)&0x0f);
+ if( (tmp_val== 10) || (tmp_val == 11) || (tmp_val == 12)){
+ return 1;
+ }
+ return 0;
+}
+
+static inline void reset_sn_nesn(void)
+{
+ REG_ADDR8(0xf01) = 0x01;
+}
+
+static inline void rf_ble_tx_on ()
+{
+ write_reg8 (0x800f02, 0x45 | BIT(4)); // TX enable
+ write_reg32 (0x800f04, 0x38);
+}
+
+static inline void rf_ble_tx_done ()
+{
+ write_reg8 (0x800f02, 0x45); // TX enable
+ write_reg32 (0x800f04, 0x50);
+}
+
+static inline void reset_rf_baseband(void)
+{
+ REG_ADDR8(0x60) = BIT(7); //reset baseband
+ REG_ADDR8(0x60) = 0; //release reset signal
+}
+
+static inline void tx_settle_adjust(unsigned short txstl_us)
+{
+ REG_ADDR16(0xf04) = txstl_us; //adjust TX settle time
+}
+
+static inline unsigned char rf_tx_finish(void)
+{
+ return (READ_REG8(0xf20) & BIT(1));
+}
+
+static inline void rf_tx_finish_clear_flag(void)
+{
+ WRITE_REG8(0xf20, READ_REG8(0xf20) | 0x02);
+}
+
+
+
+static inline void rf_set_tx_pipe_long_packet (unsigned char pipe)
+{
+ write_reg8 (0x800f15, 0x70 | pipe);
+}
+
+static inline void rf_set_tx_pipe (unsigned char pipe)
+{
+ write_reg8 (0x800f15, 0xf0 | pipe);
+}
+
+static inline void rf_set_ble_crc (unsigned char *p)
+{
+ write_reg32 (0x80044c, p[0] | (p[1]<<8) | (p[2]<<16));
+}
+
+static inline void rf_set_ble_crc_value (unsigned int crc)
+{
+ write_reg32 (0x80044c, crc);
+}
+
+static inline void rf_set_ble_crc_adv ()
+{
+ write_reg32 (0x80044c, 0x555555);
+}
+
+static inline void rf_set_ble_access_code (unsigned char *p)
+{
+ write_reg32 (0x800408, p[3] | (p[2]<<8) | (p[1]<<16) | (p[0]<<24));
+}
+
+
+static inline void rf_set_ble_access_code_value (unsigned int ac)
+{
+ write_reg32 (0x800408, ac);
+}
+
+
+static inline void rf_set_ble_access_code_adv ()
+{
+#if (TEST_SPECAIL_ADV_ACCESS_CODE)
+ write_reg32 (0x800408, 0x12345678);
+#else
+ write_reg32 (0x800408, 0xd6be898e);
+#endif
+}
+
+static inline void rf_set_access_code0 (unsigned int code)
+{
+ write_reg32 (0x800408, (read_reg32(0x800408) & 0xff) | (code & 0xffffff00));
+ write_reg8 (0x80040c, code);
+}
+
+static inline unsigned int rf_get_access_code0 (void)
+{
+ return read_reg8 (0x80040c) | (read_reg32(0x800408) & 0xffffff00);
+}
+
+static inline void rf_set_access_code1 (unsigned int code)
+{
+ write_reg32 (0x800410, (read_reg32(0x800410) & 0xff) | (code & 0xffffff00));
+ write_reg8 (0x800414, code);
+}
+
+static inline unsigned int rf_get_access_code1 (void)
+{
+ return read_reg8 (0x800414) | (read_reg32(0x800410) & 0xffffff00);
+}
+
+
+
+
+static inline unsigned int rf_access_code_16to32 (unsigned short code)
+{
+ unsigned int r = 0;
+ for (int i=0; i<16; i++) {
+ r = r << 2;
+ r |= code & BIT(i) ? 1 : 2;
+ }
+ return r;
+}
+
+static inline unsigned short rf_access_code_32to16 (unsigned int code)
+{
+ unsigned short r = 0;
+ for (int i=0; i<16; i++) {
+ r = r << 1;
+
+ r |= (code & BIT(i*2)) ? 1 : 0;
+
+ }
+ return r;
+}
+
+#endif
+///////////////////////////////////////////
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/spi.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/spi.c
new file mode 100644
index 0000000000000..db5658a637e07
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/spi.c
@@ -0,0 +1,277 @@
+/********************************************************************************************************
+ * @file spi.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author peng.sun
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#include "spi.h"
+#include "register.h"
+#include "gpio.h"
+/**
+ * @brief This function configures the clock and working mode for SPI interface
+ * @param[in] DivClock - the division factor for SPI module
+ * SPI clock = System clock / ((DivClock+1)*2)
+ * @param[in] Mode - the selected working mode of SPI module
+ * Telink spi supports four standard working modes
+ * register 0x0b set working mode
+ * bit0:CPOL-Clock Polarity ; bit1:CPHA-Clock Phase
+ * MODE0: CPOL = 0 , CPHA =0;
+ * MODE1: CPOL = 0 , CPHA =1;
+ * MODE2: CPOL = 1 , CPHA =0;
+ * MODE3: CPOL = 1 , CPHA =1;
+ * @return none
+ */
+void spi_master_init(unsigned char DivClock, SPI_ModeTypeDef Mode)
+{
+
+ reg_clk_en0 |= FLD_CLK0_SPI_EN;//enable spi clock
+ reg_spi_sp = 0; //clear register(0x0a) value
+ reg_spi_sp|= DivClock; //0x0a: bit0~bit6 set spi clock ; spi clock=system clock/((DivClock+1)*2)
+ reg_spi_sp|=FLD_SPI_ENABLE;//0x0a: bit7 enables spi function mode
+ reg_spi_ctrl|= FLD_SPI_MASTER_MODE_EN ; //0x09: bit1 enables master mode
+ reg_spi_inv_clk&= FLD_SPI_MODE_WORK_MODE;// clear spi working mode
+ reg_spi_inv_clk |= Mode;// select SPI mode,surpport four modes
+}
+
+/**
+ * @brief This function configures the spi pins for a master device
+ */
+void spi_master_set_pin(SPI_GPIO_GroupTypeDef PinGrp)
+{
+ GPIO_PinTypeDef sclk = GPIO_PB3 ,cs=GPIO_PB0 ;
+ GPIO_PinTypeDef sdo= GPIO_PB1 ,sdi=GPIO_PB2;
+
+ if( PinGrp== SPI_GPIO_GROUP_B0B1B2B3 )
+ {
+ gpio_set_func( GPIO_PC3 ,AS_GPIO);
+ gpio_set_func( GPIO_PC4 ,AS_GPIO);
+ gpio_set_func( GPIO_PC5 ,AS_GPIO);
+
+ }
+ else if(PinGrp == SPI_GPIO_GROUP_C2C3C4C5)
+ {
+ cs = GPIO_PC2;
+ sdo = GPIO_PC3;
+ sdi = GPIO_PC4;
+ sclk = GPIO_PC5;
+
+ gpio_set_func( GPIO_PB1 ,AS_GPIO);
+ gpio_set_func( GPIO_PB2 ,AS_GPIO);
+ gpio_set_func( GPIO_PB3 ,AS_GPIO);
+ }
+
+ gpio_set_func(sdo ,AS_SPI_MDO);
+ gpio_set_func(sdi ,AS_SPI_MDI);
+ gpio_set_func(sclk ,AS_SPI_MCK);
+
+ gpio_set_input_en(sdo, 1);
+ gpio_set_input_en(sdi, 1);
+ gpio_set_input_en(sclk, 1);
+
+
+ gpio_set_data_strength(sdo ,0);
+ gpio_set_data_strength(sdi,0);
+ gpio_set_data_strength(sclk,0);
+
+ spi_master_set_cs_pin(cs);
+}
+
+
+/**
+ * @brief This function serves to write a bulk of data to the SPI slave
+ * device specified by the CS pin
+ * @param[in] Addr - pointer to the target address needed written into the
+ * slave device first before the writing operation of actual data
+ * @param[in] AddrLen - length in byte of the address of slave device
+ * @param[in] Data - pointer to the data need to write
+ * @param[in] DataLen - length in byte of the data need to write
+ * @param[in] CSPin - the CS pin specifing the slave device
+ * @return none
+ */
+void spi_write_buff(unsigned int Addr, unsigned char AddrLen, unsigned char *Data, int DataLen, GPIO_PinTypeDef CSPin)
+{
+ int i = 0;
+ gpio_write(CSPin,0);
+ reg_spi_ctrl &= ~(FLD_SPI_DATA_OUT_DIS|FLD_SPI_RD);/* Enable SPI data output and SPI write command. */
+
+ /***write Cmd***/
+ for (i = 0; i < AddrLen; i++) {
+ reg_spi_data = (Addr>>((AddrLen-i-1)*8))&0xff;
+ while(reg_spi_ctrl& FLD_SPI_BUSY); //wait writing finished
+ }
+
+ reg_spi_data = SPI_WRITE_CMD; // write cmd:0x00
+ while(reg_spi_ctrl& FLD_SPI_BUSY);
+
+ /***write Data***/
+ for (i = 0; i < DataLen; i++) {
+ reg_spi_data = Data[i];
+ while(reg_spi_ctrl & FLD_SPI_BUSY); //wait writing finished
+ }
+
+ /***pull up CS***/
+ gpio_write(CSPin,1);//CS level is high
+
+}
+/**
+ * @brief This function serves to read a bulk of data from the SPI slave
+ * device specified by the CS pin
+ * @param[in] Addr - pointer to the target address needed written into the
+ * slave device first before the reading operation of actual data
+ * @param[in] AddrLen - length in byte of the address of slave device
+ * @param[out] Data - pointer to the buffer that will cache the reading out data
+ * @param[in] DataLen - length in byte of the data need to read
+ * @param[in] CSPin - the CS pin specifing the slave device
+ * @return none
+ */
+void spi_read_buff(unsigned int Addr, unsigned char AddrLen, unsigned char *Data, int DataLen, GPIO_PinTypeDef CSPin)
+{
+ int i = 0;
+ unsigned char temp = 0;
+ gpio_write(CSPin,0); //CS level is low
+ reg_spi_ctrl &= ~FLD_SPI_DATA_OUT_DIS; ////0x09- bit2 enables spi data output
+
+ /***write cmd***/
+ for (i = 0; i < AddrLen; i++) {
+ reg_spi_data = (Addr>>((AddrLen-i-1)*8))&0xff;
+ while(reg_spi_ctrl& FLD_SPI_BUSY ); //wait writing finished
+ }
+
+ reg_spi_data = SPI_READ_CMD; //read cmd:0x80
+ while(reg_spi_ctrl& FLD_SPI_BUSY);
+
+ /***when the read_bit was set 1,you can read 0x800008 to take eight clock cycle***/
+ reg_spi_ctrl |= FLD_SPI_RD; //enable read,0x09-bit3 : 0 for read ,1 for write
+ temp = reg_spi_data; //first byte isn't useful data,only take 8 clock cycle
+ while(reg_spi_ctrl &FLD_SPI_BUSY ); //wait reading finished
+
+ /***read data***/
+ for (i = 0; i < DataLen; i++) {
+ Data[i] = reg_spi_data; //take 8 clock cycles
+ while(reg_spi_ctrl & FLD_SPI_BUSY ); //wait reading finished
+ }
+ //pull up CS
+ gpio_write(CSPin,1);//CS level is high
+}
+/**
+ * @brief This function selects a GPIO pin as CS of SPI function.
+ * @param[in] CSPin - the selected CS pin
+ * @return none
+ */
+void spi_master_set_cs_pin(GPIO_PinTypeDef CSPin)
+{
+ gpio_set_func(CSPin,AS_GPIO);//enable GPIO function
+ gpio_set_input_en(CSPin,0); //disable input function
+ gpio_set_output_en(CSPin,1);//enable out put
+ gpio_write(CSPin,1);//output high level in idle state
+}
+/**
+ * @brief This function configures the clock and working mode for SPI interface
+ * @param[in] DivClock - the division factor for SPI module
+ * SPI clock = System clock / ((DivClock+1)*2)
+ * @param[in] Mode - the selected working mode of SPI module
+ * Telink spi supports four standard working modes
+ * register 0x0b set working mode
+ * bit0:CPOL-Clock Polarity ; bit1:CPHA-Clock Phase
+ * MODE0: CPOL = 0 , CPHA =0;
+ * MODE1: CPOL = 0 , CPHA =1;
+ * MODE2: CPOL = 1 , CPHA =0;
+ * MODE3: CPOL = 1 , CPHA =1;
+ * @return none
+ */
+void spi_slave_init(unsigned char DivClock, SPI_ModeTypeDef Mode)
+{
+
+ reg_clk_en0 |= FLD_CLK0_SPI_EN;//enable spi clock
+ reg_spi_sp = 0; //clear register(0x0a) value
+ reg_spi_sp|= DivClock; //0x0a: bit0~bit6 set spi clock ; spi clock=system clock/((DivClock+1)*2)
+ reg_spi_sp|=FLD_SPI_ENABLE;//0x0a: bit7 enables spi function mode
+
+ reg_spi_ctrl &= ~(FLD_SPI_MASTER_MODE_EN|FLD_SPI_SLAVE_EN);
+ reg_spi_ctrl |= FLD_SPI_SLAVE_EN;//Enable SPI slave
+
+ reg_spi_inv_clk&= FLD_SPI_MODE_WORK_MODE;// clear spi working mode
+ reg_spi_inv_clk|= Mode; //select SPI mode,surpport four modes
+}
+
+/**
+ * @brief This function sets the spi pins for a slave device
+ */
+void spi_slave_set_pin(SPI_GPIO_GroupTypeDef PinGrp)
+{
+ GPIO_PinTypeDef cs = GPIO_PB0,sclk = GPIO_PB3;
+ GPIO_PinTypeDef sdo = GPIO_PB1,sdi = GPIO_PB2;
+
+ if(PinGrp== SPI_GPIO_GROUP_C2C3A3A4){
+ /*C2 C3 A3 A4*/
+ cs = GPIO_PC2;
+ sdo = GPIO_PC3;
+ sdi = GPIO_PA3;
+ sclk = GPIO_PA4;
+
+ gpio_set_func( GPIO_PC4 ,AS_GPIO);
+ gpio_set_func( GPIO_PC5 ,AS_GPIO);
+ gpio_set_func( GPIO_PB0 ,AS_GPIO);
+ gpio_set_func( GPIO_PB1 ,AS_GPIO);
+ gpio_set_func( GPIO_PB2 ,AS_GPIO);
+ gpio_set_func( GPIO_PB3 ,AS_GPIO);
+
+ }
+ else if(PinGrp == SPI_GPIO_GROUP_C2C3C4C5){
+ /*C2 C3 C3 C4*/
+ cs = GPIO_PC2;
+ sdo = GPIO_PC3;
+ sdi = GPIO_PC4;
+ sclk = GPIO_PC5;
+
+ gpio_set_func( GPIO_PA3 ,AS_GPIO);
+ gpio_set_func( GPIO_PA4 ,AS_GPIO);
+ gpio_set_func( GPIO_PB0 ,AS_GPIO);
+ gpio_set_func( GPIO_PB1 ,AS_GPIO);
+ gpio_set_func( GPIO_PB2 ,AS_GPIO);
+ gpio_set_func( GPIO_PB3 ,AS_GPIO);
+
+ }
+
+ gpio_set_func(cs ,AS_SPI_CN);
+ gpio_set_func(sdo ,AS_SPI_DO);
+ gpio_set_func(sdi ,AS_SPI_DI);
+ gpio_set_func(sclk ,AS_SPI_CK);
+
+ gpio_set_input_en(cs, 1);
+ gpio_set_input_en(sdo, 1);
+ gpio_set_input_en(sdi, 1);
+ gpio_set_input_en(sclk,1);
+
+ gpio_set_data_strength(cs,0);
+ gpio_set_data_strength(sdo ,0);
+ gpio_set_data_strength(sdi,0);
+ gpio_set_data_strength(sclk,0);
+}
+
+/***
+ * brief: this function can enable spi module interrupt.
+ */
+void spi_irq_enable(void){
+ reg_clk_en0 |= FLD_CLK0_HOSTIRQ_EN; // host irq enable; i2c and spi need to set this bit.
+ reg_irq_mask |= FLD_IRQ_HOST_CMD_EN; // i2c and spi need to set this bit
+
+ irq_enable(); // enable IRQ
+}
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/spi.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/spi.h
new file mode 100644
index 0000000000000..175b6ffc1c759
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/spi.h
@@ -0,0 +1,151 @@
+/********************************************************************************************************
+ * @file spi.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author peng.sun
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#ifndef SPI_H
+#define SPI_H
+
+#include "bsp.h"
+#include "gpio.h"
+
+#define SPI_WRITE_CMD 0x00
+#define SPI_READ_CMD 0x80
+
+/**
+ * @brief Define the mode for SPI interface
+ */
+typedef enum {
+ SPI_MODE0 = 0,
+ SPI_MODE2,
+ SPI_MODE1,
+ SPI_MODE3,
+} SPI_ModeTypeDef;
+
+
+/**
+ * @brief Define the spi pin group
+ */
+// CN SDO SDI SCK
+// C2 C3 A3 A4
+// B0 B1 B2 B3
+// C2 C3 C4 C5
+typedef enum{
+ SPI_GPIO_GROUP_B0B1B2B3=0, //Master
+ SPI_GPIO_GROUP_C2C3A3A4, //Slave
+ SPI_GPIO_GROUP_C2C3C4C5, //Master and Slave
+
+}SPI_GPIO_GroupTypeDef;
+
+/**
+ * @brief This function reset SPI module.
+ * @param[in] none
+ * @return none
+ */
+static inline void spi_reset(void)
+{
+ reg_rst0 |= FLD_RST0_SPI;
+ reg_rst0 &= (~FLD_RST0_SPI);
+}
+
+/**
+ * @brief This function configures the clock and working mode for SPI interface
+ * @param[in] DivClock - the division factor for SPI module
+ * SPI clock = System clock / ((DivClock+1)*2)
+ * @param[in] Mode - the selected working mode of SPI module
+ * Telink spi supports four standard working modes
+ * register 0x0b set working mode
+ * bit0:CPOL-Clock Polarity ; bit1:CPHA-Clock Phase
+ * MODE0: CPOL = 0 , CPHA =0;
+ * MODE1: CPOL = 0 , CPHA =1;
+ * MODE2: CPOL = 1 , CPHA =0;
+ * MODE3: CPOL = 1 , CPHA =1;
+ * @return none
+ */
+extern void spi_master_init(unsigned char DivClock, SPI_ModeTypeDef Mode);
+
+/**
+ * @brief This function configures the spi pins for a master device
+ */
+extern void spi_master_set_pin(SPI_GPIO_GroupTypeDef PinGrp);
+
+/**
+ * @brief This function serves to write a bulk of data to the SPI slave
+ * device specified by the CS pin
+ * @param[in] Addr - pointer to the address needed written into the
+ * slave device first before the writing operation of actual data
+ * @param[in] AddrLen - length in byte of the address of slave device
+ * @param[in] Data - pointer to the data need to write
+ * @param[in] DataLen - length in byte of the data need to write
+ * @param[in] CSPin - the CS pin specifing the slave device
+ * @return none
+ */
+extern void spi_write_buff(unsigned int Addr, unsigned char AddrLen, unsigned char *Data, int DataLen, GPIO_PinTypeDef CSPin);
+
+/**
+ * @brief This function serves to read a bulk of data from the SPI slave
+ * device specified by the CS pin
+ * @param[in] Addr - pointer to the target address needed written into the
+ * slave device first before the reading operation of actual data
+ * @param[in] AddrLen - length in byte of the address of slave device
+ * @param[out] Data - pointer to the buffer that will cache the reading out data
+ * @param[in] DataLen - length in byte of the data need to read
+ * @param[in] CSPin - the CS pin specifing the slave device
+ * @return none
+ */
+extern void spi_read_buff(unsigned int Addr, unsigned char AddrLen, unsigned char *Data, int DataLen, GPIO_PinTypeDef CSPin);
+
+/**
+ * @brief This function selects a GPIO pin as CS of SPI function.
+ * @param[in] CSPin - the selected CS pin
+ * @return none
+ */
+extern void spi_master_set_cs_pin(GPIO_PinTypeDef CSPin);
+
+/**
+ * @brief This function configures the clock and working mode for SPI interface
+ * @param[in] DivClock - the division factor for SPI module
+ * SPI clock = System clock / ((DivClock+1)*2)
+ * @param[in] Mode - the selected working mode of SPI module
+ * Telink spi supports four standard working modes
+ * register 0x0b set working mode
+ * bit0:CPOL-Clock Polarity ; bit1:CPHA-Clock Phase
+ * MODE0: CPOL = 0 , CPHA =0;
+ * MODE1: CPOL = 0 , CPHA =1;
+ * MODE2: CPOL = 1 , CPHA =0;
+ * MODE3: CPOL = 1 , CPHA =1;
+ * @return none
+ */
+extern void spi_slave_init(unsigned char DivClock, SPI_ModeTypeDef Mode);
+
+/**
+ * @brief This function sets the spi pins for a slave device
+ */
+extern void spi_slave_set_pin(SPI_GPIO_GroupTypeDef PinGrp);
+
+/***
+ * brief: this function can enable spi module interrupt.
+ */
+void spi_irq_enable(void);
+
+#endif /* End of SPI_H */
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/spi_i.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/spi_i.h
new file mode 100644
index 0000000000000..c8ee3dcab3be8
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/spi_i.h
@@ -0,0 +1,93 @@
+/********************************************************************************************************
+ * @file spi_i.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+#include "register.h"
+
+ /**
+ * @brief This function servers to set the spi wait.
+ * @param[in] none
+ * @return none
+ */
+_attribute_ram_code_ static inline void mspi_wait(void){
+ while(reg_master_spi_ctrl & FLD_MASTER_SPI_BUSY);
+}
+
+/**
+ * @brief This function servers to set the spi high level.
+ * @param[in] none
+ * @return none
+ */
+_attribute_ram_code_ static inline void mspi_high(void){
+ reg_master_spi_ctrl = FLD_MASTER_SPI_CS;
+}
+
+/**
+ * @brief This function servers to set the spi low level.
+ * @param[in] none
+ * @return none
+ */
+_attribute_ram_code_ static inline void mspi_low(void){
+ reg_master_spi_ctrl = 0;
+}
+
+/**
+ * @brief This function servers to gets the spi data.
+ * @param[in] none.
+ * @return the spi data.
+ */
+_attribute_ram_code_ static inline unsigned char mspi_get(void){
+ return reg_master_spi_data;
+}
+
+/**
+ * @brief This function servers to write the spi.
+ * @param[in] c - the char need to be write.
+ * @return none
+ */
+_attribute_ram_code_ static inline void mspi_write(unsigned char c){
+ reg_master_spi_data = c;
+}
+
+/**
+ * @brief This function servers to control the write.
+ * @param[in] c - need to be write.
+ * @return none
+ */
+_attribute_ram_code_ static inline void mspi_ctrl_write(unsigned char c){
+ reg_master_spi_ctrl = c;
+}
+
+/**
+ * @brief This function servers to spi read.
+ * @param[in] none.
+ * @return read reault.
+ */
+_attribute_ram_code_ static inline unsigned char mspi_read(void){
+ mspi_write(0); // dummy, issue clock
+ mspi_wait();
+ return mspi_get();
+}
+
+
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/timer.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/timer.c
new file mode 100644
index 0000000000000..7611e1f7ada05
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/timer.c
@@ -0,0 +1,305 @@
+/********************************************************************************************************
+ * @file timer.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author junwei.lu
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ * @par History:
+ * 1.initial release(DEC. 26 2018)
+ *
+ * @version A001
+ *
+ *******************************************************************************************************/
+#include "timer.h"
+#include "gpio_default.h"
+#include "register.h"
+/**
+ * @brief initiate GPIO for gpio trigger and gpio width mode of timer0.
+ * @param[in] pin - select pin for timer0.
+ * @param[in] pol - select polarity for gpio trigger and gpio width
+ * @return none
+ */
+void timer0_gpio_init(GPIO_PinTypeDef pin, GPIO_PolTypeDef pol)
+{
+ gpio_set_func(pin ,AS_GPIO);
+ gpio_set_output_en(pin, 0); //disable output
+ gpio_set_input_en(pin ,1);//enable input
+ if(pol==GPIO_Pol_falling)
+ {
+ gpio_setup_up_down_resistor(pin,PM_PIN_PULLUP_10K);
+ }
+ else if(pol==GPIO_Pol_rising)
+ {
+ gpio_setup_up_down_resistor(pin,PM_PIN_PULLDOWN_100K);
+ }
+ gpio_set_interrupt_risc0(pin, pol);
+}
+/**
+ * @brief initiate GPIO for gpio trigger and gpio width mode of timer1.
+ * @param[in] pin - select pin for timer1.
+ * @param[in] pol - select polarity for gpio trigger and gpio width
+ * @return none
+ */
+void timer1_gpio_init(GPIO_PinTypeDef pin,GPIO_PolTypeDef pol)
+{
+ gpio_set_func(pin ,AS_GPIO);
+ gpio_set_output_en(pin, 0); //disable output
+ gpio_set_input_en(pin ,1);//enable input
+ if(pol==GPIO_Pol_falling)
+ {
+ gpio_setup_up_down_resistor(pin,PM_PIN_PULLUP_10K);
+ }
+ else if(pol==GPIO_Pol_rising)
+ {
+ gpio_setup_up_down_resistor(pin,PM_PIN_PULLDOWN_100K);
+ }
+ gpio_set_interrupt_risc1(pin, pol);
+}
+/**
+ * @brief initiate GPIO for gpio trigger and gpio width mode of timer2.
+ * @param[in] pin - select pin for timer2.
+ * @param[in] pol - select polarity for gpio trigger and gpio width
+ * @return none
+ */
+void timer2_gpio_init(GPIO_PinTypeDef pin,GPIO_PolTypeDef pol)
+{
+ gpio_set_func(pin ,AS_GPIO);
+ gpio_set_output_en(pin, 0); //disable output
+ gpio_set_input_en(pin ,1);//enable input
+ if(pol==GPIO_Pol_falling)
+ {
+ gpio_setup_up_down_resistor(pin,PM_PIN_PULLUP_10K);
+ }
+ else if(pol==GPIO_Pol_rising)
+ {
+ gpio_setup_up_down_resistor(pin,PM_PIN_PULLDOWN_100K);
+ }
+
+ unsigned char bit = pin & 0xff;
+
+ BM_SET(reg_gpio_irq_risc2_en(pin), bit);
+
+ if(pol==GPIO_Pol_falling)
+ {
+ BM_SET(reg_gpio_pol(pin), bit);
+ }
+ else if(pol==GPIO_Pol_rising)
+ {
+ BM_CLR(reg_gpio_pol(pin), bit);
+ }
+}
+/**
+ * @brief set mode, initial tick and capture of timer0.
+ * @param[in] mode - select mode for timer0.
+ * @param[in] init_tick - initial tick.
+ * @param[in] cap_tick - tick of capture.
+ * @return none
+ */
+void timer0_set_mode(TIMER_ModeTypeDef mode,unsigned int init_tick, unsigned int cap_tick)
+{
+ switch(mode)
+ {
+ case TIMER_MODE_SYSCLK:
+ {
+ reg_irq_mask |= FLD_IRQ_TMR0_EN;
+ reg_tmr0_tick = init_tick;
+ reg_tmr0_capt = cap_tick;
+ reg_tmr_sta = FLD_TMR_STA_TMR0; //clear irq status
+ reg_tmr_ctrl &= (~FLD_TMR0_MODE);
+ reg_tmr_ctrl |= (TIMER_MODE_SYSCLK<<1);
+ break;
+ }
+ case TIMER_MODE_GPIO_TRIGGER:
+ {
+ reg_irq_mask |= FLD_IRQ_TMR0_EN;
+ reg_tmr0_tick = init_tick;
+ reg_tmr0_capt = cap_tick;
+ reg_tmr_sta = FLD_TMR_STA_TMR0; //clear irq status
+ reg_tmr_ctrl &= (~FLD_TMR0_MODE);
+ reg_tmr_ctrl |= (TIMER_MODE_GPIO_TRIGGER<<1);
+ break;
+ }
+ case TIMER_MODE_GPIO_WIDTH:
+ {
+ reg_irq_mask |= FLD_IRQ_TMR0_EN;
+ reg_tmr0_tick = init_tick;
+ reg_tmr_sta = FLD_TMR_STA_TMR0;
+ reg_tmr_ctrl &= (~FLD_TMR0_MODE);
+ reg_tmr_ctrl |= (TIMER_MODE_GPIO_WIDTH<<1);
+ break;
+ }
+ case TIMER_MODE_TICK:
+ {
+ reg_irq_mask |= FLD_IRQ_TMR0_EN;
+ reg_tmr0_tick = init_tick; //clear counter
+ reg_tmr_sta = FLD_TMR_STA_TMR0; //clear irq status
+ reg_tmr_ctrl &= (~FLD_TMR0_MODE);
+ reg_tmr_ctrl |= (TIMER_MODE_TICK<<1);
+ break;
+ }
+ default: break;
+ }
+}
+/**
+ * @brief set mode, initial tick and capture of timer1.
+ * @param[in] mode - select mode for timer1.
+ * @param[in] init_tick - initial tick.
+ * @param[in] cap_tick - tick of capture.
+ * @return none
+ */
+void timer1_set_mode(TIMER_ModeTypeDef mode,unsigned int init_tick, unsigned int cap_tick)
+{
+ switch(mode)
+ {
+ case TIMER_MODE_SYSCLK:
+ {
+ reg_irq_mask |= FLD_IRQ_TMR1_EN;
+ reg_tmr1_tick = init_tick;
+ reg_tmr1_capt = cap_tick;
+ reg_tmr_sta = FLD_TMR_STA_TMR1; //clear irq status
+ reg_tmr_ctrl &= (~FLD_TMR1_MODE);
+ reg_tmr_ctrl |= (TIMER_MODE_SYSCLK<<4);
+ break;
+ }
+ case TIMER_MODE_GPIO_TRIGGER:
+ {
+ reg_irq_mask |= FLD_IRQ_TMR1_EN;
+ reg_tmr1_tick = init_tick;
+ reg_tmr1_capt = cap_tick;
+ reg_tmr_sta = FLD_TMR_STA_TMR1; //clear irq status
+ reg_tmr_ctrl &= (~FLD_TMR1_MODE);
+ reg_tmr_ctrl |= (TIMER_MODE_GPIO_TRIGGER<<4);
+ break;
+ }
+ case TIMER_MODE_GPIO_WIDTH:
+ {
+ reg_irq_mask |= FLD_IRQ_TMR1_EN;
+ reg_tmr1_tick = init_tick;
+ reg_tmr_sta = FLD_TMR_STA_TMR1;
+ reg_tmr_ctrl &= (~FLD_TMR1_MODE);
+ reg_tmr_ctrl |= (TIMER_MODE_GPIO_WIDTH<<4);
+ break;
+ }
+ case TIMER_MODE_TICK:
+ {
+ reg_irq_mask |= FLD_IRQ_TMR1_EN;
+ reg_tmr1_tick = init_tick; //clear counter
+ reg_tmr_sta = FLD_TMR_STA_TMR1; //clear irq status
+ reg_tmr_ctrl &= (~FLD_TMR1_MODE);
+ reg_tmr_ctrl |= (TIMER_MODE_TICK<<4);
+ break;
+ }
+ default: break;
+ }
+}
+/**
+ * @brief set mode, initial tick and capture of timer2.
+ * @param[in] mode - select mode for timer2.
+ * @param[in] init_tick - initial tick.
+ * @param[in] cap_tick - tick of capture.
+ * @return none
+ */
+void timer2_set_mode(TIMER_ModeTypeDef mode,unsigned int init_tick, unsigned int cap_tick)
+{
+ switch(mode)
+ {
+ case TIMER_MODE_SYSCLK:
+ {
+ reg_irq_mask |= FLD_IRQ_TMR2_EN;
+ reg_tmr2_tick = init_tick;
+ reg_tmr2_capt = cap_tick;
+ reg_tmr_sta = FLD_TMR_STA_TMR2; //clear irq status
+ reg_tmr_ctrl &= (~FLD_TMR2_MODE);
+ reg_tmr_ctrl |= (TIMER_MODE_SYSCLK<<7);
+ break;
+ }
+ case TIMER_MODE_GPIO_TRIGGER:
+ {
+ reg_irq_mask |= FLD_IRQ_TMR2_EN;
+ reg_tmr2_tick = init_tick;
+ reg_tmr2_capt = cap_tick;
+ reg_tmr_sta = FLD_TMR_STA_TMR2; //clear irq status
+ reg_tmr_ctrl &= (~FLD_TMR2_MODE);
+ reg_tmr_ctrl |= (TIMER_MODE_GPIO_TRIGGER<<7);
+ break;
+ }
+ case TIMER_MODE_GPIO_WIDTH:
+ {
+ reg_irq_mask |= FLD_IRQ_TMR2_EN;
+ reg_tmr2_tick = init_tick;
+ reg_tmr_sta = FLD_TMR_STA_TMR2;
+ reg_tmr_ctrl &= (~FLD_TMR2_MODE);
+ reg_tmr_ctrl |= (TIMER_MODE_GPIO_WIDTH<<7);
+ break;
+ }
+ case TIMER_MODE_TICK:
+ {
+ reg_irq_mask |= FLD_IRQ_TMR2_EN;
+ reg_tmr2_tick = init_tick; //clear counter
+ reg_tmr_sta = FLD_TMR_STA_TMR2; //clear irq status
+ reg_tmr_ctrl &= (~FLD_TMR2_MODE);
+ reg_tmr_ctrl |= (TIMER_MODE_TICK<<7);
+ break;
+ }
+ default: break;
+ }
+}
+/**
+ * @brief the specifed timer start working.
+ * @param[in] type - select the timer to start.
+ * @return none
+ */
+void timer_start(TIMER_TypeDef type)
+{
+ switch(type)
+ {
+ case TIMER0:
+ reg_tmr_ctrl |= FLD_TMR0_EN;
+ break;
+ case TIMER1:
+ reg_tmr_ctrl |= FLD_TMR1_EN;
+ break;
+ case TIMER2:
+ reg_tmr_ctrl |= FLD_TMR2_EN;
+ break;
+ default:
+ break;
+ }
+}
+/**
+ * @brief the specifed timer stop working.
+ * @param[in] type - select the timer to stop.
+ * @return none
+ */
+void timer_stop(TIMER_TypeDef type)
+{
+ switch(type)
+ {
+ case TIMER0:
+ reg_tmr_ctrl &= (~FLD_TMR0_EN);
+ break;
+ case TIMER1:
+ reg_tmr_ctrl &= (~FLD_TMR1_EN);
+ break;
+ case TIMER2:
+ reg_tmr_ctrl &= (~FLD_TMR2_EN);
+ break;
+ default:
+ break;
+ }
+}
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/timer.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/timer.h
new file mode 100644
index 0000000000000..8dbb5c5cfc9fe
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/timer.h
@@ -0,0 +1,226 @@
+/********************************************************************************************************
+ * @file timer.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author junwei.lu
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ * @par History:
+ * 1.initial release(DEC. 26 2018)
+ *
+ * @version A001
+ *
+ *******************************************************************************************************/
+
+#ifndef TIMER_H
+#define TIMER_H
+
+#include "bsp.h"
+#include "gpio.h"
+
+/**
+ * @brief Type of Timer
+ */
+typedef enum{
+ TIMER0 =0,
+ TIMER1 =1,
+ TIMER2 =2,
+}TIMER_TypeDef;
+
+/**
+ * @brief Mode of Timer
+ */
+typedef enum{
+ TIMER_MODE_SYSCLK =0,
+ TIMER_MODE_GPIO_TRIGGER =1,
+ TIMER_MODE_GPIO_WIDTH =2,
+ TIMER_MODE_TICK =3,
+}TIMER_ModeTypeDef;
+
+/**
+ * @brief initiate GPIO for gpio trigger and gpio width mode of timer0.
+ * @param[in] pin - select pin for timer0.
+ * @param[in] pol - select polarity for gpio trigger and gpio width
+ * @return none
+ */
+extern void timer0_gpio_init(GPIO_PinTypeDef pin, GPIO_PolTypeDef pol);
+
+/**
+ * @brief initiate GPIO for gpio trigger and gpio width mode of timer1.
+ * @param[in] pin - select pin for timer1.
+ * @param[in] pol - select polarity for gpio trigger and gpio width
+ * @return none
+ */
+extern void timer1_gpio_init(GPIO_PinTypeDef pin, GPIO_PolTypeDef pol);
+
+/**
+ * @brief initiate GPIO for gpio trigger and gpio width mode of timer2.
+ * @param[in] pin - select pin for timer2.
+ * @param[in] pol - select polarity for gpio trigger and gpio width
+ * @return none
+ */
+extern void timer2_gpio_init(GPIO_PinTypeDef pin,GPIO_PolTypeDef pol);
+
+/**
+ * @brief set mode, initial tick and capture of timer0.
+ * @param[in] mode - select mode for timer0.
+ * @param[in] init_tick - initial tick.
+ * @param[in] cap_tick - tick of capture.
+ * @return none
+ */
+extern void timer0_set_mode(TIMER_ModeTypeDef mode,unsigned int init_tick, unsigned int cap_tick);
+
+/**
+ * @brief set mode, initial tick and capture of timer1.
+ * @param[in] mode - select mode for timer1.
+ * @param[in] init_tick - initial tick.
+ * @param[in] cap_tick - tick of capture.
+ * @return none
+ */
+extern void timer1_set_mode(TIMER_ModeTypeDef mode,unsigned int init_tick, unsigned int cap_tick);
+
+/**
+ * @brief set mode, initial tick and capture of timer2.
+ * @param[in] mode - select mode for timer2.
+ * @param[in] init_tick - initial tick.
+ * @param[in] cap_tick - tick of capture.
+ * @return none
+ */
+extern void timer2_set_mode(TIMER_ModeTypeDef mode,unsigned int init_tick, unsigned int cap_tick);
+
+/**
+ * @brief the specifed timer start working.
+ * @param[in] type - select the timer to start.
+ * @return none
+ */
+extern void timer_start(TIMER_TypeDef type);
+
+/**
+ * @brief the specifed timer stop working.
+ * @param[in] type - select the timer to stop.
+ * @return none
+ */
+extern void timer_stop(TIMER_TypeDef type);
+
+#endif /* TIMER_H_ */
+
+/** \defgroup GP10 Timer Examples
+ *
+ * @{
+ */
+
+/*! \page timer Table of Contents
+ - [API-TIMER-CASE1:TIMER SYS CLOCK MODE](#TIMER_SYS_CLOCK_MODE)
+ - [API-TIMER-CASE2:TIMER GPIO TRIGGER MODE](#TIMER_GPIO_TRIGGER_MODE)
+ - [API-TIMER-CASE3:TIMER GPIO WIDTH MODE](#TIMER_GPIO_WIDTH_MODE)
+ - [API-TIMER-CASE4:TIMER TICK MODE](#TIMER_TICK_MODE)
+ - [API-TIMER-CASE5:TIMER WATCHDOG MODE](#TIMER_WATCHDOG_MODE)
+
+\n
+Variables used in the following cases are defined as below
+~~~~~~~~~~~~~~~~~~~~~~~~~~~{.c}
+#define LED1 GPIO_PD0
+#define LED2 GPIO_PD3
+#define LED3 GPIO_PD4
+#define LED4 GPIO_PD5
+
+#define SW1 GPIO_PD1
+#define SW2 GPIO_PD2
+~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
API-TIMER-CASE1:TIMER SYS CLOCK MODE
+
+| Function | Sub-Function | APIs || Description | Update Status |
+| :------- | :----------- | :---------- | :---------- |:---------- | :------------ |
+| irq_handler() | none ||| Interrupt handler function | 2019-1-10 |
+| main() | system_init() ||| CPU initialization function [**Mandatory**] | ^ |
+| ^ | clock_init() | clock_init(SYS_CLK_24M_XTAL) || Clock initialization function, System Clock is 24M RC by default [**optional**] | ^ |
+| ^ | rf_mode_init() | rf_mode_init(RF_MODE_BLE_1M) || RF mode initialization [**optional**] | ^ |
+| ^ | gpio_init() ||| GPIO initialization: set the initialization status of all GPIOs [**optional**] | ^ |
+| ^ | user_init() | timer2_set_mode() | timer2_set_mode(TIMER_MODE_SYSCLK,0,1000 * CLOCK_SYS_CLOCK_1MS) | set the mode and parameter for timer2 | ^ |
+| ^ | ^ | timer_start() | timer_start(TIMER2) | start timer2 | ^ |
+| ^ | main_loop() | none || Main program loop | ^ |
+
+
API-TIMER-CASE2:TIMER GPIO TRIGGER MODE
+
+| Function | Sub-Function | APIs || Description | Update Status |
+| :------- | :----------- | :---------- | :---------- |:---------- | :------------ |
+| irq_handler() | if(reg_tmr_sta & FLD_TMR_STA_TMR2 == FLD_TMR_STA_TMR2) ||| determine whether timer2 interrupt flag is right | 2019-1-10 |
+| ^ | reg_tmr_sta Ι= FLD_TMR_STA_TMR2 ||| clear interrupt flag | ^ |
+| ^ | timer2_irq_cnt ++ ||| interrupt processing function | ^ |
+| main() | system_init() ||| CPU initialization function [**Mandatory**] | ^ |
+| ^ | clock_init() | clock_init(SYS_CLK_24M_XTAL) || Clock initialization function, System Clock is 24M RC by default [**optional**] | ^ |
+| ^ | rf_mode_init() | rf_mode_init(RF_MODE_BLE_1M) || RF mode initialization [**optional**] | ^ |
+| ^ | gpio_init() ||| GPIO initialization: set the initialization status of all GPIOs [**optional**] | ^ |
+| ^ | user_init() | timer2_gpio_init() | timer2_gpio_init(SW1, POL_FALLING) | open interrupt of the specified pin for timer2 | ^ |
+| ^ | ^ | irq_enable() || enable global interrupt | ^ |
+| ^ | ^ | timer2_set_mode() | timer2_set_mode(TIMER_MODE_GPIO_TRIGGER,0,3) | set the mode and parameter for timer2 | ^ |
+| ^ | ^ | timer_start() | timer_start(TIMER2) | start timer2 | ^ |
+| ^ | main_loop() | none || Main program loop | ^ |
+
+
API-TIMER-CASE3:TIMER GPIO WIDTH MODE
+
+| Function | Sub-Function | APIs || Description | Update Status |
+| :------- | :----------- | :---------- | :---------- |:---------- | :------------ |
+| irq_handler() | if(reg_tmr_sta & FLD_TMR_STA_TMR2 == FLD_TMR_STA_TMR2) ||| determine whether timer2 interrupt flag is right | 2019-1-10 |
+| ^ | reg_tmr_sta Ι= FLD_TMR_STA_TMR2 ||| clear interrupt flag | ^ |
+| ^ | gpio_width = reg_tmr2_tick ||| get the tick of gpio width | ^ |
+| ^ | reg_tmr2_tick = 0 ||| clear tick of timer2 to count again | ^ |
+| main() | system_init() ||| CPU initialization function [**Mandatory**] | ^ |
+| ^ | clock_init() | clock_init(SYS_CLK_24M_XTAL) || Clock initialization function, System Clock is 24M RC by default [**optional**] | ^ |
+| ^ | rf_mode_init() | rf_mode_init(RF_MODE_BLE_1M) || RF mode initialization [**optional**] | ^ |
+| ^ | gpio_init() ||| GPIO initialization: set the initialization status of all GPIOs [**optional**] | ^ |
+| ^ | user_init() | timer2_gpio_init() | timer2_gpio_init(SW1, POL_FALLING) | open interrupt of the specified pin for timer2 | ^ |
+| ^ | ^ | irq_enable() || enable global interrupt | ^ |
+| ^ | ^ | timer2_set_mode() | timer2_set_mode(TIMER_MODE_GPIO_WIDTH,0,0) | set the mode and parameter for timer2 | ^ |
+| ^ | ^ | timer_start() | timer_start(TIMER2) | start timer2 | ^ |
+| ^ | main_loop() | none || Main program loop | ^ |
+
+
API-TIMER-CASE4:TIMER TICK MODE
+
+| Function | Sub-Function | APIs || Description | Update Status |
+| :------- | :----------- | :---------- | :---------- |:---------- | :------------ |
+| irq_handler() | none ||| Interrupt handler function | 2019-1-10 |
+| main() | system_init() ||| CPU initialization function [**Mandatory**] | ^ |
+| ^ | clock_init() | clock_init(SYS_CLK_24M_XTAL) || Clock initialization function, System Clock is 24M RC by default [**optional**] | ^ |
+| ^ | rf_mode_init() | rf_mode_init(RF_MODE_BLE_1M) || RF mode initialization [**optional**] | ^ |
+| ^ | gpio_init() ||| GPIO initialization: set the initialization status of all GPIOs [**optional**] | ^ |
+| ^ | user_init() | timer2_set_mode() | timer2_set_mode(TIMER_MODE_TICK,0,0) | set the mode and parameter for timer2 | ^ |
+| ^ | ^ | timer_start() | timer_start(TIMER2) | start timer2 | ^ |
+| ^ | main_loop() | none || Main program loop | ^ |
+
+
API-TIMER-CASE5:TIMER WATCHDOG MODE
+
+| Function | Sub-Function | APIs || Description | Update Status |
+| :------- | :----------- | :---------- | :---------- |:---------- | :------------ |
+| irq_handler() | none ||| Interrupt handler function | 2019-1-10 |
+| main() | system_init() ||| CPU initialization function [**Mandatory**] | ^ |
+| ^ | clock_init() | clock_init(SYS_CLK_24M_XTAL) || Clock initialization function, System Clock is 24M RC by default [**optional**] | ^ |
+| ^ | rf_mode_init() | rf_mode_init(RF_MODE_BLE_1M) || RF mode initialization [**optional**] | ^ |
+| ^ | gpio_init() ||| GPIO initialization: set the initialization status of all GPIOs [**optional**] | ^ |
+| ^ | user_init() | wd_set_interval_ms() | wd_set_interval_ms(1000,CLOCK_SYS_CLOCK_1MS) | set parameter for watchdog mode of timer2 | ^ |
+| ^ | ^ | wd_start() || start watchdog | ^ |
+| ^ | main_loop() | wd_clear() || feed the dog | ^ |
+
+
History Record
+
+| Date | Description | Author |
+| :--- | :---------- | :----- |
+| 2019-1-10 | initial release | LJW |
+
+
+*/
+
+ /** @}*/ //end of GP10
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/uart.c b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/uart.c
new file mode 100644
index 0000000000000..2c0307cbb020d
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/uart.c
@@ -0,0 +1,353 @@
+/********************************************************************************************************
+ * @file uart.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author peng.sun ; yang.ye
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "uart.h"
+#include "gpio.h"
+#include
+
+/**
+ * @brief data receive buffer initiate function. DMA would move received uart data to the address space,
+ * uart packet length needs to be no larger than (recBuffLen - 4).
+ * @param[in] RecvAddr - pointer to the receiving buffer
+ * @param[in] RecvBufLen - length in byte of the receiving buffer
+ * @return none
+ */
+void uart_set_recbuff(unsigned short *RecvAddr, unsigned short RecvBufLen){
+ unsigned char bufLen;
+ bufLen = RecvBufLen>>4;
+
+ reg_dma0_addr = (unsigned int)(RecvAddr) & 0xffff;//set receive buffer address
+ reg_dma0_size = bufLen;//set receive buffer size
+ reg_dma0_mode = FLD_DMA_1WR_0RD_MEM; //set DMA 0 mode to 0x01 for receive
+}
+
+/**
+ *define the macro that configures pin port for UART interface
+ */
+void uart_set_pin(UART_TxPinDef tx_pin,UART_RxPinDef rx_pin)
+{
+ //note: pullup setting must before uart gpio config, cause it will lead to ERR data to uart RX buffer(confirmed by sihui&sunpeng)
+ //PM_PIN_PULLUP_1M PM_PIN_PULLUP_10K
+ gpio_setup_up_down_resistor(tx_pin, PM_PIN_PULLUP_1M); //must, for stability and prevent from current leakage
+ gpio_setup_up_down_resistor(rx_pin, PM_PIN_PULLUP_10K); //must for stability and prevent from current leakage
+
+
+ gpio_set_func(tx_pin,AS_UART_TX); // set tx pin
+ gpio_set_func(rx_pin,AS_UART_RX); // set rx pin
+
+
+ gpio_set_input_en(tx_pin, 1); //experiment shows that tx_pin should open input en(confirmed by qiuwei)
+ gpio_set_input_en(rx_pin, 1); //
+
+}
+
+/**
+ * @brief uart initiate, set uart clock divider, bitwidth and the uart work mode
+ * @param uartCLKdiv - uart clock divider
+ * bwpc - bitwidth, should be set to larger than 2
+ * @return '1' set success; '0' set error probably bwpc smaller than 3.
+ * BaudRate = sclk/((uartCLKdiv+1)*(bwpc+1))
+ * SYCLK = 16Mhz
+ * 115200 9 13
+ * 9600 103 15
+ *
+ * SYCLK = 32Mhz
+ * 115200 19 13
+ * 9600 237 13
+ */
+void uart_init_baudrate(unsigned short uart_div, unsigned char bwpc, UART_ParityTypeDef Parity, UART_StopBitTypeDef StopBit)
+{
+ reg_clk_en1 |= FLD_CLK1_RS232_EN;//enable uart clock
+ /*******************1.config bautrate and timeout********************************/
+ reg_uart_ctrl0 = bwpc; //set bwpc
+ reg_uart_clk_div = (uart_div | FLD_UART_CLK_DIV_EN); //set div_clock
+ reg_uart_rx_timeout0 = (bwpc+1) * 12; //one byte includes 12 bits at most
+ reg_uart_rx_timeout1 = FLD_UART_BW_MUL2; //if over 2*(tmp_bwpc+1),one transaction end.
+
+ /*******************2.config parity function*************************************/
+ //parity config
+ if (Parity) {
+ reg_uart_ctrl1 |= FLD_UART_CTRL1_PARITY_EN; //enable parity function
+ if (PARITY_EVEN == Parity) {
+ reg_uart_ctrl1 &= (~FLD_UART_CTRL1_PARITY_POLARITY); //enable even parity
+ }
+ else if (PARITY_ODD == Parity) {
+ reg_uart_ctrl1 |= FLD_UART_CTRL1_PARITY_POLARITY; //enable odd parity
+ }
+ }
+ else {
+ reg_uart_ctrl1 &= (~FLD_UART_CTRL1_PARITY_EN); //disable parity function
+ }
+
+ //stop bit config
+ reg_uart_ctrl1 &= (~FLD_UART_CTRL1_STOP_BIT);
+ reg_uart_ctrl1 |= StopBit;
+}
+
+/**
+ * @brief enable uart DMA mode
+ * @param[in] none
+ * @return none
+ */
+void uart_dma_en(unsigned char rx_dma_en, unsigned char tx_dma_en)
+{
+
+ //enable DMA function of tx and rx
+ if(rx_dma_en){
+ reg_uart_ctrl0 |= FLD_UART_RX_DMA_EN ;
+ }else{
+ reg_uart_ctrl0 &= (~FLD_UART_RX_DMA_EN );
+ }
+
+ if(tx_dma_en){
+ reg_uart_ctrl0 |= FLD_UART_TX_DMA_EN;
+ }else{
+ reg_uart_ctrl0 &= (~FLD_UART_TX_DMA_EN);
+ }
+
+}
+
+/**
+ * @brief config the irq of uart tx and rx
+ * @param[in] rx_irq_en - 1:enable rx irq. 0:disable rx irq
+ * @param[in] tx_irq_en - 1:enable tx irq. 0:disable tx irq
+ * @return none
+ */
+void uart_irq_en(unsigned char rx_irq_en, unsigned char tx_irq_en)
+{
+ if(rx_irq_en){
+ reg_uart_ctrl0 |= FLD_UART_RX_IRQ_EN ;
+ }else{
+ reg_uart_ctrl0 &= (~FLD_UART_RX_IRQ_EN );
+ }
+
+ if(tx_irq_en){
+ reg_uart_ctrl0 |= FLD_UART_TX_IRQ_EN;
+ }else{
+ reg_uart_ctrl0 &= (~FLD_UART_TX_IRQ_EN);
+ }
+
+ if(tx_irq_en||rx_irq_en)
+ {
+ reg_irq_mask |= FLD_IRQ_UART_EN;
+ }
+ else
+ {
+ reg_irq_mask &= ~FLD_IRQ_UART_EN;
+ }
+}
+
+/**
+ * @brief uart send data function, this function tell the DMA to get data from the RAM and start
+ * the DMA transmission
+ * @param[in] Addr - pointer to the buffer containing data need to send
+ * @return 1: send success ;
+ * 0: DMA busy
+ */
+volatile unsigned char uart_dma_send(unsigned short* Addr)
+{
+ if (reg_uart_status1 & FLD_UART_TX_DONE )
+ {
+ reg_dma1_addr = (unsigned short)(unsigned int)Addr; //packet data, start address is sendBuff+1
+ reg_dma_tx_rdy0 |= FLD_DMA_CHN_UART_TX;
+ return 1;
+ }
+
+ return 0;
+}
+
+/**
+ * @brief uart send data function, this function tell the DMA to get data from the RAM and start
+ * the DMA transmission
+ * @param[in] byte - single byte data need to send
+ * @return 1: send success ;
+ * 0: DMA busy
+ */
+volatile unsigned char uart_dma_send_byte(unsigned char byte)
+{
+ unsigned int addr;
+
+ unsigned char b[5] = {1, 0,0,0,0};
+
+ addr = (unsigned int)b;
+
+ b[4] = byte;
+ if (reg_uart_status1 & FLD_UART_TX_DONE ) {
+ reg_dma1_addr = addr; //packet data, start address is sendBuff+1
+ reg_dma_tx_rdy0 = FLD_DMA_CHN1;
+ return 1;
+ }
+
+ return 0;
+}
+/**
+ * @brief config the number level setting the irq bit of status register 0x9d
+ * ie 0x9d[3].
+ * If the cnt register value(0x9c[0,3]) larger or equal than the value of 0x99[0,3]
+ * or the cnt register value(0x9c[4,7]) less or equal than the value of 0x99[4,7],
+ * it will set the irq bit of status register 0x9d, ie 0x9d[3]
+ * @param[in] rx_level - receive level value. ie 0x99[0,3]
+ * @param[in] tx_level - transmit level value.ie 0x99[4,7]
+ * @return none
+ */
+void uart_ndma_set_triglevel(unsigned char rx_level, unsigned char tx_level)
+{
+ reg_uart_ctrl3 = rx_level | (tx_level<<4);
+}
+
+/**
+ * @brief get the status of uart irq.
+ * @param[in] none
+ * @return 0: not uart irq ;
+ * not 0: indicate tx or rx irq
+ */
+unsigned char uart_ndma_get_irq(void)
+{
+ return (reg_uart_status0&FLD_UART_IRQ_FLAG );
+}
+
+
+/**
+ * @brief uart send data function with not DMA method.
+ * variable uart_TxIndex,it must cycle the four registers 0x90 0x91 0x92 0x93 for the design of SOC.
+ * so we need variable to remember the index.
+ * @param[in] uartData - the data to be send.
+ * @return none
+ */
+unsigned char uart_TxIndex = 0;
+void uart_ndma_send_byte(unsigned char uartData)
+{
+ int t;
+
+ t = 0;
+ while( uart_tx_is_busy() && (t<0xfffff))
+ {
+ t++;
+ }
+ if(t >= 0xfffff)
+ return;
+
+ reg_uart_data_buf(uart_TxIndex) = uartData;
+
+ uart_TxIndex++;
+ uart_TxIndex &= 0x03;// cycle the four register 0x90 0x91 0x92 0x93.
+}
+
+
+
+
+/**
+ * @Brief: UART CTS initialization.
+ * @Param:
+ * @Retval: None.
+ */
+void uart_set_cts(unsigned char ctsEnable,unsigned char pinValue,UART_CtsPinDef pin )
+{
+ if(pinValue)
+ {
+ reg_uart_ctrl1 |= FLD_UART_CTRL1_CTS_SELECT;
+ }
+ else
+ {
+ reg_uart_ctrl1 &= ~FLD_UART_CTRL1_CTS_SELECT;;
+ }
+
+ if(ctsEnable)
+ {
+ gpio_set_func(pin,AS_UART_CTS);
+ gpio_set_input_en(pin, 1);
+ reg_uart_ctrl1 |= FLD_UART_CTRL1_CTS_EN;
+ }
+ else
+ {
+ reg_uart_ctrl1 &= ~FLD_UART_CTRL1_CTS_EN;
+ }
+}
+
+/**
+ * @brief UART hardware flow control configuration. Configure RTS pin.
+ * @param[in] Enable - enable or disable RTS function.
+ * @param[in] Mode - set the mode of RTS(auto or manual).
+ * @param[in] Thresh - threshold of trig RTS pin's level toggle(only for auto mode),
+ * it means the number of bytes that has arrived in Rx buf.
+ * @param[in] Invert - whether invert the output of RTS pin(only for auto mode)
+ * @param[in] GPIO - RTS pin select,it can be GPIO_PA4/GPIO_PB3/GPIO_PB6/GPIO_PC0.
+ * @return none
+ */
+void uart_set_rts(unsigned char Enable, UART_RTSModeTypeDef Mode, unsigned char Thresh, unsigned char Invert, UART_RtsPinDef pin)
+{
+ if (Enable)
+ {
+ gpio_set_func(pin,AS_UART_RTS);
+ gpio_set_input_en(pin, 1);//enable input
+ gpio_set_output_en(pin, 1);//enable output
+
+ reg_uart_ctrl2 |= FLD_UART_CTRL2_RTS_EN; //enable RTS function
+ }
+ else
+ {
+ reg_uart_ctrl2 &= (~FLD_UART_CTRL2_RTS_EN); //disable RTS function
+ }
+
+ if (Mode)
+ {
+ reg_uart_ctrl2 |= FLD_UART_CTRL2_RTS_MANUAL_EN;
+ }
+ else {
+ reg_uart_ctrl2 &= (~FLD_UART_CTRL2_RTS_MANUAL_EN);
+ }
+
+ if (Invert) {
+ reg_uart_ctrl2 |= FLD_UART_CTRL2_RTS_PARITY;
+ }
+ else {
+ reg_uart_ctrl2 &= (~FLD_UART_CTRL2_RTS_PARITY);
+ }
+
+ //set threshold
+ reg_uart_ctrl2 &= (~FLD_UART_CTRL2_RTS_TRIG_LVL);
+ reg_uart_ctrl2 |= (Thresh & FLD_UART_CTRL2_RTS_TRIG_LVL);
+}
+
+/**
+ * @brief This function determines whether parity error occurs once a packet arrives.
+ * @param[in] none
+ * @return 1: parity error ;
+ * 0: no parity error
+ */
+unsigned char uart_is_parity_error(void)
+{
+ return (reg_uart_status0 & FLD_UART_RX_ERR_FLAG);
+}
+
+/**
+ * @brief This function clears parity error status once when it occurs.
+ * @param[in] none
+ * @return none
+ */
+void uart_clear_parity_error(void)
+{
+ reg_uart_status0|= FLD_UART_RX_ERR_CLR; //write 1 to clear
+}
+
+
+/*-------------------------- End of File -------------------------------------*/
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/uart.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/uart.h
new file mode 100644
index 0000000000000..f0bde14ebc591
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/uart.h
@@ -0,0 +1,264 @@
+/********************************************************************************************************
+ * @file uart.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author peng.sun ; yang.ye
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#ifndef _UART_H
+#define _UART_H
+
+#include "register.h"
+#include "gpio.h"
+
+/**
+ * @brief Define mul bits
+ */
+enum{
+ FLD_UART_BW_MUL1 = 0, // timeout is bit_width*1
+ FLD_UART_BW_MUL2 = 1, // timeout is bit_width*2
+ FLD_UART_BW_MUL3 = 2, // timeout is bit_width*3
+ FLD_UART_BW_MUL4 = 3, // timeout is bit_width*4
+};
+
+/**
+ * @brief Define parity type
+ */
+typedef enum {
+ PARITY_NONE = 0,
+ PARITY_EVEN,
+ PARITY_ODD,
+}UART_ParityTypeDef;
+
+/**
+ * @brief Define the length of stop bit
+ */
+typedef enum {
+ STOP_BIT_ONE = 0,
+ STOP_BIT_ONE_DOT_FIVE = BIT(12),
+ STOP_BIT_TWO = BIT(13),
+}UART_StopBitTypeDef;
+
+
+/**
+ * @brief Define uart tx pin
+ */
+typedef enum{
+ UART_TX_PA3 = GPIO_PA3,
+ UART_TX_PB4 = GPIO_PB4,//?
+ UART_TX_PC4 = GPIO_PC4,
+}UART_TxPinDef;
+
+/**
+ * @brief Define uart rx pin
+ */
+typedef enum{
+ UART_RX_PA4 = GPIO_PA4,//OK
+ UART_RX_PB5 = GPIO_PB5,//Uncertain
+ UART_RX_PC5 = GPIO_PC5,//OK
+
+}UART_RxPinDef;
+
+typedef enum{
+
+ UART_CTS_PA1 = GPIO_PA1,
+ UART_CTS_PB2 = GPIO_PB2,
+ UART_CTS_PB7 = GPIO_PB7,//
+ UART_CTS_PC2 = GPIO_PC2,
+
+}UART_CtsPinDef;
+
+
+typedef enum{
+
+ UART_RTS_PA2 = GPIO_PA2,//0K
+ UART_RTS_PB3 = GPIO_PB3,//Failure
+ UART_RTS_PB6 = GPIO_PB6,//Uncertain
+ UART_RTS_PC3 = GPIO_PC3,//0K
+
+}UART_RtsPinDef;
+
+/**
+ * @brief Define UART RTS mode
+ */
+typedef enum {
+ UART_RTS_MODE_AUTO = 0,
+ UART_RTS_MODE_MANUAL,
+} UART_RTSModeTypeDef;
+
+extern unsigned char uart_TxIndex;
+
+/**
+ * @brief This function servers to indicate Tx state.
+ * @param[in] none.
+ * @return the state of Tx 0:Tx done 1:not.
+ */
+static inline unsigned char uart_tx_is_busy(void)
+{
+ return ( (reg_uart_status1 & FLD_UART_TX_DONE) ? 0 : 1) ;
+}
+
+/**
+ * @brief This function is used to set the 'uart_TxIndex' to 0.
+ * After wakeup from power-saving mode, you must call this function before sending the data.
+ * @param[in] none.
+ * @return none.
+ */
+static inline void uart_ndma_clear_tx_index(void)
+{
+ uart_TxIndex=0;
+}
+
+/**
+ * @brief reset uart module
+ * @param none
+ * @return none
+ */
+static inline void uart_reset(void){
+ BM_SET(reg_rst1, FLD_RST1_RS232);
+ BM_CLR(reg_rst1, FLD_RST1_RS232);
+}
+
+/**
+ * @brief data receive buffer initiate function. DMA would move received uart data to the address space,
+ * uart packet length needs to be no larger than (recBuffLen - 4).
+ * @param[in] RecvAddr - pointer to the receiving buffer
+ * @param[in] RecvBufLen - length in byte of the receiving buffer
+ * @return none
+ */
+extern void uart_set_recbuff(unsigned short *RecvAddr, unsigned short RecvBufLen);
+
+/**
+ *define the macro that configures pin port for UART interface
+ */
+extern void uart_set_pin(UART_TxPinDef tx_pin,UART_RxPinDef rx_pin);
+
+/**
+ * @brief uart initiate, set uart clock divider, bitwidth and the uart work mode
+ * @param uartCLKdiv - uart clock divider
+ * bwpc - bitwidth, should be set to larger than 2
+ * @return '1' set success; '0' set error probably bwpc smaller than 3.
+ * BaudRate = sclk/((uartCLKdiv+1)*(bwpc+1))
+ * SYCLK = 16Mhz
+ * 115200 9 13
+ * 9600 103 15
+ *
+ * SYCLK = 32Mhz
+ * 115200 19 13
+ * 9600 237 13
+ */
+extern void uart_init_baudrate(unsigned short uart_div, unsigned char bwpc,UART_ParityTypeDef Parity, UART_StopBitTypeDef StopBit);
+
+/**
+ * @brief enable uart DMA mode
+ * @param[in] none
+ * @return none
+ */
+extern void uart_dma_en(unsigned char rx_dma_en, unsigned char tx_dma_en);
+
+/**
+ * @brief config the irq of uart tx and rx
+ * @param[in] rx_irq_en - 1:enable rx irq. 0:disable rx irq
+ * @param[in] tx_irq_en - 1:enable tx irq. 0:disable tx irq
+ * @return none
+ */
+extern void uart_irq_en(unsigned char rx_irq_en,unsigned char tx_irq_en);
+
+/**
+ * @brief uart send data function, this function tell the DMA to get data from the RAM and start
+ * the DMA transmission
+ * @param[in] Addr - pointer to the buffer containing data need to send
+ * @return 1: send success ;
+ * 0: DMA busy
+ */
+extern volatile unsigned char uart_dma_send(unsigned short* Addr);
+
+/**
+ * @brief uart send data function, this function tell the DMA to get data from the RAM and start
+ * the DMA transmission
+ * @param[in] byte - single byte data need to send
+ * @return 1: send success ;
+ * 0: DMA busy
+ */
+volatile unsigned char uart_dma_send_byte(unsigned char byte);
+
+/**
+ * @brief config the number level setting the irq bit of status register 0x9d
+ * ie 0x9d[3].
+ * If the cnt register value(0x9c[0,3]) larger or equal than the value of 0x99[0,3]
+ * or the cnt register value(0x9c[4,7]) less or equal than the value of 0x99[4,7],
+ * it will set the irq bit of status register 0x9d, ie 0x9d[3]
+ * @param[in] rx_level - receive level value. ie 0x99[0,3]
+ * @param[in] tx_level - transmit level value.ie 0x99[4,7]
+ * @return none
+ */
+extern void uart_ndma_set_triglevel(unsigned char rx_level, unsigned char tx_level);
+
+/**
+ * @brief get the status of uart irq.
+ * @param[in] none
+ * @return 0: not uart irq ;
+ * not 0: indicate tx or rx irq
+ */
+extern unsigned char uart_ndma_get_irq(void);
+
+/**
+ * @brief uart send data function with not DMA method.
+ * variable uart_TxIndex,it must cycle the four registers 0x90 0x91 0x92 0x93 for the design of SOC.
+ * so we need variable to remember the index.
+ * @param[in] uartData - the data to be send.
+ * @return none
+ */
+extern void uart_ndma_send_byte(unsigned char uartData);
+
+/**
+ * @Brief: UART CTS initialization.
+ * @Param:
+ * @Retval: None.
+ */
+extern void uart_set_cts(unsigned char ctsEnable,unsigned char pinValue,UART_CtsPinDef pin);
+
+/**
+ * @brief UART hardware flow control configuration. Configure RTS pin.
+ * @param[in] Enable - enable or disable RTS function.
+ * @param[in] Mode - set the mode of RTS(auto or manual).
+ * @param[in] Thresh - threshold of trig RTS pin's level toggle(only for auto mode),
+ * it means the number of bytes that has arrived in Rx buf.
+ * @param[in] Invert - whether invert the output of RTS pin(only for auto mode)
+ * @param[in] GPIO - RTS pin select,it can be GPIO_PA4/GPIO_PB3/GPIO_PB6/GPIO_PC0.
+ * @return none
+ */
+extern void uart_set_rts(unsigned char Enable, UART_RTSModeTypeDef Mode, unsigned char Thresh, unsigned char Invert, UART_RtsPinDef pin);
+
+/**
+ * @brief This function determines whether parity error occurs once a packet arrives.
+ * @param[in] none
+ * @return 1: parity error ;
+ * 0: no parity error
+ */
+extern unsigned char uart_is_parity_error(void);
+
+/**
+ * @brief This function clears parity error status once when it occurs.
+ * @param[in] none
+ * @return none
+ */
+extern void uart_clear_parity_error(void);
+
+
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/usbkeycode.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/usbkeycode.h
new file mode 100644
index 0000000000000..a80ac40bf7845
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/usbkeycode.h
@@ -0,0 +1,334 @@
+/********************************************************************************************************
+ * @file usbkeycode.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#define VK_NONE 0x00
+
+// function key bitmap
+#define VK_MSK_CTRL 0x01
+#define VK_MSK_SHIFT 0x02
+#define VK_MSK_ALT 0x04
+#define VK_MSK_WIN 0x08
+
+#define VK_MSK_LCTRL 0x01
+#define VK_MSK_LSHIFT 0x02
+#define VK_MSK_LALT 0x04
+#define VK_MSK_LWIN 0x08
+
+#define VK_MSK_RCTRL 0x10
+#define VK_MSK_RSHIFT 0x20
+#define VK_MSK_RALT 0x40
+#define VK_MSK_RWIN 0x80
+
+// ordinary keys
+#define VK_A 0x04
+#define VK_B 0x05
+#define VK_C 0x06
+#define VK_D 0x07
+#define VK_E 0x08
+#define VK_F 0x09
+#define VK_G 0x0a
+#define VK_H 0x0b
+#define VK_I 0x0c
+#define VK_J 0x0d
+#define VK_K 0x0e
+#define VK_L 0x0f
+#define VK_M 0x10
+#define VK_N 0x11
+#define VK_O 0x12
+#define VK_P 0x13
+#define VK_Q 0x14
+#define VK_R 0x15
+#define VK_S 0x16
+#define VK_T 0x17
+#define VK_U 0x18
+#define VK_V 0x19
+#define VK_W 0x1a
+#define VK_X 0x1b
+#define VK_Y 0x1c
+#define VK_Z 0x1d
+#define VK_1 0x1e
+#define VK_2 0x1f
+#define VK_3 0x20
+#define VK_4 0x21
+#define VK_5 0x22
+#define VK_6 0x23
+#define VK_7 0x24
+#define VK_8 0x25
+#define VK_9 0x26
+#define VK_0 0x27
+#define VK_ENTER 0x28
+#define VK_ESC 0x29
+#define VK_BACKSPACE 0x2a
+#define VK_TAB 0x2b
+#define VK_SPACE 0x2c
+#define VK_MINUS 0x2d
+#define VK_EQUAL 0x2e
+#define VK_LBRACE 0x2f
+#define VK_RBRACE 0x30
+#define VK_BACKSLASH 0x31
+#define VK_NUMBER 0x32
+#define VK_SEMICOLON 0x33
+#define VK_QUOTE 0x34
+#define VK_TILDE 0x35
+#define VK_COMMA 0x36
+#define VK_PERIOD 0x37
+#define VK_SLASH 0x38
+#define VK_CAPITAL 0x39
+#define VK_F1 0x3a
+#define VK_F2 0x3b
+#define VK_F3 0x3c
+#define VK_F4 0x3d
+#define VK_F5 0x3e
+#define VK_F6 0x3f
+#define VK_F7 0x40
+#define VK_F8 0x41
+#define VK_F9 0x42
+#define VK_F10 0x43
+#define VK_F11 0x44
+#define VK_F12 0x45
+#define VK_PRINTSCREEN 0x46
+#define VK_SCR_LOCK 0x47
+#define VK_PAUSE 0x48
+#define VK_INSERT 0x49
+#define VK_HOME 0x4a
+#define VK_PAGE_UP 0x4b
+#define VK_DELETE 0x4c
+#define VK_END 0x4d
+#define VK_PAGE_DOWN 0x4e
+#define VK_RIGHT 0x4f
+#define VK_LEFT 0x50
+#define VK_DOWN 0x51
+#define VK_UP 0x52
+#define VK_NUM_LOCK 0x53
+#define VKPAD_SLASH 0x54
+#define VKPAD_ASTERIX 0x55
+#define VKPAD_MINUS 0x56
+#define VKPAD_PLUS 0x57
+#define VKPAD_ENTER 0x58
+#define VKPAD_1 0x59
+#define VKPAD_2 0x5a
+#define VKPAD_3 0x5b
+#define VKPAD_4 0x5c
+#define VKPAD_5 0x5d
+#define VKPAD_6 0x5e
+#define VKPAD_7 0x5f
+#define VKPAD_8 0x60
+#define VKPAD_9 0x61
+#define VKPAD_0 0x62
+#define VKPAD_PERIOD 0x63
+#define VK_K45 0x64
+#define VK_APP 0x65
+// below KEY is for ELAN's application matrix
+#define VK_C9R1 0xf0 //C9R1 00
+#define VK_C9R6 0xf1 //C9R6 000
+#define VK_RMB 0xf2 //C7R3
+#define VK_EURO 0xf3 //C0R2
+#define VK_MMODE 0xf4 //C9R4
+
+#define VK_K107 0x85 //ok
+#define VK_K56 0x87 //ok
+#define VK_ROMA 0x88 //ok
+#define VK_K14 0x89 //ok
+#define VK_CHG 0x8a //ok
+#define VK_NCHG 0x8b //ok
+#define VK_KCR 0x90 //ok,K151
+#define VK_KCL 0x91 //ok,K150
+
+// NOT standard, use these reserved code to distinguish ctrol keys
+#ifndef CTRL_SHIFT_E0E7
+#define CTRL_SHIFT_E0E7 1
+#endif
+
+#if CTRL_SHIFT_E0E7
+#define VK_CTRL 0xe0
+#define VK_SHIFT 0xe1
+#define VK_ALT 0xe2
+#define VK_WIN 0xe3
+#define VK_RCTRL 0xe4
+#define VK_RSHIFT 0xe5
+#define VK_RALT 0xe6
+#define VK_RWIN 0xe7
+#else
+#define VK_CTRL 0x90
+#define VK_SHIFT 0x91
+#define VK_ALT 0x92
+#define VK_WIN 0x93
+#define VK_RCTRL 0x94
+#define VK_RSHIFT 0x95
+#define VK_RALT 0x96
+#define VK_RWIN 0x97
+#endif
+
+enum{
+ VK_EXT_START = 0xa0,
+
+ VK_SYS_START = VK_EXT_START, //0xa0
+ VK_SLEEP = VK_SYS_START, //0xa0, sleep
+ VK_POWER, //0xa1, power
+ VK_WAKEUP, //0xa2, wake-up
+// VK_MCE_STR, //0xa3
+// VK_MY_MUSIC, //0xa4
+ VK_SYS_END, //0xa3
+ VK_SYS_CNT = (VK_SYS_END - VK_SYS_START),//0xa3-0xa0=0x03
+
+ VK_MEDIA_START = VK_SYS_END, //0xa3
+ VK_W_SRCH = VK_MEDIA_START, //0xa3
+ VK_WEB, //0xa4
+ VK_W_BACK,
+ VK_W_FORWRD,
+ VK_W_STOP,
+ VK_W_REFRESH,
+ VK_W_FAV, //0xa9
+ VK_MEDIA,
+ VK_MAIL,
+ VK_CAL,
+ VK_MY_COMP,
+ VK_NEXT_TRK,
+ VK_PREV_TRK,
+ VK_STOP, //b0
+ VK_PLAY_PAUSE,
+ VK_W_MUTE,
+ VK_VOL_UP,
+ VK_VOL_DN,
+
+
+ VK_MEDIA_END,
+ VK_EXT_END = VK_MEDIA_END,
+ VK_MEDIA_CNT = (VK_MEDIA_END - VK_MEDIA_START),//0xb5-0xa3=0x12
+
+ VK_ZOOM_IN = (VK_MEDIA_END + 1),//0xb6
+ VK_ZOOM_OUT , //0xb7
+
+ //special key,do it later
+ VK_CH_UP = 0xf0,
+ VK_CH_DN = 0xf1,
+ VK_FAST_FORWARD = 0xf2,
+ VK_FAST_BACKWARD = 0xf3,
+ VK_W_SHOPPING = 0xf4,
+ VK_W_APP_STORE = 0xf5,
+ VK_MY_FAVORIT = 0xf6,
+ VK_MENU = 0xf7,
+ VK_EXIT = 0xf8,
+ VK_CONFIRM = 0xf9,
+ VK_RETURN = 0xfa,
+ VK_VOICE_SEARCH = 0xfb,
+ VK_PROGRAM = 0xfc,
+ VK_LOW_BATT = 0xfd,
+ VK_TV_PLUS = 0xfe,
+ VK_TV_MINUS = 0xff,
+ VK_IN_OUTPUT = 0xef,
+ VK_TV_POWER = 0xee,
+ VK_STB_POWER = 0xed,
+
+
+};
+#define VK_FN 0xff
+
+#define VK_EXT_LEN 2
+typedef struct{
+ unsigned char val[VK_EXT_LEN];
+}vk_ext_t;
+
+// mulit-byte keycode for media keys, cannot used directly in c code..for reference
+#define VK_POWER_V 0x01
+#define VK_SLEEP_V 0x02
+#define VK_WAKEUP_V 0x04
+
+#define VK_W_SRCH_V {0x21,0x02}
+#define VK_WEB_V {0x23,0x02}
+#define VK_W_BACK_V {0x24,0x02}
+#define VK_W_FORWRD_V {0x25,0x02}
+#define VK_W_STOP_V {0x26,0x02}
+#define VK_W_REFRESH_V {0x27,0x02}
+// favorite
+#define VK_W_FAV_V {0x2a,0x02}
+#define VK_MEDIA_V {0x83,0x01}
+#define VK_MAIL_V {0x8a,0x01}
+// calculator
+#define VK_CAL_V {0x92,0x01}
+#define VK_MY_COMP_V {0x94,0x01}
+// next track -- 01(mosue-ep/USB_EDP_MOUSE) 05(len) 03(kb-report-id/USB_HID_KB_MEDIA)
+// b5(val) 00 00 00
+#define VK_NEXT_TRK_V {0xb5,0x00}
+#define VK_PREV_TRK_V {0xb6,0x00}
+#define VK_STOP_V {0xb7,0x00}
+#define VK_PLAY_PAUSE_V {0xcd,0x00}
+#define VK_W_MUTE_V {0xe2,0x00}
+#define VK_VOL_UP_V {0xe9,0x00}
+#define VK_VOL_DN_V {0xea,0x00}
+
+
+
+
+// media key, consumer key
+//reference: <> Consumer Page(0x0C)
+typedef enum {
+ MKEY_POWER = 0x0030,
+ MKEY_RESET = 0x0031,
+ MKEY_SLEEP = 0x0032,
+
+ MKEY_MENU = 0x0040,
+ MKEY_MENU_PICK = 0x0041,
+ MKEY_MENU_UP = 0x0042,
+ MKEY_MENU_DN = 0x0043,
+ MKEY_MENU_LEFT = 0x0044,
+ MKEY_MENU_RIGHT = 0x0045,
+
+
+ MKEY_CHN_UP = 0x009c,
+ MKEY_CHN_DN = 0x009d,
+
+ MKEY_PLAY = 0x00b0,
+ MKEY_PAUSE = 0x00b1,
+ MKEY_RECORD = 0x00b2,
+ MKEY_FAST_FORWARD = 0x00b3,
+ MKEY_REWIND = 0x00b4,
+ MKEY_NEXT_TRK = 0x00b5,
+ MKEY_PREV_TRK = 0x00b6,
+ MKEY_STOP = 0x00b7,
+ MKEY_EJECT = 0x00b8,
+
+ MKEY_PLAY_PAUSE = 0x00cd,
+ MKEY_PLAY_SKIP = 0x00ce,
+
+ MKEY_VOLUME = 0x00e0,
+ MKEY_BALANCE = 0x00e1,
+ MKEY_MUTE = 0x00e2,
+ MKEY_VOL_UP = 0x00e9,
+ MKEY_VOL_DN = 0x00ea,
+
+ MKEY_AC_SEARCH = 0x0221,
+ MKEY_AC_GOTO = 0x0222,
+ MKEY_AC_HOME = 0x0223,
+ MKEY_AC_BACK = 0x0224,
+ MKEY_AC_FORWARD = 0x0225,
+ MKEY_AC_STOP = 0x0226,
+ MKEY_AC_REFRESH = 0x0227,
+ MKEY_AC_BOOKMARK = 0x022a,
+ MKEY_AC_HISTORY = 0x022b,
+ MKEY_AC_ZOOM_IN = 0x022d,
+ MKEY_AC_ZOOM_OUT = 0x022e,
+ MKEY_AC_ZOOM = 0x022f,
+
+} media_key_t;
diff --git a/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/watchdog.h b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/watchdog.h
new file mode 100644
index 0000000000000..50c6d27c5bdab
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/drivers/5316/watchdog.h
@@ -0,0 +1,54 @@
+/********************************************************************************************************
+ * @file watchdog.h
+ *
+ * @brief This is the header file for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "register.h"
+
+
+static inline void wd_start(void){
+#if(MODULE_WATCHDOG_ENABLE) // if watchdog not set, start wd would cause problem
+ BM_SET(reg_tmr_ctrl, FLD_TMR_WD_EN);
+#endif
+}
+
+static inline void wd_startEx(unsigned int timer_ms)
+{
+#if(MODULE_WATCHDOG_ENABLE)
+ reg_tmr_ctrl = MASK_VAL(FLD_TMR_WD_CAPT, ((timer_ms*CLOCK_SYS_CLOCK_1MS >> WATCHDOG_TIMEOUT_COEFF)));
+ reg_tmr_ctrl |= FLD_TMR_WD_EN;
+#endif
+}
+
+static inline void wd_stop(void){
+#if(MODULE_WATCHDOG_ENABLE)
+ BM_CLR(reg_tmr_ctrl, FLD_TMR_WD_EN);
+#endif
+}
+
+static inline void wd_clear(void)
+{
+#if(MODULE_WATCHDOG_ENABLE)
+ reg_tmr_sta = FLD_TMR_STA_WD;
+#endif
+}
+/*----------------------------- End of File ----------------------------------*/
diff --git a/8232_BLE_SDK/ble_sdk_hawk/proj_lib/firmware_encrypt.h b/8232_BLE_SDK/ble_sdk_hawk/proj_lib/firmware_encrypt.h
new file mode 100644
index 0000000000000..6766bed35e7a8
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/proj_lib/firmware_encrypt.h
@@ -0,0 +1,28 @@
+/********************************************************************************************************
+ * @file firmware_encrypt.h
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2019
+ *
+ * @par Copyright (c), Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#ifndef ENCRYPT_H_
+#define ENCRYPT_H_
+
+void firmware_encrypt_based_on_uid(unsigned char* uid,unsigned char* ciphertext);
+
+#endif /* ENCRYPT_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/proj_lib/libfirmware_encrypt.a b/8232_BLE_SDK/ble_sdk_hawk/proj_lib/libfirmware_encrypt.a
new file mode 100644
index 0000000000000..6532a364da3fd
Binary files /dev/null and b/8232_BLE_SDK/ble_sdk_hawk/proj_lib/libfirmware_encrypt.a differ
diff --git a/8232_BLE_SDK/ble_sdk_hawk/proj_lib/liblt_5316.a b/8232_BLE_SDK/ble_sdk_hawk/proj_lib/liblt_5316.a
new file mode 100644
index 0000000000000..f08eaf00b987f
Binary files /dev/null and b/8232_BLE_SDK/ble_sdk_hawk/proj_lib/liblt_5316.a differ
diff --git a/8232_BLE_SDK/ble_sdk_hawk/sdk_version.txt b/8232_BLE_SDK/ble_sdk_hawk/sdk_version.txt
new file mode 100644
index 0000000000000..9daa70743d8ae
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/sdk_version.txt
@@ -0,0 +1,2 @@
+Telink BLE SDK_VERSION =
+telink_hawk_ble_sdk_v1.3.1
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/att.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/att.h
new file mode 100644
index 0000000000000..082292e8af003
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/att.h
@@ -0,0 +1,475 @@
+/********************************************************************************************************
+ * @file att.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "tl_common.h"
+#include "ble_common.h"
+#include "stack/ble/l2cap.h"
+
+
+#define ATT_MTU_SIZE 23 //L2CAP_MTU_SIZE //!< Minimum ATT MTU size
+#define ATT_MAX_ATTR_HANDLE 0xFFFF
+#define ATT_16BIT_UUID_LEN 2
+#define ATT_128BIT_UUID_LEN 16
+#define L2CAP_RESERVED_LEN 14
+#define OPCODE_SIZE 1
+#define L2CAP_PAYLOAD_OFFSET (L2CAP_RESERVED_LEN + OPCODE_SIZE)
+#define ATT_HANDLE_START 0x0001
+#define ATT_HANDLE_END 0xFFFF
+
+#define ATT_OP_ERROR_RSP 0x01 //!< Error Response op code
+#define ATT_OP_EXCHANGE_MTU_REQ 0x02 //!< Exchange MTU Request op code
+#define ATT_OP_EXCHANGE_MTU_RSP 0x03 //!< Exchange MTU Response op code
+#define ATT_OP_FIND_INFO_REQ 0x04 //!< Find Information Request op code
+#define ATT_OP_FIND_INFO_RSP 0x05 //!< Find Information Response op code
+#define ATT_OP_FIND_BY_TYPE_VALUE_REQ 0x06 //!< Find By Type Vaue Request op code
+#define ATT_OP_FIND_BY_TYPE_VALUE_RSP 0x07 //!< Find By Type Vaue Response op code
+#define ATT_OP_READ_BY_TYPE_REQ 0x08 //!< Read By Type Request op code
+#define ATT_OP_READ_BY_TYPE_RSP 0x09 //!< Read By Type Response op code
+#define ATT_OP_READ_REQ 0x0a //!< Read Request op code
+#define ATT_OP_READ_RSP 0x0b //!< Read Response op code
+#define ATT_OP_READ_BLOB_REQ 0x0c //!< Read Blob Request op code
+#define ATT_OP_READ_BLOB_RSP 0x0d //!< Read Blob Response op code
+#define ATT_OP_READ_MULTI_REQ 0x0e //!< Read Multiple Request op code
+#define ATT_OP_READ_MULTI_RSP 0x0f //!< Read Multiple Response op code
+#define ATT_OP_READ_BY_GROUP_TYPE_REQ 0x10 //!< Read By Group Type Request op code
+#define ATT_OP_READ_BY_GROUP_TYPE_RSP 0x11 //!< Read By Group Type Response op code
+#define ATT_OP_WRITE_REQ 0x12 //!< Write Request op code
+#define ATT_OP_WRITE_RSP 0x13 //!< Write Response op code
+#define ATT_OP_PREPARE_WRITE_REQ 0x16 //!< Prepare Write Request op code
+#define ATT_OP_PREPARE_WRITE_RSP 0x17 //!< Prepare Write Response op code
+#define ATT_OP_EXECUTE_WRITE_REQ 0x18 //!< Execute Write Request op code
+#define ATT_OP_EXECUTE_WRITE_RSP 0x19 //!< Execute Write Response op code
+#define ATT_OP_HANDLE_VALUE_NOTI 0x1b //!< Handle Value Notification op code
+#define ATT_OP_HANDLE_VALUE_IND 0x1d //!< Handle Value Indication op code
+#define ATT_OP_HANDLE_VALUE_CFM 0x1e //!< Handle Value Confirmation op code
+#define ATT_OP_WRITE_CMD 0x52 //!< ATT Write Command
+#define ATT_OP_SIGNED_WRITE_CMD 0xd2 //!< ATT Signed Write Command
+
+/** @defgroup ATT_PERMISSIONS_BITMAPS GAP ATT Attribute Access Permissions Bit Fields
+ * @{
+ */
+
+#define ATT_PERMISSIONS_READ 0x01 //!< Attribute is Readable
+#define ATT_PERMISSIONS_WRITE 0x02 //!< Attribute is Writable
+#define ATT_PERMISSIONS_AUTHEN_READ 0x04 //!< Read requires Authentication
+#define ATT_PERMISSIONS_AUTHEN_WRITE 0x08 //!< Write requires Authentication
+#define ATT_PERMISSIONS_AUTHOR_READ 0x10 //!< Read requires Authorization
+#define ATT_PERMISSIONS_AUTHOR_WRITE 0x20 //!< Write requires Authorization
+#define ATT_PERMISSIONS_ENCRYPT_READ 0x40 //!< Read requires Encryption
+#define ATT_PERMISSIONS_ENCRYPT_WRITE 0x80 //!< Write requires Encryption
+
+#define ATT_PERMISSIONS_RDWR 0x03 // ATT_PERMISSIONS_READ | ATT_PERMISSIONS_WRITE
+/** @} End GAP_ATT_PERMISSIONS_BITMAPS */
+
+
+typedef struct{
+ u8 len; //!< Length of UUID
+ u8 uuid[16]; //!< UUID
+} uuid_t;
+
+/**
+ * Error Response
+ */
+typedef struct{
+ u8 reqOpcodeInErr; //!< The request that generated this error response
+ u8 errCode; //!< The reason why the request has generated an error response
+ u16 attHandleInErr; //!< The attribute handle that generated this error response
+} errorRsp_t;
+
+/**
+ * Exchange MTU Request
+ */
+typedef struct{
+ u16 clientRxMTU; //!< Attribute client receive MTU size
+} exchangeMTUReq_t;
+
+/**
+ * Exchange MTU Response
+ */
+typedef struct{
+ u16 serverRxMTU; //!< Attribute server receive MTU size
+} exchangeMTURsp_t;
+
+/**
+ * Find Information Request
+ */
+typedef struct{
+ u16 startingHandle; //!< First requested handle number
+ u16 endingHandle; //!< Last requested handle number
+} findInformationReq_t;
+
+/**
+ * Handle(s) and 16-bit Bluetooth UUID(s)
+ */
+typedef struct{
+ u16 handle; //!< Handle
+ u8 uuid[ATT_16BIT_UUID_LEN]; //!< 16 bit UUID
+} handleBtUUID_t;
+
+/**
+ * Handle(s) and 128-bit UUID(s)
+ */
+typedef struct{
+ u16 handle; //!< Handle
+ u8 uuid[ATT_128BIT_UUID_LEN]; //!< 128 bit UUID
+} handleUUID_t;
+
+/**
+ * Find Information Response
+ */
+typedef struct{
+ u8 format; //!< Format of information
+ u8 infoNum; //!< information num
+ u8 info[ATT_MTU_SIZE - 2]; //!< information
+} findInformationRsp_t;
+
+/**
+ * Find By Type Value Request
+ */
+typedef struct{
+ u16 startingHandle; //!< First requested handle number
+ u16 endingHandle; //!< Last requested handle number
+ u16 uuid; //!< UUID to find
+ u8 len; //!< Length of value
+ u8 value[ATT_MTU_SIZE - 7]; //!< Attribute value to find
+} findByTypeValueReq_t;
+
+/**
+ * Handles Infomation list element
+ */
+typedef struct{
+ u8 handle; //!< Found attribute handle
+ u8 groupEndHandle; //!< Group end handle
+} handleInfo_t;
+
+/**
+ * Find By Type Value Response
+ */
+typedef struct{
+ u8 handleInfoNum; //!< Number of handles information below
+ handleInfo_t handleInfo[1] ; //!< A list of 1 or more Handle Informations
+} findByTypeValueRsp_t;
+
+/**
+ * Read By Type Request
+ */
+typedef struct{
+ u16 startingHandle; //!< First requested handle number
+ u16 endingHandle; //!< Last requested handle number
+ uuid_t attrType; //!< 2 or 16 octet UUID
+} readByTypeReq_t;
+
+/**
+ * Read By Type Response
+ */
+typedef struct{
+ u8 numData; //!< Number of attribute data list item
+ u8 len; //!< The size of each attribute handle-value pair
+ u8 data[ATT_MTU_SIZE-2]; //!< Attribute Data List
+} readByTypeRsp_t;
+
+/**
+ * Read Request
+ */
+typedef struct{
+ u16 handle; //!< The handle of the attribute to be read
+} readReq_t;
+
+/**
+ * Read Response
+ */
+typedef struct{
+ u8 len; //!< Length of value
+ u8 attrValue[ATT_MTU_SIZE - 1]; //!< Value of the attribute with the handle given
+} readRsp_t;
+
+/**
+ * Read Blob Req
+ */
+typedef struct{
+ u16 handle; //!< The handle of the attribute to be read
+ u16 offset; //!< The offset of the first octet to be read
+} readBlobReq_t;
+
+/**
+ * Read Blob Response
+ */
+typedef struct{
+ u8 len; //!< Length of value
+ u8 attrValue[ATT_MTU_SIZE - 1]; //!< Part of the value of the attribute with the handle given
+} readBlobRsp_t;
+
+/**
+ * Read Multiple Request
+ */
+typedef struct{
+ u8 numHandles; //!< Number of attribute handles
+ u16 handle[1]; //!< A set of two or more attribute handles
+} readMultipleReq_t;
+
+/**
+ * Read Multiple Response
+ */
+typedef struct{
+ u8 len; //!< Length of values
+ u8 values[ATT_MTU_SIZE - 1]; //!< A set of two or more values
+} readMultiRsp_t;
+
+/**
+ * Read By Group Type Request
+ */
+typedef struct{
+ u16 startingHandle; //!< First requested handle number (must be first field)
+ u16 endingHandle; //!< Last requested handle number
+ uuid_t attrType; //!< 2 or 16 octet UUID
+} readByGroupTypeReq_t;
+
+/**
+ * Read By Group Type Response
+ */
+typedef struct{
+ u8 grpNum; //!< The number of attributes in this group
+ u8 len; //!< Length of each attribute handle
+ u8 data[ATT_MTU_SIZE - 2]; //!< Attribute Data
+} readByGroupTypeRsp_t;
+
+/**
+ * Write Request
+ */
+typedef struct{
+ u16 handle; //!< The handle of the attribute to be written (must be first field)
+ u8 len; //!< Length of value
+ u8 value[ATT_MTU_SIZE - 3]; //!< The value to be written to the attribute
+} writeReq_t;
+
+/**
+ * Write Command
+ */
+typedef struct{
+ u16 handle; //!< The handle of the attribute to be written (must be first field)
+ u8 len; //!< Length of value
+ u8 value[ATT_MTU_SIZE - 3]; //!< The value to be written to the attribute
+ u8 sig; //!< the sig flag
+} writeCmd_t;
+
+/**
+ * Prepare Write Request
+ */
+typedef struct{
+ u16 handle; //!< Handle of the attribute to be written (must be first field)
+ u16 offset; //!< Offset of the first octet to be written
+ u8 len; //!< Length of value
+ u8 value[ATT_MTU_SIZE - 5]; //!< Part of the value of the attribute to be written
+} prepareWriteReq_t;
+
+/**
+ * Prepare Write Response
+ */
+typedef struct{
+ u16 handle; //!< The handle of the attribute to be written
+ u16 offset; //!< The offset of the first octet to be written
+ u8 len; //!< Length of value
+ u8 value[ATT_MTU_SIZE - 3]; //!< The value of the attribute to be written
+} prepareWriteRsp_t;
+
+/**
+ * Execute Write Request
+ */
+typedef struct{
+ u8 flags; //!< 0x00 - cancel all prepared writes 0x01 - immediately write all pending prepared values
+} executeWriteReq_t;
+
+/**
+ * Handle Value Notification
+ */
+typedef struct{
+ u16 handle; //!< The handle of the attribute
+ u8 len; //!< Length of value
+ u8 value[ATT_MTU_SIZE - 3]; //!< The current value of the attribute
+} handleValueNoti_t;
+
+/**
+ * Handle Value Indication
+ */
+typedef struct{
+ u16 handle; //!< The handle of the attribute
+ u8 len; //!< Length of value
+ u8 value[ATT_MTU_SIZE - 3]; //!< The current value of the attribute
+} handleValueInd_t;
+
+typedef union attOpCode{
+ struct{
+ u8 method:6;
+ u8 cmdFlag:1;
+ u8 authSigFlag:1;
+ }bitField;
+ u8 byte;
+}attOpCode_t;
+
+
+typedef struct attProtocolReqPdu{
+ u16 connHandle;
+ u16 method;
+ union reqPdu {
+ exchangeMTUReq_t exchangeMTUReq; //!< Exchange MTU Req
+ findInformationReq_t findInfoReq; //!< Find Information Req
+ findByTypeValueReq_t findByTypeValueReq; //!< Find By Type Vaue Req
+ readByTypeReq_t readByTypeReq; //!< Read By Type Req
+ readReq_t readReq; //!< Read Req
+ readBlobReq_t readBlobReq; //!< Read Blob Req
+ readMultipleReq_t readMultiReq; //!< Read Multiple Req
+ readByGroupTypeReq_t readByGrpTypeReq; //!< Read By Group Type Req
+ writeReq_t writeReq; //!< Write Req
+ prepareWriteReq_t prepareWriteReq; //!< Prepare Write Req
+ executeWriteReq_t executeWriteReq; //!< Execute Write Req
+ }msg;
+}attProtocolReqPdu_t;
+
+
+typedef struct attProtocolRspPdu{
+ u16 connHandle;
+ u16 method;
+ union rspPdu {
+ errorRsp_t errorRsp; //!< Error Rsp
+ exchangeMTURsp_t exchangeMTURsp; //!< Exchange MTU Rsp
+ findInformationRsp_t findInfoRsp; //!< Find Information Rsp
+ findByTypeValueRsp_t findByTypeValueRsp; //!< Find By Type Vaue Rsp
+ readByTypeRsp_t readByTypeRsp; //!< Read By Type Rsp
+ readRsp_t readRsp; //!< Read Rsp
+ readBlobRsp_t readBlobRsp; //!< Read Blob Rsp
+ readMultiRsp_t readMultiRsp; //!< Read Multiple Rsp
+ readByGroupTypeRsp_t readByGrpTypeRsp; //!< Read By Group Type Rsp
+ prepareWriteRsp_t prepareWriteRsp; //!< Prepare Write Rsp
+ handleValueNoti_t handleValueNoti; //!< Handle Value Noti
+ handleValueInd_t handleValueInd; //!< Handle Value Ind
+ }msg;
+}attProtocolRspPdu_t;
+
+
+/////////////////////////////
+// gatt.h
+/////////////////////////////
+/** @addtogroup GATT_Characteristic_Property GATT characteristic properties
+ * @{
+ */
+#define CHAR_PROP_BROADCAST 0x01 //!< permit broadcasts of the Characteristic Value
+#define CHAR_PROP_READ 0x02 //!< permit reads of the Characteristic Value
+#define CHAR_PROP_WRITE_WITHOUT_RSP 0x04 //!< Permit writes of the Characteristic Value without response
+#define CHAR_PROP_WRITE 0x08 //!< Permit writes of the Characteristic Value with response
+#define CHAR_PROP_NOTIFY 0x10 //!< Permit notifications of a Characteristic Value without acknowledgement
+#define CHAR_PROP_INDICATE 0x20 //!< Permit indications of a Characteristic Value with acknowledgement
+#define CHAR_PROP_AUTHEN 0x40 //!< permit signed writes to the Characteristic Value
+#define CHAR_PROP_EXTENDED 0x80 //!< additional characteristic properties are defined
+/** @} end of group GATT_Characteristic_Property */
+
+
+/** @addtogroup GATT_CCCC_Bits Client CharacteristicConfiguration bits
+ * @{
+ */
+#define CLIENT_CHAR_CFG_NOTI 0x0001 //!< permit broadcasts of the Characteristic Value
+#define CLIENT_CHAR_CFG_IND 0x0002 //!< permit reads of the Characteristic Value
+/** @} end of group GATT_CCCC_Bits */
+
+
+/** @addtogroup GATT_Property_length GATT characteristic property length
+ * @{
+ */
+#define CHAR_PROP_SIZE 1
+/** @} end of group GATT_Property_length */
+
+/** @addtogroup GATT_Char_Cfg_Bit_length GATT characteristic configuration Bits length
+ * @{
+ */
+#define CHAR_CFG_BITS_SIZE 2
+/** @} end of group GATT_Char_Cfg_Bit_length */
+
+
+typedef int (*att_handleValueConfirm_callback_t)(void);
+typedef int (*att_readwrite_callback_t)(void* p);
+typedef void (*attRxMtuSizeExchangeCommpleteCb)(u16 connHandle, u16 remoteMtuSize, u16 effectMtuSize);
+
+typedef struct attribute
+{
+ u16 attNum;
+ u8 perm;
+ u8 uuidLen;
+ u32 attrLen; //4 bytes aligned
+ u8* uuid;
+ u8* pAttrValue;
+ att_readwrite_callback_t w;
+ att_readwrite_callback_t r;
+} attribute_t;
+
+typedef struct{
+ u16 init_MTU;
+ u16 effective_MTU;
+ u8 Data_pending_time; //10ms unit
+ u8 Data_permission_check;
+} att_para_t;
+extern att_para_t bltAtt;
+
+extern u8 blt_indicate_handle;
+
+/******************************* User Interface ************************************/
+//GATT server table
+void bls_att_setAttributeTable(u8 *p);
+
+//ATT notification
+ble_sts_t bls_att_pushNotifyData(u16 attHandle, u8 *p, int len);
+
+//ATT indicator/confirm
+ble_sts_t bls_att_pushIndicateData(u16 attHandle, u8 *p, int len);
+
+void bls_att_registerHandleValueConfirmCb(att_handleValueConfirm_callback_t cb);
+
+//MTU size
+ble_sts_t blc_att_setRxMtuSize(u16 mtu_size);
+ble_sts_t blc_att_requestMtuSizeExchange(u16 connHandle, u16 mtu_size);
+void blc_att_registerMtuSizeExchangeCb(attRxMtuSizeExchangeCommpleteCb cb);
+void blt_att_resetMtuSizeToDefault(void);
+
+// 0x04: ATT_OP_FIND_INFO_REQ
+void att_req_find_info(u8 *dat, u16 start_attHandle, u16 end_attHandle);
+// 0x06: ATT_OP_FIND_BY_TYPE_VALUE_REQ
+void att_req_find_by_type (u8 *dat, u16 start_attHandle, u16 end_attHandle, u8 *uuid, u8* attr_value, int len);
+// 0x08: ATT_OP_READ_BY_TYPE_REQ
+void att_req_read_by_type (u8 *dat, u16 start_attHandle, u16 end_attHandle, u8 *uuid, int uuid_len);
+// 0x0a: ATT_OP_READ_REQ
+void att_req_read (u8 *dat, u16 attHandle);
+// 0x0c: ATT_OP_READ_BLOB_REQ
+void att_req_read_blob (u8 *dat, u16 attHandle, u16 offset);
+// 0x10: ATT_OP_READ_BY_GROUP_TYPE_REQ
+void att_req_read_by_group_type (u8 *dat, u16 start_attHandle, u16 end_attHandle, u8 *uuid, int uuid_len);
+// 0x12: ATT_OP_WRITE_REQ
+void att_req_write (u8 *dat, u16 attHandle, u8 *buf, int len);
+// 0x52: ATT_OP_WRITE_CMD
+void att_req_write_cmd (u8 *dat, u16 attHandle, u8 *buf, int len);
+
+ble_sts_t bls_att_setDeviceName(u8* pName,u8 len); //only module/mesh/hci use
+
+int att_register_idle_func (void *p);
+int l2cap_att_client_handler (u16 conn, u8 *p);
+
+/************************* Stack Interface, user can not use!!! ***************************/
+void blt_att_procHoldAttributeCommand(void);
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ble.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ble.h
new file mode 100644
index 0000000000000..9763db20feba5
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ble.h
@@ -0,0 +1,66 @@
+/********************************************************************************************************
+ * @file ble.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+/*
+ * ble.h
+ *
+ * Created on: 2018-5-25
+ * Author: Administrator
+ */
+
+#ifndef BLE_H_
+#define BLE_H_
+
+
+#include "blt_config.h"
+#include "ble_common.h"
+#include "l2cap.h"
+#include "att.h"
+#include "gap.h"
+#include "ble_smp.h"
+#include "uuid.h"
+#include "ble_phy.h"
+
+#include "crypt/aes_ccm.h"
+#include "crypt/le_crypto.h"
+#include "crypt/aes/aes_att.h"
+
+#include "hci/hci.h"
+#include "hci/hci_const.h"
+#include "hci/hci_event.h"
+
+#include "service/ble_ll_ota.h"
+#include "service/device_information.h"
+#include "service/hids.h"
+
+#include "ll/ll.h"
+#include "ll/ll_adv.h"
+#include "ll/ll_encrypt.h"
+#include "ll/ll_pm.h"
+#include "ll/ll_slave.h"
+#include "ll/ll_whitelist.h"
+#include "ll/ll_scan.h"
+#include "ll/ll_conn_phy.h"
+
+
+
+
+#endif /* BLE_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ble_common.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ble_common.h
new file mode 100644
index 0000000000000..44b1d9c21212a
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ble_common.h
@@ -0,0 +1,1496 @@
+/********************************************************************************************************
+ * @file ble_common.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include "tl_common.h"
+#include "blt_config.h"
+/*********************************************************************
+ * CONSTANTS
+ */
+
+#define BLE_STACK_USED_TX_FIFIO_NUM 1
+
+/**
+ * @brief Definition for BLE Address Constants
+ */
+
+#define BLE_ACCESS_ADDR_LEN 4
+
+/**
+ * @brief Definition for BLE Random Number Size
+ */
+#define BLE_RANDOM_NUM_SIZE 8
+
+/**
+ * @brief Definition for BLE Invalid connection handle value
+ */
+#define BLE_INVALID_CONNECTION_HANDLE 0xffff
+
+#define IS_CONNECTION_HANDLE_VALID(handle) ( handle != BLE_INVALID_CONNECTION_HANDLE )
+
+
+#define VENDOR_ID 0x0211
+#define VENDOR_ID_HI_B U16_HI(VENDOR_ID)
+#define VENDOR_ID_LO_B U16_LO(VENDOR_ID)
+
+
+#define BLUETOOTH_VER_4_0 6
+#define BLUETOOTH_VER_4_1 7
+#define BLUETOOTH_VER_4_2 8
+#define BLUETOOTH_VER_5_0 9
+
+#define BLUETOOTH_VER BLUETOOTH_VER_4_2
+
+#if(BLUETOOTH_VER == BLUETOOTH_VER_4_2)
+ #define BLUETOOTH_VER_SUBVER 0x22BB
+#elif(BLUETOOTH_VER == BLUETOOTH_VER_5_0)
+ #define BLUETOOTH_VER_SUBVER 0x1C1C
+#else
+ #define BLUETOOTH_VER_SUBVER 0x4103
+#endif
+
+
+/**
+ * @brief Definition for Link Layer Feature Support
+ */
+#define LL_FEATURE_SIZE 8
+/*
+#define LL_FEATURE_MASK_LL_ENCRYPTION (0x00000001)//core_4.0
+#define LL_FEATURE_MASK_CONNECTION_PARA_REQUEST_PROCEDURE (0x00000002)//core_4.1
+#define LL_FEATURE_MASK_EXTENDED_REJECT_INDICATION (0x00000004)//core_4.1
+#define LL_FEATURE_MASK_SLAVE_INITIATED_FEATURES_EXCHANGE (0x00000008)//core_4.1
+#define LL_FEATURE_MASK_LE_PING (0x00000010)//core_4.1
+#define LL_FEATURE_MASK_LE_DATA_PACKET_EXTENSION (0x00000020)//core_4.2
+#define LL_FEATURE_MASK_LL_PRIVACY (0x00000040)//core_4.2
+#define LL_FEATURE_MASK_EXTENDED_SCANNER_FILTER_POLICIES (0x00000080)//core_4.2
+
+#define LL_FEATURE_MASK_MULTI_PHY (0x00000100)//core_5.0
+#define LL_FEATURE_MASK_STABLE_MODULATION_INDEX_TX (0x00000200)//core_5.0
+#define LL_FEATURE_MASK_STABLE_MODULATION_INDEX_RX (0x00000400)//core_5.0
+#define LL_FEATURE_MASK_LE_CODED_PHY (0x00000800)//core_5.0
+#define LL_FEATURE_MASK_LE_EXTENDED_ADVERTISING (0x00001000)//core_5.0
+#define LL_FEATURE_MASK_LE_PERIODIC_ADVERTISING (0x00002000)//core_5.0
+#define LL_FEATURE_MASK_CHANNEL_SELECTION_ALGORITHM2 (0x00004000)//core_5.0
+#define LL_FEATURE_MASK_LE_POWER_CLASS_1 (0x00008000)//core_5.0
+#define LL_FEATURE_MASK_MIN_USED_OF_USED_CHANNELS (0x00010000)//core_5.0
+*/
+
+/**
+ *@Brief: Define Link layer feature.
+ * 0: not support; 1: support.
+ */
+#if (BLUETOOTH_VER == BLUETOOTH_VER_4_0)
+#define LL_FEATURE_ENABLE_LE_ENCRYPTION 1
+#define LL_CMD_MAX LL_REJECT_IND
+
+#elif (BLUETOOTH_VER == BLUETOOTH_VER_4_1)
+#define LL_FEATURE_ENABLE_LE_ENCRYPTION 1
+#define LL_FEATURE_ENABLE_EXTENDED_REJECT_INDICATION 1
+#define LL_FEATURE_ENABLE_SLAVE_INITIATED_FEATURES_EXCHANGE 1
+#define LL_FEATURE_ENABLE_LE_PING 1
+
+#define LL_CMD_MAX LL_PING_RSP
+
+#elif (BLUETOOTH_VER == BLUETOOTH_VER_4_2)
+
+#define LL_FEATURE_ENABLE_LE_ENCRYPTION 1
+#define LL_FEATURE_ENABLE_EXTENDED_REJECT_INDICATION 1
+#define LL_FEATURE_ENABLE_SLAVE_INITIATED_FEATURES_EXCHANGE 1
+#define LL_FEATURE_ENABLE_LE_PING 1
+#define LL_FEATURE_ENABLE_LE_DATA_LENGTH_EXTENSION BLE_CORE42_DATA_LENGTH_EXTENSION_ENABLE
+
+#define LL_CMD_MAX LL_LENGTH_RSP
+
+#elif (BLUETOOTH_VER == BLUETOOTH_VER_5_0)
+
+#define LL_FEATURE_ENABLE_LE_ENCRYPTION 1
+#define LL_FEATURE_ENABLE_EXTENDED_REJECT_INDICATION 1
+#define LL_FEATURE_ENABLE_SLAVE_INITIATED_FEATURES_EXCHANGE 1
+#define LL_FEATURE_ENABLE_LE_PING 1
+#define LL_FEATURE_ENABLE_LE_DATA_LENGTH_EXTENSION BLE_CORE42_DATA_LENGTH_EXTENSION_ENABLE
+
+#define LL_FEATURE_ENABLE_LE_2M_PHY LL_FEATURE_SUPPORT_LE_2M_PHY
+#define LL_FEATURE_ENABLE_LE_CODED_PHY 0
+#define LL_FEATURE_ENABLE_LE_EXTENDED_ADVERTISING 0
+#define LL_FEATURE_ENABLE_LE_PERIODIC_ADVERTISING 0
+#define LL_FEATURE_ENABLE_CHANNEL_SELECTION_ALGORITHM2 0
+
+#define LL_CMD_MAX LL_MIN_USED_CHN_IND
+#else
+
+#endif
+
+#ifndef LL_FEATURE_ENABLE_LE_ENCRYPTION
+#define LL_FEATURE_ENABLE_LE_ENCRYPTION 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_CONNECTION_PARA_REQUEST_PROCEDURE
+#define LL_FEATURE_ENABLE_CONNECTION_PARA_REQUEST_PROCEDURE 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_EXTENDED_REJECT_INDICATION
+#define LL_FEATURE_ENABLE_EXTENDED_REJECT_INDICATION 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_SLAVE_INITIATED_FEATURES_EXCHANGE
+#define LL_FEATURE_ENABLE_SLAVE_INITIATED_FEATURES_EXCHANGE 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_LE_PING
+#define LL_FEATURE_ENABLE_LE_PING 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_LE_DATA_LENGTH_EXTENSION
+#define LL_FEATURE_ENABLE_LE_DATA_LENGTH_EXTENSION 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_LL_PRIVACY
+#define LL_FEATURE_ENABLE_LL_PRIVACY 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_EXTENDED_SCANNER_FILTER_POLICIES
+#define LL_FEATURE_ENABLE_EXTENDED_SCANNER_FILTER_POLICIES 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_LE_2M_PHY
+#define LL_FEATURE_ENABLE_LE_2M_PHY 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_STABLE_MODULATION_INDEX_TX
+#define LL_FEATURE_ENABLE_STABLE_MODULATION_INDEX_TX 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_STABLE_MODULATION_INDEX_RX
+#define LL_FEATURE_ENABLE_STABLE_MODULATION_INDEX_RX 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_LE_CODED_PHY
+#define LL_FEATURE_ENABLE_LE_CODED_PHY 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_LE_EXTENDED_ADVERTISING
+#define LL_FEATURE_ENABLE_LE_EXTENDED_ADVERTISING 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_LE_PERIODIC_ADVERTISING
+#define LL_FEATURE_ENABLE_LE_PERIODIC_ADVERTISING 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_CHANNEL_SELECTION_ALGORITHM2
+#define LL_FEATURE_ENABLE_CHANNEL_SELECTION_ALGORITHM2 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_LE_POWER_CLASS_1
+#define LL_FEATURE_ENABLE_LE_POWER_CLASS_1 0
+#endif
+
+#ifndef LL_FEATURE_ENABLE_MIN_USED_OF_USED_CHANNELS
+#define LL_FEATURE_ENABLE_MIN_USED_OF_USED_CHANNELS 0
+#endif
+
+//BIT<0:31>
+#if 1
+
+// feature below is conFiged by application layer
+// LL_FEATURE_ENABLE_LE_2M_PHY
+// LL_FEATURE_ENABLE_LE_CODED_PHY
+// LL_FEATURE_ENABLE_LE_EXTENDED_ADVERTISING
+// LL_FEATURE_ENABLE_CHANNEL_SELECTION_ALGORITHM2
+
+#define LL_FEATURE_MASK_BASE0 (LL_FEATURE_ENABLE_LE_ENCRYPTION << 0 | \
+ LL_FEATURE_ENABLE_CONNECTION_PARA_REQUEST_PROCEDURE << 1 | \
+ LL_FEATURE_ENABLE_EXTENDED_REJECT_INDICATION << 2 | \
+ LL_FEATURE_ENABLE_SLAVE_INITIATED_FEATURES_EXCHANGE << 3 | \
+ LL_FEATURE_ENABLE_LE_PING << 4 | \
+ LL_FEATURE_ENABLE_LE_DATA_LENGTH_EXTENSION << 5 | \
+ LL_FEATURE_ENABLE_LL_PRIVACY << 6 | \
+ LL_FEATURE_ENABLE_EXTENDED_SCANNER_FILTER_POLICIES << 7 | \
+ LL_FEATURE_ENABLE_STABLE_MODULATION_INDEX_TX << 9 | \
+ LL_FEATURE_ENABLE_STABLE_MODULATION_INDEX_RX << 10 | \
+ LL_FEATURE_ENABLE_LE_PERIODIC_ADVERTISING << 13 | \
+ LL_FEATURE_ENABLE_LE_POWER_CLASS_1 << 15 | \
+ LL_FEATURE_ENABLE_MIN_USED_OF_USED_CHANNELS << 16)
+#else
+#define LL_FEATURE_MASK_0 (LL_FEATURE_ENABLE_LE_ENCRYPTION << 0 | \
+ LL_FEATURE_ENABLE_CONNECTION_PARA_REQUEST_PROCEDURE << 1 | \
+ LL_FEATURE_ENABLE_EXTENDED_REJECT_INDICATION << 2 | \
+ LL_FEATURE_ENABLE_SLAVE_INITIATED_FEATURES_EXCHANGE << 3 | \
+ LL_FEATURE_ENABLE_LE_PING << 4 | \
+ LL_FEATURE_ENABLE_LE_DATA_LENGTH_EXTENSION << 5 | \
+ LL_FEATURE_ENABLE_LL_PRIVACY << 6 | \
+ LL_FEATURE_ENABLE_EXTENDED_SCANNER_FILTER_POLICIES << 7 | \
+ LL_FEATURE_ENABLE_LE_2M_PHY << 8 | \
+ LL_FEATURE_ENABLE_STABLE_MODULATION_INDEX_TX << 9 | \
+ LL_FEATURE_ENABLE_STABLE_MODULATION_INDEX_RX << 10 | \
+ LL_FEATURE_ENABLE_LE_CODED_PHY << 11 | \
+ LL_FEATURE_ENABLE_LE_EXTENDED_ADVERTISING << 12 | \
+ LL_FEATURE_ENABLE_LE_PERIODIC_ADVERTISING << 13 | \
+ LL_FEATURE_ENABLE_CHANNEL_SELECTION_ALGORITHM2 << 14 | \
+ LL_FEATURE_ENABLE_LE_POWER_CLASS_1 << 15 | \
+ LL_FEATURE_ENABLE_MIN_USED_OF_USED_CHANNELS << 16)
+
+#endif
+
+extern u32 LL_FEATURE_MASK_0;
+
+//BIT<32:63>
+#define LL_FEATURE_MASK_1 0
+
+#define LL_FEATURE_BYTE_0 U32_BYTE0(LL_FEATURE_MASK_0)
+#define LL_FEATURE_BYTE_1 U32_BYTE1(LL_FEATURE_MASK_0)
+#define LL_FEATURE_BYTE_2 U32_BYTE2(LL_FEATURE_MASK_0)
+#define LL_FEATURE_BYTE_3 U32_BYTE3(LL_FEATURE_MASK_0)
+#define LL_FEATURE_BYTE_4 U32_BYTE0(LL_FEATURE_MASK_1)
+#define LL_FEATURE_BYTE_5 U32_BYTE1(LL_FEATURE_MASK_1)
+#define LL_FEATURE_BYTE_6 U32_BYTE2(LL_FEATURE_MASK_1)
+#define LL_FEATURE_BYTE_7 U32_BYTE3(LL_FEATURE_MASK_1)
+
+
+
+#define ADV_INTERVAL_2_5MS 4
+#define ADV_INTERVAL_3_125MS 5
+#define ADV_INTERVAL_3_75MS 6
+#define ADV_INTERVAL_10MS 16
+#define ADV_INTERVAL_15MS 24
+#define ADV_INTERVAL_20MS 32
+#define ADV_INTERVAL_25MS 40
+#define ADV_INTERVAL_30MS 48
+#define ADV_INTERVAL_35MS 56
+#define ADV_INTERVAL_40MS 64
+#define ADV_INTERVAL_45MS 72
+#define ADV_INTERVAL_50MS 80
+#define ADV_INTERVAL_55MS 88
+
+#define ADV_INTERVAL_100MS 160
+#define ADV_INTERVAL_105MS 168
+#define ADV_INTERVAL_200MS 320
+#define ADV_INTERVAL_205MS 328
+#define ADV_INTERVAL_300MS 480
+#define ADV_INTERVAL_305MS 488
+#define ADV_INTERVAL_400MS 640
+#define ADV_INTERVAL_405MS 648
+#define ADV_INTERVAL_500MS 800
+#define ADV_INTERVAL_505MS 808
+
+#define ADV_INTERVAL_1S 1600
+#define ADV_INTERVAL_1_28_S 0x0800
+#define ADV_INTERVAL_10_24S 16384
+
+#define ADV_LOW_LATENCY_DIRECT_INTERVAL ADV_INTERVAL_10MS
+#define ADV_HIGH_LATENCY_DIRECT_INTERVAL ADV_INTERVAL_3_75MS
+
+#define SCAN_INTERVAL_10MS 16
+#define SCAN_INTERVAL_30MS 48
+#define SCAN_INTERVAL_60MS 96
+#define SCAN_INTERVAL_90MS 144
+#define SCAN_INTERVAL_100MS 160
+#define SCAN_INTERVAL_200MS 320
+#define SCAN_INTERVAL_300MS 480
+
+#define CONN_INTERVAL_7P5MS 6
+#define CONN_INTERVAL_10MS 8
+#define CONN_INTERVAL_15MS 12
+#define CONN_INTERVAL_18P75MS 15
+#define CONN_INTERVAL_20MS 16
+#define CONN_INTERVAL_30MS 24
+#define CONN_INTERVAL_48P75MS 39
+#define CONN_INTERVAL_50MS 40
+#define CONN_INTERVAL_100MS 80
+
+#define CONN_TIMEOUT_500MS 50
+#define CONN_TIMEOUT_1S 100
+#define CONN_TIMEOUT_4S 400
+#define CONN_TIMEOUT_10S 1000
+#define CONN_TIMEOUT_20S 2000
+
+
+/*********************************************************************
+ * ENUMS
+ */
+typedef enum{
+ SCAN_TYPE_PASSIVE = 0x00,
+ SCAN_TYPE_ACTIVE,
+}scan_type_t;
+
+typedef enum {
+ BLE_SUCCESS = 0,
+
+ // HCI Status, Per the Bluetooth Core Specification, V4.0.0, Vol. 2, Part D.
+ HCI_ERR_UNKNOWN_HCI_CMD = 0x01,
+ HCI_ERR_UNKNOWN_CONN_ID = 0x02,
+ HCI_ERR_HW_FAILURE = 0x03,
+ HCI_ERR_PAGE_TIMEOUT = 0x04,
+ HCI_ERR_AUTH_FAILURE = 0x05,
+ HCI_ERR_PIN_KEY_MISSING = 0x06,
+ HCI_ERR_MEM_CAP_EXCEEDED = 0x07,
+ HCI_ERR_CONN_TIMEOUT = 0x08,
+ HCI_ERR_CONN_LIMIT_EXCEEDED = 0x09,
+ HCI_ERR_SYNCH_CONN_LIMIT_EXCEEDED = 0x0A,
+ HCI_ERR_ACL_CONN_ALREADY_EXISTS = 0x0B,
+ HCI_ERR_CMD_DISALLOWED = 0x0C,
+ HCI_ERR_CONN_REJ_LIMITED_RESOURCES = 0x0D,
+ HCI_ERR_CONN_REJECTED_SECURITY_REASONS = 0x0E,
+ HCI_ERR_CONN_REJECTED_UNACCEPTABLE_BDADDR = 0x0F,
+ HCI_ERR_CONN_ACCEPT_TIMEOUT_EXCEEDED = 0x10,
+ HCI_ERR_UNSUPPORTED_FEATURE_PARAM_VALUE = 0x11,
+ HCI_ERR_INVALID_HCI_CMD_PARAMS = 0x12,
+ HCI_ERR_REMOTE_USER_TERM_CONN = 0x13,
+ HCI_ERR_REMOTE_DEVICE_TERM_CONN_LOW_RESOURCES = 0x14,
+ HCI_ERR_REMOTE_DEVICE_TERM_CONN_POWER_OFF = 0x15,
+ HCI_ERR_CONN_TERM_BY_LOCAL_HOST = 0x16,
+ HCI_ERR_REPEATED_ATTEMPTS = 0x17,
+ HCI_ERR_PAIRING_NOT_ALLOWED = 0x18,
+ HCI_ERR_UNKNOWN_LMP_PDU = 0x19,
+ HCI_ERR_UNSUPPORTED_REMOTE_FEATURE = 0x1A,
+ HCI_ERR_SCO_OFFSET_REJ = 0x1B,
+ HCI_ERR_SCO_INTERVAL_REJ = 0x1C,
+ HCI_ERR_SCO_AIR_MODE_REJ = 0x1D,
+ HCI_ERR_INVALID_LMP_PARAMS = 0x1E,
+ HCI_ERR_UNSPECIFIED_ERROR = 0x1F,
+ HCI_ERR_UNSUPPORTED_LMP_PARAM_VAL = 0x20,
+ HCI_ERR_ROLE_CHANGE_NOT_ALLOWED = 0x21,
+ HCI_ERR_LMP_LL_RESP_TIMEOUT = 0x22,
+ HCI_ERR_LMP_ERR_TRANSACTION_COLLISION = 0x23,
+ HCI_ERR_LMP_PDU_NOT_ALLOWED = 0x24,
+ HCI_ERR_ENCRYPT_MODE_NOT_ACCEPTABLE = 0x25,
+ HCI_ERR_LINK_KEY_CAN_NOT_BE_CHANGED = 0x26,
+ HCI_ERR_REQ_QOS_NOT_SUPPORTED = 0x27,
+ HCI_ERR_INSTANT_PASSED = 0x28,
+ HCI_ERR_PAIRING_WITH_UNIT_KEY_NOT_SUPPORTED = 0x29,
+ HCI_ERR_DIFFERENT_TRANSACTION_COLLISION = 0x2A,
+ HCI_ERR_RESERVED1 = 0x2B,
+ HCI_ERR_QOS_UNACCEPTABLE_PARAM = 0x2C,
+ HCI_ERR_QOS_REJ = 0x2D,
+ HCI_ERR_CHAN_ASSESSMENT_NOT_SUPPORTED = 0x2E,
+ HCI_ERR_INSUFFICIENT_SECURITY = 0x2F,
+ HCI_ERR_PARAM_OUT_OF_MANDATORY_RANGE = 0x30,
+ HCI_ERR_RESERVED2 = 0x31,
+ HCI_ERR_ROLE_SWITCH_PENDING = 0x32,
+ HCI_ERR_RESERVED3 = 0x33,
+ HCI_ERR_RESERVED_SLOT_VIOLATION = 0x34,
+ HCI_ERR_ROLE_SWITCH_FAILED = 0x35,
+ HCI_ERR_EXTENDED_INQUIRY_RESP_TOO_LARGE = 0x36,
+ HCI_ERR_SIMPLE_PAIRING_NOT_SUPPORTED_BY_HOST = 0x37,
+ HCI_ERR_HOST_BUSY_PAIRING = 0x38,
+ HCI_ERR_CONN_REJ_NO_SUITABLE_CHAN_FOUND = 0x39,
+ HCI_ERR_CONTROLLER_BUSY = 0x3A,
+ HCI_ERR_UNACCEPTABLE_CONN_INTERVAL = 0x3B,
+ HCI_ERR_DIRECTED_ADV_TIMEOUT = 0x3C,
+ HCI_ERR_CONN_TERM_MIC_FAILURE = 0x3D,
+ HCI_ERR_CONN_FAILED_TO_ESTABLISH = 0x3E,
+ HCI_ERR_MAC_CONN_FAILED = 0x3F,
+
+
+ //telink define
+ HCI_ERR_CONTROLLER_TX_FIFO_NOT_ENOUGH = HCI_ERR_CONTROLLER_BUSY, //0x3A
+ HCI_ERR_CONN_NOT_ESTABLISH = HCI_ERR_CONN_FAILED_TO_ESTABLISH, //0x3E
+ HCI_ERR_CURRENT_STATE_NOT_SUPPORTED_THIS_CMD = HCI_ERR_CONTROLLER_BUSY,
+
+
+
+ LL_ERR_START = 0x50,
+ LL_ERR_WHITE_LIST_PUBLIC_ADDR_TABLE_FULL, //!< The white list public addr table full
+ LL_ERR_WHITE_LIST_PRIVATE_RESOLVABLE_IRK_TABLE_FULL,
+ LL_EER_FEATURE_NOT_SUPPORTED,
+ LL_ERR_SUPVERVISION_TIMEOUT,
+ LL_ERR_IRK_NOT_FOUND_FOR_RANDOM_ADDR,
+ LL_ERR_ADDR_NOT_EXIST_IN_WHITE_LIST,
+ LL_ERR_ADDR_ALREADY_EXIST_IN_WHITE_LIST,
+ LL_ERR_WHITE_LIST_NV_DISABLED,
+ LL_ERR_CURRENT_DEVICE_ALREADY_IN_CONNECTION_STATE,
+ //Telink
+ LL_ERR_CONNECTION_NOT_ESTABLISH,
+ LL_ERR_TX_FIFO_NOT_ENOUGH,
+ LL_ERR_ENCRYPTION_BUSY,
+ LL_ERR_CURRENT_STATE_NOT_SUPPORTED_THIS_CMD,
+
+
+
+ L2CAP_ERR_START = 0x60,
+ L2CAP_ERR_MUX_EXCCED, //!< The AUTOPEND pending all is turned on
+ L2CAP_ERR_INVALID_PACKET_LEN, //!< The AUTOPEND pending all is turned off
+ L2CAP_ERR_BEACON_LOSS, //!< The beacon was lost following a synchronization request
+ L2CAP_ERR_CHANNEL_ACCESS_FAILURE, //!< The operation or data request failed because of activity on the channel
+ L2CAP_ERR_DENIED, //!< The l2cap was not able to enter low power mode
+ L2CAP_ERR_INVALID_HANDLE, //!< The purge request contained an invalid handle
+ L2CAP_ERR_INVALID_PARAMETER, //!< The API function parameter is out of range
+ L2CAP_ERR_UNSUPPORTED, //!< The operation is not supported in the current configuration
+ L2CAP_ERR_BAD_STATE, //!< The operation could not be performed in the current state
+ L2CAP_ERR_NO_RESOURCES, //!< The operation could not be completed because no memory resources were available
+ L2CAP_ERR_TIME_OUT, //!< The operation is time out
+ L2CAP_ERR_NO_HANDLER, //!< No handle
+ L2CAP_ERR_LEN_NOT_MATCH, //!< length not match
+
+
+ ATT_ERR_START = 0x70,
+ ATT_ERR_INVALID_HANDLE, //!< The attribute handle given was not valid on this server
+ ATT_ERR_READ_NOT_PERMITTED, //!< The attribute cannot be read
+ ATT_ERR_WRITE_NOT_PERMITTED, //!< The attribute cannot be written
+ ATT_ERR_INVALID_PDU, //!< The attribute PDU was invalid
+ ATT_ERR_INSUFFICIENT_AUTH, //!< The attribute requires authentication before it can be read or written
+ ATT_ERR_REQ_NOT_SUPPORTED, //!< Attribute server does not support the request received from the client
+ ATT_ERR_INVALID_OFFSET, //!< Offset specified was past the end of the attribute
+ ATT_ERR_INSUFFICIENT_AUTHOR, //!< The attribute requires authorization before it can be read or written
+ ATT_ERR_PREPARE_QUEUE_FULL, //!< Too many prepare writes have been queued
+ ATT_ERR_ATTR_NOT_FOUND, //!< No attribute found within the given attribute handle range
+ ATT_ERR_ATTR_NOT_LONG, //!< The attribute cannot be read or written using the Read Blob Request
+ ATT_ERR_INSUFFICIENT_KEY_SIZE, //!< The Encryption Key Size used for encrypting this link is insufficient
+ ATT_ERR_INVALID_ATTR_VALUE_LEN, //!< The attribute value length is invalid for the operation
+ ATT_ERR_UNLIKELY_ERR, //!< The attribute request that was requested has encountered an error that was unlikely, and therefore could not be completed as requested
+ ATT_ERR_INSUFFICIENT_ENCRYPT, //!< The attribute requires encryption before it can be read or written
+ ATT_ERR_UNSUPPORTED_GRP_TYPE, //!< The attribute type is not a supported grouping attribute as defined by a higher layer specification
+ ATT_ERR_INSUFFICIENT_RESOURCES, //!< Insufficient Resources to complete the request
+ ATT_ERR_ATTR_NUMBER_INVALID, //!< The attr number is 0 or too large to register
+ ATT_ERR_ENQUEUE_FAILED, //!< register service failed when enqueue
+ ATT_ERR_PREVIOUS_INDICATE_DATA_HAS_NOT_CONFIRMED,
+ ATT_ERR_INVALID_PARAMETER,
+ ATT_ERR_SERVICE_DISCOVERY_TIEMOUT,
+ ATT_ERR_NOTIFY_INDICATION_NOT_PERMITTED,
+ ATT_ERR_DATA_PENDING_DUE_TO_SERVICE_DISCOVERY_BUSY,
+ ATT_ERR_DATA_LENGTH_EXCEED_MTU_SIZE,
+
+
+
+ GAP_ERR_START = 0x90,
+ GAP_ERR_INVALID_ROLE,
+ GAP_ERR_MEMORY_ERROR,
+ GAP_ERR_INVALID_STATE,
+ GAP_ERR_INVALID_PARAMETER,
+ GAP_ERR_LISTENER_FULL,
+ GAP_ERR_ITEM_NOT_FOUND,
+
+
+
+ SMP_EER_MUX_EXCCED = 0xA0, //!< The AUTOPEND pending all is turned on
+ SMP_EER_INVALID_PACKET_LEN, //!< The AUTOPEND pending all is turned off
+ SMP_EER_INVALID_STATE, //!< received cmd in invalid state
+ SMP_EER_USER_CANCEL, //!< user channcel status
+ SMP_EER_SEC_FAILED, //!< The l2cap was not able to enter low power mode.
+ SMP_EER_INVALID_HANDLE, //!< The purge request contained an invalid handle
+ SMP_EER_INVALID_PARAMETER, //!< The API function parameter is out of range
+ SMP_EER_UNSUPPORTED, //!< The operation is not supported in the current configuration
+ SMP_EER_BAD_STATE, //!< The operation could not be performed in the current state
+ SMP_EER_NO_RESOURCES, //!< The operation could not be completed because no memory resources were available
+ SMP_EER_TIME_OUT, //!< The operation is time out
+ SMP_EER_NO_HANDLER, //!< The operation is time out
+ SMP_EER_LEN_NOT_MATCH, //!< The operation is time out
+ SMP_EER_NOT_FOUND, //!< The operation is time out
+ SMP_EER_LINK_IS_ENCY,
+ SMP_EER_PAIRING_IS_GOING_ON,
+ SMP_EER_SIG_VERIFY_FAIL, //!< The operation is time out
+ SMP_EER_SIG_FAIL, //!< The singature is failed
+ SMP_EER_NO_SIGN_KEY,
+ SMP_EER_ADDR_RESOLVE_FAIL, //!< The operation is time out
+
+
+
+ BLE_COMMON_ERR_START = 0xD0,
+ BLE_ERR_DUPLICATE_PACKET,
+ BLE_ERR_INVALID_STATE,
+ BLE_ERR_INVALID_PARAMETER,
+ BLE_ERR_NO_RESOURCE,
+
+
+} ble_sts_t;
+
+
+
+
+
+#define BLE_ADDR_LEN 6
+
+//Definition for BLE Common Address Type
+ /* Device Address Type */
+#define BLE_ADDR_PUBLIC 0
+#define BLE_ADDR_RANDOM 1
+#define BLE_ADDR_INVALID 0xff
+
+//Definition for BLE Common Address Type
+/*
+ *
+ * |--public ..................................................... BLE_DEVICE_ADDRESS_PUBLIC
+ * |
+ * Address Type --| |-- random static ................................. BLE_DEVICE_ADDRESS_RANDOM_STATIC
+ * | |
+ * |--random --|
+ * | |-- non_resolvable private ... BLE_DEVICE_ADDRESS_NON_RESOLVABLE_PRIVATE
+ * |-- random private --|
+ * |-- resolvable private ....... BLE_DEVICE_ADDRESS_RESOLVABLE_PRIVATE
+ *
+ */
+
+#define BLE_DEVICE_ADDRESS_PUBLIC 1
+#define BLE_DEVICE_ADDRESS_RANDOM_STATIC 2
+#define BLE_DEVICE_ADDRESS_NON_RESOLVABLE_PRIVATE 3
+#define BLE_DEVICE_ADDRESS_RESOLVABLE_PRIVATE 4
+
+
+
+#define IS_PUBLIC_ADDR(Type, Addr) ( (Type)==BLE_ADDR_PUBLIC) )
+#define IS_RANDOM_STATIC_ADDR(Type, Addr) ( (Type)==BLE_ADDR_RANDOM && (Addr[5] & 0xC0) == 0xC0 )
+#define IS_NON_RESOLVABLE_PRIVATE_ADDR(Type, Addr) ( (Type)==BLE_ADDR_RANDOM && (Addr[5] & 0xC0) == 0x00 )
+#define IS_RESOLVABLE_PRIVATE_ADDR(Type, Addr) ( (Type)==BLE_ADDR_RANDOM && (Addr[5] & 0xC0) == 0x40 )
+
+
+
+typedef enum{
+ OWN_ADDRESS_PUBLIC = 0,
+ OWN_ADDRESS_RANDOM = 1,
+ OWN_ADDRESS_RESOLVE_PRIVATE_PUBLIC = 2,
+ OWN_ADDRESS_RESOLVE_PRIVATE_RANDOM = 3,
+}own_addr_type_t;
+
+
+/*********************************************************************
+ * TYPES
+ */
+/////////////////////////// PARING HEAD /////////////////////////////////////////////
+#define BLE_GATT_OP_PAIR_REQ 1
+#define BLE_GATT_OP_PAIR_RSP 2
+#define BLE_GATT_OP_PAIR_REJECT 3
+#define BLE_GATT_OP_PAIR_NETWORK_NAME 4
+#define BLE_GATT_OP_PAIR_NETWORK_PASS 5
+#define BLE_GATT_OP_PAIR_NETWORK_LTK 6
+#define BLE_GATT_OP_PAIR_CONFIRM 7
+#define BLE_GATT_OP_PAIR_LTK_REQ 8
+#define BLE_GATT_OP_PAIR_LTK_RSP 9
+#define BLE_GATT_OP_PAIR_DELETE 10
+#define BLE_GATT_OP_PAIR_DEL_RSP 11
+#define BLE_GATT_OP_ENC_REQ 12
+#define BLE_GATT_OP_ENC_RSP 13
+#define BLE_GATT_OP_ENC_FAIL 14
+#define BLE_GATT_OP_ENC_READY 15
+
+/////////////////////////// SMP ///////////////////////////////////
+#define SMP_OP_PAIRING_REQ 1
+#define SMP_OP_PAIRING_RSP 2
+#define SMP_OP_PAIRING_CONFIRM 3
+#define SMP_OP_PAIRING_RANDOM 4
+#define SMP_OP_PAIRING_FAIL 5
+#define SMP_OP_ENC_INFO 6
+#define SMP_OP_ENC_IDX 7
+#define SMP_OP_ENC_IINFO 8
+#define SMP_OP_ENC_IADR 9
+#define SMP_OP_ENC_SIGN 0x0a
+#define SMP_OP_SEC_REQ 0x0b
+#define SMP_OP_PARING_PUBLIC_KEY 0x0c
+#define SMP_OP_PARING_DHKEY 0x0d
+#define SMP_OP_KEYPRESS_NOTIFICATION 0x0e
+#define SMP_OP_WAIT 0x0f
+
+#define SMP_OP_ENC_END 0xFF
+
+
+#define SMP_TRANSPORT_SPECIFIC_KEY_START 0xEF
+#define SMP_TRANSPORT_SPECIFIC_KEY_END 0
+
+
+// Advertise channel PDU Type
+typedef enum advChannelPDUType_e {
+ LL_TYPE_ADV_IND = 0x00,
+ LL_TYPE_ADV_DIRECT_IND = 0x01,
+ LL_TYPE_ADV_NONCONN_IND = 0x02,
+ LL_TYPE_SCAN_REQ = 0x03,
+ LL_TYPE_SCAN_RSP = 0x04,
+ LL_TYPE_CONNNECT_REQ = 0x05,
+ LL_TYPE_ADV_SCAN_IND = 0x06,
+} advChannelPDUType_t;
+
+
+/* Advertisement Type */
+typedef enum{
+ ADV_TYPE_CONNECTABLE_UNDIRECTED = 0x00, // ADV_IND
+ ADV_TYPE_CONNECTABLE_DIRECTED_HIGH_DUTY = 0x01, // ADV_INDIRECT_IND (high duty cycle)
+ ADV_TYPE_SCANNABLE_UNDIRECTED = 0x02 , // ADV_SCAN_IND
+ ADV_TYPE_NONCONNECTABLE_UNDIRECTED = 0x03 , // ADV_NONCONN_IND
+ ADV_TYPE_CONNECTABLE_DIRECTED_LOW_DUTY = 0x04, // ADV_INDIRECT_IND (low duty cycle)
+}advertising_type;
+
+
+
+// Advertise report event type
+typedef enum {
+ ADV_REPORT_EVENT_TYPE_ADV_IND = 0x00,
+ ADV_REPORT_EVENT_TYPE_DIRECT_IND = 0x01,
+ ADV_REPORT_EVENT_TYPE_SCAN_IND = 0x02,
+ ADV_REPORT_EVENT_TYPE_NONCONN_IND = 0x03,
+ ADV_REPORT_EVENT_TYPE_SCAN_RSP = 0x04,
+} advReportEventType_t;
+
+
+typedef struct {
+ u8 type :4;
+ u8 rfu1 :2;
+ u8 txAddr :1;
+ u8 rxAddr :1;
+}rf_adv_head_t;
+
+
+typedef struct {
+ u8 llid :2;
+ u8 nesn :1;
+ u8 sn :1;
+ u8 md :1;
+ u8 rfu1 :3;
+}rf_data_head_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RA(1)_TA(1)_RFU(2)_TYPE(4)
+ u8 rf_len; //LEN(6)_RFU(2)
+}rf_packet_head_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RA(1)_TA(1)_RFU(2)_TYPE(4)
+ u8 rf_len; //LEN(6)_RFU(2)
+}rf_packet_auto_reply_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+
+ rf_adv_head_t header; //RA(1)_TA(1)_RFU(2)_TYPE(4)
+ u8 rf_len; //LEN(6)_RFU(2)
+
+ u8 advA[6]; //address
+#if (TEST_LONG_ADV_PACKET)
+ u8 data[80];
+#else
+ u8 data[31]; //0-31 byte
+#endif
+}rf_packet_adv_t;
+
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+
+ rf_adv_head_t header; //RA(1)_TA(1)_RFU(2)_TYPE(4)
+ u8 rf_len; //LEN(6)_RFU(2)
+
+ u8 advA[6]; //slave address
+ u8 initA[6]; //master address
+}rf_packet_direct_adv_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ rf_adv_head_t header; //RA(1)_TA(1)_RFU(2)_TYPE(4)
+ u8 rf_len; //LEN(6)_RFU(2)
+
+ u8 scanA[6]; //
+ u8 advA[6]; //
+}rf_packet_scan_req_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ rf_adv_head_t header; //RA(1)_TA(1)_RFU(2)_TYPE(4)
+ u8 rf_len; //LEN(6)_RFU(2)
+
+ u8 advA[6]; //address
+ u8 data[31]; //0-31 byte
+}rf_packet_scan_rsp_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RA(1)_TA(1)_RFU(2)_TYPE(4): connect request PDU
+ u8 rf_len; //LEN(6)_RFU(2)
+ u8 scanA[6]; //
+ u8 advA[6]; //
+ u8 accessCode[4]; // access code
+ u8 crcinit[3];
+ u8 winSize;
+ u16 winOffset;
+ u16 interval;
+ u16 latency;
+ u16 timeout;
+ u8 chm[5];
+ u8 hop; //sca(3)_hop(5)
+}rf_packet_connect_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ rf_adv_head_t header; //RA(1)_TA(1)_RFU(2)_TYPE(4): connect request PDU
+ u8 rf_len; //LEN(6)_RFU(2)
+ u8 scanA[6]; //
+ u8 advA[6]; //
+ u8 aa[4]; // access code
+ u8 crcinit[3];
+ u8 wsize;
+ u16 woffset;
+ u16 interval;
+ u16 latency;
+ u16 timeout;
+ u8 chm[5];
+ u8 hop; //sca(3)_hop(5)
+}rf_packet_ll_init_t;
+
+typedef struct {
+ u8 type;
+ u8 rf_len;
+ u8 opcode;
+ u8 winSize;
+ u16 winOffset;
+ u16 interval;
+ u16 latency;
+ u16 timeout;
+ u16 instant;
+} rf_packet_ll_updateConnPara_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RA(1)_TA(1)_RFU(2)_TYPE(4): connect request PDU
+ u8 rf_len; //LEN(6)_RFU(2)
+
+ u8 scanA[6]; //
+ u8 advA[6]; //
+ u8 aa[4]; // access code
+ u8 crcinit[3];
+ u8 wsize;
+ u16 woffset;
+ u16 interval;
+ u16 latency;
+ u16 timeout;
+ u8 chm[5];
+ u8 hop; //sca(3)_hop(5)
+}rf_packet_relay_t;
+
+
+typedef struct {
+ u16 intervalMin; // Minimum advertising interval for non-directed advertising, time = N * 0.625ms
+ u16 intervalMax; // Maximum advertising interval for non-directed advertising, time = N * 0.625ms
+ u8 advType; // Advertising
+ u8 ownAddrType;
+ u8 peerAddrType;
+ u8 peerAddr[BLE_ADDR_LEN];
+ u8 advChannelMap;
+ u8 advFilterPolicy;
+} adv_para_t;
+
+typedef struct {
+ u16 connHandle;
+ u16 connIntervalMin;
+ u16 connIntervalMax;
+ u16 connLatency;
+ u16 supervisionTimeout;
+ u16 minCELen;
+ u16 maxCELen;
+} conn_para_t;
+
+
+
+/*
+LLID(2) - NESN(1) - SN(1) - MD(1) - RFU(3) - Length(5) - RFU(3)
+*/
+
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RA(1)_TA(1)_RFU(2)_TYPE(4)
+ u8 rf_len; //LEN(6)_RFU(2)
+ u16 l2capLen;
+ u16 chanId;
+}rf_packet_l2cap_head_t;
+
+
+typedef struct{
+ rf_data_head_t header;
+ u8 rf_len;
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 data[1];
+}rf_packet_l2cap_t;
+
+
+typedef struct{
+ rf_data_head_t header;
+ u8 rf_len;
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 handle0;
+ u8 handle1;
+ u8 dat[20];
+}rf_packet_att_t;
+
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 data[1];
+}rf_packet_l2cap_req_t;
+
+
+typedef struct{
+ u32 dma_len;
+ u8 type;
+ u8 rf_len;
+ u16 l2capLen;
+ u16 chanId;
+ u8 code;
+ u8 id;
+ u16 dataLen;
+ u16 result;
+}rf_pkt_l2cap_sig_connParaUpRsp_t;
+
+
+typedef struct{
+ u8 type;
+ u8 rf_len;
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 data[1];
+}rf_pkt_l2cap_req_t;
+
+
+typedef struct{
+ u8 llid; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 id;
+ u16 data_len;
+ u16 min_interval;
+ u16 max_interval;
+ u16 latency;
+ u16 timeout;
+}rf_packet_l2cap_connParaUpReq_t;
+
+
+typedef struct{
+ u8 llid; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 id;
+ u16 data_len;
+ u16 result;
+}rf_packet_l2cap_connParaUpRsp_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u8 data;
+}rf_packet_l2cap_cust_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 errOpcode;
+ u16 errHandle;
+ u8 errReason;
+}rf_packet_att_errRsp_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 startingHandle;
+ u8 startingHandle1;
+ u8 endingHandle;
+ u8 endingHandle1;
+ u8 attType[2]; //
+}rf_packet_att_readByType_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 startingHandle;
+ u8 startingHandle1;
+ u8 endingHandle;
+ u8 endingHandle1;
+ u8 attType[2];
+ u8 attValue[2];
+}rf_packet_att_findByTypeReq_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u16 data[1];
+}rf_packet_att_findByTypeRsp_t;
+
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 handle;
+ u8 handle1;
+}rf_packet_att_read_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 handle;
+ u8 handle1;
+ u8 offset0;
+ u8 offset1;
+}rf_packet_att_readBlob_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 value[22];
+}rf_packet_att_readRsp_t;
+
+
+typedef struct{
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 datalen;
+ u8 data[1]; // character_handle / property / value_handle / value
+}rf_pkt_att_readByTypeRsp_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 datalen;
+ u8 data[1]; // character_handle / property / value_handle / value
+}rf_packet_att_readByTypeRsp_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 datalen;
+ u16 data[3];
+}rf_packet_att_readByGroupTypeRsp_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 format;
+ u8 data[1]; // character_handle / property / value_handle / value
+}rf_packet_att_findInfoReq_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 flags;
+}rf_packet_att_executeWriteReq_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 handle;
+ u8 handle1;
+ u8 value;
+}rf_packet_att_write_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 handle[2];
+ u8 data;
+}rf_packet_att_notification_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+
+ u16 l2cap; //0x17
+ u16 chanid; //0x04,
+
+ u8 att; //0x12 for master; 0x1b for slave
+ u8 hl; // assigned by master
+ u8 hh; //
+ u8 sno;
+
+ u8 ctype;
+ u8 cmd[18]; //byte
+}rf_packet_ll_write_data_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 mtu[2];
+}rf_packet_att_mtu_t;
+
+typedef struct{
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 mtu[2];
+}rf_packet_att_mtu_exchange_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+}rf_packet_att_writeRsp_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RA(1)_TA(1)_RFU(2)_TYPE(4)
+ u8 rf_len; //LEN(6)_RFU(2)
+ u8 opcode;
+ u8 data[8];
+}rf_packet_feature_rsp_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RA(1)_TA(1)_RFU(2)_TYPE(4)
+ u8 rf_len; //LEN(6)_RFU(2)
+ u8 opcode;
+ u8 mainVer;
+ u16 vendor;
+ u16 subVer;
+}rf_packet_version_ind_t;
+
+typedef struct {
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RA(1)_TA(1)_RFU(2)_TYPE(4)
+ u8 rf_len; //LEN(6)_RFU(2)
+ u8 opcode;
+ u8 winSize;
+ u16 winOffset;
+ u16 interval;
+ u16 latency;
+ u16 timeout;
+ u16 instant;
+}rf_packet_connect_upd_req_t;
+
+typedef struct {
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RA(1)_TA(1)_RFU(2)_TYPE(4)
+ u8 rf_len; //LEN(6)_RFU(2)
+ u8 opcode;
+ u8 chm[5];
+ u16 instant;
+} rf_packet_chm_upd_req_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RA(1)_TA(1)_RFU(2)_TYPE(4)
+ u8 rf_len; //LEN(6)_RFU(2)
+ u8 opcode;
+ u8 data[1];
+}rf_packet_ctrl_unknown_t;
+
+
+typedef struct {
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 type; //RA(1)_TA(1)_RFU(2)_TYPE(4)
+ u8 rf_len; //LEN(6)_RFU(2)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 id;
+ u16 siglen;
+ u16 min_interval;
+ u16 max_interval;
+ u16 latency;
+ u16 timeout;
+}rf_packet_connParUpReq_t;
+
+typedef struct {
+ u8 valid;
+ u8 winSize;
+ u16 winOffset;
+ u16 interval;
+ u16 latency;
+ u16 timeout;
+ u16 instant;
+}connect_upd_data_t;
+
+typedef struct {
+ u8 valid;
+ u8 chm[5];
+ u16 instant;
+}connect_chm_upd_data_t;
+
+
+typedef struct{
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+
+ u8 opcode; //
+ u8 reason; //
+}rf_packet_ll_terminate_t;
+
+
+typedef struct{
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+
+ u8 opcode; //
+ u8 dat[1]; //
+}rf_packet_ll_control_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2cap;
+ u16 chanid;
+
+ u8 att;
+ u8 hl; // assigned by master
+ u8 hh; //
+
+ u8 dat[20];
+
+}rf_packet_att_data_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 flag;
+
+ u32 src_id;
+
+ u8 att; //0x12 for master; 0x1b for slave
+ u8 hl; // assigned by master
+ u8 hh; //
+ u8 sno;
+
+ u16 nid; // network ID
+ u16 group;
+
+ u32 dst_id;
+
+ u8 cmd[11]; //byte
+ // 10 xx xx xx xx xx xx => light on
+ // 11 xx xx xx xx xx xx => light off
+ // 12 rr gg bb ww uu vv => set
+
+ //u32 mic[4]; //optional
+}rf_packet_ll_rc_data_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+
+ u16 l2capLen; // can be src_id
+ u16 chanId;
+
+ u8 att; //0x12 for master; 0x1b for slave
+ u8 hl; // assigned by master
+ u8 hh; //
+ u8 sno;
+
+ u16 mic; // network ID
+ u16 group;
+
+ u8 dst_id[4];
+
+ u8 cmd[11]; //byte
+ // 10 xx xx xx xx xx xx => light on
+ // 11 xx xx xx xx xx xx => light off
+ // 12 rr gg bb ww uu vv => set
+
+ //u32 mic[4]; //optional
+}rf_packet_mesh_data_phone_t;
+
+typedef struct{
+ u8 sno[3];
+ u8 src[2];
+ u8 dst[2];
+ u8 op_para[13];
+ // u8 ttl;
+ // u8 hop;
+}rf_packet_mesh_nwk_t;
+
+
+typedef struct{
+ u32 dma_len; //29
+
+ u8 rf_len; //28
+ u8 type; //LEN(5)_RFU(3)
+
+ u8 src_id[4]; // src_id
+
+ u8 ttl; // time to live
+ u8 hl; // assigned by master
+ u8 hh; //
+ u8 sno;
+
+ u16 mic; // network ID
+ u16 group;
+
+ u8 dst_id[4];
+
+ u8 cmd[11]; //byte
+ // 10 xx xx xx xx xx xx => light on
+ // 11 xx xx xx xx xx xx => light off
+ // 12 rr gg bb ww uu vv => set
+
+ //u32 mic[4]; //optional
+}rf_packet_mesh_data_t1;
+
+typedef struct{
+ u32 dma_len; //29
+
+ u8 rf_len; //28
+ u8 type; //LEN(5)_RFU(3)
+
+ u16 l2cap; // l2cap length
+ u16 chan; // channel ID
+
+ u8 ttl; // time to live
+ u8 hl; // assigned by master
+ u8 hh; //
+ rf_packet_mesh_nwk_t c;
+
+}rf_packet_mesh_phone_t;
+
+typedef struct{
+ u32 dma_len; //29
+
+ u8 rf_len; //28
+ u8 type; //LEN(5)_RFU(3)
+
+ u16 l2cap; // l2cap length
+ u16 chan; // channel ID
+
+ u8 ttl; // time to live
+ u8 hl; // assigned by master
+ u8 hh; //
+ rf_packet_mesh_nwk_t c;
+ u8 rsv[6];
+
+}rf_packet_mesh_data_t;
+
+typedef struct{
+ u32 dma_len; //39
+
+ u8 rf_len; //38
+ u8 type; //LEN(5)_RFU(3)
+
+ u16 l2cap; // l2cap length
+ u16 chan; // channel ID
+
+ u8 ttl; // time to live
+ u8 hl; // assigned by master
+ u8 hh; //
+ u8 dat[30];
+
+}rf_packet_mesh_status_t;
+
+typedef struct{
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 datalen;
+ u8 data[1]; // character_handle / property / value_handle / value
+}att_readByTypeRsp_t;
+
+typedef struct{
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 format;
+ u8 data[1]; // character_handle / property / value_handle / value
+}att_findInfoRsp_t;
+
+typedef struct{
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 value[22];
+}att_readRsp_t;
+
+typedef struct{
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 handle;
+ u8 hh;
+ u8 value[1];
+}att_notify_t;
+
+typedef struct {
+ u8 type;
+ u8 address[BLE_ADDR_LEN];
+} addr_t;
+
+typedef struct {
+ u8 address[BLE_ADDR_LEN];
+} public_addr_t;
+
+
+////////////////////////////////////////////////////////////////////////////
+
+
+
+
+
+
+
+typedef struct {
+ u8 num;
+ u8 property;
+ u16 handle;
+ u16 uuid;
+ u16 ref;
+} att_db_uuid16_t; //8-byte
+
+
+typedef struct {
+ u8 num;
+ u8 property;
+ u16 handle;
+ u8 uuid[16];
+} att_db_uuid128_t; //20-byte
+
+//------------- event --------------------------------
+typedef struct {
+ u8 status;
+ u8 handle;
+ u8 hh;
+ u8 reason;
+} event_disconnection_t; //20-byte
+
+typedef struct {
+ u8 subcode;
+ u8 nreport;
+ u8 event_type;
+ u8 adr_type;
+ u8 mac[6];
+ u8 len;
+ u8 data[1];
+} event_adv_report_t; //20-byte
+
+typedef struct {
+ u8 subcode;
+ u8 status;
+ u16 handle;
+ u8 role;
+ u8 peer_adr_type;
+ u8 mac[6];
+ u16 interval;
+ u16 latency;
+ u16 timeout;
+ u8 accuracy;
+} event_connection_complete_t; //20-byte
+
+typedef struct {
+ u8 subcode;
+ u8 status;
+ u16 handle;
+ u16 interval;
+ u16 latency;
+ u16 timeout;
+} event_connection_update_t; //20-byte
+
+typedef struct {
+ u8 status;
+ u16 handle;
+ u8 enc_enable;
+} event_enc_change_t;
+
+typedef struct {
+ u8 status;
+ u16 handle;
+} event_enc_refresh_t;
+
+#include "att.h"
+#include "gap.h"
+#include "uuid.h"
+#include "hci/hci.h"
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ble_phy.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ble_phy.h
new file mode 100644
index 0000000000000..caea368a844e5
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ble_phy.h
@@ -0,0 +1,127 @@
+/********************************************************************************************************
+ * @file ble_phy.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+/*
+ * ble_phy.h
+ *
+ * Created on: 2017-8-17
+ * Author: Administrator
+ */
+
+#ifndef BLE_PHY_H_
+#define BLE_PHY_H_
+
+#include "tl_common.h"
+
+#ifndef PHYTEST_MODE_DISABLE
+#define PHYTEST_MODE_DISABLE 0
+#endif
+
+#ifndef PHYTEST_MODE_THROUGH_2_WIRE_UART
+#define PHYTEST_MODE_THROUGH_2_WIRE_UART 1 //Direct Test Mode through a 2-wire UART interface
+#endif
+
+#ifndef PHYTEST_MODE_OVER_HCI_WITH_USB
+#define PHYTEST_MODE_OVER_HCI_WITH_USB 2 //Direct Test Mode over HCI(UART hardware interface)
+#endif
+
+#ifndef PHYTEST_MODE_OVER_HCI_WITH_UART
+#define PHYTEST_MODE_OVER_HCI_WITH_UART 3 //Direct Test Mode over HCI(USB hardware interface)
+#endif
+
+
+#define BLC_PHYTEST_DISABLE 0
+#define BLC_PHYTEST_ENABLE 1
+
+
+
+#define PHY_CMD_SETUP 0
+#define PHY_CMD_RX 1
+#define PHY_CMD_TX 2
+#define PHY_CMD_END 3
+
+
+#define PKT_TYPE_PRBS9 0
+#define PKT_TYPE_0X0F 1
+#define PKT_TYPE_0X55 2
+#define PKT_TYPE_0XFF 3
+
+enum{
+ PHY_EVENT_STATUS = 0,
+ PHY_EVENT_PKT_REPORT = 0x8000,
+};
+
+enum{
+ PHY_STATUS_SUCCESS = 0,
+ PHY_STATUS_FAIL = 0x0001,
+};
+
+
+
+
+
+typedef struct {
+ u8 cmd;
+ u8 tx_start;
+ u16 pkts;
+
+ u32 tick_tx;
+}phy_data_t;
+
+
+
+
+
+
+
+
+/******************************* User Interface ************************************/
+void blc_phy_initPhyTest_module(void);
+
+ble_sts_t blc_phy_setPhyTestEnable (u8 en);
+bool blc_phy_isPhyTestEnable(void);
+
+
+//user for phy test 2 wire uart mode
+int phy_test_2_wire_rx_from_uart (void);
+int phy_test_2_wire_tx_to_uart (void);
+
+
+
+/************************* Stack Interface, user can not use!!! ***************************/
+
+int blc_phy_test_main_loop(void);
+
+int blc_phytest_cmd_handler (u8 *p, int n);
+
+ble_sts_t blc_phy_setReceiverTest (u8 rx_chn);
+ble_sts_t blc_phy_setTransmitterTest (u8 tx_chn, u8 length, u8 pkt_type);
+ble_sts_t blc_phy_setPhyTestEnd(u8 *pkt_num);
+
+ble_sts_t blc_phy_reset(void);
+void blc_phy_preamble_length_set(unsigned char len);
+
+
+
+
+
+
+#endif /* BLE_PHY_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ble_smp.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ble_smp.h
new file mode 100644
index 0000000000000..ad63ea74e2971
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ble_smp.h
@@ -0,0 +1,709 @@
+/********************************************************************************************************
+ * @file ble_smp.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+/*
+ * ble_smp.h
+ *
+ * Created on: 2016-9-27
+ * Author: Telink
+ */
+
+#ifndef BLE_SMP_H_
+#define BLE_SMP_H_
+
+#include
+#include "blt_config.h"
+
+
+#define BOND_DEVICE_WHITELIST_MANAGEMANT_ENABLE 1
+
+
+#ifndef SMP_BONDING_DEVICE_MAX_NUM
+#define SMP_BONDING_DEVICE_MAX_NUM 4
+#endif
+
+
+#if (LL_MASTER_MULTI_CONNECTION || LL_MASTER_SINGLE_CONNECTION)
+ #define SMP_SLAVE_SAVE_PERR_LTK_ENABLE 1
+#else
+ #define SMP_SLAVE_SAVE_PERR_LTK_ENABLE 0
+#endif
+
+
+#define SMP_SAVE_PEER_CSRK_ENABLE 0
+
+#if (SMP_SLAVE_SAVE_PERR_LTK_ENABLE)
+ #define SMP_PARAM_NV_UNIT 96
+
+ #define SMP_PARAM_INIT_CLEAR_MAGIN_ADDR 3072
+ #define SMP_PARAM_LOOP_CLEAR_MAGIN_ADDR 3584
+
+#else
+ #define SMP_PARAM_NV_UNIT 64
+
+ #define SMP_PARAM_INIT_CLEAR_MAGIN_ADDR 3072 //64 * 48
+ #define SMP_PARAM_LOOP_CLEAR_MAGIN_ADDR 3520 //64 * 55 (56 device most)
+#endif
+
+
+#define SMP_PARAM_NV_MAX_LEN 4096
+
+
+extern int SMP_PARAM_NV_ADDR_START;
+
+#define SMP_PARAM_NV_SEC_ADDR_START (SMP_PARAM_NV_ADDR_START + SMP_PARAM_NV_MAX_LEN)
+#define SMP_PARAM_NV_SEC_ADDR_END (SMP_PARAM_NV_SEC_ADDR_START + SMP_PARAM_NV_MAX_LEN - 1)
+
+
+#ifndef SIMPLE_MULTI_MAC_EN
+#define SIMPLE_MULTI_MAC_EN 0
+#endif
+
+#if SIMPLE_MULTI_MAC_EN
+ extern u8 device_mac_index;
+ #define DEVICE_INDEX_MASK 0x0F
+ #define FLAG_SMP_PARAM_SAVE_BASE (0x40 + (device_mac_index & DEVICE_INDEX_MASK))
+#else
+ #define FLAG_SMP_PARAM_SAVE_BASE (0x40)
+#endif
+ #define FLAG_SMP_PARAM_MASK 0xC0
+ #define FLAG_SMP_PARAM_VALID 0x40
+
+//#define FLAG_SMP_PARAM_SAVE_OK 0x5A // 0101 1010
+#define FLAG_SMP_PARAM_SAVE_PENDING 0xCF//0x7B // 0111 1011
+#define FLAG_SMP_PARAM_SAVE_ERASE 0x00 //
+
+
+#define FLAG_SMP_SECTOR_USE 0x3C
+#define FLAG_SMP_SECTOR_CLEAR 0x00
+
+#define FLASH_SECTOR_OFFSET 4080
+
+#define TYPE_WHITELIST BIT(0)
+#define TYPE_RESOLVINGLIST BIT(1)
+
+
+
+
+
+#define SMP_STANDARD_PAIR 0
+#define SMP_FAST_CONNECT 1
+
+/* pairing phase stated define */
+#define PAIRING_IDLE_PHASE 0x00000000UL
+#define PAIRING_FEARTURE_EXCHANGE_PHASE_OK 0x00000001UL
+#define PAIRING_KEY_GENERATE_PHASE_OK 0x00000002UL
+//#define PAIRING_KEY_TRANSPORT_PHASE_OK 0x00000004UL
+
+typedef union {
+ struct{
+ u8 bondingFlag : 2;
+ u8 MITM : 1;
+ u8 SC : 1;
+ u8 keyPress: 1;
+ u8 rsvd: 3;
+ };
+ u8 authType;
+}smp_authReq_t;
+
+typedef union{
+ struct {
+ u8 encKey : 1;
+ u8 idKey : 1;
+ u8 sign : 1;
+ u8 linkKey : 1;
+ u8 rsvd : 4;
+ };
+ u8 keyIni;
+}smp_keyDistribution_t;
+
+typedef struct{
+ u8 code; //req = 0x01; rsp = 0x02;
+ u8 ioCapablity;
+ u8 oobDataFlag;
+ smp_authReq_t authReq;
+ u8 maxEncrySize;
+
+ smp_keyDistribution_t initKeyDistribution;
+ smp_keyDistribution_t rspKeyDistribution;
+}smp_paring_req_rsp_t;
+
+
+
+typedef struct{
+ u8 code; //0x04
+ u16 randomValue[16];
+}smp_paring_random_t;
+
+typedef struct{
+ u8 code; //0x03
+ u16 confirmValue[16];
+}smp_paring_confirm_t;
+
+typedef struct{
+ u8 code; // 0x05
+ u8 reason;
+}smp_paring_failed_t;
+
+typedef struct{
+ u8 code;//0x0b
+
+ smp_authReq_t authReq;
+}smp_secure_req_t;
+
+typedef struct{
+ u8 code;//0xa
+ u8 signalKey[16];
+}smp_signal_info_t;
+
+typedef struct{
+ u8 code;//0x9
+ u8 addrType;
+ u8 bdAddr[6];
+}smp_id_addr_info_t;
+
+typedef struct{
+ u8 code;//0x8
+ u8 idResolveKey[16];
+}smp_id_info_t;
+
+typedef struct{
+ u8 code;//0x7
+ u16 edivPtr[2];
+ u8 masterRand[8];
+}smp_master_id_t;
+
+typedef struct{
+ u8 code;//0x6
+ u8 LTK[16];
+}smp_enc_info_t;
+
+// -------add core 4.2 ------
+typedef struct{
+ u8 code;//0xc
+ u8 publicKeyX[32];
+ u8 publicKeyY[32];
+}smp_paring_public_key_t;
+
+typedef struct{
+ u8 code;//0xd
+ u8 DHKeyCheck[16];
+}smp_DHkey_check_t;
+
+typedef struct{
+ u8 code;//0xe
+ u8 notifyType;
+}smp_key_notify_t;
+
+
+
+
+
+/*
+ * smp parameter about peer device.
+ * */
+typedef struct{
+ u8 paring_enable;
+ u8 peer_addr_type; //address used in link layer connection
+ u8 peer_addr[6];
+
+ u8 peer_key_size; // bond and key_size
+ u8 peer_id_address_type; //peer identity address information in key distribution, used to identify
+ u8 peer_id_address[6];
+
+ u8 peer_csrk[16];
+ u8 peer_irk[16];
+ u8 paring_peer_rand[16];
+
+#if (SMP_SLAVE_SAVE_PERR_LTK_ENABLE)
+ u16 peer_ediv;
+ u8 peer_random[8];
+ u8 peer_ltk[16];
+#endif
+
+}smp_param_peer_t;
+
+
+/*
+ * smp parameter need save to flash.
+ * */
+
+
+
+
+
+typedef struct { //82
+ u8 flag;
+ u8 peer_addr_type; //address used in link layer connection
+ u8 peer_addr[6];
+
+ u8 peer_key_size;
+ u8 peer_id_adrType; //peer identity address information in key distribution, used to identify
+ u8 peer_id_addr[6];
+
+ u8 own_ltk[16]; //own_ltk[16]
+ u8 peer_irk[16];
+ u8 peer_csrk[16];
+
+#if (SMP_SLAVE_SAVE_PERR_LTK_ENABLE)
+ u8 peer_ltk[16];
+ u8 peer_random[8];
+ u16 peer_ediv;
+#endif
+
+
+
+}smp_param_save_t;
+
+/*
+ * smp parameter about own device.
+ * */
+typedef struct{
+ smp_paring_req_rsp_t paring_req;
+ smp_paring_req_rsp_t paring_rsp;
+ u16 save_key_flag;
+ smp_authReq_t auth_req;
+ u8 own_conn_type; //current connection peer own type
+ u8 own_conn_addr[6];
+ u8 paring_tk[16]; // in security connection to keep own random
+ u8 paring_confirm[16]; // in security connection oob mode to keep peer random
+ u8 own_ltk[16]; //used for generate ediv and random
+}smp_param_own_t;
+
+u8 cur_enc_keysize;
+
+typedef struct {
+ /* data */
+ u8 csrk[16];
+ u32 signCounter;
+} smp_secSigInfo_t;
+
+
+
+#define ADDR_NOT_BONDED 0xFF
+#define ADDR_NEW_BONDED 0xFE
+#define ADDR_DELETE_BOND 0xFD
+
+#define KEY_FLAG_IDLE 0xFF
+#define KEY_FLAG_NEW 0xFE
+#define KEY_FLAG_FAIL 0xFD
+
+
+typedef struct {
+ u8 maxNum;
+ u8 curNum;
+ u8 addrIndex;
+ u8 keyIndex;
+ //u8 dev_wl_en;
+ //u8 dev_wl_maxNum; //device in whilteList max number
+
+ u32 bond_flash_idx[SMP_BONDING_DEVICE_MAX_NUM]; //mark paired slave mac address in flash
+} bond_device_t;
+
+
+typedef struct{
+ u8 type; //RFU(3)_MD(1)_SN(1)_NESN(1)-LLID(2)
+ u8 rf_len; //LEN(5)_RFU(3)
+ u16 l2capLen;
+ u16 chanId;
+ u8 opcode;
+ u8 data[21];
+}smp2llcap_type_t;
+
+
+
+typedef void (*smp_check_handler_t)(u32);
+typedef void (*smp_init_handler_t)(u8 *p);
+typedef u8 * (*smp_info_handler_t)(void);
+typedef void (*smp_bond_clean_handler_t)(void);
+typedef int (*smp_enc_done_cb_t)(void);
+
+
+extern smp_check_handler_t func_smp_check; //HID on android 7.0
+extern smp_init_handler_t func_smp_init;
+extern smp_info_handler_t func_smp_info;
+extern smp_bond_clean_handler_t func_bond_check_clean;
+extern smp_enc_done_cb_t func_smp_enc_done_cb;
+
+
+extern smp_param_peer_t smp_param_peer;
+extern smp_param_own_t smp_param_own;
+
+extern smp2llcap_type_t smpResSignalPkt;
+
+typedef enum {
+ JUST_WORKS,
+ PK_RESP_INPUT, // Initiator displays PK, responder inputs PK
+ PK_INIT_INPUT, // Responder displays PK, initiator inputs PK
+ PK_BOTH_INPUT, // Only input on both, both input PK
+ OOB, // OOB available on both sides
+ NUMERIC_COMPARISON,
+
+} stk_generationMethod_t;
+
+// IO Capability Values
+typedef enum {
+ IO_CAPABILITY_DISPLAY_ONLY = 0,
+ IO_CAPABILITY_DISPLAY_YES_NO,
+ IO_CAPABILITY_KEYBOARD_ONLY,
+ IO_CAPABILITY_NO_INPUT_NO_OUTPUT,
+ IO_CAPABILITY_KEYBOARD_DISPLAY, // not used by secure simple pairing
+ IO_CAPABILITY_UNKNOWN = 0xff
+} io_capability_t;
+
+/////////////////////////// smp method map table ///////////////////////////////////////
+// horizontal: initiator capabilities
+// vertial: responder capabilities
+static const stk_generationMethod_t gen_method_legacy[5][5] = {
+ { JUST_WORKS, JUST_WORKS, PK_INIT_INPUT, JUST_WORKS, PK_INIT_INPUT },
+ { JUST_WORKS, JUST_WORKS, PK_INIT_INPUT, JUST_WORKS, PK_INIT_INPUT },
+ { PK_RESP_INPUT, PK_RESP_INPUT, PK_BOTH_INPUT, JUST_WORKS, PK_RESP_INPUT },
+ { JUST_WORKS, JUST_WORKS, JUST_WORKS, JUST_WORKS, JUST_WORKS },
+ { PK_RESP_INPUT, PK_RESP_INPUT, PK_INIT_INPUT, JUST_WORKS, PK_RESP_INPUT },
+};
+
+#if SECURE_CONNECTION_ENABLE
+/////////////////////////// smp method map table ///////////////////////////////////////
+static const stk_generationMethod_t gen_method_sc[5][5] = {
+ { JUST_WORKS, JUST_WORKS, PK_INIT_INPUT, JUST_WORKS, PK_INIT_INPUT },
+ { JUST_WORKS, NUMERIC_COMPARISON, PK_INIT_INPUT, JUST_WORKS, NUMERIC_COMPARISON },
+ { PK_RESP_INPUT, PK_RESP_INPUT, PK_BOTH_INPUT, JUST_WORKS, PK_RESP_INPUT },
+ { JUST_WORKS, JUST_WORKS, JUST_WORKS, JUST_WORKS, JUST_WORKS },
+ { PK_RESP_INPUT, NUMERIC_COMPARISON, PK_INIT_INPUT, JUST_WORKS, NUMERIC_COMPARISON },
+};
+
+typedef u8* (* smp_sc_cmd_handler_t)(u16 conn, u8*p);
+typedef void (* smp_sc_pushPkt_handler_t)( u32 type );
+
+extern smp_sc_cmd_handler_t func_smp_sc_cmd_proc;
+extern smp_sc_pushPkt_handler_t func_smp_sc_pushPkt_proc;
+
+extern const u8 PublicKey[64];
+extern const u8 PrivateKey[32];
+
+typedef struct{
+ u8 sc_sk_dhk_own[32]; // keep sk before receive Ea. and keep dhkey after that.
+ u8 sc_prk_own[32]; // own private key
+ u8 sc_pk_own[64]; // own public key
+ u8 sc_pk_peer[64]; // peer public key
+}smp_sc_key_t;
+
+extern smp_sc_key_t smp_sc_key;
+
+#endif
+
+#define IO_CAPABLITY_DISPLAY_ONLY 0x00
+#define IO_CAPABLITY_DISPLAY_YESNO 0x01
+#define IO_CAPABLITY_KEYBOARD_ONLY 0x02
+#define IO_CAPABLITY_NO_IN_NO_OUT 0x03
+#define IO_CAPABLITY_KEYBOARD_DISPLAY 0x04
+
+#define PASSKEY_TYPE_ENTRY_STARTED 0x00
+#define PASSKEY_TYPE_DIGIT_ENTERED 0x01
+#define PASSKEY_TYPE_DIGIT_ERASED 0x02
+#define PASSKEY_TYPE_CLEARED 0x03
+#define PASSKEY_TYPE_ENTRY_COMPLETED 0x04
+
+#define PARING_FAIL_REASON_PASSKEY_ENTRY 0x01
+#define PARING_FAIL_REASON_OOB_NOT_AVAILABLE 0x02
+#define PARING_FAIL_REASON_AUTH_REQUIRE 0x03
+#define PARING_FAIL_REASON_CONFIRM_FAILED 0x04
+#define PARING_FAIL_REASON_PARING_NOT_SUPPORTED 0x05
+#define PARING_FAIL_REASON_ENCRYPT_KEY_SIZE 0x06
+//-- core 4.2
+#define PARING_FAIL_REASON_CMD_NOT_SUPPORT 0x07
+#define PARING_FAIL_REASON_UNSPECIFIED_REASON 0x08
+#define PARING_FAIL_REASON_REPEATED_ATTEMPT 0x09
+#define PARING_FAIL_REASON_INVAILD_PARAMETER 0x0a
+#define PARING_FAIL_REASON_DHKEY_CHECK_FAIL 0x0b
+#define PARING_FAIL_REASON_NUMUERIC_FAILED 0x0c
+#define PARING_FAIL_REASON_BREDR_PARING 0x0d
+#define PARING_FAIL_REASON_CROSS_TRANSKEY_NOT_ALLOW 0x0e
+
+#define ENCRYPRION_KEY_SIZE_MAXINUM 16
+#define ENCRYPRION_KEY_SIZE_MINIMUN 7
+
+typedef enum{
+ SMP_PARING_DISABLE_TRRIGER = 0,
+ SMP_PARING_CONN_TRRIGER ,
+ SMP_PARING_PEER_TRRIGER,
+}smp_paringTrriger_t;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+// SLAVE
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+
+/******************************* User Interface ************************************/
+
+
+/**************************************************
+ * API used for slave enable the device paring.
+ * encrypt_en SMP_PARING_DISABLE_TRRIGER - not allow encryption
+ * SMP_PARING_CONN_TRRIGER - paring process start once connect.
+ * SMP_PARING_PEER_TRRIGER - paring process start once peer device start.
+ */
+int bls_smp_enableParing (smp_paringTrriger_t encrypt_en);
+
+
+
+
+void bls_smp_configParingSecurityInfoStorageAddr (int addr);
+
+ble_sts_t blc_smp_param_setBondingDeviceMaxNumber ( int device_num);
+
+u8 blc_smp_param_getCurrentBondingDeviceNumber(void);
+
+
+u32 blc_smp_param_loadByIndex(u8 index, smp_param_save_t* smp_param_load);
+
+u32 blc_smp_param_loadByAddr(u8 addr_type, u8* addr, smp_param_save_t* smp_param_load);
+
+
+
+
+/*************************************************
+ * used for enable oob flag
+ */
+void blc_smp_enableOobFlag (int en, u8 *oobData);
+
+/*************************************************
+ * used for set MAX key size
+ * */
+void blc_smp_setMaxKeySize (u8 maxKeySize);
+
+/*************************************************
+ * @brief used for enable authentication MITM
+ * @return 0 - setting success
+ * others - pin code not in ranged.(0 ~ 999,999)
+ */
+int blc_smp_enableAuthMITM (int en, u32 pinCodeInput);
+
+/*************************************************
+ * @brief used for set MITM protect input pinCode
+ * @return 0 - setting failure
+ * others - pin code in ranged.(0 ~ 999,999)
+ */
+int blc_smp_set_pinCode(u32 pinCodeInput);
+
+/*************************************************
+ * @brief used for enable authentication bonding flag.
+ */
+int blc_smp_enableBonding (int en);
+
+/*************************************************
+ * used for set IO capability
+ * */
+void blc_smp_setIoCapability (u8 ioCapablility);
+
+
+#if (SECURE_CONNECTION_ENABLE)
+/*************************************************
+ * used for enable sc flag
+ * */
+void blc_smp_enableScFlag (int en);
+/*************************************************
+ * used for enable sc only
+ * set sc only.if master do not support sc,
+ * slave disconnect the link layer
+ * */
+void set_smp_sc_only(u8 flg);
+
+/*************************************************
+ * used for ecdh debug mode
+ * */
+u8 blc_smp_getEcdhDebugMode(void);
+void blc_smp_setEcdhDebugMode(u8 mode);
+#endif
+
+
+
+/*
+ * API used for set distribute key enable.
+ * */
+smp_keyDistribution_t blc_smp_setInitiatorKey (u8 LTK_distributeEn, u8 IRK_distributeEn, u8 CSRK_DistributeEn);
+smp_keyDistribution_t blc_smp_setResponderKey (u8 LTK_distributeEn, u8 IRK_distributeEn, u8 CSRK_DistributeEn);
+
+
+
+
+
+
+
+/************************* Stack Interface, user can not use!!! ***************************/
+
+/*
+ * Return STK generate method.
+ * */
+int blc_smp_getGenMethod ();
+
+/**************************************************
+ * used for handle link layer callback (ltk event callback), packet LL_ENC_request .
+ */
+int bls_smp_getLtkReq (u16 connHandle, u8 * random, u16 ediv);
+
+/*
+ * Used for set smp parameter to default.
+ * */
+void blc_smp_paramInitDefault ( );
+
+
+
+/*************************************************
+ * @brief used for reset smp param to default value.
+ */
+int blc_smp_paramInit ();
+
+
+
+/**************************************************
+ * API used for slave start encryption.
+ */
+int bls_smp_startEncryption ();
+
+
+
+
+
+
+
+
+
+
+typedef struct {
+ u8 secReq_pending;
+ u8 secReq_laterSend;
+ u16 rsvd;
+} smp_ctrl_t;
+
+extern smp_ctrl_t blc_smp_ctrl;
+
+void blc_smp_checkSecurityReqeustSending(u32 connStart_tick);
+void HID_service_on_android7p0_init(void);
+void blc_smp_procParingEnd(u8 err_reason);
+
+#if (SMP_BLE_CERT_TEST)
+void blc_smp_setCertTimeoutTick (u32 t);
+void blc_smp_certTimeoutLoopEvt (u8 as_master);
+#endif
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+// MATER
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+
+typedef int (*smp_finish_callback_t)(void);
+void blm_smp_registerSmpFinishCb (smp_finish_callback_t cb);
+
+
+
+
+// 6 byte slave_MAC 8 byte rand 2 byte ediv
+// 16 byte ltk
+#define PAIR_INFO_SECTOR_SIZE 64
+
+#define PAIR_OFFSET_SLAVE_MAC 2
+
+#define PAIR_OFFSET_RAND 8
+#define PAIR_OFFSET_EDIV 16
+#define PAIR_OFFSET_ATT 18 //ATT handle
+#define PAIR_OFFSET_LTK 32
+#define PAIR_OFFSET_IRK 48
+
+#if (LL_MASTER_MULTI_CONNECTION)
+ #define PAIR_SLAVE_MAX_NUM 8
+#else
+ #define PAIR_SLAVE_MAX_NUM 1
+#endif
+
+typedef struct {
+ u8 bond_mark;
+ u8 adr_type;
+ u8 address[6];
+} mac_adr_t;
+
+
+#define FlAG_BOND BIT(0)
+#define FLAG_FASTSMP BIT(4)
+
+typedef struct {
+ u8 curNum;
+ u8 curIndex;
+ u8 isBond_fastSmp;
+ u8 rsvd; //auto smp, no need SEC_REQ
+ u32 bond_flash_idx[PAIR_SLAVE_MAX_NUM]; //mark paired slave mac address in flash
+ mac_adr_t bond_device[PAIR_SLAVE_MAX_NUM];
+} bond_slave_t;
+
+
+
+
+#define SLAVE_TRIGGER_SMP_FIRST_PAIRING 0 //first pair, slave send security_request to trigger master's pairing&encryption
+#define MASTER_TRIGGER_SMP_FIRST_PAIRING BIT(0)
+
+#define SLAVE_TRIGGER_SMP_AUTO_CONNECT 0 //auto connect, slave send security_request to trigger master's encryption
+#define MASTER_TRIGGER_SMP_AUTO_CONNECT BIT(1)
+
+
+void blm_host_smp_init (u32 adr);
+
+void blm_host_smp_setSecurityTrigger(u8 trigger);
+u8 blm_host_smp_getSecurityTrigger(void);
+void blm_host_smp_procSecurityTrigger(u16 connHandle);
+
+void blm_host_smp_handler(u16 conn_handle, u8 *p);
+int tbl_bond_slave_search(u8 adr_type, u8 * addr);
+int tbl_bond_slave_delete_by_adr(u8 adr_type, u8 *addr);
+void tbl_bond_slave_unpair_proc(u8 adr_type, u8 *addr);
+
+void blm_smp_encChangeEvt(u8 status, u16 connhandle, u8 enc_enable);
+
+
+
+
+#endif /* BLE_SMP_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/blt_config.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/blt_config.h
new file mode 100644
index 0000000000000..bf9fc7091722a
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/blt_config.h
@@ -0,0 +1,250 @@
+/********************************************************************************************************
+ * @file blt_config.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+//////////////////////////////////////////////////////////////////////////////
+/**
+ * @brief Definition for Device info
+ */
+#include "drivers.h"
+#include "tl_common.h"
+
+#define BLE_DEBUG 0 //!!! use for debug. when release SDK, "BLE_DEBUG" must be set to 0.
+
+#define MAX_DEV_NAME_LEN 18
+
+#ifndef DEV_NAME
+#define DEV_NAME "hModule"
+#endif
+
+
+
+#define RAMCODE_OPTIMIZE_CONN_POWER_NEGLECT_ENABLE 0
+
+#if(__TL_LIB_5316__ || MCU_CORE_TYPE == MCU_CORE_5317)
+//Use for UEI UTB2
+#define RAM_OPTIMZATION_FOR_UEI_EN 1
+#endif
+
+#if (RAM_OPTIMZATION_FOR_UEI_EN)
+ #define SMP_BONDING_DEVICE_MAX_NUM 1
+#endif
+
+
+#define ELECTRONIC_SCALE_APPLICATION 0
+#if ELECTRONIC_SCALE_APPLICATION
+ #define SECURE_CONNECTION_ENABLE 0
+ //Link layer feature enable flag default setting
+ #define BLE_CORE42_DATA_LENGTH_EXTENSION_ENABLE 0
+ #define LL_FEATURE_SUPPORT_LE_2M_PHY 0
+ #define BLE_STATE_MACHINE_EXTENSION_EN 0
+#endif
+
+
+#define ATT_RSP_BIG_MTU_PROCESS_EN 1
+
+
+typedef struct{
+ u8 conn_mark;
+ u8 ext_cap_en;
+ u8 pad32k_en;
+ u8 pm_enter_en;
+}misc_para_t;
+
+misc_para_t blt_miscParam;
+
+
+static inline void blc_app_setExternalCrystalCapEnable(u8 en)
+{
+ blt_miscParam.ext_cap_en = en;
+}
+
+
+#if 1
+static inline void blc_app_loadCustomizedParameters(void)
+{
+ if(!blt_miscParam.ext_cap_en)
+ {
+ //customize freq_offset adjust cap value, if not customized, default ana_81 is 0xd0
+ if( (*(unsigned char*) CUST_CAP_INFO_ADDR) != 0xff ){
+ //ana_81<4:0> is cap value(0x00 - 0x1f)
+ analog_write(0x81, (analog_read(0x81)&0xe0) | ((*(unsigned char*) CUST_CAP_INFO_ADDR)&0x1f) );
+ }
+ }
+ else{//use external 24M cap
+ analog_write(0x80, analog_read(0x80)&0xbf);//an_80<6> = 0, disable internal cap
+ analog_write(0x81, analog_read(0x81)&0xe0);//an_81<4:0> = 0, clear internal cap value
+ }
+
+ // customize TP0/TP1 1M
+ if( ((*(unsigned char*) (CUST_TP_INFO_ADDR)) != 0xff) && ((*(unsigned char*) (CUST_TP_INFO_ADDR+1)) != 0xff) ){
+ rf_update_tp_value(*(unsigned char*) (CUST_TP_INFO_ADDR), *(unsigned char*) (CUST_TP_INFO_ADDR+1));
+ }
+
+ if ( ((*(unsigned char*) (CUST_TP_INFO_ADDR+2)) != 0xff) && ((*(unsigned char*) (CUST_TP_INFO_ADDR+3)) != 0xff) ){
+ rf_load_2m_tp_value(*(unsigned char*) (CUST_TP_INFO_ADDR+2), *(unsigned char*) (CUST_TP_INFO_ADDR+3));
+ }
+}
+#endif
+
+
+
+
+
+
+
+
+
+/////////////////// Feature ////////////////////////////
+#ifndef SECURE_CONNECTION_ENABLE
+#define SECURE_CONNECTION_ENABLE 1
+#endif
+
+//Link layer feature enable flag default setting
+#ifndef BLE_CORE42_DATA_LENGTH_EXTENSION_ENABLE
+#define BLE_CORE42_DATA_LENGTH_EXTENSION_ENABLE 1
+#endif
+
+#ifndef LL_FEATURE_SUPPORT_LE_2M_PHY
+#define LL_FEATURE_SUPPORT_LE_2M_PHY 1
+#endif
+
+#ifndef BLS_ADV_INTERVAL_CHECK_ENABLE
+#define BLS_ADV_INTERVAL_CHECK_ENABLE 0 ////1 according to sihui's advise, disable interval check.
+#endif
+
+#ifndef BLE_STATE_MACHINE_EXTENSION_EN
+ #define BLE_STATE_MACHINE_EXTENSION_EN 1
+#endif
+
+
+
+
+#define BLS_BLE_RF_IRQ_TIMING_EXTREMELY_SHORT_EN 0
+
+
+#if (MCU_CORE_TYPE == MCU_CORE_5317)
+ #define BLS_PROC_MASTER_UPDATE_REQ_IN_IRQ_ENABLE 0
+#endif
+
+
+//conn param update/map update
+#ifndef BLS_PROC_MASTER_UPDATE_REQ_IN_IRQ_ENABLE
+#define BLS_PROC_MASTER_UPDATE_REQ_IN_IRQ_ENABLE 1
+#endif
+
+
+#ifndef BLS_PROC_LONG_SUSPEND_ENABLE
+#define BLS_PROC_LONG_SUSPEND_ENABLE 0
+#endif
+
+
+#define log_task_begin(x)
+#define log_task_end(x)
+#define log_event(x)
+#define log_data(x,y)
+
+
+/////////////////////HCI UART variables///////////////////////////////////////
+#define UART_DATA_LEN 64 // data max 252
+typedef struct{
+ unsigned int len; // data max 252
+ unsigned char data[UART_DATA_LEN];
+}uart_data_t;
+
+
+
+
+///////////////////////////////////////dbg channels///////////////////////////////////////////
+#ifndef DBG_CHN0_TOGGLE
+#define DBG_CHN0_TOGGLE
+#endif
+
+#ifndef DBG_CHN0_HIGH
+#define DBG_CHN0_HIGH
+#endif
+
+#ifndef DBG_CHN0_LOW
+#define DBG_CHN0_LOW
+#endif
+
+#ifndef DBG_CHN1_TOGGLE
+#define DBG_CHN1_TOGGLE
+#endif
+
+#ifndef DBG_CHN1_HIGH
+#define DBG_CHN1_HIGH
+#endif
+
+#ifndef DBG_CHN1_LOW
+#define DBG_CHN1_LOW
+#endif
+
+#ifndef DBG_CHN2_TOGGLE
+#define DBG_CHN2_TOGGLE
+#endif
+
+#ifndef DBG_CHN2_HIGH
+#define DBG_CHN2_HIGH
+#endif
+
+#ifndef DBG_CHN2_LOW
+#define DBG_CHN2_LOW
+#endif
+
+#ifndef DBG_CHN3_TOGGLE
+#define DBG_CHN3_TOGGLE
+#endif
+
+#ifndef DBG_CHN3_HIGH
+#define DBG_CHN3_HIGH
+#endif
+
+#ifndef DBG_CHN3_LOW
+#define DBG_CHN3_LOW
+#endif
+
+#ifndef DBG_CHN4_TOGGLE
+#define DBG_CHN4_TOGGLE
+#endif
+
+#ifndef DBG_CHN4_HIGH
+#define DBG_CHN4_HIGH
+#endif
+
+#ifndef DBG_CHN4_LOW
+#define DBG_CHN4_LOW
+#endif
+
+#ifndef DBG_CHN5_TOGGLE
+#define DBG_CHN5_TOGGLE
+#endif
+
+#ifndef DBG_CHN5_HIGH
+#define DBG_CHN5_HIGH
+#endif
+
+#ifndef DBG_CHN5_LOW
+#define DBG_CHN5_LOW
+#endif
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/crypt/aes/aes_att.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/crypt/aes/aes_att.h
new file mode 100644
index 0000000000000..5f3d21abf873c
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/crypt/aes/aes_att.h
@@ -0,0 +1,87 @@
+/********************************************************************************************************
+ * @file aes_att.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef _AES_H_
+#define _AES_H_
+
+typedef unsigned char word8;
+typedef unsigned short word16;
+typedef unsigned long word32;
+
+static const word8 aes_sw_S[256] =
+{
+/* 0 -- */0x63, 0x7C, 0x77, 0x7B, 0xF2, 0x6B, 0x6F, 0xC5, 0x30, 0x01, 0x67, 0x2B, 0xFE, 0xD7, 0xAB, 0x76,
+/* 16 -- */0xCA, 0x82, 0xC9, 0x7D, 0xFA, 0x59, 0x47, 0xF0, 0xAD, 0xD4, 0xA2, 0xAF, 0x9C, 0xA4, 0x72, 0xC0,
+/* 32 -- */0xB7, 0xFD, 0x93, 0x26, 0x36, 0x3F, 0xF7, 0xCC, 0x34, 0xA5, 0xE5, 0xF1, 0x71, 0xD8, 0x31, 0x15,
+/* 48 -- */0x04, 0xC7, 0x23, 0xC3, 0x18, 0x96, 0x05, 0x9A, 0x07, 0x12, 0x80, 0xE2, 0xEB, 0x27, 0xB2, 0x75,
+/* 64 -- */0x09, 0x83, 0x2C, 0x1A, 0x1B, 0x6E, 0x5A, 0xA0, 0x52, 0x3B, 0xD6, 0xB3, 0x29, 0xE3, 0x2F, 0x84,
+/* 80 -- */0x53, 0xD1, 0x00, 0xED, 0x20, 0xFC, 0xB1, 0x5B, 0x6A, 0xCB, 0xBE, 0x39, 0x4A, 0x4C, 0x58, 0xCF,
+/* 96 -- */0xD0, 0xEF, 0xAA, 0xFB, 0x43, 0x4D, 0x33, 0x85, 0x45, 0xF9, 0x02, 0x7F, 0x50, 0x3C, 0x9F, 0xA8,
+/* 112 -- */0x51, 0xA3, 0x40, 0x8F, 0x92, 0x9D, 0x38, 0xF5, 0xBC, 0xB6, 0xDA, 0x21, 0x10, 0xFF, 0xF3, 0xD2,
+/* 128 -- */0xCD, 0x0C, 0x13, 0xEC, 0x5F, 0x97, 0x44, 0x17, 0xC4, 0xA7, 0x7E, 0x3D, 0x64, 0x5D, 0x19, 0x73,
+/* 144 -- */0x60, 0x81, 0x4F, 0xDC, 0x22, 0x2A, 0x90, 0x88, 0x46, 0xEE, 0xB8, 0x14, 0xDE, 0x5E, 0x0B, 0xDB,
+/* 160 -- */0xE0, 0x32, 0x3A, 0x0A, 0x49, 0x06, 0x24, 0x5C, 0xC2, 0xD3, 0xAC, 0x62, 0x91, 0x95, 0xE4, 0x79,
+/* 176 -- */0xE7, 0xC8, 0x37, 0x6D, 0x8D, 0xD5, 0x4E, 0xA9, 0x6C, 0x56, 0xF4, 0xEA, 0x65, 0x7A, 0xAE, 0x08,
+/* 192 -- */0xBA, 0x78, 0x25, 0x2E, 0x1C, 0xA6, 0xB4, 0xC6, 0xE8, 0xDD, 0x74, 0x1F, 0x4B, 0xBD, 0x8B, 0x8A,
+/* 208 -- */0x70, 0x3E, 0xB5, 0x66, 0x48, 0x03, 0xF6, 0x0E, 0x61, 0x35, 0x57, 0xB9, 0x86, 0xC1, 0x1D, 0x9E,
+/* 224 -- */0xE1, 0xF8, 0x98, 0x11, 0x69, 0xD9, 0x8E, 0x94, 0x9B, 0x1E, 0x87, 0xE9, 0xCE, 0x55, 0x28, 0xDF,
+/* 240 -- */0x8C, 0xA1, 0x89, 0x0D, 0xBF, 0xE6, 0x42, 0x68, 0x41, 0x99, 0x2D, 0x0F, 0xB0, 0x54, 0xBB, 0x16,
+};
+
+
+static const word8 aes_sw_Si[256] =
+{
+/* 0 -- */0x52, 0x09, 0x6A, 0xD5, 0x30, 0x36, 0xA5, 0x38, 0xBF, 0x40, 0xA3, 0x9E, 0x81, 0xF3, 0xD7, 0xFB,
+/* 16 -- */0x7C, 0xE3, 0x39, 0x82, 0x9B, 0x2F, 0xFF, 0x87, 0x34, 0x8E, 0x43, 0x44, 0xC4, 0xDE, 0xE9, 0xCB,
+/* 32 -- */0x54, 0x7B, 0x94, 0x32, 0xA6, 0xC2, 0x23, 0x3D, 0xEE, 0x4C, 0x95, 0x0B, 0x42, 0xFA, 0xC3, 0x4E,
+/* 48 -- */0x08, 0x2E, 0xA1, 0x66, 0x28, 0xD9, 0x24, 0xB2, 0x76, 0x5B, 0xA2, 0x49, 0x6D, 0x8B, 0xD1, 0x25,
+/* 64 -- */0x72, 0xF8, 0xF6, 0x64, 0x86, 0x68, 0x98, 0x16, 0xD4, 0xA4, 0x5C, 0xCC, 0x5D, 0x65, 0xB6, 0x92,
+/* 80 -- */0x6C, 0x70, 0x48, 0x50, 0xFD, 0xED, 0xB9, 0xDA, 0x5E, 0x15, 0x46, 0x57, 0xA7, 0x8D, 0x9D, 0x84,
+/* 96 -- */0x90, 0xD8, 0xAB, 0x00, 0x8C, 0xBC, 0xD3, 0x0A, 0xF7, 0xE4, 0x58, 0x05, 0xB8, 0xB3, 0x45, 0x06,
+/* 112 -- */0xD0, 0x2C, 0x1E, 0x8F, 0xCA, 0x3F, 0x0F, 0x02, 0xC1, 0xAF, 0xBD, 0x03, 0x01, 0x13, 0x8A, 0x6B,
+/* 128 -- */0x3A, 0x91, 0x11, 0x41, 0x4F, 0x67, 0xDC, 0xEA, 0x97, 0xF2, 0xCF, 0xCE, 0xF0, 0xB4, 0xE6, 0x73,
+/* 144 -- */0x96, 0xAC, 0x74, 0x22, 0xE7, 0xAD, 0x35, 0x85, 0xE2, 0xF9, 0x37, 0xE8, 0x1C, 0x75, 0xDF, 0x6E,
+/* 160 -- */0x47, 0xF1, 0x1A, 0x71, 0x1D, 0x29, 0xC5, 0x89, 0x6F, 0xB7, 0x62, 0x0E, 0xAA, 0x18, 0xBE, 0x1B,
+/* 176 -- */0xFC, 0x56, 0x3E, 0x4B, 0xC6, 0xD2, 0x79, 0x20, 0x9A, 0xDB, 0xC0, 0xFE, 0x78, 0xCD, 0x5A, 0xF4,
+/* 192 -- */0x1F, 0xDD, 0xA8, 0x33, 0x88, 0x07, 0xC7, 0x31, 0xB1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xEC, 0x5F,
+/* 208 -- */0x60, 0x51, 0x7F, 0xA9, 0x19, 0xB5, 0x4A, 0x0D, 0x2D, 0xE5, 0x7A, 0x9F, 0x93, 0xC9, 0x9C, 0xEF,
+/* 224 -- */0xA0, 0xE0, 0x3B, 0x4D, 0xAE, 0x2A, 0xF5, 0xB0, 0xC8, 0xEB, 0xBB, 0x3C, 0x83, 0x53, 0x99, 0x61,
+/* 240 -- */0x17, 0x2B, 0x04, 0x7E, 0xBA, 0x77, 0xD6, 0x26, 0xE1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0C, 0x7D,
+};
+
+static const word8 aes_sw_rcon[30] = {
+ 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
+ 0x1b, 0x36, 0x6c, 0xd8, 0xab, 0x4d, 0x9a, 0x2f,
+ 0x5e, 0xbc, 0x63, 0xc6, 0x97, 0x35, 0x6a, 0xd4,
+ 0xb3, 0x7d, 0xfa, 0xef, 0xc5, 0x91
+};
+
+void _rijndaelSetKey (unsigned char *k);
+void _rijndaelEncrypt(unsigned char *a);
+void _rijndaelDecrypt (unsigned char *a);
+
+
+
+
+void tn_aes_128(unsigned char *key, unsigned char *plaintext, unsigned char *result);
+
+
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/crypt/aes_ccm.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/crypt/aes_ccm.h
new file mode 100644
index 0000000000000..43d11523f2cf6
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/crypt/aes_ccm.h
@@ -0,0 +1,82 @@
+/********************************************************************************************************
+ * @file aes_ccm.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 30, 2010
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include
+
+#define AES_BLOCK_SIZE 16
+
+
+//#define SUCCESS 0
+enum {
+ AES_SUCC = SUCCESS,
+ AES_NO_BUF,
+ AES_FAIL,
+};
+
+
+struct CCM_FLAGS_TAG {
+ union {
+ struct {
+ u8 L : 3;
+ u8 M : 3;
+ u8 aData :1;
+ u8 reserved :1;
+ } bf;
+ u8 val;
+ };
+};
+
+typedef struct CCM_FLAGS_TAG ccm_flags_t;
+
+
+typedef struct {
+ union {
+ u8 A[AES_BLOCK_SIZE];
+ u8 B[AES_BLOCK_SIZE];
+ } bf;
+
+ u8 tmpResult[AES_BLOCK_SIZE];
+ u8 newAstr[AES_BLOCK_SIZE];
+} aes_enc_t;
+
+u8 aes_ccmAuthTran(u8 micLen, u8 *key, u8 *iv, u8 *mStr, u16 mStrLen, u8 *aStr, u16 aStrLen, u8 *result);
+u8 aes_ccmDecAuthTran(u8 micLen, u8 *key, u8 *iv, u8 *mStr, u16 mStrLen, u8 *aStr, u8 aStrLen, u8 *mic);
+u8 aes_initKey(u8 *key);
+u8 tl_aes_encrypt(u8 *key, u8 *data, u8 *result);
+
+u8 aes_ccm_encryption(u8 *key, u8 *iv, u8 *aStr, u8 *mic, u8 mStrLen, u8 *mStr, u8 *result);
+u8 aes_ccm_decryption(u8 *key, u8 *iv, u8 *aStr, u8 *mic, u8 mStrLen, u8 *mStr, u8 *result);
+void aes_ecb_encryption(u8 *key, u8 *plaintext, u8 *encrypted_data);
+void aes_ecb_decryption(u8 *key, u8 *encrypted_data, u8 *decrypted_data);
+void aes_ll_encryption(u8 *key, u8 *plaintext, u8 *result);
+void aes_ll_ccm_encryption_init (u8 *ltk, u8 *skdm, u8 *skds, u8 *ivm, u8 *ivs, ble_crypt_para_t *pd);
+void aes_ll_ccm_encryption(u8 *pkt, int master, ble_crypt_para_t *pd);
+int aes_ll_ccm_decryption(u8 *pkt, int master, ble_crypt_para_t *pd); //OK return 0
+u8 aes_att_encryption_packet(u8 *key, u8 *iv, u8 *mic, u8 mic_len, u8 *ps, u8 len);
+u8 aes_att_decryption_packet(u8 *key, u8 *iv, u8 *mic, u8 mic_len, u8 *ps, u8 len);
+
+void aes_att_encryption (u8 *key, u8 *plaintext, u8 *result);
+void aes_att_decryption (u8 *key, u8 *plaintext, u8 *result);
+
+void aes_ll_c1(u8 * key, u8 * r, u8 *p1, u8 *p2, u8 * result);
+void aes_ll_s1(u8 * key, u8 * r1, u8 * r2, u8 * result);
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/crypt/le_crypto.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/crypt/le_crypto.h
new file mode 100644
index 0000000000000..803e72adc0f84
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/crypt/le_crypto.h
@@ -0,0 +1,136 @@
+/********************************************************************************************************
+ * @file le_crypto.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 30, 2010
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#ifndef TN_DTLS_H
+#define TN_DTLS_H
+
+#define biL 32
+
+#define BITS_TO_LIMBS(i) ( (i) / 32 + ( (i) % 32 != 0 ) )
+
+
+
+#define TNDTLS_ERR_MPI_BAD_INPUT_DATA -0x0004 // Bad input parameters to function.
+#define TNDTLS_ERR_MPI_INVALID_CHARACTER -0x0006 // There is an invalid character in the digit string.
+#define TNDTLS_ERR_MPI_BUFFER_TOO_SMALL -0x0008 // The buffer is too small to write to.
+#define TNDTLS_ERR_MPI_NEGATIVE_VALUE -0x000A // The input arguments are negative or result in illegal output.
+#define TNDTLS_ERR_MPI_DIVISION_BY_ZERO -0x000C // The input argument for division is zero, which is not allowed.
+#define TNDTLS_ERR_MPI_NOT_ACCEPTABLE -0x000E // The input arguments are not acceptable.
+
+
+typedef struct {
+ int s;
+ int n;
+ unsigned int p[8];
+} tn_mpi;
+
+typedef struct {
+ int s;
+ int n;
+ unsigned int p[16];
+} tn_mpi16;
+
+typedef struct
+{
+ tn_mpi X;
+ tn_mpi Y;
+ tn_mpi Z;
+} tn_ecp_point;
+
+typedef struct
+{
+ tn_ecp_point X1X3; // XsXc
+ tn_ecp_point X2X4; //
+ tn_ecp_point GaGb; // Peer's G
+ tn_mpi m2m4; // private key
+ tn_mpi xcxs; // key exchange
+ tn_mpi s; // passphrase
+} tn_ecjpake_context;
+
+extern const unsigned int tn_p256_nq[9];
+
+extern const unsigned int tn_p256_n[10];
+
+extern const unsigned int tn_p256_pq[9];
+
+extern const unsigned int tn_p256_pr[8];
+
+extern const unsigned int tn_p256_p[10];
+
+extern const tn_ecp_point tn_t[16];
+
+extern const tn_ecp_point tn_p256_ecp_g;
+
+void tn_mpi_init( tn_mpi *X, int n);
+void tn_mpi_free( tn_mpi *X );
+int tn_mpi_copy( tn_mpi *X, const tn_mpi *Y );
+int tn_mpi_cmp_mpi( const tn_mpi *X, const tn_mpi *Y );
+void tn_mpi_modn_add (tn_mpi * px);
+void tn_mpi_modp_add (tn_mpi * px);
+void tn_mpi_modp_sub (tn_mpi * px);
+int tn_mpi_mul_mpi_modp( tn_mpi *X, const tn_mpi *A, const tn_mpi *B );
+int tn_mpi_mul_int_modp( tn_mpi *X, const tn_mpi *A, int n );
+int tn_mpi_add_mpi_modp( tn_mpi *X, const tn_mpi *A, const tn_mpi *B );
+int tn_mpi_sub_mpi_modp( tn_mpi *X, const tn_mpi *A, const tn_mpi *B );
+int tn_mpi_sub_mpi_modn( tn_mpi *X, const tn_mpi *A, const tn_mpi *B );
+int tn_mpi_shift_l_modp( tn_mpi *X, int count );
+int tn_mpi_add_mpi( tn_mpi *X, const tn_mpi *A, const tn_mpi *B );
+int tn_mpi_sub_mpi( tn_mpi *X, const tn_mpi *A, const tn_mpi *B );
+int tn_mpi_cmp_int( tn_mpi *X, int z );
+int tn_mpi_lset( tn_mpi *X, int z );
+int tn_mpi_bitlen( const tn_mpi *X );
+int tn_mpi_get_bit( const tn_mpi *X, int pos );
+int tn_mpi_modp( tn_mpi *R, const tn_mpi *A);
+int tn_mpi_safe_cond_assign( tn_mpi *X, const tn_mpi *Y, unsigned char assign );
+int tn_mpi_inv_mod( tn_mpi *X, const tn_mpi *A );
+int tn_mpi_mul_mpi_modn( tn_mpi *X, const tn_mpi *A, const tn_mpi *B );
+int tn_mpi_neg_modn( tn_mpi *X );
+
+//////////////////////////////////////////////////////////////////////////////////
+void swapN (unsigned char *p, int n) ;
+
+int tn_ecp_copy( tn_ecp_point *P, const tn_ecp_point *Q );
+int tn_ecp_double_jac( tn_ecp_point *R, const tn_ecp_point *P );
+int tn_ecp_add_mixed( tn_ecp_point *R, const tn_ecp_point *P, const tn_ecp_point *Q );
+int tn_ecp_normalize_jac( tn_ecp_point *pt );
+int tn_ecp_mul(tn_ecp_point *R, const tn_mpi *m, const tn_ecp_point *P);
+int tn_ecp_muladd( tn_ecp_point *R, const tn_mpi *m, const tn_ecp_point *P, const tn_mpi *n, const tn_ecp_point *Q );
+
+extern void tn_ecp_gen_keypair (tn_mpi *d, tn_ecp_point *Q);
+extern void tn_p256_keypair (unsigned char *s, unsigned char *x, unsigned char *y);
+extern void tn_p256_dhkey (unsigned char *r, unsigned char *s, unsigned char * x, unsigned char *y);
+
+extern void tn_aes_128(unsigned char *key, unsigned char *plaintext, unsigned char *result);
+extern void tn_aes_cmac ( unsigned char *key, unsigned char *input, int length,
+ unsigned char *mac );
+extern int tn_crypto_f4 (unsigned char *r, unsigned char u[32], unsigned char v[32], unsigned char x[16], unsigned char z);
+extern unsigned int tn_crypto_g2 (unsigned char u[32], unsigned char v[32], unsigned char x[16], unsigned char y[16]);
+extern int tn_crypto_f5 (unsigned char *mac, unsigned char *ltk, unsigned char w[32], unsigned char n1[16], unsigned char n2[16],
+ unsigned char a1[7], unsigned char a2[7]);
+extern int tn_crypto_f6 (unsigned char *e, unsigned char w[16], unsigned char n1[16], unsigned char n2[16],
+ unsigned char r[16], unsigned char iocap[3], unsigned char a1[7], unsigned char a2[7]);
+extern int tn_crypto_h6 (unsigned char *r, unsigned char key[16], unsigned char id[4]);
+
+extern int test_crypto_func ();
+extern int test_dhkey ();
+
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/gap.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/gap.h
new file mode 100644
index 0000000000000..4e1e257088496
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/gap.h
@@ -0,0 +1,168 @@
+/********************************************************************************************************
+ * @file gap.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include "tl_common.h"
+
+
+/** @addtogroup TELINK_BLE_STACK TELINK BLE Stack
+ * @{
+ */
+
+/** @addtogroup GAP_Constants_Module GAP Layer Constant
+ * @{
+ */
+
+/** @addtogroup GAP_Constants GAP Constants
+ * @{
+ */
+
+/** @addtogroup gap_adtype_t GAP ADTYPE
+ * https://www.bluetooth.org/en-us/specification/assigned-numbers/generic-access-profile
+ * @{
+ */
+#define GAP_ADTYPE_FLAGS 0x01 //!< Discovery Mode: @ref GAP_ADTYPE_FLAGS_MODES
+#define GAP_ADTYPE_16BIT_INCOMPLETE 0x02 //!< Incomplete List of 16-bit Service Class UUIDs
+#define GAP_ADTYPE_16BIT_COMPLETE 0x03 //!< Complete List of 16-bit Service Class UUIDs
+#define GAP_ADTYPE_32BIT_INCOMPLETE 0x04 //!< Service: More 32-bit UUIDs available
+#define GAP_ADTYPE_32BIT_COMPLETE 0x05 //!< Service: Complete list of 32-bit UUIDs
+#define GAP_ADTYPE_128BIT_INCOMPLETE 0x06 //!< Service: More 128-bit UUIDs available
+#define GAP_ADTYPE_128BIT_COMPLETE 0x07 //!< Service: Complete list of 128-bit UUIDs
+#define GAP_ADTYPE_LOCAL_NAME_SHORT 0x08 //!< Shortened local name
+#define GAP_ADTYPE_LOCAL_NAME_COMPLETE 0x09 //!< Complete local name
+#define GAP_ADTYPE_TX_POWER_LEVEL 0x0A //!< TX Power Level: 0xXX: -127 to +127 dBm
+#define GAP_ADTYPE_OOB_CLASS_OF_DEVICE 0x0D //!< Simple Pairing OOB Tag: Class of device (3 octets)
+#define GAP_ADTYPE_OOB_SIMPLE_PAIRING_HASHC 0x0E //!< Simple Pairing OOB Tag: Simple Pairing Hash C (16 octets)
+#define GAP_ADTYPE_OOB_SIMPLE_PAIRING_RANDR 0x0F //!< Simple Pairing OOB Tag: Simple Pairing Randomizer R (16 octets)
+#define GAP_ADTYPE_DEVICE_ID 0x10 //!< Device ID Profile v1.3 or later
+#define GAP_ADTYPE_SM_TK 0x10 //!< Security Manager TK Value
+#define GAP_ADTYPE_SM_OOB_FLAG 0x11 //!< Secutiry Manager OOB Flags
+#define GAP_ADTYPE_SLAVE_CONN_INTERVAL_RANGE 0x12 //!< Min and Max values of the connection interval (2 octets Min, 2 octets Max) (0xFFFF indicates no conn interval min or max)
+#define GAP_ADTYPE_SERVICES_LIST_16BIT 0x14 //!< Service Solicitation: list of 16-bit Service UUIDs
+#define GAP_ADTYPE_SERVICES_LIST_32BIT 0x1F //!< Service Solicitation: list of 32-bit Service UUIDs
+#define GAP_ADTYPE_SERVICES_LIST_128BIT 0x15 //!< Service Solicitation: list of 128-bit Service UUIDs
+#define GAP_ADTYPE_SERVICE_DATA 0x16 //!< Service Data
+#define GAP_ADTYPE_SERVICE_DATA_UUID_16BIT 0x16 //!< Service Data - 16-bit UUID
+#define GAP_ADTYPE_SERVICE_DATA_UUID_32BIT 0x20 //!< Service Data - 32-bit UUID
+#define GAP_ADTYPE_SERVICE_DATA_UUID_128BIT 0x21 //!< Service Data - 128-bit UUID
+#define GAP_ADTYPE_TARGET_ADDR_PUBLIC 0x17 //!< Public Target Address
+#define GAP_ADTYPE_TARGET_ADDR_RANDOM 0x18 //!< Random Target Address
+#define GAP_ADTYPE_APPEARANCE 0x19 //!< Appearance
+#define GAP_ADTYPE_ADVERTISING_INTERVAL 0x1A //!< Advertising Interval
+#define GAP_ADTYPE_LE_BLUETOOTH_DEVICE_ADDR 0x1B //!< LE Bluetooth Device Address
+#define GAP_ADTYPE_LE_ROLE 0x1C //!< LE Role
+#define GAP_ADTYPE_SIMPLE_PAIRING_HASHC_256 0x1D //!< Simple Pairing Hash C-256
+#define GAP_ADTYPE_SIMPLE_PAIRING_RAND_R256 0x1E //!< Simple Pairing Randomizer R-256
+#define GAP_ADTYPE_3D_INFORMATION_DATA 0x3D //!< 3D Synchronization Profile, v1.0 or later
+#define GAP_ADTYPE_MANUFACTURER_SPECIFIC 0xFF //!< Manufacturer Specific Data: first 2 octets contain the Company Identifier Code followed by the additional manufacturer specific data
+/** @} end of group gap_adtype_t */
+
+
+/** @addtogroup gap_adtype_bitmask Bitmask of ADTYPE
+ * @{
+ */
+#define GAP_ADTYPE_LE_LIMITED_DISCOVERABLE_MODE_BIT 0x01
+#define GAP_ADTYPE_LE_GENERAL_DISCOVERABLE_MODE_BIT 0x02
+#define GAP_ADTYPE_LMP_BIT37_BIT 0x04
+/** @} end of group gap_adtype_bitmask */
+
+
+/**
+ * @brief Definition for default timer values
+ */
+#define T_GAP_GEN_DISC_ADV_MIN_DEFAULT 0 // mSec (0 = no timeout)
+#define T_GAP_LIM_ADV_TIMEOUT_DEFAULT 180 // 180 seconds
+#define T_GAP_GEN_DISC_SCAN_DEFAULT 10240 // mSec
+#define T_GAP_LIM_DISC_SCAN_DEFAULT 10240 // mSec
+#define T_GAP_CONN_EST_ADV_TIMEOUT_DEFAULT 10240 // mSec
+#define T_GAP_CONN_PARAM_TIMEOUT_DEFAULT 30000 // mSec
+
+// GAP Constants defaults
+#if defined ( GAP_STANDARDS )
+ // Defined as defaults in spec
+ #define T_GAP_LIM_DISC_ADV_INT_MIN_DEFAULT 2048 // 1280 mSec (n * 0.625 mSec)
+ #define T_GAP_LIM_DISC_ADV_INT_MAX_DEFAULT 2048 // 1280 mSec (n * 0.625 mSec)
+ #define T_GAP_GEN_DISC_ADV_INT_MIN_DEFAULT 2048 // 1280 mSec (n * 0.625 mSec)
+ #define T_GAP_GEN_DISC_ADV_INT_MAX_DEFAULT 2048 // 1280 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_ADV_INT_MIN_DEFAULT 2048 // 1280 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_ADV_INT_MAX_DEFAULT 2048 // 1280 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_SCAN_INT_DEFAULT 2048 // 1280 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_SCAN_WIND_DEFAULT 18 // 11.25 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_HIGH_SCAN_INT_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_HIGH_SCAN_WIND_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_GEN_DISC_SCAN_INT_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_GEN_DISC_SCAN_WIND_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_LIM_DISC_SCAN_INT_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_LIM_DISC_SCAN_WIND_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_EST_ADV_DEFAULT 80 // 50 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_EST_INT_MIN_DEFAULT 400 // 500 mSec (n * 1.25 mSec)
+ #define T_GAP_CONN_EST_INT_MAX_DEFAULT 400 // 500 mSec (n * 1.25 mSec)
+ #define T_GAP_CONN_EST_SCAN_INT_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_EST_SCAN_WIND_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_EST_SUPERV_TIMEOUT_DEFAULT 2000 // 20 sec (n * 10 mSec)
+ #define T_GAP_CONN_EST_LATENCY_DEFAULT 0 // (in number of connection events)
+ #define T_GAP_CONN_EST_MIN_CE_LEN_DEFAULT 0 // (n * 0.625 mSec)
+ #define T_GAP_CONN_EST_MAX_CE_LEN_DEFAULT 0 // (n * 0.625 mSec)
+ #define T_GAP_PRIVATE_ADDR_INT_DEFAULT 15 // 15 minutes
+#else
+ // Actually works
+ #define T_GAP_LIM_DISC_ADV_INT_MIN_DEFAULT 160 // 100 mSec (n * 0.625 mSec)
+ #define T_GAP_LIM_DISC_ADV_INT_MAX_DEFAULT 160 // 100 mSec (n * 0.625 mSec)
+ #define T_GAP_GEN_DISC_ADV_INT_MIN_DEFAULT 160 // 100 mSec (n * 0.625 mSec)
+ #define T_GAP_GEN_DISC_ADV_INT_MAX_DEFAULT 160 // 100 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_ADV_INT_MIN_DEFAULT 2048 // 1280 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_ADV_INT_MAX_DEFAULT 2048 // 1280 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_SCAN_INT_DEFAULT 480 // 300 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_SCAN_WIND_DEFAULT 240 // 150 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_HIGH_SCAN_INT_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_HIGH_SCAN_WIND_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_GEN_DISC_SCAN_INT_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_GEN_DISC_SCAN_WIND_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_LIM_DISC_SCAN_INT_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_LIM_DISC_SCAN_WIND_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_EST_ADV_DEFAULT 80 // 50 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_EST_INT_MIN_DEFAULT 80 // 100 mSec (n * 1.25 mSec)
+ #define T_GAP_CONN_EST_INT_MAX_DEFAULT 80 // 100 mSec (n * 1.25 mSec)
+ #define T_GAP_CONN_EST_SCAN_INT_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_EST_SCAN_WIND_DEFAULT 16 // 10 mSec (n * 0.625 mSec)
+ #define T_GAP_CONN_EST_SUPERV_TIMEOUT_DEFAULT 2000 // 20 sec (n * 10 mSec)
+ #define T_GAP_CONN_EST_LATENCY_DEFAULT 0 // (in number of connection events)
+ #define T_GAP_CONN_EST_MIN_CE_LEN_DEFAULT 0 // (n * 0.625 mSec)
+ #define T_GAP_CONN_EST_MAX_CE_LEN_DEFAULT 0 // (n * 0.625 mSec)
+ #define T_GAP_PRIVATE_ADDR_INT_DEFAULT 15 // 15 minutes
+#endif
+
+
+/**
+ * @brief Definition for default maximum advertising data length
+ */
+#define MAX_GAP_ADVERTISING_DATA_LEN 30
+
+
+#define GAP_APPEARE_UNKNOWN 0x0000 //!< Unknown
+
+
+/** @} end of group GAP_Constants */
+
+/** @} end of group GAP_Constants_Module */
+
+/** @} end of group TELINK_BLE_STACK */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/hci/hci.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/hci/hci.h
new file mode 100644
index 0000000000000..a1139c1c9bd4c
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/hci/hci.h
@@ -0,0 +1,98 @@
+/********************************************************************************************************
+ * @file hci.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include
+
+typedef int (*blc_hci_rx_handler_t)(void);
+typedef int (*blc_hci_tx_handler_t)(void);
+typedef int (*blc_hci_handler_t)(unsigned char *p, int n);
+typedef int (*blc_hci_app_handler_t)(unsigned char *p);
+
+extern blc_hci_handler_t blc_master_handler;
+
+#define HCI_FLAG_EVENT_PHYTEST_2_WIRE_UART (1 << 23)
+#define HCI_FLAG_EVENT_TLK_MODULE (1 << 24)
+#define HCI_FLAG_EVENT_BT_STD (1 << 25)
+#define HCI_FLAG_EVENT_STACK (1 << 26)
+#define HCI_FLAG_ACL_BT_STD (1 << 27)
+
+#define TLK_MODULE_EVENT_STATE_CHANGE 0x0730
+#define TLK_MODULE_EVENT_DATA_RECEIVED 0x0731
+#define TLK_MODULE_EVENT_DATA_SEND 0x0732
+#define TLK_MODULE_EVENT_BUFF_AVAILABLE 0x0733
+
+#define HCI_MAX_ACL_DATA_LEN 27
+
+#define HCI_MAX_DATA_BUFFERS_SALVE 8
+#define HCI_MAX_DATA_BUFFERS_MASTER 8
+
+#define HCI_FIRST_NAF_PACKET 0x00
+#define HCI_CONTINUING_PACKET 0x01
+#define HCI_FIRST_AF_PACKET 0x02
+
+/*********************************************************************
+ * ENUMS
+ */
+
+/**
+ * @brief Definition for HCI request type
+ */
+typedef enum hci_type_e{
+ HCI_TYPE_CMD = 0x01,
+ HCI_TYPE_ACL_DATA = 0x02,
+ HCI_TYPE_SCO_DATA = 0x03,
+ HCI_TYPE_EVENT = 0x04,
+} hci_type_t;
+
+// hci event
+extern u32 hci_eventMask;
+extern u32 hci_le_eventMask;
+extern u32 hci_tlk_module_eventMask;
+
+ble_sts_t blc_hci_setEventMask_cmd(u32 evtMask); //eventMask: BT/EDR
+ble_sts_t blc_hci_le_setEventMask_cmd(u32 evtMask); //eventMask: LE
+ble_sts_t bls_hci_mod_setEventMask_cmd(u32 evtMask); //eventMask: module special
+
+// Controller event handler
+typedef int (*hci_event_handler_t)(u32 h, u8 *para, int n);
+extern hci_event_handler_t blc_hci_event_handler;
+
+void blc_hci_registerControllerEventHandler(hci_event_handler_t handler);
+
+int blc_hci_sendACLData2Host(u16 handle, u8 *p);
+
+int blc_hci_send_data(u32 h, u8 *para, int n);
+void blc_enable_hci_master_handler();
+
+int blc_acl_from_btusb();
+
+void blc_register_hci_handler(void *prx, void *ptx);
+int blc_hci_rx_from_usb(void);
+int blc_hci_tx_to_usb(void);
+int blc_hci_tx_to_btusb(void);
+
+int blc_hci_handler(u8 *p, int n);//handle HCI command
+int blm_hci_handler(u8 *p, int n);
+int blc_hci_send_event(u32 h, u8 *para, int n);
+
+int blc_hci_proc(void);
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/hci/hci_cmd.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/hci/hci_cmd.h
new file mode 100644
index 0000000000000..5a25053da5369
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/hci/hci_cmd.h
@@ -0,0 +1,36 @@
+
+#ifndef HCI_CMD_H_
+#define HCI_CMD_H_
+
+#include "tl_common.h"
+#include "stack/ble/ble.h"
+
+/* Type Define */
+/**
+ * @brief Return Parameters for "HCI LE Read PHY Command"
+ */
+typedef struct {
+ u8 status;
+ u8 handle[2];
+ u8 tx_phy;
+ u8 rx_phy;
+} hci_le_readPhyCmd_retParam_t;
+
+
+/**
+ * @brief Command Parameters for "HCI LE Set PHY Command"
+ */
+typedef struct {
+ u16 connHandle;
+ u8 all_phys;
+ u8 tx_phys;
+ u8 rx_phys;
+ u16 phy_options;
+} hci_le_setPhyCmd_param_t;
+
+
+/* Function declaration */
+ble_sts_t blc_hci_le_setPhy(hci_le_setPhyCmd_param_t* para);
+ble_sts_t blc_hci_le_readPhy(u16 connHandle, hci_le_readPhyCmd_retParam_t *para);
+
+#endif /* HCI_CMD_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/hci/hci_const.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/hci/hci_const.h
new file mode 100644
index 0000000000000..cbce0dc69fd1c
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/hci/hci_const.h
@@ -0,0 +1,257 @@
+/********************************************************************************************************
+ * @file hci_const.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef HCI_CONST_H_
+#define HCI_CONST_H_
+
+/****HCI INFO****/
+#define HCI_VERSION 0x06 //Bluetooth Core Specification 4.0
+#define HCI_REVISION 0x0002 //Revision of the Current HCI in the BR/EDR Controller
+#define HCI_LMP_VERSION 0x06 //Version of the Current LMP or PAL in the Controller, Bluetooth Core Specification 4.0
+#define HCI_MANUFACTURER_NAME VENDOR_ID //Manufacturer Name of the BR/EDR Controller
+#define HCI_LMP_SUBVERSION 0x0001 //Subversion of the Current LMP or PAL in the Controller
+
+#define LMP_FEATURES 0x0000000000000000
+
+
+
+
+/****Events****/
+#define HCI_EVT_DISCONNECTION_COMPLETE 0x05
+
+#define HCI_EVT_REMOTE_NAME_REQ_COMPLETE 0x07
+#define HCI_EVT_ENCRYPTION_CHANGE 0x08
+#define HCI_EVT_CHANGE_LINK_KEY_COMPLETE 0x09
+#define HCI_EVT_READ_REMOTE_VER_INFO_COMPLETE 0x0C
+#define HCI_EVT_CMD_COMPLETE 0x0E
+#define HCI_EVT_CMD_STATUS 0x0F
+#define HCI_EVT_HW_ERROR 0x10
+#define HCI_EVT_NUM_OF_COMPLETE_PACKETS 0x13
+#define HCI_EVT_DATA_BUF_OVERFLOW 0x1A
+#define HCI_EVT_ENCRYPTION_KEY_REFRESH 0x30
+#define HCI_EVT_LE_META 0x3E
+#define HCI_EVT_CERT_VS 0xF0
+
+// LE Meta Event Codes
+#define HCI_SUB_EVT_LE_CONNECTION_COMPLETE 0x01
+#define HCI_SUB_EVT_LE_ADVERTISING_REPORT 0x02
+#define HCI_SUB_EVT_LE_CONNECTION_UPDATE_COMPLETE 0x03
+#define HCI_SUB_EVT_LE_READ_REMOTE_USED_FEATURES_COMPLETE 0x04
+#define HCI_SUB_EVT_LE_LONG_TERM_KEY_REQUESTED 0x05 //core_4.0
+#define HCI_SUB_EVT_LE_REMOTE_CONNECTION_PARAM_REQUEST 0x06 //core_4.1
+#define HCI_SUB_EVT_LE_DATA_LENGTH_CHANGE 0x07
+#define HCI_SUB_EVT_LE_READ_LOCAL_P256_KEY_COMPLETE 0x08
+#define HCI_SUB_EVT_LE_GENERATE_DHKEY_COMPLETE 0x09
+#define HCI_SUB_EVT_LE_ENHANCED_CONNECTION_COMPLETE 0x0A
+#define HCI_SUB_EVT_LE_DIRECT_ADVERTISE_REPORT 0x0B //core_4.2
+#define HCI_SUB_EVT_LE_PHY_UPDATE_COMPLETE 0x0C //core_5.0
+
+#define HCI_SUB_EVT_LE_CONNECTION_ESTABLISH 0x20 //telink private
+
+
+
+
+//Event mask - last octet
+#define HCI_EVT_MASK_NONE 0x0000000000
+#define HCI_EVT_MASK_INQUIRY_COMPLETE 0x0000000001
+#define HCI_EVT_MASK_INQUIRY_RESULT 0x0000000002
+#define HCI_EVT_MASK_CONNECTION_COMPELETE 0x0000000004
+#define HCI_EVT_MASK_CONNECTION_REQUEST 0x0000000008
+#define HCI_EVT_MASK_DISCONNECTION_COMPLETE 0x0000000010 //
+#define HCI_EVT_MASK_AUTHENTICATION_COMPLETE 0x0000000020
+#define HCI_EVT_MASK_REMOTE_NAME_REQUEST_COMPLETE 0x0000000040
+#define HCI_EVT_MASK_ENCRYPTION_CHANGE 0x0000000080
+#define HCI_EVT_MASK_CHANGE_CONECTION_LINK_KEY_COMPLETE 0x0000000100
+#define HCI_EVT_MASK_MASTER_LINK_KEY_COMPLETE 0x0000000200
+#define HCI_EVT_MASK_READ_REMOTE_SUPPORTED_FEATURES_COMPLETE 0x0000000400
+#define HCI_EVT_MASK_READ_REMOTE_VERSION_INFORMATION_COMPLETE 0x0000000800 //
+
+#define HCI_EVT_MASK_DEFAULT HCI_EVT_MASK_DISCONNECTION_COMPLETE
+
+
+// LE Event mask - last octet
+#define HCI_LE_EVT_MASK_NONE 0x00000000
+#define HCI_LE_EVT_MASK_CONNECTION_COMPLETE 0x00000001
+#define HCI_LE_EVT_MASK_ADVERTISING_REPORT 0x00000002
+#define HCI_LE_EVT_MASK_CONNECTION_UPDATE_COMPLETE 0x00000004
+#define HCI_LE_EVT_MASK_READ_REMOTE_FEATURES_COMPLETE 0x00000008
+#define HCI_LE_EVT_MASK_LONG_TERM_KEY_REQUEST 0x00000010
+#define HCI_LE_EVT_MASK_REMOTE_CONNECTION_PARAM_REQUEST 0x00000020
+#define HCI_LE_EVT_MASK_DATA_LENGTH_CHANGE 0x00000040
+#define HCI_LE_EVT_MASK_READ_LOCAL_P256_PUBLIC_KEY_COMPLETE 0x00000080
+#define HCI_LE_EVT_MASK_GENERATE_DHKEY_COMPLETE 0x00000100
+#define HCI_LE_EVT_MASK_ENHANCED_CONNECTION_COMPLETE 0x00000200
+#define HCI_LE_EVT_MASK_DIRECT_ADVERTISING_REPORT 0x00000400
+#define HCI_LE_EVT_MASK_DIRECT_ADVERTISING_REPORT 0x00000400
+#define HCI_LE_EVT_MASK_PHY_UPDATE_COMPLETE 0x00000800 // core5.0
+
+#define HCI_LE_EVT_MASK_CONNECTION_ESTABLISH 0x80000000 //telink private
+
+
+#define HCI_LE_EVT_MASK_DEFAULT HCI_LE_EVT_MASK_NONE
+
+
+
+
+
+//Link Control Command
+//-- OGF --
+#define HCI_CMD_LINK_CTRL_OPCODE_OGF 0x04 //0x01 <<2 = 0x04
+//-- OCF --
+#define HCI_CMD_INQUIRY 0x01
+#define HCI_CMD_DISCONNECT 0x06
+#define HCI_CMD_READ_REMOTE_NAME_REQ 0x19
+#define HCI_CMD_READ_REMOTE_VER_INFO 0x1D
+
+
+
+//Controller & Baseband Commands
+//-- OGF --
+#define HCI_CMD_CBC_OPCODE_OGF 0x0C //0x03 <<2, controller & baseband control
+//-- OCF --
+#define HCI_CMD_SET_EVENT_MASK 0x01
+#define HCI_CMD_RESET 0x03
+#define HCI_CMD_SET_EVENT_FILTER 0x05
+#define HCI_CMD_WRITE_PIN_TYPE 0x0A
+#define HCI_CMD_CREATE_NEW_UINT_KEY 0x0B
+#define HCI_CMD_DELETE_STORED_LINK_KEY 0x12
+#define HCI_CMD_WRITE_LOCAL_NAME 0x13
+#define HCI_CMD_READ_LOCAL_NAME 0x14
+#define HCI_CMD_WRITE_CONNECTION_ACCEPT_TIMEOUT 0x16
+#define HCI_CMD_WRITE_PAGE_TIMEOUT 0x18
+#define HCI_CMD_WRITE_SCAN_ENABLE 0x1A
+#define HCI_CMD_WRITE_PAGE_SCAN_ACTIVITY 0x1C
+#define HCI_CMD_WRITE_INQUIRY_SCAN_ACTIVITY 0x1E
+#define HCI_CMD_WRITE_AUTHENTICATION_ENABLE 0x20
+#define HCI_CMD_WRITE_CLASS_OF_DEVICE 0x24
+#define HCI_CMD_WRITE_VOICE_SETTING 0x26
+#define HCI_CMD_WRITE_NUM_BROADCAST_RETRANSMISSIONS 0x2A
+#define HCI_CMD_WRITE_HOLD_MODE_ACTIVITY 0x2C
+#define HCI_CMD_READ_TX_POWER_LEVEL 0x2D
+#define HCI_CMD_SYNCHRONOUS_FLOW_CONTROL_ENABLE 0x2F
+#define HCI_CMD_SET_CONTROLLER_TO_HOST_FLOW_CTRL 0x31
+#define HCI_CMD_HOST_BUF_SIZE 0x33
+#define HCI_CMD_HOST_NUM_OF_COMPLETE_PACKETS 0x35
+#define HCI_CMD_WRITE_CURRENT_IAC_LAP 0x3A
+#define HCI_CMD_SET_AFH_HOST_CHN_CLASSIFICATION 0x3F
+#define HCI_CMD_WRITE_INQUIRY_SCAN_TYPE 0x43
+#define HCI_CMD_WRITE_INQUIRY_MODE 0x45
+#define HCI_CMD_WRITE_PAGE_SCAN_TYPE 0x47
+
+
+//Informational Parameters
+//-- OGF --
+#define HCI_CMD_IP_OPCODE_OGF 0x10 //0x04 <<2, information parameter
+//-- OCF --
+#define HCI_CMD_READ_LOCAL_VER_INFO 0x01
+#define HCI_CMD_READ_LOCAL_SUPPORTED_CMDS 0x02
+#define HCI_CMD_READ_LOCAL_SUPPORTED_FEATURES 0x03
+#define HCI_CMD_READ_EXTENDED_LOCAL_SUPPORTED_FEATURES 0x04
+#define HCI_CMD_READ_BUFFER_SIZE_COMMAND 0x05
+#define HCI_CMD_READ_BD_ADDR 0x09
+
+
+
+// Status Parameters
+//-- OGF --
+#define HCI_CMD_STATUS_PARAM_OPCODE_OGF 0x14 //0x05 <<2
+//-- OCF --
+#define HCI_CMD_READ_RSSI 0x05
+
+
+
+#define HCI_EVT_CMDSTATUS(n,c,g,s) ((s) | (n<<8) | (c<<16) | (g<<24))
+#define HCI_EVT_CMD_COMPLETE_STATUS(n,c,g,s) ((n<<0) | (c<<8) | (g<<16) | (s<<24))
+
+
+
+
+// LE Controller Commands
+//-- OGF --
+#define HCI_CMD_LE_OPCODE_OGF 0x20 //0x08 <<2 = 0x20
+//-- OCF --
+#define HCI_CMD_LE_SET_EVENT_MASK 0x01
+#define HCI_CMD_LE_READ_BUF_SIZE 0x02
+#define HCI_CMD_LE_READ_LOCAL_SUPPORTED_FEATURES 0x03
+#define HCI_CMD_LE_SET_RANDOM_ADDR 0x05
+#define HCI_CMD_LE_SET_ADVERTISE_PARAMETERS 0x06
+#define HCI_CMD_LE_READ_ADVERTISING_CHANNEL_TX_POWER 0x07
+#define HCI_CMD_LE_SET_ADVERTISE_DATA 0x08
+#define HCI_CMD_LE_SET_SCAN_RSP_DATA 0x09
+#define HCI_CMD_LE_SET_ADVERTISE_ENABLE 0x0A
+#define HCI_CMD_LE_SET_SCAN_PARAMETERS 0x0B
+#define HCI_CMD_LE_SET_SCAN_ENABLE 0x0C
+#define HCI_CMD_LE_CREATE_CONNECTION 0x0D
+#define HCI_CMD_LE_CREATE_CONNECTION_CANCEL 0x0E
+#define HCI_CMD_LE_READ_WHITE_LIST_SIZE 0x0F
+#define HCI_CMD_LE_CLEAR_WHITE_LIST 0x10
+#define HCI_CMD_LE_ADD_DEVICE_TO_WHITE_LIST 0x11
+#define HCI_CMD_LE_REMOVE_DEVICE_FROM_WL 0x12
+#define HCI_CMD_LE_CONNECTION_UPDATE 0x13
+#define HCI_CMD_LE_SET_HOST_CHANNEL_CLASSIFICATION 0x14
+#define HCI_CMD_LE_READ_CHANNEL_MAP 0x15
+#define HCI_CMD_LE_READ_REMOTE_USED_FEATURES 0x16
+#define HCI_CMD_LE_ENCRYPT 0x17
+#define HCI_CMD_LE_RANDOM 0x18
+#define HCI_CMD_LE_START_ENCRYPTION 0x19
+#define HCI_CMD_LE_LONG_TERM_KEY_REQUESTED_REPLY 0x1A
+#define HCI_CMD_LE_LONG_TERM_KEY_REQUESTED_NEGATIVE_REPLY 0x1B
+#define HCI_CMD_LE_READ_SUPPORTED_STATES 0x1C
+#define HCI_CMD_LE_RECEIVER_TEST 0x1D
+#define HCI_CMD_LE_TRANSMITTER_TEST 0x1E
+#define HCI_CMD_LE_TEST_END 0x1F
+//core_4.0 above
+#define HCI_CMD_LE_REMOTE_CONNECTION_PARAM_REQ_REPLY 0x20
+#define HCI_CMD_LE_REMOTE_CONNECTION_PARAM_REQ_NEGATIVE_REPLY 0x21
+//core_4.1 above
+#define HCI_CMD_LE_SET_DATA_LENGTH 0x22
+#define HCI_CMD_LE_READ_SUGGESTED_DEFAULT_DATA_LENGTH 0x23
+#define HCI_CMD_LE_WRITE_SUGGESTED_DEFAULT_DATA_LENGTH 0x24
+#define HCI_CMD_LE_READ_LOCAL_P256_PUBLIC_KEY 0x25
+#define HCI_CMD_LE_GENERATE_DHKEY 0x26
+#define HCI_CMD_LE_ADD_DEVICE_TO_RESOLVING_LIST 0x27
+#define HCI_CMD_LE_REMOVE_DEVICE_FROM_RESOLVING_LIST 0x28
+#define HCI_CMD_LE_CLEAR_RESOLVING_LIST 0x29
+#define HCI_CMD_LE_READ_RESOLVING_LIST_SIZE 0x2A
+#define HCI_CMD_LE_READ_PEER_RESOLVABLE_ADDRESS 0x2B
+#define HCI_CMD_LE_READ_LOCAL_RESOLVABLE_ADDRESS 0x2C
+#define HCI_CMD_LE_SET_ADDRESS_RESOLUTION_ENABLE 0x2D
+#define HCI_CMD_LE_SET_RESOLVABLE_PRIVATE_ADDRESS_TIMEOUT 0x2E
+#define HCI_CMD_LE_READ_MAX_DATA_LENGTH 0x2F
+//core_4.2 above
+#define HCI_CMD_LINK_POLICY_OPCODE_OGF 0x08 //0x02<<2 = 0x08
+#define HCI_CMD_TEST_OPCODE_OGF 0x18 //0x06<<2 = 0x18
+
+//core 5.0
+#define HCI_CMD_LE_READ_PHY 0x30
+#define HCI_CMD_LE_SET_DEFAULT_PHY 0x31
+#define HCI_CMD_LE_SET_PHY 0x32
+
+// Vendor specific Commands
+//-- OGF --
+#define HCI_CMD_VENDOR_OPCODE_OGF 0xFC //0x3f <<2 = 0xFC
+//-- OCF --
+#define HCI_TELINK_READ_REG 0x01
+#define HCI_TELINK_WRTIE_REG 0x02
+#define HCI_TELINK_SET_TX_PWR 0x03
+
+#define HCI_TELINK_SET_RXTX_DATA_LEN 0x40
+#endif /* HCI_CONST_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/hci/hci_event.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/hci/hci_event.h
new file mode 100644
index 0000000000000..f1a76297a1c12
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/hci/hci_event.h
@@ -0,0 +1,236 @@
+/********************************************************************************************************
+ * @file hci_event.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#ifndef HCI_EVENT_H_
+#define HCI_EVENT_H_
+
+#include
+#include
+
+/**
+ * @brief Definition for general HCI event packet
+ */
+typedef struct{
+ hci_type_t type;
+ u8 eventCode;
+ u8 paraLen;
+ u8 parameters[1];
+} hci_event_t;
+
+typedef struct{
+ u8 status;
+ u16 connHandle;
+ u8 reason;
+} hci_disconnectionCompleteEvt_t;
+
+typedef struct{
+ u8 numHciCmds;
+ u8 opCode_OCF;
+ u8 opCode_OGF;
+ u8 returnParas[1];
+} hci_cmdCompleteEvt_t;
+
+typedef struct{
+ u8 status;
+ u8 numHciCmds;
+ u8 opCode_OCF;
+ u8 opCode_OGF;
+} hci_cmdStatusEvt_t;
+
+typedef struct{
+ hci_type_t type;
+ u8 eventCode;
+ u8 paraLen;
+ u8 subEventCode;
+ u8 parameters[1];
+} hci_le_metaEvt_t;
+
+typedef struct{
+ u8 subEventCode;
+ u8 status;
+ u16 connHandle;
+ u8 role;
+ u8 peerAddrType;
+ u8 peerAddr[BLE_ADDR_LEN];
+ u16 connInterval;
+ u16 slaveLatency;
+ u16 supervisionTimeout;
+ u8 masterClkAccuracy;
+} hci_le_connectionCompleteEvt_t;
+
+typedef struct{
+ u8 subEventCode;
+ u8 status;
+ u16 connHandle;
+ u16 connInterval;
+ u16 connLatency;
+ u16 supervisionTimeout;
+} hci_le_connectionUpdateCompleteEvt_t;
+
+typedef struct{
+ u8 subEventCode;
+ u8 status;
+ u16 connHandle;
+ u8 feature[LL_FEATURE_SIZE];
+} hci_le_readRemoteFeaturesCompleteEvt_t;
+
+typedef struct{
+ u8 subEventCode;
+ u16 connHandle; //δ���� ֻҪ����ָ���û����
+ u16 maxTxOct;
+ u16 maxTxtime;
+ u16 maxRxOct;
+ u16 maxRxtime;
+} hci_le_dataLengthChangeEvt_t;
+
+/**
+ * @brief Definition for HCI LE Read Local P-256 Public Key Complete event
+ */
+typedef struct{
+ u8 subEventCode;
+ u8 status;
+ u8 localP256Key[64];
+} hci_le_readLocalP256KeyCompleteEvt_t;
+
+/**
+ * @brief Definition for HCI LE generate DHKey Complete event
+ */
+typedef struct{
+ u8 subEventCode;
+ u8 status;
+ u8 DHKey[32];
+} hci_le_generateDHKeyCompleteEvt_t;
+
+/**
+ * @brief Definition for HCI long term key request event
+ */
+typedef struct{
+ u8 subEventCode;
+ u16 connHandle;
+ u8 random[8];
+ u16 ediv;
+} hci_le_longTermKeyRequestEvt_t;
+
+/**
+ * @brief Definition for HCI Encryption Change event
+ */
+typedef struct{
+ u8 status;
+ u16 connHandle;
+ u8 encryption_enable;
+} hci_le_encryptEnableEvt_t;
+
+/**
+ * @brief Definition for HCI Encryption Key Refresh Complete event
+ */
+typedef struct{
+ u8 status;
+ u16 connHandle;
+} hci_le_encryptKeyRefreshEvt_t;
+
+/**
+ * @brief Definition for HCI LE PHY Update Complete event
+ */
+typedef struct{
+ u8 subEventCode;
+ u8 status;
+ u16 connHandle;
+ u8 txPhy;
+ u8 rxPhy;
+}hci_le_phyUpdateCompleteEvt_t;
+
+void hci_disconnectionComplete_evt(u8 status, u16 connHandle, u8 reason);
+int hci_cmdComplete_evt(u8 numHciCmds, u8 opCode_ocf, u8 opCode_ogf, u8 paraLen, u8 *para, u8 *result);
+void hci_cmdStatus_evt(u8 numHciCmds, u8 opCode_ocf, u8 opCode_ogf, u8 status, u8 *result);
+
+void hci_le_connectionComplete_evt(u8 status, u16 connHandle, u8 role, u8 peerAddrType, u8 *peerAddr,
+ u16 connInterval, u16 slaveLatency, u16 supervisionTimeout, u8 masterClkAccuracy);
+void hci_le_connectionUpdateComplete_evt(u8 status, u16 connHandle, u16 connInterval,
+ u16 connLatency, u16 supervisionTimeout);
+void hci_le_readRemoteFeaturesComplete_evt(u8 status, u16 connHandle, u8 *feature);
+void hci_le_phyUpdateComplete_evt(u16 connhandle,u8 status, u8 new_phy);
+
+int hci_le_longTermKeyRequest_evt(u16 connHandle, u8 *random, u16 ediv, u8 *result);
+int hci_le_readLocalP256KeyComplete_evt(u8 *localP256Key, u8 *result);
+int hci_le_generateDHKeyComplete_evt(u8 *DHkey, u8 *result);
+int hci_le_encryptChange_evt(u16 connhandle, u8 encrypt_en);
+int hci_le_encryptKeyRefresh_evt(u16 connhandle);
+
+int hci_remoteNateReqComplete_evt(u8 *bd_addr);
+#endif /* HCI_EVENT_H_ */
+
+#if 0
+typedef struct{
+ hci_type_t type;
+ u8 eventCode;
+ u8 paraLen;
+ u8 numHciCmds;
+ u16 opCode;
+ u8 returnParas[1];
+} hci_cmdCompleteEvt_t;
+
+typedef struct{
+ hci_type_t type;
+ u8 eventCode;
+ u8 paraLen;
+ u8 status;
+ u8 numHciCmds;
+ u16 opCode;
+} hci_cmdStatusEvt_t;
+
+/**
+ * @brief Definition for HCI LE Read Local P-256 Public Key Complete event
+ */
+typedef struct{
+ hci_type_t type;
+ u8 eventCode;
+ u8 paraLen;
+ u8 subEventCode;
+ u8 status;
+ u8 localP256Key[32];
+} hci_le_readLocalP256KeyCompleteEvt_t;
+
+/**
+ * @brief Definition for HCI LE generate DHKey Complete event
+ */
+typedef struct{
+ hci_type_t type;
+ u8 eventCode;
+ u8 paraLen;
+ u8 subEventCode;
+ u8 status;
+ u8 DHKey[32];
+} hci_le_generateDHKeyCompleteEvt_t;
+
+/**
+ * @brief Definition for HCI long term key request event
+ */
+typedef struct{
+ hci_type_t type;
+ u8 eventCode;
+ u8 paraLen;
+ u8 subEventCode;
+ u16 connHandle;
+ u8 random[8];
+ u16 ediv;
+} hci_le_longTermKeyRequestEvt_t;
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/l2cap.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/l2cap.h
new file mode 100644
index 0000000000000..70e950af40d9c
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/l2cap.h
@@ -0,0 +1,162 @@
+/********************************************************************************************************
+ * @file l2cap.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+#ifndef _L2CAP_H
+#define _L2CAP_H
+//#include "../hci/hci_include.h"
+#include "blt_config.h"
+
+
+
+// define the l2cap CID for BLE
+#define L2CAP_CID_NULL 0x0000
+#define L2CAP_CID_ATTR_PROTOCOL 0x0004
+#define L2CAP_CID_SIG_CHANNEL 0x0005
+#define L2CAP_CID_SMP 0x0006
+#define L2CAP_CID_GENERIC 0x0007
+#define L2CAP_CID_DYNAMIC 0x0040
+
+#define L2CAP_CID_DYNAMIC 0x0040
+
+#define L2CAP_HEADER_LENGTH 0x0004
+
+#define L2CAP_CMD_REJECT 0x01
+#define L2CAP_CMD_DISC_CONN_REQ 0x06
+#define L2CAP_CMD_DISC_CONN_RESP 0x07
+#define L2CAP_CMD_CONN_UPD_PARA_REQ 0x12
+#define L2CAP_CMD_CONN_UPD_PARA_RESP 0x13
+#define L2CAP_CMD_CONN_REQ 0x14
+#define L2CAP_CMD_CONN_RESP 0x15
+#define L2CAP_CMD_FLOW_CTRL_CRED 0x16
+
+
+#define L2CAP_SIGNAL_MSG_TYPE 0x01
+#define L2CAP_DATA_MSG_TYPE 0x02
+
+/**
+ * Command Reject: Reason Codes
+ */
+ // Command not understood
+#define L2CAP_REJECT_CMD_NOT_UNDERSTOOD 0x0000
+
+ // Signaling MTU exceeded
+#define L2CAP_REJECT_SIGNAL_MTU_EXCEED 0x0001
+
+ // Invalid CID in request
+#define L2CAP_REJECT_INVALID_CID 0x0002
+
+// Response Timeout expired
+#define L2CAP_RTX_TIMEOUT_MS 2000
+
+#define NEXT_SIG_ID() ( ++l2capId == 0 ? l2capId = 1 : l2capId )
+
+
+#define L2CAP_PKT_HANDLER_SIZE 6
+
+
+// l2cap handler type
+#define L2CAP_CMD_PKT_HANDLER 0
+#define L2CAP_USER_CB_HANDLER 1
+
+// l2cap pb flag type
+#define L2CAP_FRIST_PKT_H2C 0x00
+#define L2CAP_CONTINUING_PKT 0x01
+#define L2CAP_FIRST_PKT_C2H 0x02
+
+
+
+#define L2CAP_CONNECTION_PARAMETER_ACCEPTED 0x0000
+#define L2CAP_CONNECTION_PARAMETER_REJECTED 0x0001
+
+
+
+#if (ATT_RSP_BIG_MTU_PROCESS_EN) //|----------- 251 -------------|
+ #define L2CAP_RX_BUFF_LEN_MAX 268//12(rf pakect header) + 2(link layer header) + 4(l2cap header) + 247(payload) = 265; align->268
+#else
+ #define L2CAP_RX_BUFF_LEN_MAX 88 //redhawk SDK and old version of hawk SDK(v1.2.0 or earlier) use this value
+#endif
+
+
+#define ATT_RX_MTU_SIZE_MAX (L2CAP_RX_BUFF_LEN_MAX - 18)
+
+#define L2CAP_RX_PDU_OFFSET 12
+
+
+
+typedef struct{
+ u16 connParaUpReq_minInterval;
+ u16 connParaUpReq_maxInterval;
+ u16 connParaUpReq_latency;
+ u16 connParaUpReq_timeout;
+
+ u8 connParaUpReq_pending;
+}para_up_req_t;
+
+para_up_req_t para_upReq;
+
+
+
+
+typedef int (*l2cap_handler_t) (u16 conn, u8 * p);
+
+extern l2cap_handler_t blc_l2cap_handler;
+extern l2cap_handler_t customize_l2cap_handler;
+
+typedef enum{
+ CONN_PARAM_UPDATE_ACCEPT = 0x0000,
+ CONN_PARAM_UPDATE_REJECT = 0x0001,
+}conn_para_up_rsp;
+
+
+
+
+/******************************* User Interface ************************************/
+void bls_l2cap_requestConnParamUpdate (u16 min_interval, u16 max_interval, u16 latency, u16 timeout); //Slave
+
+void bls_l2cap_setMinimalUpdateReqSendingTime_after_connCreate(int time_ms);
+
+//GaoQiu add. use for register the function of user customize l2cap data packet process(CID == 0x0004).
+/**
+ * @Brief : use for register user customize function of l2cap data handle
+ * @Param : p->
+ * @Return : 1-> l2cap data has been handled by user
+ * 0-> l2cap data will be handle by BLE stack
+ */
+void blc_l2cap_register_customize_handler(l2cap_handler_t p);
+void blc_l2cap_register_handler (void *p);
+
+int blc_l2cap_packet_receive (u16 connHandle, u8 * p);
+int blc_l2cap_send_data (u16 cid, u8 *p, int n);
+
+void blc_l2cap_reg_att_sig_hander(void *p);//signaling pkt proc
+
+
+
+void blc_l2cap_SendConnParamUpdateResponse(u16 connHandle, int result);
+
+/******************************* Stack Interface *****************************/
+ble_sts_t blc_l2cap_pushData_2_controller(u16 connHandle, u16 cid, u8 *format,
+ int format_len, u8 *pDate, int data_len);
+
+
+#endif
+//Master
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll.h
new file mode 100644
index 0000000000000..e2fb6adadc206
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll.h
@@ -0,0 +1,458 @@
+/********************************************************************************************************
+ * @file ll.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef LL__H_
+#define LL__H_
+
+
+//#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "tl_common.h"
+#include "drivers.h"
+
+
+//#include "../../../proj/drivers/rf_pa.h"
+
+extern u8 blt_state;
+
+/////////////////////////////////////////////////////////////////////////////
+#define CLOCK_SYS_CLOCK_1250US (1250 * sys_tick_per_us)
+#define CLOCK_SYS_CLOCK_10MS (10000 * sys_tick_per_us)
+#define FLG_RF_CONN_DONE (FLD_RF_IRQ_CMD_DONE | FLD_RF_IRQ_FSM_TIMEOUT | FLD_RF_IRQ_FIRST_TIMEOUT | FLD_RF_IRQ_RX_TIMEOUT | FLD_RF_IRQ_RX_CRC_2)
+
+
+/////////////////////////////////////////////////////////////////////////////
+
+#define LL_ROLE_MASTER 0
+#define LL_ROLE_SLAVE 1
+
+#define BLM_CONN_HANDLE BIT(7)
+#define BLS_CONN_HANDLE BIT(6)
+
+#define HANDLE_STK_FLAG BIT(15)
+
+//LL_DATA_PDU header LLID field
+#define LLID_RESERVED 0x00
+#define LLID_DATA_CONTINUE 0x01
+#define LLID_DATA_START 0x02
+#define LLID_CONTROL 0x03
+
+/*-------------------Start of BLE Controller feature -------------------------*/
+#define LL_CONNECTION_UPDATE_REQ 0x00
+#define LL_CHANNEL_MAP_REQ 0x01
+#define LL_TERMINATE_IND 0x02
+
+#define LL_ENC_REQ 0x03
+#define LL_ENC_RSP 0x04
+#define LL_START_ENC_REQ 0x05
+#define LL_START_ENC_RSP 0x06
+
+#define LL_UNKNOWN_RSP 0x07
+#define LL_FEATURE_REQ 0x08
+#define LL_FEATURE_RSP 0x09
+
+#define LL_PAUSE_ENC_REQ 0x0A
+#define LL_PAUSE_ENC_RSP 0x0B
+
+#define LL_VERSION_IND 0x0C
+#define LL_REJECT_IND 0x0D
+#define LL_SLAVE_FEATURE_REQ 0x0E
+#define LL_CONNECTION_PARAM_REQ 0x0F
+#define LL_CONNECTION_PARAM_RSP 0x10
+#define LL_REJECT_IND_EXT 0x11
+#define LL_PING_REQ 0x12
+#define LL_PING_RSP 0x13
+#define LL_LENGTH_REQ 0x14 //Core 4.2
+#define LL_LENGTH_RSP 0x15 //Core 4.2
+
+#define LL_PHY_REQ 0x16 //Core 5.0
+#define LL_PHY_RSP 0x17 //Core 5.0
+#define LL_PHY_UPDATE_IND 0x18 //Core 5.0
+
+#define LL_MIN_USED_CHANNELS_IND 0x19 //Core 5.0
+/*-------------------End of BLE Controller feature ---------------------------*/
+
+/*-------------------- Tx settle time ----------------------------------------*/
+//#if(CLOCK_SYS_CLOCK_HZ == 48000000)
+// #define LL_ADV_TX_SETTLE_1M (87)//tested
+//#elif(CLOCK_SYS_CLOCK_HZ == 32000000)
+// #define LL_ADV_TX_SETTLE_1M (85)
+//#else
+// #define LL_ADV_TX_SETTLE_1M (80)//tested
+//#endif
+
+//#define LL_ADV_TX_SETTLE_1M (80)//tested
+//#define LL_SCAN_TX_SETTLE_1M (80)
+#define LL_SLAVE_TX_SETTLE_1M (87)//tested
+
+//#define LL_ADV_TX_SETTLE_2M (80)
+//#define LL_SCAN_TX_SETTLE_2M (80)
+#define LL_SLAVE_TX_SETTLE_2M (89)//tested. 0x402 = 0x26 -> tx settle = 113
+/*----------------------------------------------------------------------------*/
+
+#define SLAVE_LL_ENC_OFF 0
+#define SLAVE_LL_ENC_REQ 1
+#define SLAVE_LL_ENC_RSP_T 2
+#define SLAVE_LL_ENC_START_REQ_T 3
+#define SLAVE_LL_ENC_START_RSP 4
+#define SLAVE_LL_ENC_START_RSP_T 5
+#define SLAVE_LL_ENC_PAUSE_REQ 6
+#define SLAVE_LL_ENC_PAUSE_RSP_T 7
+#define SLAVE_LL_ENC_PAUSE_RSP 8
+#define SLAVE_LL_REJECT_IND_T 9
+
+#define MASTER_LL_ENC_OFF 0
+#define MASTER_LL_ENC_REQ 1
+#define MASTER_LL_ENC_RSP_T 2
+#define MASTER_LL_ENC_START_REQ_T 3
+#define MASTER_LL_ENC_START_RSP 4
+#define MASTER_LL_ENC_START_RSP_T 5
+#define MASTER_LL_ENC_PAUSE_REQ 6
+#define MASTER_LL_ENC_PAUSE_RSP_T 7
+#define MASTER_LL_ENC_PAUSE_RSP 8
+#define MASTER_LL_REJECT_IND_T 9
+#define MASTER_LL_ENC_SMP_INFO_S 10
+#define MASTER_LL_ENC_SMP_INFO_E 11
+
+//ble link layer state
+#define BLS_LINK_STATE_IDLE 0
+#define BLS_LINK_STATE_ADV BIT(0)
+#define BLS_LINK_STATE_SCAN BIT(1)
+#define BLS_LINK_STATE_INIT BIT(2)
+#define BLS_LINK_STATE_CONN BIT(3)
+
+//#define BLS_LINK_STATE_CONN_SLAVE BIT(3)
+//#define BLS_LINK_STATE_CONN_MASTER BIT(4)
+
+#define BLE_STATE_BTX_S 4
+#define BLE_STATE_BTX_E 5
+#define BLE_STATE_BRX_S 6
+#define BLE_STATE_BRX_E 7
+
+#define MAX_OCTETS_DATA_LEN_27 27
+#define MAX_OCTETS_DATA_LEN_EXTENSION 251
+
+#define LL_PACKET_OCTET_TIME(n) ((n)*8 + 112)
+
+#define DATA_LENGTH_REQ_PENDING 1
+#define DATA_LENGTH_REQ_DONE 2
+
+
+my_fifo_t blt_rxfifo;
+u8 blt_rxfifo_b[];
+
+my_fifo_t blt_txfifo;
+u8 blt_txfifo_b[];
+//////////////////////////////////////
+
+typedef struct{
+ u8 macAddress_public[6];
+ u8 macAddress_random[6]; //host may set this
+} ll_mac_t;
+
+ll_mac_t bltMac;
+
+typedef struct{
+ u16 connEffectiveMaxRxOctets;
+ u16 connEffectiveMaxTxOctets;
+ u16 connMaxRxOctets;
+ u16 connMaxTxOctets;
+ u16 connRemoteMaxRxOctets;
+ u16 connRemoteMaxTxOctets;
+ u16 supportedMaxRxOctets;
+ u16 supportedMaxTxOctets;
+
+ u8 connInitialMaxTxOctets; //u8 is enough
+ u8 connMaxTxRxOctets_req;
+ u8 connRxDiff100;
+ u8 connTxDiff100;
+} ll_data_extension_t;
+
+ll_data_extension_t bltData;
+
+typedef struct{
+ u8 llid;
+ u8 rf_len;
+ u8 opcode;
+ u8 ctrlData;
+}ll_unknown_rsp_t;
+
+typedef struct{
+ u8 adv_en;
+ u8 adv_extension_mask;
+ u8 adv_scanReq_connReq;
+ u8 phy_en;
+
+ u8 ll_recentAvgRSSI;
+ u8 tx_irq_proc_en;
+ u8 conn_rx_num; //slave: rx number in a new interval
+ u8 is_adv_after_scan_req;
+
+ u32 custom_access_code;
+
+ u16 bluetooth_subver;
+ u8 bluetooth_ver;
+ u8 sdk_mainLoop_run_flag; //Prevent enter sleep in first main_loop
+
+} st_ll_conn_t;
+
+
+st_ll_conn_t bltParam;
+
+
+
+
+
+////////////////// Telink defined Event Callback ////////////////////////
+typedef void (*blt_event_callback_t)(u8 e, u8 *p, int n);
+
+#define BLT_EV_MAX_NUM 20
+
+#define BLT_EV_FLAG_ADV 0
+#define BLT_EV_FLAG_ADV_DURATION_TIMEOUT 1
+#define BLT_EV_FLAG_SCAN_RSP 2
+#define BLT_EV_FLAG_CONNECT 3
+#define BLT_EV_FLAG_TERMINATE 4
+#define BLT_EV_FLAG_PAIRING_BEGIN 5
+#define BLT_EV_FLAG_PAIRING_END 6//success or fail(with fail reason)
+#define BLT_EV_FLAG_ENCRYPTION_CONN_DONE 7
+#define BLT_EV_FLAG_DATA_LENGTH_EXCHANGE 8
+#define BLT_EV_FLAG_GPIO_EARLY_WAKEUP 9
+#define BLT_EV_FLAG_CHN_MAP_REQ 10
+#define BLT_EV_FLAG_CONN_PARA_REQ 11
+#define BLT_EV_FLAG_CHN_MAP_UPDATE 12
+#define BLT_EV_FLAG_CONN_PARA_UPDATE 13
+#define BLT_EV_FLAG_SUSPEND_ENTER 14
+#define BLT_EV_FLAG_SUSPEND_EXIT 15
+#define BLT_EV_FLAG_RX_DATA_ABANDOM 16
+#define BLT_EV_FLAG_SMP_PINCODE_PROCESS 17
+#define BLT_EV_FLAG_SMP_KEY_MISSING 18 //add for UTB2
+#define BLT_EV_FLAG_PHY_UPDATE 19
+
+#define EVENT_MASK_ADV_DURATION_TIMEOUT BIT(BLT_EV_FLAG_ADV_DURATION_TIMEOUT)
+#define EVENT_MASK_SCAN_RSP BIT(BLT_EV_FLAG_SCAN_RSP)
+#define EVENT_MASK_CONNECT BIT(BLT_EV_FLAG_CONNECT)
+#define EVENT_MASK_TERMINATE BIT(BLT_EV_FLAG_TERMINATE)
+#define EVENT_MASK_CHN_MAP_REQ BIT(BLT_EV_FLAG_CHN_MAP_REQ)
+#define EVENT_MASK_CONN_PARA_REQ BIT(BLT_EV_FLAG_CONN_PARA_REQ)
+#define EVENT_MASK_CHN_MAP_UPDATE BIT(BLT_EV_FLAG_CHN_MAP_UPDATE)
+#define EVENT_MASK_CONN_PARA_UPDATE BIT(BLT_EV_FLAG_CONN_PARA_UPDATE)
+#define EVENT_MASK_RX_DATA_ABANDOM BIT(BLT_EV_FLAG_RX_DATA_ABANDOM)
+#define EVENT_MASK_PHY_UPDATE BIT(BLT_EV_FLAG_PHY_UPDATE)
+
+typedef void (*ll_irq_tx_callback_t)(void);
+
+typedef int (*ll_irq_rx_data_callback_t)(u8 *, u32);
+typedef int (*ll_irq_rx_post_callback_t)(void);
+
+typedef void (*ll_irq_systemTick_conn_callback_t)(void);
+
+typedef int (*blc_main_loop_data_callback_t)(u8 *);
+typedef int (*blc_main_loop_post_callback_t)(void);
+
+typedef int (*blc_main_loop_phyTest_callback_t)(void);
+
+typedef int (*blt_LTK_req_callback_t)(u16 handle, u8 *rand, u16 ediv);
+
+extern my_fifo_t hci_tx_fifo;
+
+
+/******************************* User Interface ************************************/
+void irq_blt_sdk_handler();
+
+int blt_sdk_main_loop(void);
+
+void blc_ll_initBasicMCU(u8 *public_adr);
+
+ble_sts_t blc_ll_setRandomAddr(u8 *randomAddr);
+
+ble_sts_t blc_ll_readBDAddr(u8 *addr);
+
+u8 blc_ll_getCurrentState(void);
+
+u8 blc_ll_getLatestAvgRSSI(void);
+
+u16 blc_ll_setInitTxDataLength(u16 maxTxOct); //core4.2 long data packet
+
+// application
+void bls_app_registerEventCallback(u8 e, blt_event_callback_t p);
+
+inline void blc_ll_setCustomizedAdvScanAccessCode(u32 access_code)
+{
+ bltParam.custom_access_code = access_code;
+}
+inline u8 blc_ll_get_connEffectiveMaxTxOctets(void)
+{
+ #if(LL_FEATURE_ENABLE_LE_DATA_LENGTH_EXTENSION)
+ return bltData.connEffectiveMaxTxOctets;
+ #else
+ return 27;
+ #endif
+}
+
+/************************* Stack Interface, user can not use!!! ***************************/
+ble_sts_t blc_hci_ltkRequestNegativeReply(u16 connHandle);
+ble_sts_t blc_hci_ltkRequestReply(u16 connHandle, u8 *ltk);
+
+void blc_ll_setEncryptionBusy(u8 enc_busy);
+bool blc_ll_isEncryptionBusy(void);
+void blc_ll_registerLtkReqEvtCb(blt_LTK_req_callback_t evtCbFunc);
+
+void blc_ll_setIdleState(void);
+ble_sts_t blc_hci_le_getLocalSupportedFeatures(u8 *features);
+
+ble_sts_t blc_hci_le_readBufferSize_cmd(u8 *pData);
+
+//core4.2 data extension
+void blc_ll_initDataLengthExtension(void);
+ble_sts_t blc_ll_exchangeDataLength(u8 opcode, u16 maxTxOct);
+ble_sts_t blc_hci_setTxDataLength(u16 connHandle, u16 tx, u16 txtime);
+ble_sts_t blc_hci_readSuggestedDefaultTxDataLength(u8 *tx, u8 *txtime);
+ble_sts_t blc_hci_writeSuggestedDefaultTxDataLength(u16 tx, u16 txtime);
+
+int blm_send_acl_to_btusb(u16 conn, u8 *p);
+//Ϊ�˽�Լʱ��������RAM��,����Hawkϵ��оƬ���е�
+void blt_adjust_timer0_capt(u32 sys_timer_tick);
+
+static inline u8 blc_ll_getTxFifoNumber(void)
+{
+ u8 r = irq_disable();
+
+ u8 fifo_num = ((reg_dma_tx_wptr - reg_dma_tx_rptr) & 15 ) + ( (blt_txfifo.wptr - blt_txfifo.rptr) & 31 ) ;
+
+ irq_restore(r);
+
+ return fifo_num;
+}
+
+static inline u8 blc_ll_getTxHardWareFifoNumber(void)
+{
+ return ((reg_dma_tx_wptr - reg_dma_tx_rptr) & 15);
+}
+
+static inline void blc_ll_resetInfoRSSI(void)
+{
+ bltParam.ll_recentAvgRSSI = 0;
+}
+
+static inline void blc_ll_recordRSSI(u8 rssi)
+{
+ if (bltParam.ll_recentAvgRSSI == 0)
+ {
+ bltParam.ll_recentAvgRSSI = rssi;
+ }
+ else
+ {
+ bltParam.ll_recentAvgRSSI = (bltParam.ll_recentAvgRSSI + rssi) >> 1;
+ }
+}
+
+static inline u8* blc_ll_get_macAddrRandom(void)
+{
+ return bltMac.macAddress_random;
+}
+
+static inline u8* blc_ll_get_macAddrPublic(void)
+{
+ return bltMac.macAddress_public;
+}
+
+ble_sts_t blt_ll_unknown_rsp(u16 connHandle, u8 opcode);
+
+
+/************************************************************* RF DMA RX\TX data strcut ***************************************************************************************
+----RF RX DMA buffer struct----:
+byte0 byte3 byte4 byte5 byte6 byte7 byte8 byte11 byte12 byte13 byte14 byte(14+w-1) byte(14+w) byte(16+w) byte(17+w) byte(18+w) byte(19+w) byte(20+w)
+*-------------*----------*------*------*------*----------------*----------*------------*------------------*--------------------*---------------------*------------------------*
+| DMA_len(4B) | Rssi(1B) |xx(1B)|yy(1B)|zz(1B)| Stamp_time(4B) | type(1B) | Rf_len(1B) | payload(wB) | CRC(3B) | Fre_offset(2B) | jj(1B) 0x40(1B) |
+| | rssi-110 | | | Header | Payload | | (Fre_offset/8+25)/2 | if CRC OK:0x40|
+| | | |<-- PDU -->| | | |
+*-------------*-------------------------------*----------------*------------------------------------------*--------------------*---------------------*------------------------*
+ |<------------------------------------------------------ DMA len -----|------------------|--------------------|--------------------------------------------->|
+ | | | |
+ |<---------------------------------- 10 byte --------------------------->|<---- Rf_len ---->|<------ 3 Byte ---->|<------------------ 4 Byte ------------------>|
+note: byte12 -> type(1B):llid(2bit) nesn(1bit) sn(1bit) md(1bit)
+we can see: DMA_len = w(Rf_len) + 17.
+ CRC_OK = DMA_buffer[w(Rf_len) + 20] == 0x40 ? True : False.
+
+----RF TX DMA buffer struct----:
+byte0 byte3 byte4 byte5 byte6 byte(6+w-1)
+*-------------*----------*------------*------------------*
+| DMA_len(4B) | type(1B) | Rf_len(1B) | payload(wB) |
+| | Header | Payload |
+| |<-- PDU -->|
+*-------------*------------------------------------------*
+note: type(1B):llid(2bit) nesn(1bit) sn(1bit) md(1bit),ʵ����RF Ӳ��FIFO��ѹ���ݣ�typeֻ��ʾllid,����bitλΪ0��
+*******************************************************************************************************************************************************************************/
+
+
+#define FIX_HW_CRC24_EN 1
+
+typedef struct{
+ u8 save_flg;
+ u8 sn_nesn;
+ u8 dma_tx_rptr;
+} bb_sts_t;
+
+bb_sts_t blt_bb;
+
+static inline void blt_save_snnesn (void)
+{
+ blt_bb.sn_nesn = ((REG_ADDR8(0xf22) & BIT(0)) << 4) | ((REG_ADDR8(0xf23) & BIT(4)) << 1);
+}
+
+static inline void blt_restore_snnesn (void)
+{
+ reg_rst0 = FLD_RST0_ZB;
+ reg_rst0 = 0;
+ REG_ADDR8(0xf03) = (REG_ADDR8(0xf03) & ~ BITS(4,5)) | blt_bb.sn_nesn;
+}
+
+
+static inline void bls_save_dma_tx_rptr(void)
+{
+ //TX Fifo: 0x52a[0:3] means rptr
+ blt_bb.dma_tx_rptr = reg_dma_tx_rptr & 0x0f;
+}
+
+static inline void bls_restore_dma_tx_rptr(void)
+{
+ //0x52a[6] rptr set
+ reg_dma_tx_rptr = ( BIT(6) | blt_bb.dma_tx_rptr);//restore tx_rptr
+}
+
+static inline void blt_ll_set_ble_access_code_adv(void)
+{
+ write_reg32(0x800408, bltParam.custom_access_code ? bltParam.custom_access_code : 0xd6be898e);
+}
+
+#endif /* LL__H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_adv.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_adv.h
new file mode 100644
index 0000000000000..7f1f60fdfb7fa
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_adv.h
@@ -0,0 +1,120 @@
+/********************************************************************************************************
+ * @file ll_adv.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#ifndef LL_ADV_H_
+#define LL_ADV_H_
+
+
+/* Advertising Maximum data length */
+#define ADV_MAX_DATA_LEN 31
+
+//ADV channel define
+#define BLT_ENABLE_ADV_37 BIT(0)
+#define BLT_ENABLE_ADV_38 BIT(1)
+#define BLT_ENABLE_ADV_39 BIT(2)
+#define BLT_ENABLE_ADV_ALL (BLT_ENABLE_ADV_37 | BLT_ENABLE_ADV_38 | BLT_ENABLE_ADV_39)
+
+//ADV enable/disable
+#define BLC_ADV_DISABLE 0
+#define BLC_ADV_ENABLE 1
+
+//send ADV in connection state(Extend BLE state)
+#define BLS_FLAG_ADV_IN_SLAVE_MODE BIT(6)
+
+#define BLC_FLAG_STK_ADV BIT(24)
+
+
+typedef struct {
+ u8 adv_chn_mask;
+ u8 adv_duraton_en;
+ u8 adv_type;
+ u8 adv_filterPolicy;
+
+ s8 T_SCAN_RSP_INTVL;
+ u8 advInt_rand;
+ u16 advInt_min;
+
+ u32 own_addr_type; // own addr type
+ u32 adv_interval; // system tick
+ u32 adv_duration_us;
+ u32 adv_begin_tick;
+}st_ll_adv_t;
+
+extern st_ll_adv_t blta;
+
+extern rf_packet_adv_t pkt_adv;
+
+typedef int (*ll_adv2conn_callback_t)(u8 *); //rcvd conn_req, adv state to conn state
+extern ll_adv2conn_callback_t ll_adv2conn_cb;
+
+typedef int (*ll_module_adv_callback_t)(void);
+typedef int (*advertise_prepare_handler_t) (rf_packet_adv_t * p);
+
+extern ll_module_adv_callback_t ll_module_advSlave_cb;
+
+/******************************* User Interface ************************************/
+void blc_ll_initAdvertising_module(u8 *public_adr);;
+
+ble_sts_t bls_ll_setAdvData(u8 *data, u8 len);
+ble_sts_t bls_ll_setScanRspData(u8 *data, u8 len);
+ble_sts_t bls_ll_setAdvEnable(int adv_enable);
+
+u8 blt_set_adv_direct_init_addrtype(u8* cmdPara);
+
+ble_sts_t bls_ll_setAdvParam(u16 intervalMin, u16 intervalMax, u8 advType, u8 ownAddrType,
+ u8 peerAddrType, u8 *peerAddr,u8 adv_channelMap, u8 advFilterPolicy);
+
+ble_sts_t bls_ll_setAdvInterval(u16 intervalMin, u16 intervalMax);
+ble_sts_t bls_ll_setAdvChannelMap(u8 adv_channelMap);
+ble_sts_t bls_ll_setAdvFilterPolicy(u8 advFilterPolicy);
+
+ble_sts_t bls_ll_setAdvDuration(u32 duration_us, u8 duration_en);
+
+void blc_ll_setAdvCustomedChannel(u8 chn0, u8 chn1, u8 chn2);
+
+void bls_ll_adjustScanRspTiming(s8 t_us );
+void blt_enable_adv_after_scan_req(u8 en);
+
+//Extend BLE state (ADV in connection state)
+ble_sts_t blc_ll_addAdvertisingInConnSlaveRole(void);
+ble_sts_t blc_ll_removeAdvertisingFromConnSLaveRole(void);
+
+ble_sts_t blc_ll_setAdvParamInConnSlaveRole( u8 *adv_data, u8 advData_len, u8 *scanRsp_data, u8 scanRspData_len,
+ u8 advType, u8 ownAddrType, u8 adv_channelMap, u8 advFilterPolicy);
+
+
+
+/************************* Stack Interface, user can not use!!! ***************************/
+ble_sts_t bls_hci_le_setAdvParam(adv_para_t *para);
+ble_sts_t bls_hci_le_readChannelMap(u16 connHandle, u8 *returnChannelMap);
+
+ble_sts_t bls_ll_setAdvType(u8 advType);
+ble_sts_t blt_set_adv_addrtype(u8* cmdPara);
+
+int blc_ll_sendAdvInSlaveRole(void);
+
+static inline u8 blt_ll_getOwnAddrType(void)
+{
+ return blta.own_addr_type;
+}
+
+#endif /* LL_ADV_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_conn_phy.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_conn_phy.h
new file mode 100644
index 0000000000000..ef77230cf9274
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_conn_phy.h
@@ -0,0 +1,112 @@
+/********************************************************************************************************
+ * @file ll_conn_phy.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef LL_CONN_PHY_H_
+#define LL_CONN_PHY_H_
+
+#if(LL_FEATURE_SUPPORT_LE_2M_PHY)
+
+/* Type define */
+typedef struct{
+ u8 llid;
+ u8 rf_len;
+ u8 opcode;
+ u8 tx_phys;
+ u8 rx_phys;
+} rf_pkt_ll_phy_req_rsp_t; //phy_req, phy_rsp
+
+typedef struct{
+ u8 llid;
+ u8 rf_len;
+ u8 opcode;
+ u8 m_to_s_phy;
+ u8 s_to_m_phy;
+ u8 instant0;
+ u8 instant1;
+} rf_pkt_ll_phy_update_ind_t; //phy_req, phy_rsp
+
+typedef struct{
+ u8 dft_tx_prefer_phys;
+ u8 dft_rx_prefer_phys;
+ u8 dft_prefer_phy;
+ u8 cur_llPhy;
+} ll_phy_t;
+
+
+//do not support Asymmetric PHYs, conn_phys = tx_phys & rx_phys
+typedef struct{
+ u8 conn_prefer_phys; // conn_prefer_phys = tx_prefer_phys & rx_prefer_phys
+ u8 conn_cur_phy; //
+ u8 conn_next_phy; //
+ u8 phy_req_pending;
+ //u8 phy_req_trigger; // 1: means current device triggers phy_req, due to API "blc_ll_setPhy" called by Host or Application
+} ll_conn_phy_t;
+
+
+//extern u8 tx_settle_adv[];
+extern u8 tx_settle_slave[];
+
+typedef enum{
+ BLE_PHY_1M = BIT(0),
+ BLE_PHY_2M = BIT(1),
+ TLK_PRIVATE_2M = BIT(5),
+} le_phy_type_t;
+
+typedef enum{
+ PHY_PREFER_1M = BIT(0),
+ PHY_PREFER_2M = BIT(1),
+} le_phy_prefer_type_t;
+
+typedef enum{
+ PHY_TRX_PREFER = 0, //has preference among TX & RX PHYs
+ PHY_TX_NO_PREFER = BIT(0), //has no preference among TX PHYs
+ PHY_RX_NO_PREFER = BIT(1), //has no preference among RX PHYs
+ PHY_TRX_NO_PREFER = (BIT(0) | BIT(1)), //has no preference among TX & RX PHYs
+} le_phy_prefer_mask_t;
+
+/*-------------------------------- User Interface ----------------------------*/
+void blc_ll_init2MPhy_feature(void);
+
+ble_sts_t blc_ll_setDefaultPhy(le_phy_prefer_mask_t all_phys, le_phy_prefer_type_t tx_phys,
+ le_phy_prefer_type_t rx_phys);
+ble_sts_t blc_ll_setPhy(u16 connHandle, le_phy_prefer_mask_t all_phys,
+ le_phy_prefer_type_t tx_phys, le_phy_prefer_type_t rx_phys);
+
+
+/*---------------- Stack Interface, user can not use!!! ----------------------*/
+extern ll_phy_t bltPHYs;
+extern ll_conn_phy_t blt_conn_phy;
+
+typedef void (*ll_phy_switch_callback_t)(le_phy_type_t);
+typedef void (*ll_conn_phy_update_callback_t)(void);
+
+//extern ll_phy_switch_callback_t ll_phy_switch_cb;
+//extern ll_conn_phy_update_callback_t ll_conn_phy_update_cb;
+
+void blt_reset_conn_phy_param(void);
+
+void blt_ll_sendPhyReq(void);
+void blt_ll_updateConnPhy(void);
+
+
+#endif /* LL_FEATURE_SUPPORT_LE_2M_PHY */
+
+#endif /* LL_CONN_PHY_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_encrypt.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_encrypt.h
new file mode 100644
index 0000000000000..47f4bb60bfd49
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_encrypt.h
@@ -0,0 +1,53 @@
+/********************************************************************************************************
+ * @file ll_encrypt.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+/*
+ * ble_ll_encrypt.h
+ *
+ * Created on: 2016-9-22
+ * Author: Telink
+ */
+
+#ifndef BLE_LL_ENCRYPT_H_
+#define BLE_LL_ENCRYPT_H_
+
+
+
+
+
+typedef struct {
+ u32 pkt;
+ u8 dir;
+ u8 iv[8];
+} ble_cyrpt_nonce_t;
+
+
+typedef struct {
+ u32 enc_pno;
+ u32 dec_pno;
+ u8 sk[16]; //session key
+ ble_cyrpt_nonce_t nonce;
+ u8 st;
+ u8 enable; //1: slave enable; 2: master enable
+ u8 mic_fail;
+} ble_crypt_para_t;
+
+#endif /* BLE_LL_ENCRYPT_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_pm.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_pm.h
new file mode 100644
index 0000000000000..72a3b69b1c28b
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_pm.h
@@ -0,0 +1,105 @@
+/********************************************************************************************************
+ * @file ll_pm.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+/*
+ * ll_pm.h
+ *
+ * Created on: 2017-3-7
+ * Author: Administrator
+ */
+
+#ifndef LL_PM_H_
+#define LL_PM_H_
+
+
+
+////////////////// Power Management ///////////////////////
+#define SUSPEND_DISABLE 0
+#define SUSPEND_ADV BIT(0)
+#define SUSPEND_CONN BIT(1)
+#define MCU_STALL BIT(6)
+
+
+
+
+
+typedef struct {
+ u8 suspend_mask;
+ u8 advMcuStall_en;
+ u16 wakeup_src;
+
+
+ u32 appWakeup_tick;
+
+ u8 appWakeup_en;
+ u8 appWakeup_flg;
+ u8 latency_off;
+ u8 no_latency;
+
+ u16 sys_latency;
+ u16 user_latency;
+ u16 valid_latency;
+ u16 latency_use;
+
+ u8 conn_no_suspend;
+ u8 timer_wakeup;
+ u8 ble_busy_pending;
+ u8 appWakeup_loop_noLatency;
+
+ u8 timing_miss;
+ u8 timing_synced;
+ u16 pm_border_flag;
+
+ u8 conn_rcvd_last_pkt; // correctly received last packet of master(consider if more data take effect)
+
+}st_ll_pm_t;
+
+
+
+typedef void (*ll_module_pm_callback_t)(void);
+
+
+typedef void (*pm_appWakeupLowPower_callback_t)(int);
+
+
+
+
+/******************************* User Interface ************************************/
+void blc_ll_initPowerManagement_module(void);
+
+
+void bls_pm_setSuspendMask (u8 mask);
+u8 bls_pm_getSuspendMask (void);
+void bls_pm_setWakeupSource(u16 source);
+u32 bls_pm_getSystemWakeupTick(void);
+
+void bls_pm_setManualLatency(u16 latency); //manual set latency to save power
+void bls_pm_enableAdvMcuStall(u8 en);
+
+void bls_pm_setAppWakeupLowPower(u32 wakeup_tick, u8 enable);
+void bls_pm_registerAppWakeupLowPowerCb(pm_appWakeupLowPower_callback_t cb);
+
+/************************* Stack Interface, user can not use!!! ***************************/
+
+
+
+
+#endif /* LL_PM_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_scan.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_scan.h
new file mode 100644
index 0000000000000..5317ce67c6d56
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_scan.h
@@ -0,0 +1,105 @@
+/********************************************************************************************************
+ * @file ll_scan.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef LL_SCAN_H_
+#define LL_SCAN_H_
+
+#include "config.h"
+#include "stack/ble/ble_common.h"
+
+#if((__TL_LIB_5316__ || MCU_CORE_TYPE == MCU_CORE_5316) && BLE_STATE_MACHINE_EXTENSION_EN)
+
+
+
+/* Macro define */
+#define BLC_SCAN_DISABLE 0
+#define BLC_SCAN_ENABLE 1
+
+//Scan filter policy
+#define FILTER_DUP_DISABLE 0
+#define FILTER_DUP_ENABLE 1
+
+//Extend BLE state machine
+#define BLS_FLAG_SCAN_IN_ADV_MODE BIT(5)
+#define BLS_FLAG_SCAN_IN_SLAVE_MODE BIT(6)
+
+/* Type define */
+typedef struct {
+ u8 scan_en;
+ u8 scan_type;
+ u8 scan_filterPolicy;
+ u8 filter_dup;
+
+ u8 scanDevice_num;
+ u8 scanRspDevice_num;
+
+ u8 scan_extension_mask;
+ s8 T_SCAN_REQ_INTVL;
+
+ //u32 scan_interval;
+}st_ll_scan_t;
+
+typedef int (*ll_procScanPkt_callback_t)(u8 *, u8 *, u32);
+typedef int (*ll_procScanDat_callback_t)(u8 *);
+typedef void (*ll_switchScanChannel_t)(int, int);
+
+/* External variable statement */
+st_ll_scan_t blts;
+u32 blts_scan_interval;
+extern rf_packet_scan_req_t pkt_scan_req;
+
+
+//extern ll_switchScanChannel_t blc_ll_switchScanChannelCb;
+extern ll_procScanPkt_callback_t blc_ll_procScanPktCb;
+extern ll_procScanDat_callback_t blc_ll_procScanDatCb;
+
+/* Function statement */
+/*------------------ User Interface ------------------------------------------*/
+void blc_ll_initScanning_module(u8 *public_adr);
+
+/**
+ * @Param: scan_type -> 0 for passive scan; 1 for active scan
+ */
+ble_sts_t blc_ll_setScanParameter(u8 scan_type, u16 scan_interval, u16 scan_window,
+ u8 ownAddrType, u8 filter_policy);
+//Scan in ADV state
+ble_sts_t blc_ll_addScanningInAdvState(void);
+ble_sts_t blc_ll_removeScanningFromAdvState(void);
+
+//Scan in Connection state
+ble_sts_t blc_ll_addScanningInConnSlaveRole(void);
+ble_sts_t blc_ll_removeScanningFromConnSLaveRole(void);
+
+/*---------- Stack Interface, user can not use!!! ----------------------------*/
+int blc_ll_filterAdvDevice(u8 type, u8 * mac);
+int blc_ll_addScanRspDevice(u8 type, u8 *mac);
+void blc_ll_clearScanRspDevice(void);
+
+bool blc_ll_isScanRspReceived(u8 type, u8 *mac);
+
+int blc_ll_procScanPkt(u8 *raw_pkt, u8 *new_pkt, u32 tick_now);
+int blc_ll_procScanData(u8 *raw_pkt);
+
+void blc_ll_switchScanChannel (int, int);
+
+#endif//(__TL_LIB_5316__ || MCU_CORE_TYPE == MCU_CORE_5316)
+
+#endif /* LL_SCAN_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_slave.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_slave.h
new file mode 100644
index 0000000000000..e5fce1bbec8b3
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_slave.h
@@ -0,0 +1,140 @@
+/********************************************************************************************************
+ * @file ll_slave.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#ifndef LL_SLAVE_H_
+#define LL_SLAVE_H_
+
+typedef struct {
+ u8 time_update_st;
+ u8 last_rf_len;
+ u8 ll_remoteFeature; //not only one for BLE master, use connHandle to identify
+ u8 remoteFeatureReq;
+
+ u8 long_suspend;
+ u8 interval_level;
+ u16 connHandle;
+
+
+ u8 ll_recentAvgRSSI;
+ u8 conn_sn_master;
+ u8 conn_chn;
+ u8 conn_update;
+
+
+ u8 master_not_ack_slaveAckUpReq;
+ u8 rsvd2;
+ u16 conn_update_inst_diff;
+
+
+ u32 conn_access_code_revert;
+ u32 conn_crc;
+ u32 connExpectTime;
+ int conn_interval_adjust;
+ u32 conn_timeout;
+ u32 conn_tick;
+ u32 conn_interval;
+ u16 conn_inst;
+ u16 conn_latency;
+ u32 conn_duration;
+
+ u8 conn_new_param;
+ u8 conn_winsize_next;
+ u16 conn_offset_next;
+ u16 conn_inst_next;
+ u16 conn_interval_next; //standard value, not * 1.25ms
+ u16 conn_latency_next;
+ u16 conn_timeout_next; //standard value, not *10ms
+
+
+ u8 conn_chn_hop;
+ u8 rsvd1;
+ u8 conn_chn_map[5];
+ u8 conn_chn_map_next[5];
+
+
+ u32 conn_start_tick;
+
+ int conn_tolerance_time;
+
+ u32 tick_1st_rx;
+ u32 conn_brx_tick;
+
+ u8 conn_master_terminate;
+ u8 conn_terminate_reason;
+ u8 conn_slave_terminate;
+ u8 conn_terminate_pending; // terminate_pending = master_terminate || slave_terminate
+ u32 conn_slaveTerminate_time;
+
+#if (BLS_PROC_MASTER_UPDATE_REQ_IN_IRQ_ENABLE)
+ u32 conn_pkt_rcvd;
+ u32 conn_pkt_rcvd_no;
+ u8 * conn_pkt_dec_pending;
+ int conn_enc_dec_busy;
+ int conn_stop_brx;
+#endif
+
+ u8 isVersionExchanged; //record version exchanged.
+} st_ll_conn_slave_t;
+
+
+
+
+
+
+
+/******************************* User Interface ************************************/
+void blc_ll_initSlaveRole_module(void);
+
+ble_sts_t bls_ll_terminateConnection (u8 reason);
+
+bool bls_ll_isConnectState (void);
+
+u32 bls_ll_getConnectionCreateTime(void);
+u16 bls_ll_getConnectionInterval(void); // if return 0, means not in connection state
+u16 bls_ll_getConnectionLatency(void); // if return 0, means not in connection state
+u16 bls_ll_getConnectionTimeout(void); // if return 0, means not in connection state
+
+
+int bls_ll_requestConnBrxEventDisable(void);
+void bls_ll_disableConnBrxEvent(void);
+void bls_ll_restoreConnBrxEvent(void);
+
+
+void blc_ll_setShortTolerance(int short_tor_us);
+
+//ble module event
+ble_sts_t bls_hci_mod_setEventMask_cmd(u32 evtMask); //eventMask: module special
+
+
+
+
+/************************* Stack Interface, user can not use!!! ***************************/
+bool bls_ll_pushTxFifo(int hanlde, u8 *p);
+void blt_push_fifo_hold(u8 *p);
+
+ble_sts_t bls_hci_reset(void);
+
+ble_sts_t bls_hci_receiveHostACLData(u16 connHandle, u8 PB_Flag, u8 BC_Flag, u8 *pData );
+
+
+
+#endif /* LL_SLAVE_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_whitelist.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_whitelist.h
new file mode 100644
index 0000000000000..d4987ad421075
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/ll/ll_whitelist.h
@@ -0,0 +1,196 @@
+/********************************************************************************************************
+ * @file ll_whitelist.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#ifndef LL_WHITELIST_H_
+#define LL_WHITELIST_H_
+
+#include
+#include "stack/ble/blt_config.h"
+
+
+
+#if (RAM_OPTIMZATION_FOR_UEI_EN)
+ #define MAX_WHITE_LIST_SIZE 1
+#else
+ #define MAX_WHITE_LIST_SIZE 4
+#endif
+
+
+#if (RAMCODE_OPTIMIZE_CONN_POWER_NEGLECT_ENABLE || BLS_BLE_RF_IRQ_TIMING_EXTREMELY_SHORT_EN || RAM_OPTIMZATION_FOR_UEI_EN)
+ #define MAX_WHITE_IRK_LIST_SIZE 1 //save ramcode
+#else
+ #define MAX_WHITE_IRK_LIST_SIZE 2 //save ramcode
+#endif
+
+
+#define IRK_REVERT_TO_SAVE_AES_TMIE_ENABLE 1
+
+
+#define MAC_MATCH8(md,ms) (md[0]==ms[0] && md[1]==ms[1] && md[2]==ms[2] && md[3]==ms[3] && md[4]==ms[4] && md[5]==ms[5])
+#define MAC_MATCH16(md,ms) (md[0]==ms[0] && md[1]==ms[1] && md[2]==ms[2])
+#define MAC_MATCH32(md,ms) (md[0]==ms[0] && md[1]==ms[1])
+
+
+//adv filter policy
+#define ALLOW_SCAN_WL BIT(0)
+#define ALLOW_CONN_WL BIT(1)
+
+#define ADV_FP_ALLOW_SCAN_ANY_ALLOW_CONN_ANY 0x00 // Process scan and connection requests from all devices
+#define ADV_FP_ALLOW_SCAN_WL_ALLOW_CONN_ANY 0x01 // Process connection requests from all devices and only scan requests from devices that are in the White List.
+#define ADV_FP_ALLOW_SCAN_ANY_ALLOW_CONN_WL 0x02 // Process scan requests from all devices and only connection requests from devices that are in the White List..
+#define ADV_FP_ALLOW_SCAN_WL_ALLOW_CONN_WL 0x03 // Process scan and connection requests only from devices in the White List.
+
+//adv filter policy set to zero, not use whitelist
+#define ADV_FP_NONE ADV_FP_ALLOW_SCAN_ANY_ALLOW_CONN_ANY
+
+
+#define SCAN_FP_ALLOW_ADV_ANY 0x00 //except direct adv address not match
+#define SCAN_FP_ALLOW_ADV_WL 0x01 //except direct adv address not match
+#define SCAN_FP_ALLOW_UNDIRECT_ADV 0x02 //and direct adv address match initiator's resolvable private MAC
+#define SCAN_FP_ALLOW_ADV_WL_DIRECT_ADV_MACTH 0x03 //and direct adv address match initiator's resolvable private MAC
+
+
+#define INITIATE_FP_ADV_SPECIFY 0x00 //adv specified by host
+#define INITIATE_FP_ADV_WL 0x01 //adv in whitelist
+
+
+typedef u8 irk_key_t[16];
+
+typedef struct {
+ u8 type;
+ u8 address[BLE_ADDR_LEN];
+ u8 reserved;
+} wl_addr_t;
+
+typedef struct {
+ wl_addr_t wl_addr_tbl[MAX_WHITE_LIST_SIZE];
+ u8 wl_addr_tbl_index;
+ u8 wl_irk_tbl_index;
+} ll_whiteListTbl_t;
+
+
+typedef struct {
+ u8 type;
+ u8 address[BLE_ADDR_LEN];
+ u8 reserved;
+ u8 irk[16];
+} rl_addr_t;
+
+typedef struct {
+ rl_addr_t tbl[MAX_WHITE_IRK_LIST_SIZE];
+ u8 idx;
+ u8 en;
+} ll_ResolvingListTbl_t;
+
+
+typedef u8 * (*ll_wl_handler_t)(u8 , u8 *);
+extern ll_wl_handler_t ll_whiteList_handler;
+
+
+/**************************************** User Interface **********************************************/
+
+
+/*********************************************************************
+ * @fn ll_whiteList_reset
+ *
+ * @brief API to reset the white list table.
+ *
+ * @param None
+ *
+ * @return LL Status
+ */
+ble_sts_t ll_whiteList_reset(void);
+
+/*********************************************************************
+ * @fn ll_whiteList_add
+ *
+ * @brief API to add new entry to white list
+ *
+ * @param None
+ *
+ * @return LL Status
+ */
+ble_sts_t ll_whiteList_add(u8 type, u8 *addr);
+
+/*********************************************************************
+ * @fn ll_whiteList_delete
+ *
+ * @brief API to delete entry from white list
+ *
+ * @param type - The specified type
+ * addr - The specified address to be delete
+ *
+ * @return LL Status
+ */
+ble_sts_t ll_whiteList_delete(u8 type, u8 *addr);
+
+/*********************************************************************
+ * @fn ll_whiteList_getSize
+ *
+ * @brief API to get total number of white list entry size
+ *
+ * @param returnSize - The returned entry size
+ *
+ * @return LL Status
+ */
+ble_sts_t ll_whiteList_getSize(u8 *returnPublicAddrListSize) ;
+
+
+
+
+
+
+ble_sts_t ll_resolvingList_add(u8 peerIdAddrType, u8 *peerIdAddr, u8 *peer_irk, u8 *local_irk);
+ble_sts_t ll_resolvingList_delete(u8 peerIdAddrType, u8 *peerIdAddr);
+
+ble_sts_t ll_resolvingList_reset(void);
+ble_sts_t ll_resolvingList_getSize(u8 *Size);
+
+ble_sts_t ll_resolvingList_getPeerResolvableAddr (u8 peerIdAddrType, u8* peerIdAddr, u8* peerResolvableAddr); //not available now
+ble_sts_t ll_resolvingList_getLocalResolvableAddr(u8 peerIdAddrType, u8* peerIdAddr, u8* LocalResolvableAddr); //not available now
+
+ble_sts_t ll_resolvingList_setAddrResolutionEnable (u8 resolutionEn);
+
+ble_sts_t ll_resolvingList_setResolvablePrivateAddrTimer (u16 timeout_s); //not available now
+
+
+
+
+
+
+/********************************* Stack Interface, user can not use!!! ********************************/
+
+u8 * ll_searchAddrInWhiteListTbl(u8 type, u8 *addr);
+
+u8 * ll_searchAddrInResolvingListTbl(u8 *addr); //addr must be RPA
+
+u8 * ll_searchAddr_in_WhiteList_and_ResolvingList(u8 type, u8 *addr);
+
+
+
+
+ll_whiteListTbl_t ll_whiteList_tbl;
+ll_ResolvingListTbl_t ll_resolvingList_tbl;
+
+
+
+#endif /* LL_WHITELIST_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/service/ble_ll_ota.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/service/ble_ll_ota.h
new file mode 100644
index 0000000000000..5f05335716ae4
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/service/ble_ll_ota.h
@@ -0,0 +1,118 @@
+/********************************************************************************************************
+ * @file ble_ll_ota.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+/*
+ * ble_ll_ota.h
+ *
+ * Created on: 2015-7-20
+ * Author: Administrator
+ */
+
+#ifndef BLE_LL_OTA_H_
+#define BLE_LL_OTA_H_
+
+#ifndef BLE_OTA_ENABLE
+#define BLE_OTA_ENABLE 0
+#endif
+
+#ifndef BLE_OTA_FW_CHECK_EN
+#define BLE_OTA_FW_CHECK_EN 1
+#endif
+
+#define FW_MAX_SIZE 0x40000 //256K
+
+#define CMD_OTA_FW_VERSION 0xff00
+#define CMD_OTA_START 0xff01
+#define CMD_OTA_END 0xff02
+
+
+#define FLAG_FW_CHECK 0x5D
+#define FW_CHECK_AGTHM2 0x02
+
+
+
+typedef struct{
+ u8 ota_start_flag;
+#if (BLE_OTA_FW_CHECK_EN)
+ u8 fw_check_en;
+ u8 fw_check_match;
+ u8 rsvd;
+
+ u32 fw_crc_init;
+
+ u16 fw_crc_last_index;
+#endif
+}ota_service_t;
+
+extern ota_service_t blcOta;
+
+
+extern int blt_ota_start_flag;
+extern u32 blt_ota_start_tick;
+extern u32 blt_ota_timeout_us;
+
+extern u32 ota_program_bootAddr;
+extern u32 ota_program_offset;
+extern int ota_firmware_size_k;
+
+
+typedef void (*ota_startCb_t)(void);
+typedef void (*ota_versionCb_t)(void);
+
+typedef void (*ota_resIndicateCb_t)(int result);
+
+extern ota_resIndicateCb_t otaResIndicateCb;
+
+
+enum{
+ OTA_SUCCESS = 0, //success
+ OTA_PACKET_LOSS, //lost one or more OTA PDU
+ OTA_DATA_CRC_ERR, //data CRC err
+ OTA_WRITE_FLASH_ERR, //write OTA data to flash ERR
+ OTA_DATA_UNCOMPLETE, //lost last one or more OTA PDU
+ OTA_TIMEOUT, //
+ OTA_FW_CHECK_ERR,
+};
+
+void bls_ota_procTimeout(void);
+
+//user interface
+void bls_ota_registerStartCmdCb(ota_startCb_t cb);
+void bls_ota_registerVersionReqCb(ota_versionCb_t cb);
+void bls_ota_registerResultIndicateCb(ota_resIndicateCb_t cb);
+
+void bls_ota_setTimeout(u32 timeout_us);
+
+extern int otaWrite(void * p);
+extern int otaRead(void * p);
+
+extern void start_reboot(void);
+
+//firmware_size_k must be 4k aligned
+void bls_ota_setFirmwareSizeAndOffset(int firmware_size_k, u32 ota_offset);
+
+
+
+void bls_ota_clearNewFwDataArea(void);
+
+unsigned short crc16 (unsigned char *pD, int len);
+
+#endif /* BLE_LL_OTA_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/service/device_information.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/service/device_information.h
new file mode 100644
index 0000000000000..8e82231ad285c
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/service/device_information.h
@@ -0,0 +1,151 @@
+/********************************************************************************************************
+ * @file device_information.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "tl_common.h"
+//#include
+#include "../ble_common.h"
+//#include
+
+/** @addtogroup TELINK_BLE_STACK TELINK BLE Stack
+ * @{
+ */
+
+/** @addtogroup SERVICE_MODULE Service
+ * @{
+ */
+
+
+/** @addtogroup DEVICE_INFO_Module Device Information
+ * @{
+ */
+
+/** @addtogroup DEVICE_INFO_Constant Device Information Constants
+ * @{
+ */
+
+/**
+ * @brief Definition for Characteristics UUID
+ */
+
+/** @addtogroup device_char_uuid Device Information Characteristc UUID
+ * @{
+ */
+
+#define CHARACTERISTIC_UUID_MANU_NAME_STRING 0x2A29
+#define CHARACTERISTIC_UUID_MODEL_NUM_STRING 0x2A24
+#define CHARACTERISTIC_UUID_SERIAL_NUM_STRING 0x2A25
+#define CHARACTERISTIC_UUID_HW_REVISION_STRING 0x2A27
+#define CHARACTERISTIC_UUID_FW_REVISION_STRING 0x2A26
+#define CHARACTERISTIC_UUID_SW_REVISION_STRING 0x2A28
+#define CHARACTERISTIC_UUID_SYSTEM_ID 0x2A23
+#define CHARACTERISTIC_UUID_IEEE_11073_CERT_LIST 0x2A2A
+#define CHARACTERISTIC_UUID_PNP_ID 0x2A50
+
+/** @} end of group device_char_uuid */
+
+
+/** @addtogroup IEEE_AUTHORITATIVE_BODY_VALUES IEEE Authoritative Body Values
+ * @{
+ */
+
+/**
+ * @brief IEEE 11073 authoritative body values
+ */
+#define IEEE_11073_BODY_EMPTY 0
+#define IEEE_11073_BODY_IEEE 1
+#define IEEE_11073_BODY_CONTINUA 2
+#define IEEE_11073_BODY_EXP 254
+
+/** @} end of group IEEE_AUTHORITATIVE_BODY_VALUES */
+
+
+
+
+/** @addtogroup SYSTEM_ID_LEN System Id Len
+ * @{
+ */
+
+/**
+ * @brief Definition for System ID length
+ */
+#define SYSTEM_ID_LEN 8
+
+/** @} end of group SYSTEM_ID_LEN */
+
+
+
+/** @addtogroup PNP_ID_LEN PnP ID Len
+ * @{
+ */
+
+/**
+ * @brief Definition for PnP ID length
+ */
+#define DEVINFO_PNP_ID_LEN 7
+
+/** @} end of group PNP_ID_LEN */
+
+/** @} end of group DEVICE_INFO_Constant */
+
+
+
+ /** @addtogroup DEVICE_INFORMATION_Variables Device Information Variables
+ * @{
+ */
+
+/**
+ * @brief External variable for device information Attribute tables
+ */
+extern attribute_t devInfo_attrTbl[];
+
+/**
+ * @brief External variable for device information attribute size
+ */
+extern u16 devInfo_attrSize;
+
+/** @} end of group DEVICE_INFORMATION_Variables */
+
+
+
+
+ /** @addtogroup PUBLIC_FUNCTION Device Information APIs
+ * @{
+ */
+
+/**
+ * @brief API to add device information service to gatt.
+ *
+ * @param[in] None
+ *
+ * @return Status
+ */
+ble_sts_t devInfo_addService(void);
+
+/** @} end of group PUBLIC_FUNCTION */
+
+/** @} end of group DEVICE_INFO_Module */
+
+/** @} end of group SERVICE_MODULE */
+
+/** @} end of group TELINK_BLE_STACK */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/service/hids.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/service/hids.h
new file mode 100644
index 0000000000000..d28589685fa43
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/service/hids.h
@@ -0,0 +1,233 @@
+/********************************************************************************************************
+ * @file hids.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "tl_common.h"
+
+/** @addtogroup TELINK_BLE_STACK TELINK BLE Stack
+ * @{
+ */
+
+/** @addtogroup SERVICE_MODULE Service
+ * @{
+ */
+
+
+/** @addtogroup HIDS_Module Hids
+ * @{
+ */
+
+/** @addtogroup Hids_Constant Hids Constants
+ * @{
+ */
+
+/**
+ * @brief Definition for Characteristics UUID
+ */
+
+/** @addtogroup hids_uuid Hids Charactersitc UUID
+ * @{
+ */
+
+#define CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT 0x2A22 //!< HID Boot Keyboard Input Report
+#define CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT 0x2A32 //!< HID Boot Keyboard Output Report
+#define CHARACTERISTIC_UUID_HID_BOOT_MOUSE_INPUT 0x2A33 //!< HID Boot Mouse Input Report
+#define CHARACTERISTIC_UUID_HID_INFORMATION 0x2A4A //!< HID Information
+#define CHARACTERISTIC_UUID_HID_REPORT_MAP 0x2A4B //!< HID Report Map
+#define CHARACTERISTIC_UUID_HID_CONTROL_POINT 0x2A4C //!< HID Control Point
+#define CHARACTERISTIC_UUID_HID_REPORT 0x2A4D //!< HID Report
+#define CHARACTERISTIC_UUID_HID_PROTOCOL_MODE 0x2A4E //!< HID Protocol Mode
+
+/** @} end of group hids_uuid */
+
+
+/** @addtogroup HID_REPORT_ID Hid Report Id
+ * @{
+ */
+
+/**
+ * @brief HID Report ID
+ */
+
+#define HID_REPORT_ID_KEYBOARD_INPUT 1 //!< Keyboard input report ID
+#define HID_REPORT_ID_CONSUME_CONTROL_INPUT 2 //!< Consumer Control input report ID
+#define HID_REPORT_ID_MOUSE_INPUT 3 //!< Mouse input report ID
+#define HID_REPORT_ID_GAMEPAD_INPUT 4 //!< Gamepad input report ID
+#define HID_REPORT_ID_LED_OUT 0 //!< LED output report ID
+#define HID_REPORT_ID_FEATURE 0 //!< Feature report ID
+
+/** @} end of group HID_REPORT_ID */
+
+
+/** @addtogroup HID_REPORT_TYPE Hid Report Type
+ * @{
+ */
+
+/**
+ * @brief HID Report type
+ */
+
+#define HID_REPORT_TYPE_INPUT 1
+#define HID_REPORT_TYPE_OUTPUT 2
+#define HID_REPORT_TYPE_FEATURE 3
+
+/** @} end of group HID_REPORT_TYPE */
+
+
+/** @addtogroup HID_PROTOCOL_MODE Hid Protocol Mode
+ * @{
+ */
+
+/**
+ * @brief Definition for HID protocol mode
+ */
+#define HID_PROTOCOL_MODE_BOOT 0
+#define HID_PROTOCOL_MODE_REPORT 1
+#define DFLT_HID_PROTOCOL_MODE HID_PROTOCOL_MODE_REPORT
+
+/** @} end of group HID_PROTOCOL_MODE */
+
+
+/** @addtogroup HID_INFOR_FLAGS Hid Information Flags
+ * @{
+ */
+/**
+ * @brief Definition for HID information flags
+ */
+#define HID_FLAGS_REMOTE_WAKE 0x01 // RemoteWake
+#define HID_FLAGS_NORMALLY_CONNECTABLE 0x02 // NormallyConnectable
+
+/** @} end of group HID_INFOR_FLAGS */
+
+#define HID_KEYCODE_CC_RELEASE 0x00
+#define HID_KEYCODE_CC_VOL_UP 0x01
+#define HID_KEYCODE_CC_VOL_DN 0x02
+
+
+/** @} end of group Hids_Constant */
+
+
+
+
+/** @addtogroup Hids_Callbacks Hids Callbacks
+ * @{
+ */
+
+/**
+ * @brief Definition argutment type of report change callback function
+ */
+typedef struct {
+ u8 id;
+ u8 type;
+ u8 len;
+ u8 value[1];
+} reportChange_t;
+
+/**
+ * @brief Definition argutment type of CCC change callback function
+ */
+typedef struct {
+ u8 id;
+ u8 type;
+ u8 value;
+} clientCharCfgChange_t;
+
+/**
+ * @brief Definition client characterist configuration of report changed callback function type for user application
+ */
+typedef void (*hids_clientCharCfgChangeCb_t)(clientCharCfgChange_t* cccVal);
+
+/**
+ * @brief Definition report value changed callback function type for user application
+ */
+typedef void (*hids_reportChangeCb_t)(reportChange_t* reportVal);
+
+/**
+ * @brief Definition report value changed callback function type for user application
+ */
+typedef void (*hids_protoModeChangeCb_t)(u32 protoMode);
+
+/**
+ * @brief Definition report value changed callback function type for user application
+ */
+typedef void (*hids_ctrlPointChangeCb_t)(u32 ctrlPoint);
+
+/**
+ * @brief Definition for foundation command callbacks.
+ */
+typedef struct {
+ hids_reportChangeCb_t reportChangeCbFunc; //!< report value changed callback function
+ hids_protoModeChangeCb_t protoModeChangeCbFunc; //!< protocol mode value changed callback function
+ hids_ctrlPointChangeCb_t ctrlPointChangeCbFunc; //!< control point value changed callback function
+ hids_clientCharCfgChangeCb_t cccChangedCbFunc; //!< ccc of report changed callback function
+} hids_callbacks_t;
+
+/** @} end of group Hids_Callbacks */
+
+
+ /** @addtogroup HIDS_Variables Hids Variables
+ * @{
+ */
+
+ /**
+ * @brief External variable for HID service Attribute tables
+ */
+extern attribute_t hid_attrTbl[];
+
+/**
+ * @brief External variable for HID service attribute size
+ */
+extern u16 hid_attrSize;
+
+/**
+ * @brief External variable for HID information
+ */
+extern const u8 hidInformation[];
+
+/** @} end of group HIDS_Variables */
+
+
+/** @addtogroup HIDS_Functions Hids APIs
+ * @{
+ */
+
+/**
+ * @brief API to add HID service to gatt.
+ *
+ * @param[in] hidsCb - The callback function of HID service
+ *
+ * @return Status
+ */
+ble_sts_t hids_addService(hids_callbacks_t* hidsCb);
+
+ble_sts_t hids_keyInReport(u16 connHandle, u8* value, u8 len);
+
+ble_sts_t hids_consumerControlInReport(u16 connHandle, u8* value, u8 len);
+
+/** @} end of group HIDS_Functions */
+
+/** @} end of group HIDS_Module */
+
+/** @} end of group SERVICE_MODULE */
+
+/** @} end of group TELINK_BLE_STACK */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/trace.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/trace.h
new file mode 100644
index 0000000000000..b9a97c8894180
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/trace.h
@@ -0,0 +1,94 @@
+/********************************************************************************************************
+ * @file trace.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#ifndef TRACE_H_
+#define TRACE_H_
+
+#define TR_T_irq 0
+#define TR_T_irq_rx 1
+#define TR_T_irq_tx 2
+#define TR_T_irq_sysTimer 3
+
+#define TR_T_irq_cmddone 4
+#define TR_T_irq_rxTmt 5
+#define TR_T_irq_rxFirstTmt 6
+#define TR_T_irq_fsmTmt 7
+
+#define TR_T_irq_rxCrcErr 8
+
+#define TR_T_ll_brx_start 9
+#define TR_T_ll_brx_end 10
+
+#define TR_T_ll_durationInit 11
+#define TR_T_ll_durationUpdate 12
+
+#define TR_T_ll_1stRx 13
+#define TR_T_ll_chn_map 14
+#define TR_T_ll_chn_timing 15
+#define TR_T_ll_scanRsp 16
+#define TR_T_ll_connReq 17
+
+#define TR_T_ll_sync 18
+#define TR_T_ll_adv 19
+
+#define TR_T_ll_stopRf 20
+
+
+#define TR_T_audioTask 24
+#define TR_T_audioData 25
+#define TR_T_adpcm 26
+#define TR_T_adpcm_enc_overflow 27
+
+
+
+#define TR_T_master_irq 30
+#define TR_T_master_rx 31
+#define TR_T_master_tx 32
+#define TR_T_master_sysTimer 33
+#define TR_T_master_connDone 34
+
+#define TR_T_master_adv_report 35
+
+#define TR_T_master_createConn 40
+#define TR_T_master_init 41
+#define TR_T_master_connnect 42
+#define TR_T_master_terminate 43
+#define TR_T_master_btx 44
+#define TR_T_master_scan 45
+
+#define TR_T_master_update 50
+#define TR_T_master_update_req 51
+
+
+
+
+#define TR_24_ll_chn 0
+#define TR_24_ll_duration 1
+
+
+
+#define TR_24_slot_idx 5
+#define TR_24_scan_chn 6
+#define TR_24_master_state 7
+
+
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/stack/ble/uuid.h b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/uuid.h
new file mode 100644
index 0000000000000..6e61603be5809
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/stack/ble/uuid.h
@@ -0,0 +1,123 @@
+/********************************************************************************************************
+ * @file uuid.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+/** @addtogroup GATT_Common_Module GATT UUID
+ * @{
+ */
+
+
+/** @addtogroup GATT_UUID GATT 16 bit UUID definition
+ * @{
+ */
+#define GATT_UUID_PRIMARY_SERVICE 0x2800 //!< Primary Service
+#define GATT_UUID_SECONDARY_SERVICE 0x2801 //!< Secondary Service
+#define GATT_UUID_INCLUDE 0x2802 //!< Include
+#define GATT_UUID_CHARACTER 0x2803 //!< Characteristic
+#define GATT_UUID_CHAR_EXT_PROPS 0x2900 //!< Characteristic Extended Properties
+#define GATT_UUID_CHAR_USER_DESC 0x2901 //!< Characteristic User Description
+#define GATT_UUID_CLIENT_CHAR_CFG 0x2902 //!< Client Characteristic Configuration
+#define GATT_UUID_SERVER_CHAR_CFG 0x2903 //!< Server Characteristic Configuration
+#define GATT_UUID_CHAR_PRESENT_FORMAT 0x2904 //!< Characteristic Present Format
+#define GATT_UUID_CHAR_AGG_FORMAT 0x2905 //!< Characteristic Aggregate Format
+#define GATT_UUID_VALID_RANGE 0x2906 //!< Valid Range
+#define GATT_UUID_EXT_REPORT_REF 0x2907 //!< External Report Reference
+#define GATT_UUID_REPORT_REF 0x2908 //!< Report Reference
+
+#define GATT_UUID_DEVICE_NAME 0x2a00 //!< Report Reference
+#define GATT_UUID_APPEARANCE 0x2a01
+#define GATT_UUID_PERI_CONN_PARAM 0x2a04
+#define GATT_UUID_SERVICE_CHANGE 0x2a05
+#define GATT_UUID_BATTERY_LEVEL 0x2A19
+#define GATT_UUID_FIRMWARE_VER 0x2a26 //!
+#include "tl_common.h"
+#include "drivers.h"
+#include "../common/blt_led.h"
+#include "../common/keyboard.h"
+#include "../common/blt_soft_timer.h"
+#include "../common/blt_common.h"
+
+#include "battery_check.h"
+#include "rc_ir.h"
+
+#if(__PROJECT_5316_BLE_REMOTE__ )
+
+
+#define RC_DEEP_SLEEP_EN 1
+#define ADV_IDLE_ENTER_DEEP_TIME 60 //60 s
+#define CONN_IDLE_ENTER_DEEP_TIME 60 //60 s
+
+#define MY_DIRECT_ADV_TMIE 2000000
+
+#define MY_APP_ADV_CHANNEL BLT_ENABLE_ADV_ALL
+
+#define MY_ADV_INTERVAL_MIN ADV_INTERVAL_30MS
+#define MY_ADV_INTERVAL_MAX ADV_INTERVAL_35MS
+
+#define BLE_DEVICE_ADDRESS_TYPE BLE_DEVICE_ADDRESS_PUBLIC
+own_addr_type_t app_own_address_type = OWN_ADDRESS_PUBLIC;
+
+MYFIFO_INIT(blt_rxfifo, 64, 8);
+MYFIFO_INIT(blt_txfifo, 40, 16);
+
+/* ADV Packet, SCAN Response Packet define */
+const u8 tbl_advData[] = {
+ 0x05, 0x09, 'G', 'h', 'i', 'd',
+ 0x02, 0x01, 0x05, // BLE limited discoverable mode and BR/EDR not supported
+ 0x03, 0x19, 0x80, 0x01, // 384, Generic Remote Control, Generic category
+ 0x05, 0x02, 0x12, 0x18, 0x0F, 0x18, // incomplete list of service class UUIDs (0x1812, 0x180F)
+};
+
+const u8 tbl_scanRsp [] = {
+ 0x08, 0x09, 'G', 'R', 'e', 'm', 'o', 't', 'e',
+};
+
+u32 interval_update_tick = 0;
+int device_in_connection_state;
+
+/* LED Management define */
+enum{
+ LED_POWER_ON = 0,
+ LED_AUDIO_ON, //1
+ LED_AUDIO_OFF, //2
+ LED_SHINE_SLOW, //3
+ LED_SHINE_FAST, //4
+ LED_SHINE_OTA, //5
+};
+
+const led_cfg_t led_cfg[] = {
+ {1000, 0, 1, 0x00, }, //power-on, 1s on
+ {100, 0 , 0xff, 0x02, }, //audio on, long on
+ {0, 100 , 0xff, 0x02, }, //audio off, long off
+ {500, 500 , 2, 0x04, }, //1Hz for 3 seconds
+ {250, 250 , 4, 0x04, }, //2Hz for 3 seconds
+ {250, 250 , 200, 0x08, }, //2Hz for 50 seconds
+};
+
+u32 advertise_begin_tick;
+
+
+unsigned int lowBattDet_tick = 0;
+
+int ui_mtu_size_exchange_req = 0;
+
+u8 key_type;
+u8 user_key_mode;
+
+u8 key_buf[8] = {0};
+
+int key_not_released;
+
+int ir_not_released;
+
+u32 latest_user_event_tick;
+
+u8 user_task_flg;
+u8 sendTerminate_before_enterDeep = 0;
+u8 ota_is_working = 0;
+
+/* User Consumer Key Map */
+static u16 vk_consumer_map[16] = {
+ MKEY_VOL_UP,
+ MKEY_VOL_DN,
+ MKEY_MUTE,
+ MKEY_CHN_UP,
+
+ MKEY_CHN_DN,
+ MKEY_POWER,
+ MKEY_AC_SEARCH,
+ MKEY_RECORD,
+
+ MKEY_PLAY,
+ MKEY_PAUSE,
+ MKEY_STOP,
+ MKEY_FAST_FORWARD, //can not find fast_backword in <>
+
+ MKEY_FAST_FORWARD,
+ MKEY_AC_HOME,
+ MKEY_AC_BACK,
+ MKEY_MENU,
+};
+
+#if (STUCK_KEY_PROCESS_ENABLE)
+ u32 stuckKey_keyPressTime;
+#endif
+
+/*----------------------------------------------------------------------------*/
+/*------------- IR Function ----------------*/
+/*----------------------------------------------------------------------------*/
+#if (REMOTE_IR_ENABLE)
+//ir key
+#define TYPE_IR_SEND 1
+#define TYPE_IR_RELEASE 2
+
+///////////////////// key mode //////////////////////
+#define KEY_MODE_BLE 0 //ble key
+#define KEY_MODE_IR 1 //ir key
+
+static const u8 kb_map_ble[] = KB_MAP_BLE; //5*6
+static const u8 kb_map_ir[] = KB_MAP_IR; //5*6
+
+void ir_dispatch(u8 type, u8 syscode ,u8 ircode){
+ if(type == TYPE_IR_SEND){
+ ir_nec_send(syscode,~(syscode),ircode);
+
+ }
+ else if(type == TYPE_IR_RELEASE){
+ ir_send_release();
+ }
+}
+#endif
+
+
+/*----------------------------------------------------------------------------*/
+/*------------- OTA Function ----------------*/
+/*----------------------------------------------------------------------------*/
+#if (BLE_REMOTE_OTA_ENABLE)
+void entry_ota_mode(void)
+{
+ ota_is_working = 1;
+ device_led_setup(led_cfg[LED_SHINE_OTA]);
+ bls_ota_setTimeout(15 * 1000 * 1000); //set OTA timeout 15 seconds
+}
+
+void LED_show_ota_result(int result)
+{
+ #if 0
+ irq_disable();
+ WATCHDOG_DISABLE;
+
+ gpio_set_output_en(GPIO_LED, 1);
+
+ if(result == OTA_SUCCESS){ //OTA success
+ gpio_write(GPIO_LED, 1);
+ sleep_us(2000000); //led on for 2 second
+ gpio_write(GPIO_LED, 0);
+ }
+ else{ //OTA fail
+
+ }
+
+ gpio_set_output_en(GPIO_LED, 0);
+ #endif
+}
+#endif
+
+/*----------------------------------------------------------------------------*/
+/*------------- CallBack function of BLE ----------------*/
+/*----------------------------------------------------------------------------*/
+void app_switch_to_indirect_adv(u8 e, u8 *p, int n)
+{
+
+ bls_ll_setAdvParam( MY_ADV_INTERVAL_MIN, MY_ADV_INTERVAL_MAX,
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, app_own_address_type,
+ 0, NULL,
+ MY_APP_ADV_CHANNEL,
+ ADV_FP_NONE);
+
+ bls_ll_setAdvEnable(1); //must: set adv enable
+}
+
+void ble_remote_terminate(u8 e,u8 *p, int n) //*p is terminate reason
+{
+ device_in_connection_state = 0;
+
+ if(*p == HCI_ERR_CONN_TIMEOUT){
+
+ }else if(*p == HCI_ERR_REMOTE_USER_TERM_CONN){ //0x13
+
+ }else if(*p == HCI_ERR_CONN_TERM_MIC_FAILURE){
+
+ }else{
+
+ }
+
+ #if(BLE_REMOTE_PM_ENABLE)
+ //user has push terminate pkt to ble TX buffer before deepsleep
+ if(sendTerminate_before_enterDeep == 1){
+ sendTerminate_before_enterDeep = 2;
+ }
+ #endif
+
+ advertise_begin_tick = clock_time();
+}
+
+void task_connect (u8 e, u8 *p, int n)
+{
+ bls_l2cap_requestConnParamUpdate (8, 8, 99, 400); //interval=10ms latency=99 timeout=4s
+
+ latest_user_event_tick = clock_time();
+
+ ui_mtu_size_exchange_req = 1;
+
+ device_in_connection_state = 1;//
+
+ interval_update_tick = clock_time() | 1; //none zero
+}
+
+/*----------------------------------------------------------------------------*/
+/*------------- Key Function ----------------*/
+/*----------------------------------------------------------------------------*/
+#if(RC_BTN_ENABLE)
+void deep_wakeup_proc(void)
+{
+#if(DEEPBACK_FAST_KEYSCAN_ENABLE)
+
+ #if(REMOTE_IR_ENABLE)
+ if(KEY_MODE_IR == analog_read(DEEP_ANA_REG1)){
+ return ;
+ }
+ #endif
+ //if deepsleep wakeup is wakeup by GPIO(key press), we must quickly scan this
+ //press, hold this data to the cache, when connection established OK, send to master
+ //deepsleep_wakeup_fast_keyscan
+ if(analog_read(DEEP_ANA_REG0) == CONN_DEEP_FLG){
+ if(kb_scan_key (KB_NUMLOCK_STATUS_POWERON, 1) && kb_event.cnt){
+ deepback_key_state = DEEPBACK_KEY_CACHE;
+ key_not_released = 1;
+ memcpy(&kb_event_cache,&kb_event,sizeof(kb_event));
+ }
+
+ analog_write(DEEP_ANA_REG0, 0);
+ }
+#endif
+}
+
+void deepback_pre_proc(int *det_key)
+{
+#if(DEEPBACK_FAST_KEYSCAN_ENABLE)
+ // to handle deepback key cache
+ if(!(*det_key) && deepback_key_state == DEEPBACK_KEY_CACHE
+ && blc_ll_getCurrentState() == BLS_LINK_STATE_CONN
+ && clock_time_exceed(bls_ll_getConnectionCreateTime(), 25000))
+ {
+ memcpy(&kb_event,&kb_event_cache,sizeof(kb_event));
+ *det_key = 1;
+
+ if(key_not_released || kb_event_cache.keycode[0] == VOICE){ //no need manual release
+ deepback_key_state = DEEPBACK_KEY_IDLE;
+ }
+ else{ //need manual release
+ deepback_key_tick = clock_time();
+ deepback_key_state = DEEPBACK_KEY_WAIT_RELEASE;
+ }
+ }
+#endif
+}
+
+void deepback_post_proc(void)
+{
+#if(DEEPBACK_FAST_KEYSCAN_ENABLE)
+ //manual key release
+ if(deepback_key_state == DEEPBACK_KEY_WAIT_RELEASE && clock_time_exceed(deepback_key_tick,150000)){
+ key_not_released = 0;
+
+ key_buf[2] = 0;
+ bls_att_pushNotifyData (HID_NORMAL_KB_REPORT_INPUT_DP_H, key_buf, 8); //release
+ deepback_key_state = DEEPBACK_KEY_IDLE;
+ }
+#endif
+}
+
+void key_change_proc(void)
+{
+ latest_user_event_tick = clock_time(); //record latest key change time
+
+ u8 key0 = kb_event.keycode[0];
+ //u8 key1 = kb_event.keycode[1];
+ u8 key_value;
+
+ key_not_released = 1;
+ if (kb_event.cnt == 2) //two key press, do not process
+ {
+
+ }
+ else if(kb_event.cnt == 1)
+ {
+ if(key0 == KEY_MODE_SWITCH)
+ {
+ user_key_mode = !user_key_mode;
+ device_led_setup(led_cfg[LED_SHINE_SLOW + user_key_mode]);
+ }
+
+ #if(REMOTE_IR_ENABLE)
+ else if(user_key_mode == KEY_MODE_BLE)
+ {
+ key_value = kb_map_ble[key0];
+ if(key_value >= 0xf0 ){
+ key_type = CONSUMER_KEY;
+ u16 consumer_key = vk_consumer_map[key_value & 0x0f];
+ bls_att_pushNotifyData (HID_CONSUME_REPORT_INPUT_DP_H, (u8 *)&consumer_key, 2);
+ }
+ else
+ {
+ key_type = KEYBOARD_KEY;
+ key_buf[2] = key_value;
+ bls_att_pushNotifyData (HID_NORMAL_KB_REPORT_INPUT_DP_H, key_buf, 8);
+ }
+
+ }
+ else if(user_key_mode == KEY_MODE_IR)
+ { //IR mode
+ key_value = kb_map_ir[key0];
+ key_type = IR_KEY;
+ if(!ir_not_released){
+ ir_dispatch(TYPE_IR_SEND, 0x88, key_value);
+ ir_not_released = 1;
+ }
+ }
+ else
+ {
+ key_type = IDLE_KEY;
+ }
+ #else
+ else
+ {
+ key_value = key0;
+ if(key_value >= 0xf0 ){
+ key_type = CONSUMER_KEY;
+ u16 consumer_key = vk_consumer_map[key_value & 0x0f];
+ bls_att_pushNotifyData (HID_CONSUME_REPORT_INPUT_DP_H, (u8 *)&consumer_key, 2);
+ }
+ else
+ {
+ key_type = KEYBOARD_KEY;
+ key_buf[2] = key_value;
+ bls_att_pushNotifyData (HID_NORMAL_KB_REPORT_INPUT_DP_H, key_buf, 8);
+ }
+ }
+ #endif
+ }
+ else //kb_event.cnt == 0, key release
+ {
+ key_not_released = 0;
+
+ if(key_type == CONSUMER_KEY)
+ {
+ u16 consumer_key = 0;
+ bls_att_pushNotifyData (HID_CONSUME_REPORT_INPUT_DP_H, (u8 *)&consumer_key, 2);
+ }
+ else if(key_type == KEYBOARD_KEY)
+ {
+ key_buf[2] = 0;
+ bls_att_pushNotifyData (HID_NORMAL_KB_REPORT_INPUT_DP_H, key_buf, 8); //release
+ }
+ #if(REMOTE_IR_ENABLE)
+ else if(key_type == IR_KEY)
+ {
+ if(ir_not_released){
+ ir_not_released = 0;
+ ir_dispatch(TYPE_IR_RELEASE, 0, 0); //release
+ }
+ }
+ #endif
+ }
+}
+
+#define GPIO_WAKEUP_KEYPROC_CNT 3
+
+void proc_keyboard (u8 e, u8 *p, int n)
+{
+ static int gpioWakeup_keyProc_cnt = 0;
+ static u32 keyScanTick = 0;
+
+ //when key press gpio wakeup suspend, proc keyscan at least GPIO_WAKEUP_KEYPROC_CNT times
+ //regardless of 8000 us interval
+ if(e == BLT_EV_FLAG_GPIO_EARLY_WAKEUP){
+ gpioWakeup_keyProc_cnt = GPIO_WAKEUP_KEYPROC_CNT;
+ }
+ else if(gpioWakeup_keyProc_cnt){
+ gpioWakeup_keyProc_cnt --;
+ }
+
+ if(gpioWakeup_keyProc_cnt || clock_time_exceed(keyScanTick, 8000)){
+ keyScanTick = clock_time();
+ }
+ else{
+ return;
+ }
+
+ kb_event.keycode[0] = 0;
+ int det_key = kb_scan_key (0, 1);
+
+ #if(DEEPBACK_FAST_KEYSCAN_ENABLE)
+ if(deepback_key_state != DEEPBACK_KEY_IDLE){
+ deepback_pre_proc(&det_key);
+ }
+ #endif
+
+ if (det_key){
+ key_change_proc();
+ }
+
+
+ #if(DEEPBACK_FAST_KEYSCAN_ENABLE)
+ if(deepback_key_state != DEEPBACK_KEY_IDLE){
+ deepback_post_proc();
+ }
+ #endif
+}
+#endif
+
+extern u32 scan_pin_need;
+//_attribute_ram_code_
+void blt_pm_proc(void)
+{
+#if(BLE_REMOTE_PM_ENABLE)
+ #if(REMOTE_IR_ENABLE)
+ if( ir_send_ctrl.is_sending)
+ {
+ bls_pm_setSuspendMask(SUSPEND_DISABLE);
+ }
+ else
+ #endif
+ {
+ bls_pm_setSuspendMask (SUSPEND_ADV | SUSPEND_CONN);
+
+ #if(RC_BTN_ENABLE)
+ user_task_flg = ota_is_working || scan_pin_need || key_not_released || DEVICE_LED_BUSY;
+
+ if(user_task_flg){
+ #if (LONG_PRESS_KEY_POWER_OPTIMIZE)
+ extern int key_matrix_same_as_last_cnt;
+ if(!ota_is_working && key_matrix_same_as_last_cnt > 5){ //key matrix stable can optize
+ bls_pm_setManualLatency(3);
+ }
+ else{
+ bls_pm_setManualLatency(0); //latency off: 0
+ }
+ #else
+ bls_pm_setManualLatency(0);
+ #endif
+ }
+ #endif
+
+ #if(RC_DEEP_SLEEP_EN) //deepsleep
+ if(sendTerminate_before_enterDeep == 1){ //sending Terminate and wait for ack before enter deepsleep
+ if(user_task_flg){ //detect key Press again, can not enter deep now
+ sendTerminate_before_enterDeep = 0;
+ bls_ll_setAdvEnable(1); //enable adv again
+ }
+ }
+ else if(sendTerminate_before_enterDeep == 2){ //Terminate OK
+ analog_write(DEEP_ANA_REG0, CONN_DEEP_FLG);
+
+ #if (REMOTE_IR_ENABLE)
+ analog_write(DEEP_ANA_REG1, user_key_mode);
+ #endif
+ cpu_sleep_wakeup(DEEPSLEEP_MODE, PM_WAKEUP_PAD, 0); //deepsleep
+ }
+
+ //adv 60s, deepsleep
+ if( blc_ll_getCurrentState() == BLS_LINK_STATE_ADV && !sendTerminate_before_enterDeep && \
+ clock_time_exceed(advertise_begin_tick , ADV_IDLE_ENTER_DEEP_TIME * 1000000))
+ {
+
+ #if (REMOTE_IR_ENABLE)
+ analog_write(DEEP_ANA_REG1, user_key_mode);
+ #endif
+ cpu_sleep_wakeup(DEEPSLEEP_MODE, PM_WAKEUP_PAD, 0); //deepsleep
+ }
+ //conn 60s no event(key/voice/led), enter deepsleep
+ else if( device_in_connection_state && !user_task_flg && \
+ clock_time_exceed(latest_user_event_tick, CONN_IDLE_ENTER_DEEP_TIME * 1000000) )
+ {
+
+ bls_ll_terminateConnection(HCI_ERR_REMOTE_USER_TERM_CONN); //push terminate cmd into ble TX buffer
+ bls_ll_setAdvEnable(0); //disable adv
+ sendTerminate_before_enterDeep = 1;
+ }
+ #endif
+ }
+#endif //END of BLE_REMOTE_PM_ENABLE
+}
+
+
+void ble_remote_set_sleep_wakeup(u8 e, u8 *p, int n)
+{ //3995*16 sys_tick_per_us
+ if( blc_ll_getCurrentState() == BLS_LINK_STATE_CONN
+ && ((u32)(bls_pm_getSystemWakeupTick() - clock_time())) > 80 *CLOCK_16M_SYS_TIMER_CLK_1MS ){ //suspend time > 30ms.add gpio wakeup
+ bls_pm_setWakeupSource(PM_WAKEUP_CORE); //gpio CORE wakeup suspend
+ }
+}
+
+
+/////////////////////////////////////////////////
+/////////////////////////////////////////////////
+#if (BLT_TEST_SOFT_TIMER_ENABLE)
+
+int gpio_test0(void)
+{
+ //gpio 0 toggle to see the effect
+ DBG_CHN0_TOGGLE;
+
+ return 0;
+}
+
+static u8 timer_change_flg = 0;
+int gpio_test1(void)
+{
+ //gpio 1 toggle to see the effect
+ DBG_CHN1_TOGGLE;
+
+
+ timer_change_flg = !timer_change_flg;
+ if(timer_change_flg){
+ return 7000;
+ }
+ else{
+ return 17000;
+ }
+
+}
+
+int gpio_test2(void)
+{
+ //gpio 2 toggle to see the effect
+ DBG_CHN2_TOGGLE;
+
+ //timer last for 5 second
+ if(clock_time_exceed(0, 5000000)){
+ return -1;
+ //blt_soft_timer_delete(&gpio_test2);
+ }
+ else{
+
+ }
+
+ return 0;
+}
+
+int gpio_test3(void)
+{
+ //gpio 3 toggle to see the effect
+ DBG_CHN3_TOGGLE;
+
+ return 0;
+}
+
+#endif
+//////////////////////////////////////////////////////
+
+
+void user_init()
+{
+
+
+ /***********************************************************************************
+ * Keyboard matrix initialization. These section must be before battery_power_check.
+ * Because when low battery,chip will entry deep.if placed after battery_power_check,
+ * it is possible that can not wake up chip.
+ * *******************************************************************************/
+ #if(RC_BTN_ENABLE)
+ u32 pin[] = KB_DRIVE_PINS;
+ for(int i=0; i<(sizeof (pin)/sizeof(*pin)); i++)
+ {
+ gpio_set_wakeup(pin[i],1,1); //drive pin core(gpio) high wakeup suspend
+ cpu_set_gpio_wakeup (pin[i],1,1); //drive pin pad high wakeup deepsleep
+ }
+
+ bls_app_registerEventCallback (BLT_EV_FLAG_GPIO_EARLY_WAKEUP, &proc_keyboard);
+ #endif
+
+ /*****************************************************************************************
+ Note: battery check must do before any flash write/erase operation, cause flash write/erase
+ under a low or unstable power supply will lead to error flash operation
+
+ Some module initialization may involve flash write/erase, include: OTA initialization,
+ SMP initialization, ..
+ So these initialization must be done after battery check
+ *****************************************************************************************/
+ #if(BATT_CHECK_ENABLE)
+ if(analog_read(DEEP_ANA_REG2) == BATTERY_VOL_LOW){
+ battery_power_check(BATTERY_VOL_MIN + 200);//2.2V
+ }
+ else{
+ battery_power_check(BATTERY_VOL_MIN);//2.0 V
+ }
+ #endif
+
+ /*-- BLE stack initialization --------------------------------------------*/
+ u8 mac_public[6];
+ u8 mac_random_static[6];
+ blc_initMacAddress(CFG_ADR_MAC, mac_public, mac_random_static);
+
+ #if(BLE_DEVICE_ADDRESS_TYPE == BLE_DEVICE_ADDRESS_PUBLIC)
+ app_own_address_type = OWN_ADDRESS_PUBLIC;
+ #elif(BLE_DEVICE_ADDRESS_TYPE == BLE_DEVICE_ADDRESS_RANDOM_STATIC)
+ app_own_address_type = OWN_ADDRESS_RANDOM;
+ blc_ll_setRandomAddr(mac_random_static);
+ #endif
+
+ /*-- BLE Controller initialization ---------------------------------------*/
+ blc_ll_initBasicMCU(mac_public);//mandatory
+ blc_ll_initAdvertising_module(mac_public);//adv module: mandatory for BLE slave,
+ blc_ll_initSlaveRole_module();//slave module: mandatory for BLE slave,
+
+ //blc_ll_init2MPhy_feature();//Debug
+
+ /*-- BLE Host initialization ---------------------------------------------*/
+ extern void my_att_init(void);
+ //GATT initialization
+ my_att_init();
+ //L2CAP initialization
+ blc_l2cap_register_handler(blc_l2cap_packet_receive);
+
+ /*-- BLE SMP initialization ----------------------------------------------*/
+ #if(BLE_REMOTE_SECURITY_ENABLE)
+ blc_smp_param_setBondingDeviceMaxNumber(4); //default is SMP_BONDING_DEVICE_MAX_NUM, can not bigger that this value
+ //and this func must call before bls_smp_enableParing
+ bls_smp_enableParing (SMP_PARING_CONN_TRRIGER );
+ //blc_smp_enableScFlag (1); //support smp4.2
+ //blc_smp_setEcdhDebugMode(1); //if support smp4.2, use ecdh-debug mode
+ #else
+ bls_smp_enableParing (SMP_PARING_DISABLE_TRRIGER );
+ #endif
+
+ //HID_service_on_android7p0_init(); //hid device on android 7.0/7.1
+
+ /*-- USER application initialization -------------------------------------*/
+ bls_ll_setAdvData( (u8 *)tbl_advData, sizeof(tbl_advData) );
+ bls_ll_setScanRspData( (u8 *)tbl_scanRsp, sizeof(tbl_scanRsp));
+
+
+ /* Configure ADV packet */
+ #if(BLE_REMOTE_SECURITY_ENABLE)
+ //get bonded device number
+ u8 bond_number = blc_smp_param_getCurrentBondingDeviceNumber();
+ smp_param_save_t bondInfo;
+ if(bond_number) //at least 1 bonding device exist
+ {
+ //get the latest bonding device (index: bond_number-1 )
+ blc_smp_param_loadByIndex( bond_number - 1, &bondInfo);
+ }
+
+ if(bond_number)//set direct adv
+ {
+ //set direct adv
+ u8 status = bls_ll_setAdvParam( MY_ADV_INTERVAL_MIN, MY_ADV_INTERVAL_MAX,
+ ADV_TYPE_CONNECTABLE_DIRECTED_LOW_DUTY, app_own_address_type,
+ bondInfo.peer_addr_type, bondInfo.peer_addr,
+ MY_APP_ADV_CHANNEL,
+ ADV_FP_NONE);
+ //debug: ADV setting err
+ if(status != BLE_SUCCESS) { write_reg8(0x8000, 0x11); while(1); }
+
+ //it is recommended that direct adv only last for several seconds, then switch to indirect adv
+ bls_ll_setAdvDuration(MY_DIRECT_ADV_TMIE, 1);
+ bls_app_registerEventCallback (BLT_EV_FLAG_ADV_DURATION_TIMEOUT, &app_switch_to_indirect_adv);
+ }
+ else//set indirect ADV
+ #endif
+ {
+ u8 status = bls_ll_setAdvParam( MY_ADV_INTERVAL_MIN, MY_ADV_INTERVAL_MAX,
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, app_own_address_type,
+ 0, NULL,
+ MY_APP_ADV_CHANNEL,
+ ADV_FP_NONE);
+ //debug: ADV setting err
+ if(status != BLE_SUCCESS) { write_reg8(0x8000, 0x11); while(1); }
+ }
+
+ bls_ll_setAdvEnable(1); //adv enable
+ rf_set_power_level_index(RF_POWER_7P9dBm);//OK
+
+ //ble event call back
+ bls_app_registerEventCallback(BLT_EV_FLAG_CONNECT, &task_connect);
+ bls_app_registerEventCallback(BLT_EV_FLAG_TERMINATE, &ble_remote_terminate);
+
+ /* Power Management initialization */
+ #if(BLE_REMOTE_PM_ENABLE)
+ //pm_32kRcTrackDelayEnable(1000, 1);
+ blc_ll_initPowerManagement_module(); //pm module: optional
+ bls_pm_setSuspendMask(SUSPEND_ADV | SUSPEND_CONN);
+ bls_app_registerEventCallback(BLT_EV_FLAG_SUSPEND_ENTER, &ble_remote_set_sleep_wakeup);
+ #else
+ bls_pm_setSuspendMask(SUSPEND_DISABLE);
+ #endif
+
+ /* IR Function initialization */
+ #if(REMOTE_IR_ENABLE)
+ user_key_mode = analog_read(DEEP_ANA_REG1);
+ analog_write(DEEP_ANA_REG1, 0x00);
+ rc_ir_init();
+ #endif
+
+ /* OTA Function Initialization */
+ #if(BLE_REMOTE_OTA_ENABLE)
+ bls_ota_clearNewFwDataArea(); //must
+ bls_ota_registerStartCmdCb(entry_ota_mode);
+ bls_ota_registerResultIndicateCb(LED_show_ota_result);
+ #endif
+
+ /* LED Indicator Initialization */
+ #if(BLT_APP_LED_ENABLE)
+ device_led_init(GPIO_LED, 1);
+ #endif
+
+ #if(BLT_TEST_SOFT_TIMER_ENABLE)
+ blt_soft_timer_init();
+ blt_soft_timer_add(&gpio_test0, 23000);//23ms
+ blt_soft_timer_add(&gpio_test1, 7000); //7ms <-> 17ms
+ blt_soft_timer_add(&gpio_test2, 13000);//13ms
+ blt_soft_timer_add(&gpio_test3, 27000);//27ms
+ #endif
+
+ advertise_begin_tick = clock_time();
+}
+
+/*----------------------------------------------------------------------------*/
+/*--------- Main Loop ------------*/
+/*----------------------------------------------------------------------------*/
+u32 tick_loop;
+void main_loop (void)
+{
+ tick_loop ++;
+
+ /* BLE entry -------------------------------------------------------------*/
+ blt_sdk_main_loop();
+
+ /* UI entry --------------------------------------------------------------*/
+ #if(BATT_CHECK_ENABLE)
+ if(clock_time_exceed(lowBattDet_tick, 500*1000)){
+ lowBattDet_tick = clock_time();
+ battery_power_check(BATTERY_VOL_MIN);
+ }
+ #endif
+
+ #if(BLT_TEST_SOFT_TIMER_ENABLE)
+ blt_soft_timer_process(MAINLOOP_ENTRY);
+ #endif
+
+ #if(RC_BTN_ENABLE)
+ proc_keyboard(0, 0, 0);
+ #endif
+
+ #if(BLT_APP_LED_ENABLE)
+ device_led_process();
+ #endif
+
+ /*-- Power Management -------------------------------------------------------*/
+ blt_pm_proc();
+}
+#endif //end of__PROJECT_5316_BLE_REMOTE__
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/app.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/app.h
new file mode 100644
index 0000000000000..9133de78eb186
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/app.h
@@ -0,0 +1,34 @@
+/********************************************************************************************************
+ * @file app.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef _APP_H
+#define _APP_H
+
+#include "drivers.h"
+
+/* Audio Operation Function ------------------------------------------------- */
+
+extern void deep_wakeup_proc(void);
+
+extern void user_init();
+extern void main_loop (void);
+
+#endif /* APP_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/app_att.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/app_att.c
new file mode 100644
index 0000000000000..078b615b77405
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/app_att.c
@@ -0,0 +1,438 @@
+/********************************************************************************************************
+ * @file app_att.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#include "tl_common.h"
+#include
+
+
+#if (__PROJECT_5316_BLE_REMOTE__)
+
+typedef struct
+{
+ /** Minimum value for the connection event (interval. 0x0006 - 0x0C80 * 1.25 ms) */
+ u16 intervalMin;
+ /** Maximum value for the connection event (interval. 0x0006 - 0x0C80 * 1.25 ms) */
+ u16 intervalMax;
+ /** Number of LL latency connection events (0x0000 - 0x03e8) */
+ u16 latency;
+ /** Connection Timeout (0x000A - 0x0C80 * 10 ms) */
+ u16 timeout;
+} gap_periConnectParams_t;
+
+const u16 clientCharacterCfgUUID = GATT_UUID_CLIENT_CHAR_CFG;
+
+const u16 extReportRefUUID = GATT_UUID_EXT_REPORT_REF;
+
+const u16 reportRefUUID = GATT_UUID_REPORT_REF;
+
+const u16 characterPresentFormatUUID = GATT_UUID_CHAR_PRESENT_FORMAT;
+
+const u16 my_primaryServiceUUID = GATT_UUID_PRIMARY_SERVICE;
+
+static const u16 my_characterUUID = GATT_UUID_CHARACTER;
+
+const u16 my_devServiceUUID = SERVICE_UUID_DEVICE_INFORMATION;
+
+const u16 my_PnPUUID = CHARACTERISTIC_UUID_PNP_ID;
+
+const u16 my_devNameUUID = GATT_UUID_DEVICE_NAME;
+
+//device information
+const u16 my_gapServiceUUID = SERVICE_UUID_GENERIC_ACCESS;
+// Appearance Characteristic Properties
+const u16 my_appearanceUIID = 0x2a01;
+const u16 my_periConnParamUUID = 0x2a04;
+u16 my_appearance = GAP_APPEARE_UNKNOWN;
+gap_periConnectParams_t my_periConnParameters = {20, 40, 0, 1000};
+
+
+const u16 my_gattServiceUUID = SERVICE_UUID_GENERIC_ATTRIBUTE;
+const u16 serviceChangeUIID = GATT_UUID_SERVICE_CHANGE;
+u16 serviceChangeVal[2] = {0};
+static u8 serviceChangeCCC[2]={0,0};
+
+
+
+
+const u8 my_devName[] = {'G','R','e','m','o','t','e'};
+
+
+
+const u8 my_PnPtrs [] = {0x02, 0x8a, 0x24, 0x66, 0x82, 0x01, 0x00};
+
+//////////////////////// Battery /////////////////////////////////////////////////
+const u16 my_batServiceUUID = SERVICE_UUID_BATTERY;
+const u16 my_batCharUUID = CHARACTERISTIC_UUID_BATTERY_LEVEL;
+static u8 batteryValueInCCC[2];
+u8 my_batVal[1] = {99};
+
+//////////////////////// HID /////////////////////////////////////////////////////
+
+const u16 my_hidServiceUUID = SERVICE_UUID_HUMAN_INTERFACE_DEVICE;
+
+const u16 hidServiceUUID = SERVICE_UUID_HUMAN_INTERFACE_DEVICE;
+const u16 hidProtocolModeUUID = CHARACTERISTIC_UUID_HID_PROTOCOL_MODE;
+const u16 hidReportUUID = CHARACTERISTIC_UUID_HID_REPORT;
+const u16 hidReportMapUUID = CHARACTERISTIC_UUID_HID_REPORT_MAP;
+const u16 hidbootKeyInReportUUID = CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT;
+const u16 hidbootKeyOutReportUUID = CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT;
+const u16 hidbootMouseInReportUUID = CHARACTERISTIC_UUID_HID_BOOT_MOUSE_INPUT;
+const u16 hidinformationUUID = CHARACTERISTIC_UUID_HID_INFORMATION;
+const u16 hidCtrlPointUUID = CHARACTERISTIC_UUID_HID_CONTROL_POINT;
+const u16 hidIncludeUUID = GATT_UUID_INCLUDE;
+
+u8 protocolMode = DFLT_HID_PROTOCOL_MODE;
+
+
+// Key in Report characteristic variables
+u8 reportKeyIn[8];
+u8 reportKeyInCCC[2];
+// HID Report Reference characteristic descriptor, key input
+static u8 reportRefKeyIn[2] =
+ { HID_REPORT_ID_KEYBOARD_INPUT, HID_REPORT_TYPE_INPUT };
+
+// Key out Report characteristic variables
+u8 reportKeyOut[1];
+u8 reportKeyOutCCC[2];
+static u8 reportRefKeyOut[2] =
+ { HID_REPORT_ID_KEYBOARD_INPUT, HID_REPORT_TYPE_OUTPUT };
+
+// Consumer Control input Report
+static u8 reportConsumerControlIn[2];
+static u8 reportConsumerControlInCCC[2];
+static u8 reportRefConsumerControlIn[2] = { HID_REPORT_ID_CONSUME_CONTROL_INPUT, HID_REPORT_TYPE_INPUT };
+
+
+
+// Boot Keyboard Input Report
+static u8 bootKeyInReport;
+static u8 bootKeyInReportCCC[2];
+
+// Boot Keyboard Output Report
+static u8 bootKeyOutReport;
+
+
+// HID Information characteristic
+const u8 hidInformation[] =
+{
+ U16_LO(0x0111), U16_HI(0x0111), // bcdHID (USB HID version)
+ 0x00, // bCountryCode
+ 0x01 // Flags
+};
+
+// HID Control Point characteristic
+static u8 controlPoint;
+
+// HID Report Map characteristic
+// Keyboard report descriptor (using format for Boot interface descriptor)
+
+static const u8 reportMap[] =
+{
+ //keyboard report in
+ 0x05, 0x01, // Usage Pg (Generic Desktop)
+ 0x09, 0x06, // Usage (Keyboard)
+ 0xA1, 0x01, // Collection: (Application)
+ 0x85, HID_REPORT_ID_KEYBOARD_INPUT, // Report Id (keyboard)
+ //
+ 0x05, 0x07, // Usage Pg (Key Codes)
+ 0x19, 0xE0, // Usage Min (224) VK_CTRL:0xe0
+ 0x29, 0xE7, // Usage Max (231) VK_RWIN:0xe7
+ 0x15, 0x00, // Log Min (0)
+ 0x25, 0x01, // Log Max (1)
+ //
+ // Modifier byte
+ 0x75, 0x01, // Report Size (1) 1 bit * 8
+ 0x95, 0x08, // Report Count (8)
+ 0x81, 0x02, // Input: (Data, Variable, Absolute)
+ //
+ // Reserved byte
+ 0x95, 0x01, // Report Count (1)
+ 0x75, 0x08, // Report Size (8)
+ 0x81, 0x01, // Input: (Constant)
+
+ //keyboard output
+ //5 bit led ctrl: NumLock CapsLock ScrollLock Compose kana
+ 0x95, 0x05, //Report Count (5)
+ 0x75, 0x01, //Report Size (1)
+ 0x05, 0x08, //Usage Pg (LEDs )
+ 0x19, 0x01, //Usage Min
+ 0x29, 0x05, //Usage Max
+ 0x91, 0x02, //Output (Data, Variable, Absolute)
+ //3 bit reserved
+ 0x95, 0x01, //Report Count (1)
+ 0x75, 0x03, //Report Size (3)
+ 0x91, 0x01, //Output (Constant)
+
+ // Key arrays (6 bytes)
+ 0x95, 0x06, // Report Count (6)
+ 0x75, 0x08, // Report Size (8)
+ 0x15, 0x00, // Log Min (0)
+ 0x25, 0xF1, // Log Max (241)
+ 0x05, 0x07, // Usage Pg (Key Codes)
+ 0x19, 0x00, // Usage Min (0)
+ 0x29, 0xf1, // Usage Max (241)
+ 0x81, 0x00, // Input: (Data, Array)
+
+ 0xC0, // End Collection
+
+
+
+
+ //consumer report in
+ 0x05, 0x0C, // Usage Page (Consumer)
+ 0x09, 0x01, // Usage (Consumer Control)
+ 0xA1, 0x01, // Collection (Application)
+ 0x85, HID_REPORT_ID_CONSUME_CONTROL_INPUT, // Report Id
+ 0x75,0x10, //global, report size 16 bits
+ 0x95,0x01, //global, report count 1
+ 0x15,0x01, //global, min 0x01
+ 0x26,0x8c,0x02, //global, max 0x28c
+ 0x19,0x01, //local, min 0x01
+ 0x2a,0x8c,0x02, //local, max 0x28c
+ 0x81,0x00, //main, input data varible, absolute
+ 0xc0, //main, end collection
+
+};
+
+// HID External Report Reference Descriptor for report map
+static u16 extServiceUUID;
+
+
+/////////////////////////////////////////////////////////
+const u8 my_OtaUUID[16] = TELINK_SPP_DATA_OTA;
+const u8 my_OtaServiceUUID[16] = TELINK_OTA_UUID_SERVICE;
+const u16 userdesc_UUID = GATT_UUID_CHAR_USER_DESC;
+
+
+u8 my_OtaData = 0x00;
+
+const u8 my_OtaName[] = {'O', 'T', 'A'};
+
+
+// Include attribute (Battery service)
+static u16 include[3] = {BATT_PS_H, BATT_LEVEL_INPUT_CCB_H, SERVICE_UUID_BATTERY};
+
+
+
+
+static const u8 my_devNameCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(GenericAccess_DeviceName_DP_H), U16_HI(GenericAccess_DeviceName_DP_H),
+ U16_LO(GATT_UUID_DEVICE_NAME), U16_HI(GATT_UUID_DEVICE_NAME)
+};
+static const u8 my_appearanceCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(GenericAccess_Appearance_DP_H), U16_HI(GenericAccess_Appearance_DP_H),
+ U16_LO(GATT_UUID_APPEARANCE), U16_HI(GATT_UUID_APPEARANCE)
+};
+static const u8 my_periConnParamCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(CONN_PARAM_DP_H), U16_HI(CONN_PARAM_DP_H),
+ U16_LO(GATT_UUID_PERI_CONN_PARAM), U16_HI(GATT_UUID_PERI_CONN_PARAM)
+};
+
+
+//// GATT attribute values
+static const u8 my_serviceChangeCharVal[5] = {
+ CHAR_PROP_INDICATE,
+ U16_LO(GenericAttribute_ServiceChanged_DP_H), U16_HI(GenericAttribute_ServiceChanged_DP_H),
+ U16_LO(GATT_UUID_SERVICE_CHANGE), U16_HI(GATT_UUID_SERVICE_CHANGE)
+};
+
+
+//// device Information attribute values
+static const u8 my_PnCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(DeviceInformation_pnpID_DP_H), U16_HI(DeviceInformation_pnpID_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_PNP_ID), U16_HI(CHARACTERISTIC_UUID_PNP_ID)
+};
+
+
+//// HID attribute values
+static const u8 my_hidProtocolModeCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_PROTOCOL_MODE_DP_H), U16_HI(HID_PROTOCOL_MODE_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_PROTOCOL_MODE), U16_HI(CHARACTERISTIC_UUID_HID_PROTOCOL_MODE)
+};
+static const u8 my_hidbootKeyInReporCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(HID_BOOT_KB_REPORT_INPUT_DP_H), U16_HI(HID_BOOT_KB_REPORT_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT), U16_HI(CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT)
+};
+static const u8 my_hidbootKeyOutReporCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_BOOT_KB_REPORT_OUTPUT_DP_H), U16_HI(HID_BOOT_KB_REPORT_OUTPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT), U16_HI(CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT)
+};
+static const u8 my_hidReportCCinCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(HID_CONSUME_REPORT_INPUT_DP_H), U16_HI(HID_CONSUME_REPORT_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT), U16_HI(CHARACTERISTIC_UUID_HID_REPORT)
+};
+static const u8 my_hidReportKEYinCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(HID_NORMAL_KB_REPORT_INPUT_DP_H), U16_HI(HID_NORMAL_KB_REPORT_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT), U16_HI(CHARACTERISTIC_UUID_HID_REPORT)
+};
+static const u8 my_hidReportKEYoutCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_NORMAL_KB_REPORT_OUTPUT_DP_H), U16_HI(HID_NORMAL_KB_REPORT_OUTPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT), U16_HI(CHARACTERISTIC_UUID_HID_REPORT)
+};
+static const u8 my_hidReportMapCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(HID_REPORT_MAP_DP_H), U16_HI(HID_REPORT_MAP_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT_MAP), U16_HI(CHARACTERISTIC_UUID_HID_REPORT_MAP)
+};
+static const u8 my_hidinformationCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(HID_INFORMATION_DP_H), U16_HI(HID_INFORMATION_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_INFORMATION), U16_HI(CHARACTERISTIC_UUID_HID_INFORMATION)
+};
+static const u8 my_hidCtrlPointCharVal[5] = {
+ CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_CONTROL_POINT_DP_H), U16_HI(HID_CONTROL_POINT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_CONTROL_POINT), U16_HI(CHARACTERISTIC_UUID_HID_CONTROL_POINT)
+};
+
+
+//// Battery attribute values
+static const u8 my_batCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(BATT_LEVEL_INPUT_DP_H), U16_HI(BATT_LEVEL_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_BATTERY_LEVEL), U16_HI(CHARACTERISTIC_UUID_BATTERY_LEVEL)
+};
+
+
+//// OTA attribute values
+static const u8 my_OtaCharVal[19] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(OTA_CMD_OUT_DP_H), U16_HI(OTA_CMD_OUT_DP_H),
+ TELINK_SPP_DATA_OTA,
+};
+
+
+
+
+
+const attribute_t my_Attributes[] = {
+
+ {ATT_END_H - 1, 0,0,0,0,0}, // total num of attribute
+
+
+ // 0001 - 0007 gap
+ {7,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_gapServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_devNameCharVal),(u8*)(&my_characterUUID), (u8*)(my_devNameCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_devName), (u8*)(&my_devNameUUID), (u8*)(my_devName), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_appearanceCharVal),(u8*)(&my_characterUUID), (u8*)(my_appearanceCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_appearance), (u8*)(&my_appearanceUIID), (u8*)(&my_appearance), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_periConnParamCharVal),(u8*)(&my_characterUUID), (u8*)(my_periConnParamCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_periConnParameters),(u8*)(&my_periConnParamUUID), (u8*)(&my_periConnParameters), 0},
+
+ // 0008 - 000b gatt
+ {4,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_gattServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_serviceChangeCharVal),(u8*)(&my_characterUUID), (u8*)(my_serviceChangeCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (serviceChangeVal), (u8*)(&serviceChangeUIID), (u8*)(&serviceChangeVal), 0},
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof (serviceChangeCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(serviceChangeCCC), 0},
+
+
+ // 000c - 000e device Information Service
+ {3,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_devServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_PnCharVal),(u8*)(&my_characterUUID), (u8*)(my_PnCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_PnPtrs),(u8*)(&my_PnPUUID), (u8*)(my_PnPtrs), 0},
+
+
+ /////////////////////////////////// 4. HID Service /////////////////////////////////////////////////////////
+ // 000f
+ //{27, ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_hidServiceUUID), 0},
+ {HID_CONTROL_POINT_DP_H - HID_PS_H + 1, ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_hidServiceUUID), 0},
+
+ // 0010 include battery service
+ {0,ATT_PERMISSIONS_READ,2,sizeof(include),(u8*)(&hidIncludeUUID), (u8*)(include), 0},
+
+ // 0011 - 0012 protocol mode
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidProtocolModeCharVal), (u8*)(&my_characterUUID), (u8*)(my_hidProtocolModeCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,2, sizeof(protocolMode),(u8*)(&hidProtocolModeUUID), (u8*)(&protocolMode), 0}, //value
+
+ // 0013 - 0015 boot keyboard input report (char-val-client)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidbootKeyInReporCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidbootKeyInReporCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2,sizeof(bootKeyInReport),(u8*)(&hidbootKeyInReportUUID), (u8*)(&bootKeyInReport), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(bootKeyInReportCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(bootKeyInReportCCC), 0}, //value
+
+ // 0016 - 0017 boot keyboard output report (char-val)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidbootKeyOutReporCharVal), (u8*)(&my_characterUUID), (u8*)(my_hidbootKeyOutReporCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,2, sizeof(bootKeyOutReport), (u8*)(&hidbootKeyOutReportUUID), (u8*)(&bootKeyOutReport), 0}, //value
+
+
+ // 0018 - 001b. consume report in: 4 (char-val-client-ref)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportCCinCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportCCinCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2, sizeof(reportConsumerControlIn),(u8*)(&hidReportUUID), (u8*)(reportConsumerControlIn), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR|ATT_PERMISSIONS_AUTHEN_WRITE,2,sizeof(reportConsumerControlInCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(reportConsumerControlInCCC), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportRefConsumerControlIn),(u8*)(&reportRefUUID), (u8*)(reportRefConsumerControlIn), 0}, //value
+
+ // 001c - 001f . keyboard report in : 4 (char-val-client-ref)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportKEYinCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportKEYinCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2, sizeof(reportKeyIn),(u8*)(&hidReportUUID), (u8*)(reportKeyIn), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR|ATT_PERMISSIONS_AUTHEN_WRITE,2,sizeof(reportKeyInCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(reportKeyInCCC), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportRefKeyIn),(u8*)(&reportRefUUID), (u8*)(reportRefKeyIn), 0}, //value
+
+ // 0020 - 0022 . keyboard report out: 3 (char-val-ref)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportKEYoutCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportKEYoutCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportKeyOut),(u8*)(&hidReportUUID), (u8*)(reportKeyOut), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportRefKeyOut),(u8*)(&reportRefUUID), (u8*)(reportRefKeyOut), 0}, //value
+
+
+ // 0023 - 0025 . report map: 3
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportMapCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportMapCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2,sizeof(reportMap),(u8*)(&hidReportMapUUID), (u8*)(reportMap), 0}, //value
+ {0,ATT_PERMISSIONS_READ|ATT_PERMISSIONS_WRITE,2,sizeof(extServiceUUID),(u8*)(&extReportRefUUID), (u8*)(&extServiceUUID), 0}, //value
+
+ // 0026 - 0027 . hid information: 2
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidinformationCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidinformationCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2, sizeof(hidInformation),(u8*)(&hidinformationUUID), (u8*)(hidInformation), 0}, //value
+
+ // 0028 - 0029 . control point: 2
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidCtrlPointCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidCtrlPointCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_WRITE,2, sizeof(controlPoint),(u8*)(&hidCtrlPointUUID), (u8*)(&controlPoint), 0}, //value
+
+ ////////////////////////////////////// Battery Service /////////////////////////////////////////////////////
+ // 002a - 002d
+ {4,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_batServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_batCharVal),(u8*)(&my_characterUUID), (u8*)(my_batCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_batVal),(u8*)(&my_batCharUUID), (u8*)(my_batVal), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(batteryValueInCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(batteryValueInCCC), 0}, //value
+
+ ////////////////////////////////////// OTA /////////////////////////////////////////////////////
+ // 002e - 0031
+ {4,ATT_PERMISSIONS_READ, 2,16,(u8*)(&my_primaryServiceUUID), (u8*)(&my_OtaServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ, 2,sizeof(my_OtaCharVal),(u8*)(&my_characterUUID), (u8*)(my_OtaCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,16,sizeof(my_OtaData),(u8*)(&my_OtaUUID), (&my_OtaData), &otaWrite, &otaRead}, //value
+ {0,ATT_PERMISSIONS_READ, 2,sizeof (my_OtaName),(u8*)(&userdesc_UUID), (u8*)(my_OtaName), 0},
+
+};
+
+void my_att_init(void)
+{
+ bls_att_setAttributeTable ((u8 *)my_Attributes);
+}
+
+#endif //end of __PROJECT_5316_BLE_REMOTE__
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/app_config.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/app_config.h
new file mode 100644
index 0000000000000..ef0ef7e01cc30
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/app_config.h
@@ -0,0 +1,449 @@
+/********************************************************************************************************
+ * @file app_config.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+
+/* Function Select -----------------------------------------------------------*/
+#define BLE_REMOTE_PM_ENABLE 1
+#define BLE_REMOTE_SECURITY_ENABLE 1
+#define BLE_REMOTE_OTA_ENABLE 1
+#define REMOTE_IR_ENABLE 0
+#define BATT_CHECK_ENABLE 1//enable or disable battery voltage detection
+#define RC_BTN_ENABLE 1
+#define BLT_APP_LED_ENABLE 1
+
+/* Firmware check ------------------------------------------------------------*/
+#define FIRMWARES_SIGNATURE_ENABLE 0
+
+/* Select flash size ---------------------------------------------------------*/
+#define FLASH_SIZE_OPTION_128K 0
+#define FLASH_SIZE_OPTION_512K 1
+#define FLASH_SIZE_OPTION FLASH_SIZE_OPTION_512K
+
+/* System clock initialization -----------------------------------------------*/
+#define CLOCK_SYS_CLOCK_HZ 16000000
+enum{
+ CLOCK_SYS_CLOCK_1S = CLOCK_SYS_CLOCK_HZ,
+ CLOCK_SYS_CLOCK_1MS = (CLOCK_SYS_CLOCK_1S / 1000),
+ CLOCK_SYS_CLOCK_1US = (CLOCK_SYS_CLOCK_1S / 1000000),
+};
+
+/* Software timer ------------------------------------------------------------*/
+#define BLT_TEST_SOFT_TIMER_ENABLE 0
+#if (BLT_TEST_SOFT_TIMER_ENABLE)
+ #define BLT_SOFTWARE_TIMER_ENABLE 1
+#endif
+
+
+/* LED -----------------------------------------------------------------------*/
+#define GPIO_LED GPIO_PB0
+
+
+/* Matrix Key Configuration --------------------------------------------------*/
+#define MATRIX_ROW_PULL PM_PIN_PULLDOWN_100K
+#define MATRIX_COL_PULL PM_PIN_PULLUP_10K
+
+#define KB_LINE_HIGH_VALID 0 //dirve pin output 0 when keyscan, scanpin read 0 is valid
+#define DEEPBACK_FAST_KEYSCAN_ENABLE 1 //proc fast scan when deepsleep back trigged by key press, in case key loss
+#define KEYSCAN_IRQ_TRIGGER_MODE 1
+#define LONG_PRESS_KEY_POWER_OPTIMIZE 1 //lower power when pressing key without release
+
+//stuck key
+#define STUCK_KEY_PROCESS_ENABLE 0
+#define STUCK_KEY_ENTERDEEP_TIME 60 //in s
+
+//repeat key
+#define KB_REPEAT_KEY_ENABLE 0
+#define KB_REPEAT_KEY_INTERVAL_MS 200
+#define KB_REPEAT_KEY_NUM 1
+#define KB_MAP_REPEAT {VK_1, }
+
+/* Key type Macro */
+#define IDLE_KEY 0
+#define CONSUMER_KEY 1
+#define KEYBOARD_KEY 2
+#define IR_KEY 3
+
+#define CR_VOL_UP 0xf0 ////
+#define CR_VOL_DN 0xf1
+#define CR_VOL_MUTE 0xf2
+#define CR_CHN_UP 0xf3
+#define CR_CHN_DN 0xf4 ////
+#define CR_POWER 0xf5
+#define CR_SEARCH 0xf6
+#define CR_RECORD 0xf7
+#define CR_PLAY 0xf8 ////
+#define CR_PAUSE 0xf9
+#define CR_STOP 0xfa
+#define CR_FAST_BACKWARD 0xfb
+#define CR_FAST_FORWARD 0xfc ////
+#define CR_HOME 0xfd
+#define CR_BACK 0xfe
+#define CR_MENU 0xff
+
+//special key
+#define VOICE 0xc0
+#define KEY_MODE_SWITCH 0xc1
+#define PHY_TEST 0xc2
+
+
+#define IR_VK_0 0x00
+#define IR_VK_1 0x01
+#define IR_VK_2 0x02
+#define IR_VK_3 0x03
+#define IR_VK_4 0x04
+#define IR_VK_5 0x05
+#define IR_VK_6 0x06
+#define IR_VK_7 0x07
+#define IR_VK_8 0x08
+#define IR_VK_9 0x09
+
+#define IR_POWER 0x12
+#define IR_AUDIO_MUTE 0x0d
+#define IR_NETFLIX 0x0f
+#define IR_BACK 0x0e
+#define IR_VOL_UP 0x0b
+#define IR_VOL_DN 0x0c
+#define IR_NEXT 0x20
+#define IR_PREV 0x21
+#define IR_MENU 0x23
+#define IR_HOME 0x24
+#define IR_OPER_KEY 0x2e
+#define IR_INFO 0x2f
+#define IR_REWIND 0x32
+#define IR_FAST_FOWARD 0x34
+#define IR_PLAY_PAUSE 0x35
+#define IR_GUIDE 0x41
+#define IR_UP 0x45
+#define IR_DN 0x44
+#define IR_LEFT 0x42
+#define IR_RIGHT 0x43
+#define IR_SEL 0x46
+#define IR_RED_KEY 0x6b
+#define IR_GREEN_KEY 0x6c
+#define IR_YELLOW_KEY 0x6d
+#define IR_BLUE_KEY 0x6e
+#define IR_RECORD 0x72
+#define IR_OPTION 0x73
+#define IR_STOP 0x74
+#define IR_SEARCH 0x75
+#define IR_TEXT 0x76
+#define IR_VOICE 0x77
+#define IR_PAUSE 0x78
+
+#define T_VK_CH_UP 0xd0
+#define T_VK_CH_DN 0xd1
+
+
+#if(RC_BTN_ENABLE)
+//5316 hardware: C1T125A5_V1.0
+#if (REMOTE_IR_ENABLE) //with IR key map
+ #define GPIO_IR_CONTROL GPIO_PA0
+
+ #define KB_MAP_NORMAL {\
+ {0, 1, 2, 3, 4}, \
+ {KEY_MODE_SWITCH, 6, 7, 8, 9}, \
+ {10, 11, 12, 13, 14}, \
+ {15, 16, 17, 18, 19}, \
+ {20, 21, 22, 23, 24}, \
+ {25, 26, 27, 28, 29}, }
+
+ #define KB_MAP_BLE {\
+ VK_NONE, VK_UP, VK_ENTER, VK_DOWN, VK_NONE, \
+ KEY_MODE_SWITCH, VK_LEFT, CR_MENU, CR_VOL_MUTE, VK_RIGHT, \
+ VK_POWER , CR_HOME, VK_7, VK_2, CR_BACK, \
+ VK_NONE, CR_VOL_DN, VK_NONE, VK_5, CR_VOL_UP, \
+ VK_NONE, VK_1, VK_0, VK_8, VK_3, \
+ VK_NONE, VK_4, VK_NONE, VK_9, VK_6, }
+
+
+ #define KB_MAP_IR {\
+ VK_NONE, IR_UP, IR_SEL, IR_DN, VK_NONE, \
+ KEY_MODE_SWITCH, IR_LEFT, IR_MENU, VK_NONE, IR_RIGHT, \
+ IR_POWER , IR_HOME, IR_VK_7, IR_VK_2, IR_BACK, \
+ VK_NONE, IR_VOL_DN, VK_NONE, IR_VK_5, IR_VOL_UP, \
+ VK_NONE, IR_VK_1, IR_VK_0, IR_VK_8, IR_VK_3, \
+ VK_NONE, IR_VK_4, VK_NONE, IR_VK_9, IR_VK_6, }
+#else//key map
+ #define KB_MAP_NORMAL {\
+ {VK_NONE, VK_UP, VK_ENTER, VK_DOWN, VK_NONE}, \
+ {KEY_MODE_SWITCH, VK_LEFT, CR_MENU, CR_VOL_MUTE, VK_RIGHT}, \
+ {VK_POWER, CR_HOME, VK_7, VK_2, CR_BACK}, \
+ {VK_NONE, CR_VOL_DN, VK_NONE, VK_5, CR_VOL_UP}, \
+ {VK_NONE, VK_1, VK_0, VK_8, VK_3}, \
+ {VK_NONE, VK_4, VK_NONE, VK_9, VK_6}, }
+#endif //end of REMOTE_IR_ENABLE
+
+#define KB_DRIVE_PINS {GPIO_PA5, GPIO_PA4, GPIO_PA3, GPIO_PA2, GPIO_PA1}
+#define KB_SCAN_PINS {GPIO_PC6, GPIO_PC5, GPIO_PC4, GPIO_PC3, GPIO_PC2, GPIO_PC1}
+
+//drive pin need 100K pulldown
+#define PULL_WAKEUP_SRC_PA5 MATRIX_ROW_PULL
+#define PULL_WAKEUP_SRC_PA4 MATRIX_ROW_PULL
+#define PULL_WAKEUP_SRC_PA3 MATRIX_ROW_PULL
+#define PULL_WAKEUP_SRC_PA2 MATRIX_ROW_PULL
+#define PULL_WAKEUP_SRC_PA1 MATRIX_ROW_PULL
+
+//scan pin need 10K pullup
+#define PULL_WAKEUP_SRC_PC6 MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PC5 MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PC4 MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PC3 MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PC2 MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PC1 MATRIX_COL_PULL
+
+//drive pin open input to read gpio wakeup level
+#define PA5_INPUT_ENABLE 1
+#define PA4_INPUT_ENABLE 1
+#define PA3_INPUT_ENABLE 1
+#define PA2_INPUT_ENABLE 1
+#define PA1_INPUT_ENABLE 1
+
+//scan pin open input to read gpio level
+#define PC6_INPUT_ENABLE 1
+#define PC5_INPUT_ENABLE 1
+#define PC4_INPUT_ENABLE 1
+#define PC3_INPUT_ENABLE 1
+#define PC2_INPUT_ENABLE 1
+#define PC1_INPUT_ENABLE 1
+
+#endif
+
+#define KB_MAP_NUM KB_MAP_NORMAL
+#define KB_MAP_FN KB_MAP_NORMAL
+
+/* WatchDog ------------------------------------------------------------------*/
+#define MODULE_WATCHDOG_ENABLE 0
+#define WATCHDOG_INIT_TIMEOUT 500 //Unit:ms
+
+/* ATT Handle define ---------------------------------------------------------*/
+typedef enum
+{
+ ATT_H_START = 0,
+
+
+ //// Gap ////
+ /**********************************************************************************************/
+ GenericAccess_PS_H, //UUID: 2800, VALUE: uuid 1800
+ GenericAccess_DeviceName_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ GenericAccess_DeviceName_DP_H, //UUID: 2A00, VALUE: device name
+ GenericAccess_Appearance_CD_H, //UUID: 2803, VALUE: Prop: Read
+ GenericAccess_Appearance_DP_H, //UUID: 2A01, VALUE: appearance
+ CONN_PARAM_CD_H, //UUID: 2803, VALUE: Prop: Read
+ CONN_PARAM_DP_H, //UUID: 2A04, VALUE: connParameter
+
+
+ //// gatt ////
+ /**********************************************************************************************/
+ GenericAttribute_PS_H, //UUID: 2800, VALUE: uuid 1801
+ GenericAttribute_ServiceChanged_CD_H, //UUID: 2803, VALUE: Prop: Indicate
+ GenericAttribute_ServiceChanged_DP_H, //UUID: 2A05, VALUE: service change
+ GenericAttribute_ServiceChanged_CCB_H, //UUID: 2902, VALUE: serviceChangeCCC
+
+
+ //// device information ////
+ /**********************************************************************************************/
+ DeviceInformation_PS_H, //UUID: 2800, VALUE: uuid 180A
+ DeviceInformation_pnpID_CD_H, //UUID: 2803, VALUE: Prop: Read
+ DeviceInformation_pnpID_DP_H, //UUID: 2A50, VALUE: PnPtrs
+
+
+ //// HID ////
+ /**********************************************************************************************/
+ HID_PS_H, //UUID: 2800, VALUE: uuid 1812
+
+ //include
+ HID_INCLUDE_H, //UUID: 2802, VALUE: include
+
+ //protocol
+ HID_PROTOCOL_MODE_CD_H, //UUID: 2803, VALUE: Prop: read | write_without_rsp
+ HID_PROTOCOL_MODE_DP_H, //UUID: 2A4E, VALUE: protocolMode
+
+ //boot keyboard input report
+ HID_BOOT_KB_REPORT_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ HID_BOOT_KB_REPORT_INPUT_DP_H, //UUID: 2A22, VALUE: bootKeyInReport
+ HID_BOOT_KB_REPORT_INPUT_CCB_H, //UUID: 2902, VALUE: bootKeyInReportCCC
+
+ //boot keyboard output report
+ HID_BOOT_KB_REPORT_OUTPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | write| write_without_rsp
+ HID_BOOT_KB_REPORT_OUTPUT_DP_H, //UUID: 2A32, VALUE: bootKeyOutReport
+
+ //consume report in
+ HID_CONSUME_REPORT_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ HID_CONSUME_REPORT_INPUT_DP_H, //UUID: 2A4D, VALUE: reportConsumerIn
+ HID_CONSUME_REPORT_INPUT_CCB_H, //UUID: 2902, VALUE: reportConsumerInCCC
+ HID_CONSUME_REPORT_INPUT_REF_H, //UUID: 2908 VALUE: REPORT_ID_CONSUMER, TYPE_INPUT
+
+ //keyboard report in
+ HID_NORMAL_KB_REPORT_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ HID_NORMAL_KB_REPORT_INPUT_DP_H, //UUID: 2A4D, VALUE: reportKeyIn
+ HID_NORMAL_KB_REPORT_INPUT_CCB_H, //UUID: 2902, VALUE: reportKeyInInCCC
+ HID_NORMAL_KB_REPORT_INPUT_REF_H, //UUID: 2908 VALUE: REPORT_ID_KEYBOARD, TYPE_INPUT
+
+ //keyboard report out
+ HID_NORMAL_KB_REPORT_OUTPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | write| write_without_rsp
+ HID_NORMAL_KB_REPORT_OUTPUT_DP_H, //UUID: 2A4D, VALUE: reportKeyOut
+ HID_NORMAL_KB_REPORT_OUTPUT_REF_H, //UUID: 2908 VALUE: REPORT_ID_KEYBOARD, TYPE_OUTPUT
+
+ // report map
+ HID_REPORT_MAP_CD_H, //UUID: 2803, VALUE: Prop: Read
+ HID_REPORT_MAP_DP_H, //UUID: 2A4B, VALUE: reportKeyIn
+ HID_REPORT_MAP_EXT_REF_H, //UUID: 2907 VALUE: extService
+
+ //hid information
+ HID_INFORMATION_CD_H, //UUID: 2803, VALUE: Prop: read
+ HID_INFORMATION_DP_H, //UUID: 2A4A VALUE: hidInformation
+
+ //control point
+ HID_CONTROL_POINT_CD_H, //UUID: 2803, VALUE: Prop: write_without_rsp
+ HID_CONTROL_POINT_DP_H, //UUID: 2A4C VALUE: controlPoint
+
+
+ //// battery service ////
+ /**********************************************************************************************/
+ BATT_PS_H, //UUID: 2800, VALUE: uuid 180f
+ BATT_LEVEL_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ BATT_LEVEL_INPUT_DP_H, //UUID: 2A19 VALUE: batVal
+ BATT_LEVEL_INPUT_CCB_H, //UUID: 2902, VALUE: batValCCC
+
+
+ //// Ota ////
+ /**********************************************************************************************/
+ OTA_PS_H, //UUID: 2800, VALUE: telink ota service uuid
+ OTA_CMD_OUT_CD_H, //UUID: 2803, VALUE: Prop: read | write_without_rsp
+ OTA_CMD_OUT_DP_H, //UUID: telink ota uuid, VALUE: otaData
+ OTA_CMD_OUT_DESC_H, //UUID: 2901, VALUE: otaName
+
+
+
+ ATT_END_H,
+
+}ATT_HANDLE;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+/* Simulate uart debug Interface ---------------------------------------------*/
+#define SIMULATE_UART_EN 0
+#define DEBUG_TX_PIN GPIO_PB4
+#define DEBUG_BAUDRATE (115200)
+
+
+/* Debug Interface -----------------------------------------------------------*/
+#define DEBUG_GPIO_ENABLE 0
+
+#if(DEBUG_GPIO_ENABLE)
+ #define PB2_FUNC AS_GPIO //debug gpio chn0 : PB2
+ #define PB3_FUNC AS_GPIO //debug gpio chn1 : PB3
+ #define PB4_FUNC AS_GPIO //debug gpio chn2 : PB4
+ #define PB5_FUNC AS_GPIO //debug gpio chn3 : PB5
+ #define PA6_FUNC AS_GPIO //debug gpio chn4 : PA6
+
+ #define PB2_INPUT_ENABLE 0
+ #define PB3_INPUT_ENABLE 0
+ #define PB4_INPUT_ENABLE 0
+ #define PB5_INPUT_ENABLE 0
+ #define PA6_INPUT_ENABLE 0
+
+ #define PB2_OUTPUT_ENABLE 1
+ #define PB3_OUTPUT_ENABLE 1
+ #define PB4_OUTPUT_ENABLE 1
+ #define PB5_OUTPUT_ENABLE 1
+ #define PA6_OUTPUT_ENABLE 1
+
+
+ #define DBG_CHN0_LOW ( *(unsigned char *)0x80058b &= (~(1<<2)) )
+ #define DBG_CHN0_HIGH ( *(unsigned char *)0x80058b |= (1<<2) )
+ #define DBG_CHN0_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<2) )
+
+ #define DBG_CHN1_LOW ( *(unsigned char *)0x80058b &= (~(1<<3)) )
+ #define DBG_CHN1_HIGH ( *(unsigned char *)0x80058b |= (1<<3) )
+ #define DBG_CHN1_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<3) )
+
+ #define DBG_CHN2_LOW ( *(unsigned char *)0x80058b &= (~(1<<4)) )
+ #define DBG_CHN2_HIGH ( *(unsigned char *)0x80058b |= (1<<4) )
+ #define DBG_CHN2_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<4) )
+
+ #define DBG_CHN3_LOW ( *(unsigned char *)0x80058b &= (~(1<<5)) )
+ #define DBG_CHN3_HIGH ( *(unsigned char *)0x80058b |= (1<<5) )
+ #define DBG_CHN3_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<5) )
+
+ #define DBG_CHN4_LOW ( *(unsigned char *)0x800583 &= (~(1<<6)) )
+ #define DBG_CHN4_HIGH ( *(unsigned char *)0x800583 |= (1<<6) )
+ #define DBG_CHN4_TOGGLE ( *(unsigned char *)0x800583 ^= (1<<6) )
+#else
+ #define DBG_CHN0_LOW
+ #define DBG_CHN0_HIGH
+ #define DBG_CHN0_TOGGLE
+ #define DBG_CHN1_LOW
+ #define DBG_CHN1_HIGH
+ #define DBG_CHN1_TOGGLE
+ #define DBG_CHN2_LOW
+ #define DBG_CHN2_HIGH
+ #define DBG_CHN2_TOGGLE
+ #define DBG_CHN3_LOW
+ #define DBG_CHN3_HIGH
+ #define DBG_CHN3_TOGGLE
+ #define DBG_CHN4_LOW
+ #define DBG_CHN4_HIGH
+ #define DBG_CHN4_TOGGLE
+ #define DBG_CHN5_LOW
+ #define DBG_CHN5_HIGH
+ #define DBG_CHN5_TOGGLE
+
+#endif //end of DEBUG_GPIO_ENABLE
+
+
+
+
+
+
+
+
+
+
+/////////////////// set default ////////////////
+
+#include "../common/default_config.h"
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/battery_check.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/battery_check.c
new file mode 100644
index 0000000000000..41ee3be64021c
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/battery_check.c
@@ -0,0 +1,154 @@
+/********************************************************************************************************
+ * @file battery_check.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "battery_check.h"
+#include "tl_common.h"
+#include "drivers.h"
+#include "stack/ble/ble.h"
+
+int adc_hw_initialized = 0;
+
+/**
+ * @Brief: Bubble sort.
+ * @Param: pData -> pointer point to data
+ * @Param: len -> lenght of data
+ * @Return: None.
+ */
+void bubble_sort(unsigned short *pData, unsigned int len)
+{
+ for(volatile int i = 0; i< len-1; i++)
+ {
+ for(volatile int j = 0; j pData[j+1])
+ {
+ unsigned short temp = pData[j];
+ pData[j] = pData[j+1];
+ pData[j+1] = temp;
+ }
+ }
+ }
+}
+
+/**
+ * @Brief: Battery check.
+ * @Param: None.
+ * @Return: None.
+ */
+volatile signed short adcValue[BATTERY_SAMPLE_NUM];
+void battery_power_check(int minVol_mV)
+{
+
+ if(!adc_hw_initialized){
+ adc_hw_initialized = 1;
+ adc_init();
+ adc_vbat_init(BATTERY_CHECK_PIN);
+ }
+
+ adc_reset();
+ aif_reset(); ///refer to driver
+ adc_power_on(1);
+
+ //clear adcValue buffer
+ for(volatile int i=0; i> 2;
+
+ //////////////// adc sample data convert to voltage(mv) ////////////////
+ // (1180mV Vref, 1/8 scaler) (BIT<12~0> valid data)
+ // = adc_result * 1160 * 8 / 0x2000
+ // = adc_result * 4680 >>12
+ // = adc_result * 295 >>8
+ // u16 vol = (adcValueAvg * 1180 * 8)>>13;//Unit:mV; cause reference voltage is not accurate and the real value is 1.18v(Vref = 1.2V);*8 indicate 1/8 scaler
+ u16 vol;
+ if((adc_cal_value!=0xffff)&&(adc_cal_value != 0x0000)) //Already calibrated
+ {
+ vol = adcValueAvg*1000/adc_cal_value; //this used 1000mV calibrated value
+ }
+ else
+ {
+ vol = (adcValueAvg * 295)>>8; ////vol = (adcValueAvg * 1180 * 8)>>13;
+ }
+
+ /* Low voltage processing. Enter deep sleep. */
+ if(vol < minVol_mV){
+
+ #if (1 && BLT_APP_LED_ENABLE) //led indicate
+ gpio_set_output_en(GPIO_LED, 1); //output enable
+ for(int k=0;k<3;k++){
+ gpio_write(GPIO_LED, 1);
+ sleep_us(200000);
+ gpio_write(GPIO_LED, 0);
+ sleep_us(200000);
+ }
+ gpio_set_output_en(GPIO_LED, 0);
+ #endif
+
+ //Avoid the MCU entering DEEP when the user presses the key, causing the RF key not to be released.
+ extern int key_not_released;
+ extern u8 key_type;
+ if(key_not_released){
+ if(key_type == KEYBOARD_KEY){
+ u8 key_report[8]={0};
+ bls_att_pushNotifyData(HID_NORMAL_KB_REPORT_INPUT_DP_H, key_report, 8);
+ }
+ else if(key_type == CONSUMER_KEY){
+ u8 consume[8]={0};
+ bls_att_pushNotifyData(HID_CONSUME_REPORT_INPUT_DP_H, consume, 8);
+ }
+ }
+ analog_write(DEEP_ANA_REG2, BATTERY_VOL_LOW);
+ cpu_sleep_wakeup(PM_SLeepMode_Deep, PM_WAKEUP_PAD, 0);
+ }
+}
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/battery_check.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/battery_check.h
new file mode 100644
index 0000000000000..5c255d109d80b
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/battery_check.h
@@ -0,0 +1,37 @@
+/********************************************************************************************************
+ * @file battery_check.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef BATTERY_CHECK_H_
+#define BATTERY_CHECK_H_
+
+#include "drivers.h"
+
+#define BATTERY_CHECK_PIN GPIO_PA7 ///GPIO_PB3
+
+#define BATTERY_VOL_OK 0x00
+#define BATTERY_VOL_LOW 0x01
+
+#define BATTERY_VOL_MIN (2000)//Unit: mV
+#define BATTERY_SAMPLE_NUM 8 ///please make sure this value is x*8 (integer multiple of eight)
+
+void battery_power_check(int minVol_mV);
+
+#endif /* BATTERY_CHECK_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/main.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/main.c
new file mode 100644
index 0000000000000..b5c1396fc752c
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/main.c
@@ -0,0 +1,91 @@
+/********************************************************************************************************
+ * @file main.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include
+#include "drivers.h"
+#include "stack/ble/ble.h"
+#include "../common/user_config.h"
+#include "../common/blt_fw_sign.h"
+
+#if(REMOTE_IR_ENABLE)
+ extern void rc_ir_irq_prc(void);
+#endif
+
+_attribute_ram_code_ void irq_handler(void)
+{
+#if(REMOTE_IR_ENABLE)
+ rc_ir_irq_prc();
+#endif
+
+ irq_blt_sdk_handler();
+}
+
+int main(void)
+{
+ blc_pm_select_internal_32k_crystal();
+ //blc_pm_select_external_32k_crystal();
+
+ /***********************************************
+ * if the bin size is less than 48K, we recommend using this setting.
+ */
+ #if (FLASH_SIZE_OPTION == FLASH_SIZE_OPTION_128K) ///FLASH_SIZE_OPTION_128K
+ bls_ota_setFirmwareSizeAndOffset(48, 0x10000);///default : ota_firmware_size_k=128;ota_program_bootAddr=0x20000; it is for hawk 128K flash
+ bls_smp_configParingSecurityInfoStorageAddr(0x1C000);
+ #endif
+
+ cpu_wakeup_init();
+
+ #if(CLOCK_SYS_CLOCK_HZ == 16000000)
+ clock_init(SYS_CLK_16M_Crystal);
+ #elif(CLOCK_SYS_CLOCK_HZ == 32000000)
+ clock_init(SYS_CLK_32M_Crystal);
+ #elif(CLOCK_SYS_CLOCK_HZ == 48000000)
+ clock_init(SYS_CLK_48M_Crystal);
+ #endif
+
+ gpio_init();
+
+ #if(RC_BTN_ENABLE)
+ deep_wakeup_proc();
+ #endif
+
+ /* load customized freq_offset CAP value and TP value.*/
+ blc_app_loadCustomizedParameters(); //do this operation before "rf_drv_init"
+
+ rf_drv_init(RF_MODE_BLE_1M);
+
+ #if(FIRMWARES_SIGNATURE_ENABLE)
+ blt_firmware_signature_check();
+ #endif
+
+ user_init();
+
+ irq_enable();
+
+ while(1){
+ #if(MODULE_WATCHDOG_ENABLE)
+ wd_clear(); //clear watch dog
+ #endif
+ main_loop ();
+ }
+}
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/rc_ir.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/rc_ir.c
new file mode 100644
index 0000000000000..78fa0ec486311
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/rc_ir.c
@@ -0,0 +1,398 @@
+/********************************************************************************************************
+ * @file rc_ir.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "drivers.h"
+#include "tl_common.h"
+#include "rc_ir.h"
+#include "app_config.h"
+
+#if (REMOTE_IR_ENABLE)
+
+
+#define ADD_REPEAT_ONE_BY_ONE 0
+
+///////////// NEC protocol /////////////////////////////////////////////
+//start
+#define IR_INTRO_CARR_TIME_NEC 9000
+#define IR_INTRO_NO_CARR_TIME_NEC 4500
+//stop
+#define IR_END_TRANS_TIME_NEC 563 // user define
+//repeat
+#define IR_REPEAT_CARR_TIME_NEC 9000
+#define IR_REPEAT_NO_CARR_TIME_NEC 2250
+#define IR_REPEAT_LOW_CARR_TIME_NEC 560
+//data "1"
+#define IR_HIGH_CARR_TIME_NEC 560
+#define IR_HIGH_NO_CARR_TIME_NEC 1690
+//data "0"
+#define IR_LOW_CARR_TIME_NEC 560
+#define IR_LOW_NO_CARR_TIME_NEC 560
+
+
+
+
+
+#define PWM_IR_MAX_NUM 80 //user can define this max number according to application
+typedef struct{
+ unsigned int dma_len; // dma len
+ unsigned short data[PWM_IR_MAX_NUM];
+ unsigned int data_num;
+}pwm_dma_data_t;
+
+
+pwm_dma_data_t T_dmaData_buf;
+
+u16 waveform_start_bit_1st;
+u16 waveform_start_bit_2nd;
+u16 waveform_stop_bit_1st;
+u16 waveform_stop_bit_2nd;
+
+u16 waveform_logic_0_1st;
+u16 waveform_logic_0_2nd;
+u16 waveform_logic_1_1st;
+u16 waveform_logic_1_2nd;
+
+u16 waveform_repeat_1st;
+u16 waveform_repeat_2nd;
+u16 waveform_repeat_3rd;
+u16 waveform_repeat_4th;
+
+u16 waveform_wait_to_repeat;
+
+int ir_sending_check(void);
+
+
+
+
+void ir_nec_send(u8 addr1, u8 addr2, u8 cmd)
+{
+
+ if(ir_send_ctrl.last_cmd != cmd)
+ {
+ if(ir_sending_check())
+ {
+ return;
+ }
+
+
+ ir_send_ctrl.last_cmd = cmd;
+
+ //// set waveform input in sequence //////
+ T_dmaData_buf.data_num = 0;
+
+ //waveform for start bit
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_start_bit_1st;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_start_bit_2nd;
+
+
+ //add data
+ u32 data = (~cmd)<<24 | cmd<<16 | addr2<<8 | addr1;
+ for(int i=0;i<32;i++){
+ if(data & BIT(i)){
+ //waveform for logic_1
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_logic_1_1st;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_logic_1_2nd;
+ }
+ else{
+ //waveform for logic_0
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_logic_0_1st;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_logic_0_2nd;
+ }
+ }
+
+ //waveform for stop bit
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_stop_bit_1st;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_stop_bit_2nd;
+
+
+ T_dmaData_buf.dma_len = T_dmaData_buf.data_num * 2;
+
+ if(1){ //need repeat
+ ir_send_ctrl.repeat_enable = 1; //need repeat signal
+ }
+ else{ //no need repeat
+ ir_send_ctrl.repeat_enable = 0; //no need repeat signal
+ }
+
+
+ reg_pwm_irq_sta = FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //clear dma fifo mode done irq status
+ reg_pwm_irq_mask |= FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //enable dma fifo mode done irq mask
+
+
+ ir_send_ctrl.is_sending = IR_SENDING_DATA;
+
+ ir_send_ctrl.sending_start_time = clock_time();
+
+// gpio_set_func(GPIO_PB3, AS_PWM0_N);
+ pwm_start_dma_ir_sending();
+
+ }
+}
+
+
+
+
+
+
+int ir_is_sending()
+{
+ if(ir_send_ctrl.is_sending && clock_time_exceed(ir_send_ctrl.sending_start_time, 300*1000))
+ {
+ ir_send_ctrl.is_sending = IR_SENDING_NONE;
+
+ pwm_stop_dma_ir_sending();
+ }
+
+ return ir_send_ctrl.is_sending;
+}
+
+int ir_sending_check(void)
+{
+ u8 r = irq_disable();
+ if(ir_is_sending()){
+ irq_restore(r);
+ return 1;
+ }
+ irq_restore(r);
+ return 0;
+}
+
+
+
+void ir_send_release(void)
+{
+ u8 r = irq_disable();
+
+ ir_send_ctrl.last_cmd = 0xff;
+
+#if(!ADD_REPEAT_ONE_BY_ONE)
+ if(ir_send_ctrl.is_sending != IR_SENDING_NONE){
+ pwm_stop_dma_ir_sending();
+ }
+#endif
+
+ ir_send_ctrl.is_sending = IR_SENDING_NONE;
+
+ reg_pwm_irq_sta = FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //clear irq status
+ reg_pwm_irq_mask &= ~FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //disable irq mask
+
+
+ irq_restore(r);
+}
+
+
+
+
+
+
+//int AA_pwm_irq_cnt = 0;
+
+#if (ADD_REPEAT_ONE_BY_ONE)
+
+
+
+
+_attribute_ram_code_
+void rc_ir_irq_prc(void)
+{
+
+ if(reg_pwm_irq_sta & FLD_IRQ_PWM0_IR_DMA_FIFO_DONE){
+ reg_pwm_irq_sta = FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //clear irq status
+
+
+ if(ir_send_ctrl.repeat_enable){
+
+ if(ir_send_ctrl.is_sending == IR_SENDING_DATA){
+ ir_send_ctrl.is_sending = IR_SENDING_REPEAT;
+
+ T_dmaData_buf.data_num = 0;
+
+ u32 tick_2_repeat_sysClockTimer16M = 110*CLOCK_16M_SYS_TIMER_CLK_1MS - (clock_time() - ir_send_ctrl.sending_start_time);
+ u32 tick_2_repeat_sysTimer = (tick_2_repeat_sysClockTimer16M*CLOCK_SYS_CLOCK_1US>>4);
+
+
+ waveform_wait_to_repeat = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, tick_2_repeat_sysTimer/PWM_CARRIER_CYCLE_TICK);
+
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_wait_to_repeat;
+
+
+ T_dmaData_buf.dma_len = T_dmaData_buf.data_num * 2;
+
+ pwm_start_dma_ir_sending();
+ }
+ else if(ir_send_ctrl.is_sending == IR_SENDING_REPEAT){
+
+ T_dmaData_buf.data_num = 0;
+
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_1st;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_2nd;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_3rd;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_4th;
+
+ T_dmaData_buf.dma_len = T_dmaData_buf.data_num * 2;
+ pwm_start_dma_ir_sending();
+
+ }
+ }
+ else{
+ ir_send_release();
+ }
+
+ }
+}
+
+
+
+
+
+#else
+
+_attribute_ram_code_
+void rc_ir_irq_prc(void)
+{
+
+ if(reg_pwm_irq_sta & FLD_IRQ_PWM0_IR_DMA_FIFO_DONE){
+ reg_pwm_irq_sta = FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //clear irq status
+
+// AA_pwm_irq_cnt ++;
+
+ if(ir_send_ctrl.repeat_enable){
+
+ if(ir_send_ctrl.is_sending == IR_SENDING_DATA){
+ ir_send_ctrl.is_sending = IR_SENDING_REPEAT;
+
+ T_dmaData_buf.data_num = 0;
+
+ u32 tick_2_repeat_sysClockTimer16M = 110*CLOCK_16M_SYS_TIMER_CLK_1MS - (clock_time() - ir_send_ctrl.sending_start_time);
+ u32 tick_2_repeat_sysTimer = (tick_2_repeat_sysClockTimer16M*CLOCK_SYS_CLOCK_1US>>4);
+
+
+ waveform_wait_to_repeat = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, tick_2_repeat_sysTimer/PWM_CARRIER_CYCLE_TICK);
+
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_wait_to_repeat;
+
+ for(int i=0;i<5;i++){
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_1st;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_2nd;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_3rd;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_4th;
+ }
+
+ T_dmaData_buf.dma_len = T_dmaData_buf.data_num * 2;
+
+ pwm_start_dma_ir_sending();
+ }
+ else if(ir_send_ctrl.is_sending == IR_SENDING_REPEAT){
+
+ T_dmaData_buf.data_num = 0;
+ for(int i=0;i<5;i++){
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_1st;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_2nd;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_3rd;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_4th;
+ }
+
+ T_dmaData_buf.dma_len = T_dmaData_buf.data_num * 2;
+ pwm_start_dma_ir_sending();
+
+ }
+ }
+ else{
+ ir_send_release();
+ }
+
+ }
+}
+
+
+#endif
+
+
+
+
+
+
+
+void rc_ir_init(void)
+{
+ //Enable PWM clock(must)
+ reg_clk_en1 |= FLD_CLK1_PWM_EN;
+
+//only pwm0 support fifo mode
+ pwm_n_revert(PWM0_ID); //if use PWMx_N, user must set "pwm_n_revert" before gpio_set_func(pwmx_N).
+ gpio_set_func(GPIO_PA0, AS_PWM0);
+ pwm_set_mode(PWM0_ID, PWM_IR_DMA_FIFO_MODE);
+ pwm_set_cycle_and_duty(PWM0_ID, PWM_CARRIER_CYCLE_TICK, PWM_CARRIER_HIGH_TICK ); //config carrier: 38k, 1/3 duty
+
+
+ pwm_set_dma_address(&T_dmaData_buf);
+
+
+//logic_0, 560 us carrier, 560 us low
+ waveform_logic_0_1st = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+ waveform_logic_0_2nd = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+//logic_1, 560 us carrier, 1690 us low
+ waveform_logic_1_1st = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+ waveform_logic_1_2nd = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 1690 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+
+//start bit, 9000 us carrier, 4500 us low
+ waveform_start_bit_1st = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 9000 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+ waveform_start_bit_2nd = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 4500 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+
+//stop bit, 560 us carrier, 500 us low
+ waveform_stop_bit_1st = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+ waveform_stop_bit_2nd = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 500 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+
+
+//repeat signal first part, 9000 us carrier, 2250 us low
+ waveform_repeat_1st = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 9000 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+ waveform_repeat_2nd = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 2250 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+//repeat signal second part, 560 us carrier, 99190 us low(110 ms - 9000us - 2250us - 560us = 99190 us)
+ waveform_repeat_3rd = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+ waveform_repeat_4th = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 99190 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+
+
+
+//add fifo stop irq, when all waveform send over, this irq will triggers
+ //enable system irq PWM
+ reg_irq_mask |= FLD_IRQ_SW_PWM_EN;
+
+ //enable pwm0 fifo stop irq
+ reg_pwm_irq_sta = FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //clear irq status
+// reg_pwm_irq_mask |= FLD_IRQ_PWM0_IR_DMA_FIFO_DONE;
+
+ ir_send_ctrl.last_cmd = 0xff; //must
+}
+
+
+
+
+
+
+
+
+#endif //end of REMOTE_IR_ENABLE
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/rc_ir.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/rc_ir.h
new file mode 100644
index 0000000000000..16e6f7fa066c4
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_remote/rc_ir.h
@@ -0,0 +1,128 @@
+/********************************************************************************************************
+ * @file rc_ir.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef _RC_IR_H_
+#define _RC_IR_H_
+
+#include
+#include
+
+#define IR_CARRIER_FREQ 38000 // 1 frame -> 1/38k -> 1000/38 = 26 us
+#define PWM_CARRIER_CYCLE_TICK ( CLOCK_SYS_CLOCK_HZ/IR_CARRIER_FREQ ) //16M: 421 tick, f = 16000000/421 = 38004,T = 421/16=26.3125 us
+#define PWM_CARRIER_HIGH_TICK ( PWM_CARRIER_CYCLE_TICK/3 ) // 1/3 duty
+
+#define PWM_CARRIER_HALF_CYCLE_TICK (PWM_CARRIER_CYCLE_TICK>>1)
+
+
+#define IR_HIGH_CARR_TIME 565 // in us
+#define IR_HIGH_NO_CARR_TIME 1685
+#define IR_LOW_CARR_TIME 560
+#define IR_LOW_NO_CARR_TIME 565
+#define IR_INTRO_CARR_TIME 9000
+#define IR_INTRO_NO_CARR_TIME 4500
+
+#define IR_SWITCH_CODE 0x0d
+#define IR_ADDR_CODE 0x00
+#define IR_CMD_CODE 0xbf
+
+#define IR_REPEAT_INTERVAL_TIME 40500
+#define IR_REPEAT_NO_CARR_TIME 2250
+#define IR_END_TRANS_TIME 563
+
+//#define IR_CARRIER_FREQ 37917//38222
+#define IR_CARRIER_DUTY 3
+#define IR_LEARN_SERIES_CNT 160
+
+
+
+
+enum{
+ IR_SEND_TYPE_TIME_SERIES,
+ IR_SEND_TYPE_BYTE,
+ IR_SEND_TYPE_HALF_TIME_SERIES,
+};
+
+
+
+typedef struct{
+ u32 cycle;
+ u16 hich;
+ u16 cnt;
+}ir_ctrl_t;
+
+
+typedef struct{
+ ir_ctrl_t *ptr_irCtl;
+ u8 type;
+ u8 start_high;
+ u8 ir_number;
+ u8 code;
+}ir_send_ctrl_data_t;
+
+
+#define IR_GROUP_MAX 8
+
+#define IR_SENDING_NONE 0
+#define IR_SENDING_DATA 1
+#define IR_SENDING_REPEAT 2
+
+typedef struct{
+ u8 is_sending;
+ u8 repeat_enable;
+ u8 last_cmd;
+ u8 rsvd;
+
+ u32 sending_start_time;
+}ir_send_ctrl_t;
+
+ir_send_ctrl_t ir_send_ctrl;
+
+
+
+
+
+
+
+
+
+void ir_config_carrier(u16 cycle_tick, u16 high_tick);
+void ir_config_byte_timing(u32 logic_1_carr, u32 logic_1_none, u32 logic_0_carr, u32 logic_0_none);
+
+void ir_send_add_series_item(u32 *time_series, u8 series_cnt, ir_ctrl_t *pIrCtrl, u8 start_high);
+void ir_send_add_byte_item(u8 code, u8 start_high);
+
+
+void rc_ir_init(void);
+void ir_send_release(void);
+
+void ir_irq_send(void);
+void ir_repeat_handle(void);
+
+
+
+
+
+
+
+void ir_nec_send(u8 addr1, u8 addr2, u8 cmd);
+
+
+#endif /* RC_IR_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_sample/app.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_sample/app.c
new file mode 100644
index 0000000000000..59a1bb71a9fb8
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_sample/app.c
@@ -0,0 +1,473 @@
+/********************************************************************************************************
+ * @file app.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include
+#include "tl_common.h"
+#include "drivers.h"
+#include "../common/keyboard.h"
+#include "../common/blt_common.h"
+
+
+#if (__PROJECT_5316_BLE_SAMPLE__ )
+
+#define RC_DEEP_SLEEP_EN 1
+
+#define ADV_IDLE_ENTER_DEEP_TIME 60 //60 s
+#define CONN_IDLE_ENTER_DEEP_TIME 60 //60 s
+
+#define MY_DIRECT_ADV_TMIE 2000000
+
+#define MY_APP_ADV_CHANNEL BLT_ENABLE_ADV_ALL
+
+#define MY_ADV_INTERVAL_MIN ADV_INTERVAL_30MS
+#define MY_ADV_INTERVAL_MAX ADV_INTERVAL_35MS
+
+#define BLE_DEVICE_ADDRESS_TYPE BLE_DEVICE_ADDRESS_PUBLIC
+own_addr_type_t app_own_address_type = OWN_ADDRESS_PUBLIC;
+
+MYFIFO_INIT(blt_rxfifo, 64, 8);
+MYFIFO_INIT(blt_txfifo, 40, 16);
+
+/* ADV Packet, SCAN Response Packet define */
+const u8 tbl_advData[] = {
+ 0x05, 0x09, 'G', 'h', 'i', 'd',
+ 0x02, 0x01, 0x05, // BLE limited discoverable mode and BR/EDR not supported
+ 0x03, 0x19, 0x80, 0x01, // 384, Generic Remote Control, Generic category
+ 0x05, 0x02, 0x12, 0x18, 0x0F, 0x18, // incomplete list of service class UUIDs (0x1812, 0x180F)
+};
+
+const u8 tbl_scanRsp [] = {
+ 0x08, 0x09, 'G', 'R', 'e', 'm', 'o', 't', 'e',
+};
+
+
+u8 user_task_flg;
+u8 sendTerminate_before_enterDeep = 0;
+
+u32 interval_update_tick = 0;
+int device_in_connection_state;
+
+u32 advertise_begin_tick;
+
+unsigned int lowBattDet_tick = 0;
+
+int ui_mtu_size_exchange_req = 0;
+
+u32 latest_user_event_tick;
+
+#if (STUCK_KEY_PROCESS_ENABLE)
+ u32 stuckKey_keyPressTime;
+#endif
+
+
+/*----------------------------------------------------------------------------*/
+/*------------- CallBack function of BLE ----------------*/
+/*----------------------------------------------------------------------------*/
+void app_switch_to_indirect_adv(u8 e, u8 *p, int n)
+{
+ bls_ll_setAdvParam( MY_ADV_INTERVAL_MIN, MY_ADV_INTERVAL_MAX,
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, app_own_address_type,
+ 0, NULL,
+ MY_APP_ADV_CHANNEL,
+ ADV_FP_NONE);
+
+ bls_ll_setAdvEnable(1); //must: set adv enable
+}
+
+void ble_remote_terminate(u8 e,u8 *p, int n) //*p is terminate reason
+{
+ device_in_connection_state = 0;
+
+ if(*p == HCI_ERR_CONN_TIMEOUT){
+
+ }else if(*p == HCI_ERR_REMOTE_USER_TERM_CONN){ //0x13
+
+ }else if(*p == HCI_ERR_CONN_TERM_MIC_FAILURE){
+
+ }else{
+
+ }
+
+#if (BLE_REMOTE_PM_ENABLE)
+ //user has push terminate pkt to ble TX buffer before deepsleep
+ if(sendTerminate_before_enterDeep == 1){
+ sendTerminate_before_enterDeep = 2;
+ }
+#endif
+
+
+ advertise_begin_tick = clock_time();
+}
+
+void task_connect(u8 e, u8 *p, int n)
+{
+ /**
+ * internal interval=10ms latency=99 timeout=4s 36uA
+ * interval=10ms latency=199 timeout=6s 27uA
+ * interval=10ms latency=299 timeout=8s 21uA
+ * external interval=10ms latency=99 timeout=4s 33uA
+ * interval=10ms latency=199 timeout=6s 22uA
+ * interval=10ms latency=299 timeout=8s 17uA
+ */
+ bls_l2cap_requestConnParamUpdate (8, 8, 99, 400); //interval=10ms latency=99 timeout=4s
+
+ latest_user_event_tick = clock_time();
+
+ ui_mtu_size_exchange_req = 1;
+
+ device_in_connection_state = 1;//
+
+ interval_update_tick = clock_time() | 1; //none zero
+}
+
+/*----------------------------------------------------------------------------*/
+/*------------- Key Function ----------------*/
+/*----------------------------------------------------------------------------*/
+#if(RC_BTN_ENABLE)
+#define MAX_BTN_SIZE 2
+#define BTN_VALID_LEVEL 0
+
+#define USER_BTN_1 0x01
+#define USER_BTN_2 0x02
+
+u32 ctrl_btn[] = {SW1_GPIO, SW2_GPIO};
+u8 btn_map[MAX_BTN_SIZE] = {USER_BTN_1, USER_BTN_2};
+
+typedef struct{
+ u8 cnt; //count button num
+ u8 btn_press;
+ u8 keycode[MAX_BTN_SIZE]; //6 btn
+}vc_data_t;
+vc_data_t vc_event;
+
+typedef struct{
+ u8 btn_history[4]; //vc history btn save
+ u8 btn_filter_last;
+ u8 btn_not_release;
+ u8 btn_new; //new btn flag
+}btn_status_t;
+btn_status_t btn_status;
+
+int key_not_release;
+u8 btn_debounce_filter(u8 *btn_v)
+{
+ u8 change = 0;
+
+ for(int i=3; i>0; i--){
+ btn_status.btn_history[i] = btn_status.btn_history[i-1];
+ }
+ btn_status.btn_history[0] = *btn_v;
+
+ if( btn_status.btn_history[0] == btn_status.btn_history[1] && btn_status.btn_history[1] == btn_status.btn_history[2] && \
+ btn_status.btn_history[0] != btn_status.btn_filter_last ){
+ change = 1;
+
+ btn_status.btn_filter_last = btn_status.btn_history[0];
+ }
+
+ return change;
+}
+
+u8 vc_detect_button(int read_key)
+{
+ u8 btn_changed, i;
+ memset(&vc_event,0,sizeof(vc_data_t)); //clear vc_event
+ //vc_event.btn_press = 0;
+
+ for(i=0; i 80 *CLOCK_16M_SYS_TIMER_CLK_1MS ){ //suspend time > 30ms.add gpio wakeup
+ bls_pm_setWakeupSource(PM_WAKEUP_CORE); //gpio CORE wakeup suspend
+ }
+}
+
+
+void user_init()
+{
+ /*
+ ***************************************************************************
+ * Keyboard matrix initialization. These section must be before battery_power_check.
+ * Because when low battery,chip will entry deep.if placed after battery_power_check,
+ * it is possible that can not wake up chip.
+ ***************************************************************************
+ */
+ #if(RC_BTN_ENABLE)
+ for(int i=0; i<(sizeof (ctrl_btn)/sizeof(*ctrl_btn)); i++){
+ gpio_set_wakeup(ctrl_btn[i],0,1); //drive pin core(gpio) high wakeup suspend
+ cpu_set_gpio_wakeup (ctrl_btn[i],0,1); //drive pin pad high wakeup deepsleep
+ }
+ #endif
+
+ /*-- BLE stack initialization --------------------------------------------*/
+ u8 mac_public[6];
+ u8 mac_random_static[6];
+ blc_initMacAddress(CFG_ADR_MAC, mac_public, mac_random_static);
+
+ #if(BLE_DEVICE_ADDRESS_TYPE == BLE_DEVICE_ADDRESS_PUBLIC)
+ app_own_address_type = OWN_ADDRESS_PUBLIC;
+ #elif(BLE_DEVICE_ADDRESS_TYPE == BLE_DEVICE_ADDRESS_RANDOM_STATIC)
+ app_own_address_type = OWN_ADDRESS_RANDOM;
+ blc_ll_setRandomAddr(mac_random_static);
+ #endif
+
+ /*-- BLE Controller initialization ---------------------------------------*/
+ blc_ll_initBasicMCU(mac_public);//mandatory
+ blc_ll_initAdvertising_module(mac_public);//adv module: mandatory for BLE slave,
+ blc_ll_initSlaveRole_module();//slave module: mandatory for BLE slave,
+
+ /*-- BLE Host initialization ---------------------------------------------*/
+ extern void my_att_init(void);
+ //GATT initialization
+ my_att_init();
+ //L2CAP initialization
+ blc_l2cap_register_handler(blc_l2cap_packet_receive);
+
+ /*-- BLE SMP initialization ----------------------------------------------*/
+ #if (BLE_REMOTE_SECURITY_ENABLE)
+ blc_smp_param_setBondingDeviceMaxNumber(4); //default is SMP_BONDING_DEVICE_MAX_NUM, can not bigger that this value
+ //and this func must call before bls_smp_enableParing
+ bls_smp_enableParing (SMP_PARING_CONN_TRRIGER );
+ #else
+ bls_smp_enableParing (SMP_PARING_DISABLE_TRRIGER );
+ #endif
+
+ //HID_service_on_android7p0_init(); //hid device on android 7.0/7.1
+
+ /*-- USER application initialization -------------------------------------*/
+ bls_ll_setAdvData( (u8 *)tbl_advData, sizeof(tbl_advData) );
+ bls_ll_setScanRspData( (u8 *)tbl_scanRsp, sizeof(tbl_scanRsp));
+
+ /* Configure ADV packet */
+ #if(BLE_REMOTE_SECURITY_ENABLE)
+ //get bonded device number
+ u8 bond_number = blc_smp_param_getCurrentBondingDeviceNumber();
+ smp_param_save_t bondInfo;
+ if(bond_number) //at least 1 bonding device exist
+ {
+ //get the latest bonding device (index: bond_number-1 )
+ blc_smp_param_loadByIndex( bond_number - 1, &bondInfo);
+ }
+
+ if(bond_number)//set direct adv
+ {
+ //set direct adv
+ u8 status = bls_ll_setAdvParam( MY_ADV_INTERVAL_MIN, MY_ADV_INTERVAL_MAX,
+ ADV_TYPE_CONNECTABLE_DIRECTED_LOW_DUTY, app_own_address_type,
+ bondInfo.peer_addr_type, bondInfo.peer_addr,
+ MY_APP_ADV_CHANNEL,
+ ADV_FP_NONE);
+ //debug: ADV setting err
+ if(status != BLE_SUCCESS) { write_reg8(0x8000, 0x11); while(1); }
+
+ //it is recommended that direct adv only last for several seconds, then switch to indirect adv
+ bls_ll_setAdvDuration(MY_DIRECT_ADV_TMIE, 1);
+ bls_app_registerEventCallback (BLT_EV_FLAG_ADV_DURATION_TIMEOUT, &app_switch_to_indirect_adv);
+ }
+ else//set indirect ADV
+ #endif
+ {
+ u8 status = bls_ll_setAdvParam( MY_ADV_INTERVAL_MIN, MY_ADV_INTERVAL_MAX,
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, app_own_address_type,
+ 0, NULL,
+ MY_APP_ADV_CHANNEL,
+ ADV_FP_NONE);
+ //debug: ADV setting err
+ if(status != BLE_SUCCESS) { write_reg8(0x8000, 0x11); while(1); }
+ }
+
+ bls_ll_setAdvEnable(1); //adv enable
+ rf_set_power_level_index (RF_POWER_7P9dBm);//OK
+
+ //ble event call back
+ bls_app_registerEventCallback (BLT_EV_FLAG_CONNECT, &task_connect);
+ bls_app_registerEventCallback (BLT_EV_FLAG_TERMINATE, &ble_remote_terminate);
+
+ /* Power Management initialization */
+ #if(BLE_REMOTE_PM_ENABLE)
+ blc_ll_initPowerManagement_module(); //pm module: optional
+ bls_pm_setSuspendMask (SUSPEND_ADV | SUSPEND_CONN);
+ bls_app_registerEventCallback (BLT_EV_FLAG_SUSPEND_ENTER, &ble_remote_set_sleep_wakeup);
+ #else
+ bls_pm_setSuspendMask (SUSPEND_DISABLE);
+ #endif
+
+ advertise_begin_tick = clock_time();
+}
+
+/*----------------------------------------------------------------------------*/
+/*--------- Main Loop ------------*/
+/*----------------------------------------------------------------------------*/
+u32 tick_loop;
+void main_loop (void)
+{
+ tick_loop ++;
+
+ /* BLE entry -------------------------------------------------------------*/
+ blt_sdk_main_loop();
+
+ /* UI entry --------------------------------------------------------------*/
+ #if(RC_BTN_ENABLE)
+ proc_button();
+ #endif
+
+ /* Power Management -----------------------------------------------------*/
+ blt_pm_proc();
+}
+#endif //end of __PROJECT_5316_BLE_SAMPLE__
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_sample/app.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_sample/app.h
new file mode 100644
index 0000000000000..9133de78eb186
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_sample/app.h
@@ -0,0 +1,34 @@
+/********************************************************************************************************
+ * @file app.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef _APP_H
+#define _APP_H
+
+#include "drivers.h"
+
+/* Audio Operation Function ------------------------------------------------- */
+
+extern void deep_wakeup_proc(void);
+
+extern void user_init();
+extern void main_loop (void);
+
+#endif /* APP_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_sample/app_att.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_sample/app_att.c
new file mode 100644
index 0000000000000..f3051b21844e3
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_sample/app_att.c
@@ -0,0 +1,438 @@
+/********************************************************************************************************
+ * @file app_att.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#include "tl_common.h"
+#include
+
+
+#if (__PROJECT_5316_BLE_SAMPLE__)
+
+typedef struct
+{
+ /** Minimum value for the connection event (interval. 0x0006 - 0x0C80 * 1.25 ms) */
+ u16 intervalMin;
+ /** Maximum value for the connection event (interval. 0x0006 - 0x0C80 * 1.25 ms) */
+ u16 intervalMax;
+ /** Number of LL latency connection events (0x0000 - 0x03e8) */
+ u16 latency;
+ /** Connection Timeout (0x000A - 0x0C80 * 10 ms) */
+ u16 timeout;
+} gap_periConnectParams_t;
+
+const u16 clientCharacterCfgUUID = GATT_UUID_CLIENT_CHAR_CFG;
+
+const u16 extReportRefUUID = GATT_UUID_EXT_REPORT_REF;
+
+const u16 reportRefUUID = GATT_UUID_REPORT_REF;
+
+const u16 characterPresentFormatUUID = GATT_UUID_CHAR_PRESENT_FORMAT;
+
+const u16 my_primaryServiceUUID = GATT_UUID_PRIMARY_SERVICE;
+
+static const u16 my_characterUUID = GATT_UUID_CHARACTER;
+
+const u16 my_devServiceUUID = SERVICE_UUID_DEVICE_INFORMATION;
+
+const u16 my_PnPUUID = CHARACTERISTIC_UUID_PNP_ID;
+
+const u16 my_devNameUUID = GATT_UUID_DEVICE_NAME;
+
+//device information
+const u16 my_gapServiceUUID = SERVICE_UUID_GENERIC_ACCESS;
+// Appearance Characteristic Properties
+const u16 my_appearanceUIID = 0x2a01;
+const u16 my_periConnParamUUID = 0x2a04;
+u16 my_appearance = GAP_APPEARE_UNKNOWN;
+gap_periConnectParams_t my_periConnParameters = {20, 40, 0, 1000};
+
+
+const u16 my_gattServiceUUID = SERVICE_UUID_GENERIC_ATTRIBUTE;
+const u16 serviceChangeUIID = GATT_UUID_SERVICE_CHANGE;
+u16 serviceChangeVal[2] = {0};
+static u8 serviceChangeCCC[2]={0,0};
+
+
+
+
+const u8 my_devName[] = {'G','R','e','m','o','t','e'};
+
+
+
+const u8 my_PnPtrs [] = {0x02, 0x8a, 0x24, 0x66, 0x82, 0x01, 0x00};
+
+//////////////////////// Battery /////////////////////////////////////////////////
+const u16 my_batServiceUUID = SERVICE_UUID_BATTERY;
+const u16 my_batCharUUID = CHARACTERISTIC_UUID_BATTERY_LEVEL;
+static u8 batteryValueInCCC[2];
+u8 my_batVal[1] = {99};
+
+//////////////////////// HID /////////////////////////////////////////////////////
+
+const u16 my_hidServiceUUID = SERVICE_UUID_HUMAN_INTERFACE_DEVICE;
+
+const u16 hidServiceUUID = SERVICE_UUID_HUMAN_INTERFACE_DEVICE;
+const u16 hidProtocolModeUUID = CHARACTERISTIC_UUID_HID_PROTOCOL_MODE;
+const u16 hidReportUUID = CHARACTERISTIC_UUID_HID_REPORT;
+const u16 hidReportMapUUID = CHARACTERISTIC_UUID_HID_REPORT_MAP;
+const u16 hidbootKeyInReportUUID = CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT;
+const u16 hidbootKeyOutReportUUID = CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT;
+const u16 hidbootMouseInReportUUID = CHARACTERISTIC_UUID_HID_BOOT_MOUSE_INPUT;
+const u16 hidinformationUUID = CHARACTERISTIC_UUID_HID_INFORMATION;
+const u16 hidCtrlPointUUID = CHARACTERISTIC_UUID_HID_CONTROL_POINT;
+const u16 hidIncludeUUID = GATT_UUID_INCLUDE;
+
+u8 protocolMode = DFLT_HID_PROTOCOL_MODE;
+
+
+// Key in Report characteristic variables
+u8 reportKeyIn[8];
+u8 reportKeyInCCC[2];
+// HID Report Reference characteristic descriptor, key input
+static u8 reportRefKeyIn[2] =
+ { HID_REPORT_ID_KEYBOARD_INPUT, HID_REPORT_TYPE_INPUT };
+
+// Key out Report characteristic variables
+u8 reportKeyOut[1];
+u8 reportKeyOutCCC[2];
+static u8 reportRefKeyOut[2] =
+ { HID_REPORT_ID_KEYBOARD_INPUT, HID_REPORT_TYPE_OUTPUT };
+
+// Consumer Control input Report
+static u8 reportConsumerControlIn[2];
+static u8 reportConsumerControlInCCC[2];
+static u8 reportRefConsumerControlIn[2] = { HID_REPORT_ID_CONSUME_CONTROL_INPUT, HID_REPORT_TYPE_INPUT };
+
+
+
+// Boot Keyboard Input Report
+static u8 bootKeyInReport;
+static u8 bootKeyInReportCCC[2];
+
+// Boot Keyboard Output Report
+static u8 bootKeyOutReport;
+
+
+// HID Information characteristic
+const u8 hidInformation[] =
+{
+ U16_LO(0x0111), U16_HI(0x0111), // bcdHID (USB HID version)
+ 0x00, // bCountryCode
+ 0x01 // Flags
+};
+
+// HID Control Point characteristic
+static u8 controlPoint;
+
+// HID Report Map characteristic
+// Keyboard report descriptor (using format for Boot interface descriptor)
+
+static const u8 reportMap[] =
+{
+ //keyboard report in
+ 0x05, 0x01, // Usage Pg (Generic Desktop)
+ 0x09, 0x06, // Usage (Keyboard)
+ 0xA1, 0x01, // Collection: (Application)
+ 0x85, HID_REPORT_ID_KEYBOARD_INPUT, // Report Id (keyboard)
+ //
+ 0x05, 0x07, // Usage Pg (Key Codes)
+ 0x19, 0xE0, // Usage Min (224) VK_CTRL:0xe0
+ 0x29, 0xE7, // Usage Max (231) VK_RWIN:0xe7
+ 0x15, 0x00, // Log Min (0)
+ 0x25, 0x01, // Log Max (1)
+ //
+ // Modifier byte
+ 0x75, 0x01, // Report Size (1) 1 bit * 8
+ 0x95, 0x08, // Report Count (8)
+ 0x81, 0x02, // Input: (Data, Variable, Absolute)
+ //
+ // Reserved byte
+ 0x95, 0x01, // Report Count (1)
+ 0x75, 0x08, // Report Size (8)
+ 0x81, 0x01, // Input: (Constant)
+
+ //keyboard output
+ //5 bit led ctrl: NumLock CapsLock ScrollLock Compose kana
+ 0x95, 0x05, //Report Count (5)
+ 0x75, 0x01, //Report Size (1)
+ 0x05, 0x08, //Usage Pg (LEDs )
+ 0x19, 0x01, //Usage Min
+ 0x29, 0x05, //Usage Max
+ 0x91, 0x02, //Output (Data, Variable, Absolute)
+ //3 bit reserved
+ 0x95, 0x01, //Report Count (1)
+ 0x75, 0x03, //Report Size (3)
+ 0x91, 0x01, //Output (Constant)
+
+ // Key arrays (6 bytes)
+ 0x95, 0x06, // Report Count (6)
+ 0x75, 0x08, // Report Size (8)
+ 0x15, 0x00, // Log Min (0)
+ 0x25, 0xF1, // Log Max (241)
+ 0x05, 0x07, // Usage Pg (Key Codes)
+ 0x19, 0x00, // Usage Min (0)
+ 0x29, 0xf1, // Usage Max (241)
+ 0x81, 0x00, // Input: (Data, Array)
+
+ 0xC0, // End Collection
+
+
+
+
+ //consumer report in
+ 0x05, 0x0C, // Usage Page (Consumer)
+ 0x09, 0x01, // Usage (Consumer Control)
+ 0xA1, 0x01, // Collection (Application)
+ 0x85, HID_REPORT_ID_CONSUME_CONTROL_INPUT, // Report Id
+ 0x75,0x10, //global, report size 16 bits
+ 0x95,0x01, //global, report count 1
+ 0x15,0x01, //global, min 0x01
+ 0x26,0x8c,0x02, //global, max 0x28c
+ 0x19,0x01, //local, min 0x01
+ 0x2a,0x8c,0x02, //local, max 0x28c
+ 0x81,0x00, //main, input data varible, absolute
+ 0xc0, //main, end collection
+
+};
+
+// HID External Report Reference Descriptor for report map
+static u16 extServiceUUID;
+
+
+/////////////////////////////////////////////////////////
+const u8 my_OtaUUID[16] = TELINK_SPP_DATA_OTA;
+const u8 my_OtaServiceUUID[16] = TELINK_OTA_UUID_SERVICE;
+const u16 userdesc_UUID = GATT_UUID_CHAR_USER_DESC;
+
+
+u8 my_OtaData = 0x00;
+
+const u8 my_OtaName[] = {'O', 'T', 'A'};
+
+
+// Include attribute (Battery service)
+static u16 include[3] = {BATT_PS_H, BATT_LEVEL_INPUT_CCB_H, SERVICE_UUID_BATTERY};
+
+
+
+
+static const u8 my_devNameCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(GenericAccess_DeviceName_DP_H), U16_HI(GenericAccess_DeviceName_DP_H),
+ U16_LO(GATT_UUID_DEVICE_NAME), U16_HI(GATT_UUID_DEVICE_NAME)
+};
+static const u8 my_appearanceCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(GenericAccess_Appearance_DP_H), U16_HI(GenericAccess_Appearance_DP_H),
+ U16_LO(GATT_UUID_APPEARANCE), U16_HI(GATT_UUID_APPEARANCE)
+};
+static const u8 my_periConnParamCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(CONN_PARAM_DP_H), U16_HI(CONN_PARAM_DP_H),
+ U16_LO(GATT_UUID_PERI_CONN_PARAM), U16_HI(GATT_UUID_PERI_CONN_PARAM)
+};
+
+
+//// GATT attribute values
+static const u8 my_serviceChangeCharVal[5] = {
+ CHAR_PROP_INDICATE,
+ U16_LO(GenericAttribute_ServiceChanged_DP_H), U16_HI(GenericAttribute_ServiceChanged_DP_H),
+ U16_LO(GATT_UUID_SERVICE_CHANGE), U16_HI(GATT_UUID_SERVICE_CHANGE)
+};
+
+
+//// device Information attribute values
+static const u8 my_PnCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(DeviceInformation_pnpID_DP_H), U16_HI(DeviceInformation_pnpID_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_PNP_ID), U16_HI(CHARACTERISTIC_UUID_PNP_ID)
+};
+
+
+//// HID attribute values
+static const u8 my_hidProtocolModeCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_PROTOCOL_MODE_DP_H), U16_HI(HID_PROTOCOL_MODE_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_PROTOCOL_MODE), U16_HI(CHARACTERISTIC_UUID_HID_PROTOCOL_MODE)
+};
+static const u8 my_hidbootKeyInReporCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(HID_BOOT_KB_REPORT_INPUT_DP_H), U16_HI(HID_BOOT_KB_REPORT_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT), U16_HI(CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT)
+};
+static const u8 my_hidbootKeyOutReporCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_BOOT_KB_REPORT_OUTPUT_DP_H), U16_HI(HID_BOOT_KB_REPORT_OUTPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT), U16_HI(CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT)
+};
+static const u8 my_hidReportCCinCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(HID_CONSUME_REPORT_INPUT_DP_H), U16_HI(HID_CONSUME_REPORT_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT), U16_HI(CHARACTERISTIC_UUID_HID_REPORT)
+};
+static const u8 my_hidReportKEYinCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(HID_NORMAL_KB_REPORT_INPUT_DP_H), U16_HI(HID_NORMAL_KB_REPORT_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT), U16_HI(CHARACTERISTIC_UUID_HID_REPORT)
+};
+static const u8 my_hidReportKEYoutCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_NORMAL_KB_REPORT_OUTPUT_DP_H), U16_HI(HID_NORMAL_KB_REPORT_OUTPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT), U16_HI(CHARACTERISTIC_UUID_HID_REPORT)
+};
+static const u8 my_hidReportMapCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(HID_REPORT_MAP_DP_H), U16_HI(HID_REPORT_MAP_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT_MAP), U16_HI(CHARACTERISTIC_UUID_HID_REPORT_MAP)
+};
+static const u8 my_hidinformationCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(HID_INFORMATION_DP_H), U16_HI(HID_INFORMATION_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_INFORMATION), U16_HI(CHARACTERISTIC_UUID_HID_INFORMATION)
+};
+static const u8 my_hidCtrlPointCharVal[5] = {
+ CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_CONTROL_POINT_DP_H), U16_HI(HID_CONTROL_POINT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_CONTROL_POINT), U16_HI(CHARACTERISTIC_UUID_HID_CONTROL_POINT)
+};
+
+
+//// Battery attribute values
+static const u8 my_batCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(BATT_LEVEL_INPUT_DP_H), U16_HI(BATT_LEVEL_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_BATTERY_LEVEL), U16_HI(CHARACTERISTIC_UUID_BATTERY_LEVEL)
+};
+
+
+//// OTA attribute values
+static const u8 my_OtaCharVal[19] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(OTA_CMD_OUT_DP_H), U16_HI(OTA_CMD_OUT_DP_H),
+ TELINK_SPP_DATA_OTA,
+};
+
+
+
+
+
+const attribute_t my_Attributes[] = {
+
+ {ATT_END_H - 1, 0,0,0,0,0}, // total num of attribute
+
+
+ // 0001 - 0007 gap
+ {7,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_gapServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_devNameCharVal),(u8*)(&my_characterUUID), (u8*)(my_devNameCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_devName), (u8*)(&my_devNameUUID), (u8*)(my_devName), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_appearanceCharVal),(u8*)(&my_characterUUID), (u8*)(my_appearanceCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_appearance), (u8*)(&my_appearanceUIID), (u8*)(&my_appearance), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_periConnParamCharVal),(u8*)(&my_characterUUID), (u8*)(my_periConnParamCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_periConnParameters),(u8*)(&my_periConnParamUUID), (u8*)(&my_periConnParameters), 0},
+
+ // 0008 - 000b gatt
+ {4,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_gattServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_serviceChangeCharVal),(u8*)(&my_characterUUID), (u8*)(my_serviceChangeCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (serviceChangeVal), (u8*)(&serviceChangeUIID), (u8*)(&serviceChangeVal), 0},
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof (serviceChangeCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(serviceChangeCCC), 0},
+
+
+ // 000c - 000e device Information Service
+ {3,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_devServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_PnCharVal),(u8*)(&my_characterUUID), (u8*)(my_PnCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_PnPtrs),(u8*)(&my_PnPUUID), (u8*)(my_PnPtrs), 0},
+
+
+ /////////////////////////////////// 4. HID Service /////////////////////////////////////////////////////////
+ // 000f
+ //{27, ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_hidServiceUUID), 0},
+ {HID_CONTROL_POINT_DP_H - HID_PS_H + 1, ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_hidServiceUUID), 0},
+
+ // 0010 include battery service
+ {0,ATT_PERMISSIONS_READ,2,sizeof(include),(u8*)(&hidIncludeUUID), (u8*)(include), 0},
+
+ // 0011 - 0012 protocol mode
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidProtocolModeCharVal), (u8*)(&my_characterUUID), (u8*)(my_hidProtocolModeCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,2, sizeof(protocolMode),(u8*)(&hidProtocolModeUUID), (u8*)(&protocolMode), 0}, //value
+
+ // 0013 - 0015 boot keyboard input report (char-val-client)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidbootKeyInReporCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidbootKeyInReporCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2,sizeof(bootKeyInReport),(u8*)(&hidbootKeyInReportUUID), (u8*)(&bootKeyInReport), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(bootKeyInReportCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(bootKeyInReportCCC), 0}, //value
+
+ // 0016 - 0017 boot keyboard output report (char-val)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidbootKeyOutReporCharVal), (u8*)(&my_characterUUID), (u8*)(my_hidbootKeyOutReporCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,2, sizeof(bootKeyOutReport), (u8*)(&hidbootKeyOutReportUUID), (u8*)(&bootKeyOutReport), 0}, //value
+
+
+ // 0018 - 001b. consume report in: 4 (char-val-client-ref)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportCCinCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportCCinCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2, sizeof(reportConsumerControlIn),(u8*)(&hidReportUUID), (u8*)(reportConsumerControlIn), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR|ATT_PERMISSIONS_AUTHEN_WRITE,2,sizeof(reportConsumerControlInCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(reportConsumerControlInCCC), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportRefConsumerControlIn),(u8*)(&reportRefUUID), (u8*)(reportRefConsumerControlIn), 0}, //value
+
+ // 001c - 001f . keyboard report in : 4 (char-val-client-ref)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportKEYinCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportKEYinCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2, sizeof(reportKeyIn),(u8*)(&hidReportUUID), (u8*)(reportKeyIn), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR|ATT_PERMISSIONS_AUTHEN_WRITE,2,sizeof(reportKeyInCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(reportKeyInCCC), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportRefKeyIn),(u8*)(&reportRefUUID), (u8*)(reportRefKeyIn), 0}, //value
+
+ // 0020 - 0022 . keyboard report out: 3 (char-val-ref)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportKEYoutCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportKEYoutCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportKeyOut),(u8*)(&hidReportUUID), (u8*)(reportKeyOut), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportRefKeyOut),(u8*)(&reportRefUUID), (u8*)(reportRefKeyOut), 0}, //value
+
+
+ // 0023 - 0025 . report map: 3
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportMapCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportMapCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2,sizeof(reportMap),(u8*)(&hidReportMapUUID), (u8*)(reportMap), 0}, //value
+ {0,ATT_PERMISSIONS_READ|ATT_PERMISSIONS_WRITE,2,sizeof(extServiceUUID),(u8*)(&extReportRefUUID), (u8*)(&extServiceUUID), 0}, //value
+
+ // 0026 - 0027 . hid information: 2
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidinformationCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidinformationCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2, sizeof(hidInformation),(u8*)(&hidinformationUUID), (u8*)(hidInformation), 0}, //value
+
+ // 0028 - 0029 . control point: 2
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidCtrlPointCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidCtrlPointCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_WRITE,2, sizeof(controlPoint),(u8*)(&hidCtrlPointUUID), (u8*)(&controlPoint), 0}, //value
+
+ ////////////////////////////////////// Battery Service /////////////////////////////////////////////////////
+ // 002a - 002d
+ {4,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_batServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_batCharVal),(u8*)(&my_characterUUID), (u8*)(my_batCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_batVal),(u8*)(&my_batCharUUID), (u8*)(my_batVal), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(batteryValueInCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(batteryValueInCCC), 0}, //value
+
+ ////////////////////////////////////// OTA /////////////////////////////////////////////////////
+ // 002e - 0031
+ {4,ATT_PERMISSIONS_READ, 2,16,(u8*)(&my_primaryServiceUUID), (u8*)(&my_OtaServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ, 2,sizeof(my_OtaCharVal),(u8*)(&my_characterUUID), (u8*)(my_OtaCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,16,sizeof(my_OtaData),(u8*)(&my_OtaUUID), (&my_OtaData), &otaWrite, &otaRead}, //value
+ {0,ATT_PERMISSIONS_READ, 2,sizeof (my_OtaName),(u8*)(&userdesc_UUID), (u8*)(my_OtaName), 0},
+
+};
+
+void my_att_init(void)
+{
+ bls_att_setAttributeTable ((u8 *)my_Attributes);
+}
+
+#endif //end of __PROJECT_5316_BLE_SAMPLE__
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_sample/app_config.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_sample/app_config.h
new file mode 100644
index 0000000000000..22954fab1c398
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_sample/app_config.h
@@ -0,0 +1,276 @@
+/********************************************************************************************************
+ * @file app_config.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+
+/* Function Select -----------------------------------------------------------*/
+#define BLE_REMOTE_PM_ENABLE 1
+#define BLE_REMOTE_SECURITY_ENABLE 1
+#define RC_BTN_ENABLE 1
+
+/***select flash size***/
+#define FLASH_SIZE_OPTION_128K 0
+#define FLASH_SIZE_OPTION_512K 1
+
+#define FLASH_SIZE_OPTION FLASH_SIZE_OPTION_512K
+
+/***firmware check***/
+#define FIRMWARES_SIGNATURE_ENABLE 0
+
+
+/* Matrix Key Configuration --------------------------------------------------*/
+
+#define SW2_GPIO GPIO_PA1
+#define SW1_GPIO GPIO_PA2
+
+#define PULL_WAKEUP_SRC_PA2 PM_PIN_PULLUP_1M
+#define PULL_WAKEUP_SRC_PA1 PM_PIN_PULLUP_1M
+
+#define PA2_INPUT_ENABLE 1
+#define PA1_INPUT_ENABLE 1
+
+
+/* System clock initialization -----------------------------------------------*/
+#define CLOCK_SYS_CLOCK_HZ 16000000
+enum{
+ CLOCK_SYS_CLOCK_1S = CLOCK_SYS_CLOCK_HZ,
+ CLOCK_SYS_CLOCK_1MS = (CLOCK_SYS_CLOCK_1S / 1000),
+ CLOCK_SYS_CLOCK_1US = (CLOCK_SYS_CLOCK_1S / 1000000),
+};
+
+
+/* WatchDog ------------------------------------------------------------------*/
+#define MODULE_WATCHDOG_ENABLE 0
+#define WATCHDOG_INIT_TIMEOUT 500 //Unit:ms
+
+/* ATT Handle define ---------------------------------------------------------*/
+typedef enum
+{
+ ATT_H_START = 0,
+
+
+ //// Gap ////
+ /**********************************************************************************************/
+ GenericAccess_PS_H, //UUID: 2800, VALUE: uuid 1800
+ GenericAccess_DeviceName_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ GenericAccess_DeviceName_DP_H, //UUID: 2A00, VALUE: device name
+ GenericAccess_Appearance_CD_H, //UUID: 2803, VALUE: Prop: Read
+ GenericAccess_Appearance_DP_H, //UUID: 2A01, VALUE: appearance
+ CONN_PARAM_CD_H, //UUID: 2803, VALUE: Prop: Read
+ CONN_PARAM_DP_H, //UUID: 2A04, VALUE: connParameter
+
+
+ //// gatt ////
+ /**********************************************************************************************/
+ GenericAttribute_PS_H, //UUID: 2800, VALUE: uuid 1801
+ GenericAttribute_ServiceChanged_CD_H, //UUID: 2803, VALUE: Prop: Indicate
+ GenericAttribute_ServiceChanged_DP_H, //UUID: 2A05, VALUE: service change
+ GenericAttribute_ServiceChanged_CCB_H, //UUID: 2902, VALUE: serviceChangeCCC
+
+
+ //// device information ////
+ /**********************************************************************************************/
+ DeviceInformation_PS_H, //UUID: 2800, VALUE: uuid 180A
+ DeviceInformation_pnpID_CD_H, //UUID: 2803, VALUE: Prop: Read
+ DeviceInformation_pnpID_DP_H, //UUID: 2A50, VALUE: PnPtrs
+
+
+ //// HID ////
+ /**********************************************************************************************/
+ HID_PS_H, //UUID: 2800, VALUE: uuid 1812
+
+ //include
+ HID_INCLUDE_H, //UUID: 2802, VALUE: include
+
+ //protocol
+ HID_PROTOCOL_MODE_CD_H, //UUID: 2803, VALUE: Prop: read | write_without_rsp
+ HID_PROTOCOL_MODE_DP_H, //UUID: 2A4E, VALUE: protocolMode
+
+ //boot keyboard input report
+ HID_BOOT_KB_REPORT_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ HID_BOOT_KB_REPORT_INPUT_DP_H, //UUID: 2A22, VALUE: bootKeyInReport
+ HID_BOOT_KB_REPORT_INPUT_CCB_H, //UUID: 2902, VALUE: bootKeyInReportCCC
+
+ //boot keyboard output report
+ HID_BOOT_KB_REPORT_OUTPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | write| write_without_rsp
+ HID_BOOT_KB_REPORT_OUTPUT_DP_H, //UUID: 2A32, VALUE: bootKeyOutReport
+
+ //consume report in
+ HID_CONSUME_REPORT_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ HID_CONSUME_REPORT_INPUT_DP_H, //UUID: 2A4D, VALUE: reportConsumerIn
+ HID_CONSUME_REPORT_INPUT_CCB_H, //UUID: 2902, VALUE: reportConsumerInCCC
+ HID_CONSUME_REPORT_INPUT_REF_H, //UUID: 2908 VALUE: REPORT_ID_CONSUMER, TYPE_INPUT
+
+ //keyboard report in
+ HID_NORMAL_KB_REPORT_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ HID_NORMAL_KB_REPORT_INPUT_DP_H, //UUID: 2A4D, VALUE: reportKeyIn
+ HID_NORMAL_KB_REPORT_INPUT_CCB_H, //UUID: 2902, VALUE: reportKeyInInCCC
+ HID_NORMAL_KB_REPORT_INPUT_REF_H, //UUID: 2908 VALUE: REPORT_ID_KEYBOARD, TYPE_INPUT
+
+ //keyboard report out
+ HID_NORMAL_KB_REPORT_OUTPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | write| write_without_rsp
+ HID_NORMAL_KB_REPORT_OUTPUT_DP_H, //UUID: 2A4D, VALUE: reportKeyOut
+ HID_NORMAL_KB_REPORT_OUTPUT_REF_H, //UUID: 2908 VALUE: REPORT_ID_KEYBOARD, TYPE_OUTPUT
+
+ // report map
+ HID_REPORT_MAP_CD_H, //UUID: 2803, VALUE: Prop: Read
+ HID_REPORT_MAP_DP_H, //UUID: 2A4B, VALUE: reportKeyIn
+ HID_REPORT_MAP_EXT_REF_H, //UUID: 2907 VALUE: extService
+
+ //hid information
+ HID_INFORMATION_CD_H, //UUID: 2803, VALUE: Prop: read
+ HID_INFORMATION_DP_H, //UUID: 2A4A VALUE: hidInformation
+
+ //control point
+ HID_CONTROL_POINT_CD_H, //UUID: 2803, VALUE: Prop: write_without_rsp
+ HID_CONTROL_POINT_DP_H, //UUID: 2A4C VALUE: controlPoint
+
+
+ //// battery service ////
+ /**********************************************************************************************/
+ BATT_PS_H, //UUID: 2800, VALUE: uuid 180f
+ BATT_LEVEL_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ BATT_LEVEL_INPUT_DP_H, //UUID: 2A19 VALUE: batVal
+ BATT_LEVEL_INPUT_CCB_H, //UUID: 2902, VALUE: batValCCC
+
+
+ //// Ota ////
+ /**********************************************************************************************/
+ OTA_PS_H, //UUID: 2800, VALUE: telink ota service uuid
+ OTA_CMD_OUT_CD_H, //UUID: 2803, VALUE: Prop: read | write_without_rsp
+ OTA_CMD_OUT_DP_H, //UUID: telink ota uuid, VALUE: otaData
+ OTA_CMD_OUT_DESC_H, //UUID: 2901, VALUE: otaName
+
+
+
+ ATT_END_H,
+
+}ATT_HANDLE;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+/* Simulate uart debug Interface ---------------------------------------------*/
+#define SIMULATE_UART_EN 0
+#define DEBUG_TX_PIN GPIO_PB4
+#define DEBUG_BAUDRATE (115200)
+
+
+/* Debug Interface -----------------------------------------------------------*/
+#define DEBUG_GPIO_ENABLE 0
+
+#if(DEBUG_GPIO_ENABLE)
+ #define PB2_FUNC AS_GPIO //debug gpio chn0 : PB2
+ #define PB3_FUNC AS_GPIO //debug gpio chn1 : PB3
+ #define PB4_FUNC AS_GPIO //debug gpio chn2 : PB4
+ #define PB5_FUNC AS_GPIO //debug gpio chn3 : PB5
+ #define PA6_FUNC AS_GPIO //debug gpio chn4 : PA6
+
+ #define PB2_INPUT_ENABLE 0
+ #define PB3_INPUT_ENABLE 0
+ #define PB4_INPUT_ENABLE 0
+ #define PB5_INPUT_ENABLE 0
+ #define PA6_INPUT_ENABLE 0
+
+ #define PB2_OUTPUT_ENABLE 1
+ #define PB3_OUTPUT_ENABLE 1
+ #define PB4_OUTPUT_ENABLE 1
+ #define PB5_OUTPUT_ENABLE 1
+ #define PA6_OUTPUT_ENABLE 1
+
+
+ #define DBG_CHN0_LOW ( *(unsigned char *)0x80058b &= (~(1<<2)) )
+ #define DBG_CHN0_HIGH ( *(unsigned char *)0x80058b |= (1<<2) )
+ #define DBG_CHN0_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<2) )
+
+ #define DBG_CHN1_LOW ( *(unsigned char *)0x80058b &= (~(1<<3)) )
+ #define DBG_CHN1_HIGH ( *(unsigned char *)0x80058b |= (1<<3) )
+ #define DBG_CHN1_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<3) )
+
+ #define DBG_CHN2_LOW ( *(unsigned char *)0x80058b &= (~(1<<4)) )
+ #define DBG_CHN2_HIGH ( *(unsigned char *)0x80058b |= (1<<4) )
+ #define DBG_CHN2_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<4) )
+
+ #define DBG_CHN3_LOW ( *(unsigned char *)0x80058b &= (~(1<<5)) )
+ #define DBG_CHN3_HIGH ( *(unsigned char *)0x80058b |= (1<<5) )
+ #define DBG_CHN3_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<5) )
+
+ #define DBG_CHN4_LOW ( *(unsigned char *)0x800583 &= (~(1<<6)) )
+ #define DBG_CHN4_HIGH ( *(unsigned char *)0x800583 |= (1<<6) )
+ #define DBG_CHN4_TOGGLE ( *(unsigned char *)0x800583 ^= (1<<6) )
+#else
+ #define DBG_CHN0_LOW
+ #define DBG_CHN0_HIGH
+ #define DBG_CHN0_TOGGLE
+ #define DBG_CHN1_LOW
+ #define DBG_CHN1_HIGH
+ #define DBG_CHN1_TOGGLE
+ #define DBG_CHN2_LOW
+ #define DBG_CHN2_HIGH
+ #define DBG_CHN2_TOGGLE
+ #define DBG_CHN3_LOW
+ #define DBG_CHN3_HIGH
+ #define DBG_CHN3_TOGGLE
+ #define DBG_CHN4_LOW
+ #define DBG_CHN4_HIGH
+ #define DBG_CHN4_TOGGLE
+ #define DBG_CHN5_LOW
+ #define DBG_CHN5_HIGH
+ #define DBG_CHN5_TOGGLE
+
+#endif //end of DEBUG_GPIO_ENABLE
+
+
+
+
+
+
+
+
+
+
+/////////////////// set default ////////////////
+
+#include "../common/default_config.h"
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_sample/main.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_sample/main.c
new file mode 100644
index 0000000000000..c7c98e00c4f04
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_ble_sample/main.c
@@ -0,0 +1,81 @@
+/********************************************************************************************************
+ * @file main.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include
+#include "drivers.h"
+#include "stack/ble/ble.h"
+#include "../common/user_config.h"
+#include "../common/blt_fw_sign.h"
+
+
+
+_attribute_ram_code_ void irq_handler(void)
+{
+ irq_blt_sdk_handler();
+}
+
+int main(void)
+{
+ blc_pm_select_internal_32k_crystal();
+ //blc_pm_select_external_32k_crystal();
+
+ /***********************************************
+ * if the bin size is less than 48K, we recommend using this setting.
+ */
+ #if (FLASH_SIZE_OPTION == FLASH_SIZE_OPTION_128K) ///FLASH_SIZE_OPTION_128K
+ bls_ota_setFirmwareSizeAndOffset(48, 0x10000);///default : ota_firmware_size_k=128;ota_program_bootAddr=0x20000; it is for hawk 128K flash
+ bls_smp_configParingSecurityInfoStorageAddr(0x1C000);
+ #endif
+
+ cpu_wakeup_init();
+
+ #if (CLOCK_SYS_CLOCK_HZ == 16000000)
+ clock_init(SYS_CLK_16M_Crystal);
+ #elif (CLOCK_SYS_CLOCK_HZ == 32000000)
+ clock_init(SYS_CLK_32M_Crystal);
+ #elif (CLOCK_SYS_CLOCK_HZ == 48000000)
+ clock_init(SYS_CLK_48M_Crystal);
+ #endif
+
+ gpio_init();
+
+ /* load customized freq_offset CAP value and TP value. */
+ blc_app_loadCustomizedParameters();
+
+ rf_drv_init(RF_MODE_BLE_1M);
+
+ #if FIRMWARES_SIGNATURE_ENABLE
+ blt_firmware_signature_check();
+ #endif
+
+ user_init ();
+
+ irq_enable();
+ while (1) {
+ #if (MODULE_WATCHDOG_ENABLE)
+ wd_clear(); //clear watch dog
+ #endif
+
+ main_loop ();
+ }
+}
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app.c
new file mode 100644
index 0000000000000..7e81dc7491f5b
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app.c
@@ -0,0 +1,104 @@
+/********************************************************************************************************
+ * @file app.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "tl_common.h"
+#include "drivers.h"
+
+
+#if (__PROJECT_5316_DRIVER_TEST__ )
+
+extern void app_timer_test_init(void);
+extern void app_timerModule_led_init(void);
+extern void app_emi_init(void);
+extern void app_gpio_test_init(void);
+extern void app_gpioModule_led_init(void);
+
+extern void app_uart_test_init(void);
+extern void app_i2c_test_init(void);
+extern void app_spi_test_init(void);
+extern void app_adc_test_init(void);
+extern void app_pwm_test(void);
+extern void app_rf_emi_test_start(void);
+
+void user_init()
+{
+ #if (DRIVER_TEST_MODE == TEST_HW_TIMER)
+
+ app_timer_test_init();
+ app_timerModule_led_init();
+
+ #elif(DRIVER_TEST_MODE == TEST_GPIO_IRQ)
+
+ app_gpio_test_init();
+ app_gpioModule_led_init();
+
+ #elif(DRIVER_TEST_MODE == TEST_UART)
+
+ app_uart_test_init();
+
+ #elif(DRIVER_TEST_MODE == TEST_IIC)
+
+ app_i2c_test_init();
+
+ #elif(DRIVER_TEST_MODE == TEST_SPI)
+
+ app_spi_test_init();
+
+ #elif(DRIVER_TEST_MODE == TEST_ADC)
+
+ app_adc_test_init();
+
+ #elif(DRIVER_TEST_MODE == TEST_PWM)
+ app_pwm_test();
+ #elif(DRIVER_TEST_MODE == TEST_LOW_POWER)
+ ///v1.1.0 not support
+ #elif(DRIVER_TEST_MODE == TEST_RF_EMI)
+ app_emi_init();
+ #else
+
+ #endif
+
+}
+
+/*----------------------------------------------------------------------------*/
+/*--------- Main Loop ------------*/
+/*----------------------------------------------------------------------------*/
+void main_loop (void)
+{
+
+ #if (DRIVER_TEST_MODE == TEST_UART)
+ app_uart_test_start();
+ #elif(DRIVER_TEST_MODE == TEST_IIC)
+ app_i2c_test_start();
+ #elif(DRIVER_TEST_MODE == TEST_SPI)
+ app_spi_test_start();
+ #elif(DRIVER_TEST_MODE == TEST_ADC)
+ app_adc_test_start();
+ #elif(DRIVER_TEST_MODE == TEST_RF_EMI)
+ app_rf_emi_test_start();
+ #endif
+
+}
+
+
+
+#endif //end of __PROJECT_5316_DRIVER_TEST__
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_adc.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_adc.c
new file mode 100644
index 0000000000000..6d1480ff61ad6
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_adc.c
@@ -0,0 +1,50 @@
+/********************************************************************************************************
+ * @file app_adc.c
+ *
+ * @brief This is the ADC of application for TLSR8232
+ *
+ * @author junyuan.zhang ; junwei.lu
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ * @par History:
+ * 1.initial release(DEC. 26 2018)
+ *
+ * @version A001
+ *
+ *******************************************************************************************************/
+#include "tl_common.h"
+#include "drivers.h"
+
+#if (DRIVER_TEST_MODE == TEST_ADC)
+
+ #define ADC_CHECK_PIN GPIO_PB2 ///GPIO_PB3
+
+ void app_adc_test_init(void){
+ adc_init();
+ adc_base_init(ADC_CHECK_PIN); ////PA6/PA7; PB0~PB7
+ }
+
+
+ u32 tick_adc_sample = 0;
+ u16 current_adc_val = 0;
+ void app_adc_test_start(void){
+ if (clock_time_exceed(tick_adc_sample, 200*1000)){ /////entry code per 200ms
+
+ tick_adc_sample = clock_time();
+
+ current_adc_val = adc_set_sample_and_get_result();
+ }
+ }
+
+#endif //////
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_config.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_config.h
new file mode 100644
index 0000000000000..4408dd79e14dd
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_config.h
@@ -0,0 +1,152 @@
+/********************************************************************************************************
+ * @file app_config.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#define RC_BTN_ENABLE 1
+
+//////////////////////// TEST FEATURE SELECTION ///////////////////////////////
+
+#define TEST_HW_TIMER 1
+#define TEST_GPIO_IRQ 10
+#define TEST_UART 20
+#define TEST_IIC 30
+#define TEST_SPI 40
+#define TEST_ADC 50
+#define TEST_PWM 60
+#define TEST_LOW_POWER 70
+#define TEST_RF_EMI 80
+
+
+#define DRIVER_TEST_MODE TEST_RF_EMI
+
+
+
+
+
+/* LED -----------------------------------------------------------------------*/
+#define GPIO_LED GPIO_PB0
+
+
+
+/* System clock initialization -----------------------------------------------*/
+//#define INTERNAL_RC 0
+//#define EXTERNANL_XTAL 1
+//#define CLOCK_SRC EXTERNANL_XTAL
+
+#define CLOCK_SYS_CLOCK_HZ 16000000
+enum{
+ CLOCK_SYS_CLOCK_1S = CLOCK_SYS_CLOCK_HZ,
+ CLOCK_SYS_CLOCK_1MS = (CLOCK_SYS_CLOCK_1S / 1000),
+ CLOCK_SYS_CLOCK_1US = (CLOCK_SYS_CLOCK_1S / 1000000),
+};
+
+
+/* WatchDog ------------------------------------------------------------------*/
+#define MODULE_WATCHDOG_ENABLE 0
+#define WATCHDOG_INIT_TIMEOUT 500 //Unit:ms
+
+
+
+
+/* Debug Interface -----------------------------------------------------------*/
+#define DEBUG_GPIO_ENABLE 0
+
+#if(DEBUG_GPIO_ENABLE)
+ #define PB2_FUNC AS_GPIO //debug gpio chn0 : PB2
+ #define PB3_FUNC AS_GPIO //debug gpio chn1 : PB3
+ #define PB4_FUNC AS_GPIO //debug gpio chn2 : PB4
+ #define PB5_FUNC AS_GPIO //debug gpio chn3 : PB5
+ #define PA6_FUNC AS_GPIO //debug gpio chn4 : PA6
+ #define PA7_FUNC AS_GPIO //debug gpio chn5 : PA7
+
+ #define PB2_INPUT_ENABLE 0
+ #define PB3_INPUT_ENABLE 0
+ #define PB4_INPUT_ENABLE 0
+ #define PB5_INPUT_ENABLE 0
+ #define PA6_INPUT_ENABLE 0
+ #define PA7_INPUT_ENABLE 0
+
+ #define PB2_OUTPUT_ENABLE 1
+ #define PB3_OUTPUT_ENABLE 1
+ #define PB4_OUTPUT_ENABLE 1
+ #define PB5_OUTPUT_ENABLE 1
+ #define PA6_OUTPUT_ENABLE 1
+ #define PA7_OUTPUT_ENABLE 1
+
+ #define DBG_CHN0_LOW ( *(unsigned char *)0x80058b &= (~(1<<2)) )
+ #define DBG_CHN0_HIGH ( *(unsigned char *)0x80058b |= (1<<2) )
+ #define DBG_CHN0_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<2) )
+
+ #define DBG_CHN1_LOW ( *(unsigned char *)0x80058b &= (~(1<<3)) )
+ #define DBG_CHN1_HIGH ( *(unsigned char *)0x80058b |= (1<<3) )
+ #define DBG_CHN1_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<3) )
+
+ #define DBG_CHN2_LOW ( *(unsigned char *)0x80058b &= (~(1<<4)) )
+ #define DBG_CHN2_HIGH ( *(unsigned char *)0x80058b |= (1<<4) )
+ #define DBG_CHN2_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<4) )
+
+ #define DBG_CHN3_LOW ( *(unsigned char *)0x80058b &= (~(1<<5)) )
+ #define DBG_CHN3_HIGH ( *(unsigned char *)0x80058b |= (1<<5) )
+ #define DBG_CHN3_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<5) )
+
+ #define DBG_CHN4_LOW ( *(unsigned char *)0x800583 &= (~(1<<6)) )
+ #define DBG_CHN4_HIGH ( *(unsigned char *)0x800583 |= (1<<6) )
+ #define DBG_CHN4_TOGGLE ( *(unsigned char *)0x800583 ^= (1<<6) )
+
+ #define DBG_CHN5_LOW ( *(unsigned char *)0x800583 &= (~(1<<7)) )
+ #define DBG_CHN5_HIGH ( *(unsigned char *)0x800583 |= (1<<7) )
+ #define DBG_CHN5_TOGGLE ( *(unsigned char *)0x800583 ^= (1<<7) )
+#else
+ #define DBG_CHN0_LOW
+ #define DBG_CHN0_HIGH
+ #define DBG_CHN0_TOGGLE
+ #define DBG_CHN1_LOW
+ #define DBG_CHN1_HIGH
+ #define DBG_CHN1_TOGGLE
+ #define DBG_CHN2_LOW
+ #define DBG_CHN2_HIGH
+ #define DBG_CHN2_TOGGLE
+ #define DBG_CHN3_LOW
+ #define DBG_CHN3_HIGH
+ #define DBG_CHN3_TOGGLE
+ #define DBG_CHN4_LOW
+ #define DBG_CHN4_HIGH
+ #define DBG_CHN4_TOGGLE
+ #define DBG_CHN5_LOW
+ #define DBG_CHN5_HIGH
+ #define DBG_CHN5_TOGGLE
+
+#endif //end of DEBUG_GPIO_ENABLE
+
+
+
+#include "../common/default_config.h"
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_emi.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_emi.c
new file mode 100644
index 0000000000000..09db54bcf3b98
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_emi.c
@@ -0,0 +1,254 @@
+/********************************************************************************************************
+ * @file app_emi.c
+ *
+ * @brief This is the ADC of application for TLSR8232
+ *
+ * @author junyuan.zhang ; junwei.lu
+ * @date August. 30, 2019
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ * @par History:
+ * 1.initial release(DEC. 26 2018)
+ *
+ * @version A001
+ *
+ *******************************************************************************************************/
+#include "tl_common.h"
+#include "drivers.h"
+#include "tl_common.h"
+#include "drivers.h"
+
+struct test_list_s {
+ unsigned char cmd_id;
+ void (*func)(RF_ModeTypeDef rf_mode,RF_TxPowerTypeDef pwr,signed char rf_chn);
+};
+
+#define RF_RSSI 0x8004
+#define PACKTET_NUMBER_MODE 0X8005
+#define RUM_CMD 0x8006
+#define RIGIG_CMD 0X8007
+#define RF_POWER_LEVEL 0X8008
+#define RF_CHN 0x8009
+#define RF_MODE 0x800a
+#define RF_HOP_ENABLE 0x800b
+#define RF_REC_NUMB 0x800c
+
+
+#define CAP_VALUE 0x77000
+#define TP_INOF_ADDR 0x77040
+
+
+#define LED1 GPIO_PC1
+
+unsigned char mode=1;//1
+unsigned char power_level = 0;
+unsigned char chn = 2;//2
+unsigned char cmd_now=1;//2
+unsigned char run=1;
+
+void read_flash_para(void)
+{
+ unsigned char cap;
+ flash_read_page(CAP_VALUE,1,&cap);
+ if(cap != 0xff && cap > 0xbf && cap < 0xe0 )
+ {
+ WriteAnalogReg(0x81,cap);
+ }
+ else
+ {
+ WriteAnalogReg(0x81,0xd0);
+ }
+ if( ((*(unsigned char*) (TP_INOF_ADDR)) != 0xff) && ((*(unsigned char*) (TP_INOF_ADDR+1)) != 0xff) ){
+ rf_update_tp_value(*(unsigned char*) (TP_INOF_ADDR), *(unsigned char*) (TP_INOF_ADDR+1));
+ }
+
+ if ( ((*(unsigned char*) (TP_INOF_ADDR+2)) != 0xff) && ((*(unsigned char*) (TP_INOF_ADDR+3)) != 0xff) ){
+ rf_load_2m_tp_value(*(unsigned char*) (TP_INOF_ADDR+2), *(unsigned char*) (TP_INOF_ADDR+3));
+ }
+}
+
+void emi_init(void)
+{
+// write_reg32(0x408, 0x29417671 );//access code 0xf8118ac9
+
+ write_reg8(RUM_CMD, run);//run
+ write_reg8(RIGIG_CMD, cmd_now);//cmd
+ write_reg8(RF_POWER_LEVEL, power_level);//power
+ write_reg8(RF_CHN, chn);//chn
+ write_reg8(RF_MODE, mode);//mode
+ write_reg8(RF_RSSI, 0);
+ write_reg32(RF_REC_NUMB, 0);
+}
+
+void emicarrieronly(RF_ModeTypeDef rf_mode,RF_TxPowerTypeDef pwr,signed char rf_chn)
+{
+ rf_emi_single_tone(pwr,rf_chn);
+ while( ((read_reg8(RUM_CMD)) == run ) && ((read_reg8(RIGIG_CMD)) == cmd_now )\
+ && ((read_reg8(RF_POWER_LEVEL)) == power_level ) && ((read_reg8(RF_CHN)) == chn )\
+ && ((read_reg8(RF_MODE)) == mode ))
+ {
+ }
+ rf_set_tx_rx_off();
+}
+
+void emi_con_prbs9(RF_ModeTypeDef rf_mode,RF_TxPowerTypeDef pwr,signed char rf_chn)
+{
+ rf_emi_tx_continue_setup(rf_mode,pwr,rf_chn,0);
+
+ while( ((read_reg8(RUM_CMD)) == run ) && ((read_reg8(RIGIG_CMD)) == cmd_now )\
+ && ((read_reg8(RF_POWER_LEVEL)) == power_level ) && ((read_reg8(RF_CHN)) == chn )\
+ && ((read_reg8(RF_MODE)) == mode ))
+ {
+ rf_continue_mode_run();
+ }
+ rf_set_tx_rx_off();
+}
+
+void emi_con_tx0f(RF_ModeTypeDef rf_mode,RF_TxPowerTypeDef pwr,signed char rf_chn)
+{
+ rf_emi_tx_continue_setup(rf_mode,pwr,rf_chn,1);
+
+ while( ((read_reg8(RUM_CMD)) == run ) && ((read_reg8(RIGIG_CMD)) == cmd_now )\
+ && ((read_reg8(RF_POWER_LEVEL)) == power_level ) && ((read_reg8(RF_CHN)) == chn )\
+ && ((read_reg8(RF_MODE)) == mode ))
+ {
+ rf_continue_mode_run();
+ }
+ rf_set_tx_rx_off();
+}
+
+void emi_con_tx55(RF_ModeTypeDef rf_mode,RF_TxPowerTypeDef pwr,signed char rf_chn)
+{
+ rf_emi_tx_continue_setup(rf_mode,pwr,rf_chn,2);
+
+ while( ((read_reg8(RUM_CMD)) == run ) && ((read_reg8(RIGIG_CMD)) == cmd_now )\
+ && ((read_reg8(RF_POWER_LEVEL)) == power_level ) && ((read_reg8(RF_CHN)) == chn )\
+ && ((read_reg8(RF_MODE)) == mode ))
+ {
+ rf_continue_mode_run();
+ }
+ rf_set_tx_rx_off();
+}
+
+void emitxprbs9(RF_ModeTypeDef rf_mode,RF_TxPowerTypeDef pwr,signed char rf_chn)
+{
+ rf_emi_tx_brust_setup(rf_mode,pwr,rf_chn,0);
+ while( ((read_reg8(RUM_CMD)) == run ) && ((read_reg8(RIGIG_CMD)) == cmd_now )\
+ && ((read_reg8(RF_POWER_LEVEL)) == power_level ) && ((read_reg8(RF_CHN)) == chn )\
+ && ((read_reg8(RF_MODE)) == mode ))
+ {
+ rf_emi_tx_brust_loop(rf_mode,0);
+ }
+ rf_set_tx_rx_off();
+}
+
+void emitx0f(RF_ModeTypeDef rf_mode,RF_TxPowerTypeDef pwr,signed char rf_chn)
+{
+ rf_emi_tx_brust_setup(rf_mode,pwr,rf_chn,1);
+ while( ((read_reg8(RUM_CMD)) == run ) && ((read_reg8(RIGIG_CMD)) == cmd_now )\
+ && ((read_reg8(RF_POWER_LEVEL)) == power_level ) && ((read_reg8(RF_CHN)) == chn )\
+ && ((read_reg8(RF_MODE)) == mode ))
+ {
+ rf_emi_tx_brust_loop(rf_mode,1);
+ }
+ rf_set_tx_rx_off();
+}
+
+void emitx55(RF_ModeTypeDef rf_mode,RF_TxPowerTypeDef pwr,signed char rf_chn)
+{
+ rf_emi_tx_brust_setup(rf_mode,pwr,rf_chn,2);
+ while( ((read_reg8(RUM_CMD)) == run ) && ((read_reg8(RIGIG_CMD)) == cmd_now )\
+ && ((read_reg8(RF_POWER_LEVEL)) == power_level ) && ((read_reg8(RF_CHN)) == chn )\
+ && ((read_reg8(RF_MODE)) == mode ))
+ {
+ rf_emi_tx_brust_loop(rf_mode,2);
+ }
+ rf_set_tx_rx_off();
+}
+
+void emirx(RF_ModeTypeDef rf_mode, RF_TxPowerTypeDef pwr,signed char rf_chn)
+{
+ rf_emi_rx(rf_mode,rf_chn);
+ while( ((read_reg8(RUM_CMD)) == run ) && ((read_reg8(RIGIG_CMD)) == cmd_now )\
+ && ((read_reg8(RF_POWER_LEVEL)) == power_level ) && ((read_reg8(RF_CHN)) == chn )\
+ && ((read_reg8(RF_MODE)) == mode ))
+ {
+ rf_emi_rx_loop();
+ if(rf_emi_get_rxpkt_cnt()!=read_reg32(0x84000c))
+ {
+ write_reg8(RF_RSSI,rf_emi_get_rssi_avg());
+ write_reg32(RF_REC_NUMB,rf_emi_get_rxpkt_cnt());
+ }
+ }
+ rf_set_tx_rx_off();
+}
+
+struct test_list_s ate_list[] = {
+ {0x01,emicarrieronly},
+ {0x02,emi_con_prbs9},
+ {0x03,emirx},
+ {0x04,emitxprbs9},
+ {0x05,emitx55},
+ {0x06,emitx0f},
+ //{0x07,emi_con_tx55},
+ //{0x08,emi_con_tx0f},
+};
+
+void app_rf_emi_test_start(void)
+{
+ unsigned char i=0;
+
+ while(1)
+ {
+ run = read_reg8(RUM_CMD); // get the run state!
+ if(run!=0)
+ {
+
+ IRQ_Disable();
+ power_level = read_reg8(RF_POWER_LEVEL);
+ chn = read_reg8(RF_CHN);
+ mode = read_reg8(RF_MODE);
+ cmd_now = read_reg8(RIGIG_CMD); // get the command!
+
+ for (i=0; i 1/38k -> 1000/38 = 26 us
+#define PWM_CARRIER_CYCLE_TICK ( CLOCK_SYS_CLOCK_HZ/IR_CARRIER_FREQ ) //16M: 421 tick, f = 16000000/421 = 38004,T = 421/16=26.3125 us
+#define PWM_CARRIER_HIGH_TICK ( PWM_CARRIER_CYCLE_TICK/3 ) // 1/3 duty
+
+
+#define PWM_IR_MAX_NUM 64 //user can define this max number
+typedef struct{
+ unsigned int dma_len; // dma len
+ unsigned short data[PWM_IR_MAX_NUM];
+ unsigned int data_num;
+}pwm_dma_data_t;
+
+
+pwm_dma_data_t T_dmaData_buf;
+
+/*********************************************************************************
+ PWM0 : PA0. PB3
+ PWM0_N : PB6 PC2
+
+ PWM1 : PB1. PB7
+ PWM1_N : PA2. PB4
+
+ PWM2 : PA4. PB2
+ PWM2_N : PC1
+ *********************************************************************************/
+
+
+void app_pwm_test(void){
+
+ WaitMs(1000);
+
+ reg_clk_en1 |= FLD_CLK1_PWM_EN;
+ pwm_set_clk(CLOCK_SYS_CLOCK_HZ, CLOCK_SYS_CLOCK_HZ);
+
+ #if (TEST_PWM_SELECT == PWM_NORMAL)
+
+ gpio_set_func(GPIO_PA0, AS_PWM0);
+ pwm_set_mode(PWM0_ID, PWM_NORMAL_MODE);
+ pwm_set_cycle_and_duty(PWM0_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (500 * CLOCK_SYS_CLOCK_1US) );
+ pwm_start(PWM0_ID);
+
+ #elif 1 //(TEST_PWM_SELECT == PWM_IR_DMA_FIFO)
+
+ //only pwm0 support fifo mode
+ gpio_set_func(GPIO_PA0, AS_PWM0);
+ pwm_set_mode(PWM0_ID, PWM_IR_DMA_FIFO_MODE);
+ //pwm_set_phase(PWM0_ID, 0); //no phase at pwm beginning
+
+ //config TMAX0 & TCMP0: 38k, 1/3 duty
+ pwm_set_cycle_and_duty(PWM0_ID, PWM_CARRIER_CYCLE_TICK, PWM_CARRIER_HIGH_TICK );
+
+
+
+ //config waveforms
+ T_dmaData_buf.data_num = 0;
+
+ //preamble: 9 ms carrier, 4.5 ms low
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 9000 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 4500 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+ //data 1 : 560 us carrier, 560 us low
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+
+ //data 0 : 560 us carrier, 1690 us low
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++]= pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 1690 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+
+ //end: 560 us carrier
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+ //calculate dma len
+ T_dmaData_buf.dma_len = T_dmaData_buf.data_num * 2;
+
+
+
+
+ pwm_set_dma_address(&T_dmaData_buf);
+
+
+
+ //add pwm0 dma fifo done irq, when all waveform send over, this irq will triggers
+ //enable mcu global irq
+ irq_enable();
+
+ //enable system irq PWM
+ reg_irq_mask |= FLD_IRQ_SW_PWM_EN;
+
+ //enable pwm0 ir dma fifo done irq
+ reg_pwm_irq_sta = FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //clear irq status
+ reg_pwm_irq_mask |= FLD_IRQ_PWM0_IR_DMA_FIFO_DONE;
+
+
+ //PWM0 ir dma fifo mode begin
+ pwm_start_dma_ir_sending();
+
+ DBG_CHN0_HIGH; //debug
+ #endif
+}
+
+_attribute_ram_code_ void app_pwm_irq_test_proc(void)
+{
+
+ if(reg_pwm_irq_sta & FLD_IRQ_PWM0_IR_DMA_FIFO_DONE){
+ reg_pwm_irq_sta = FLD_IRQ_PWM0_IR_DMA_FIFO_DONE;
+ DBG_CHN0_LOW; //finish
+ }
+}
+
+#endif ////end of (DRIVER_TEST_MODE == TEST_PWM)
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_spi.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_spi.c
new file mode 100644
index 0000000000000..d34df8d576074
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_spi.c
@@ -0,0 +1,93 @@
+/********************************************************************************************************
+ * @file app_spi.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author peng.sun
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "tl_common.h"
+#include "drivers.h"
+
+#if (DRIVER_TEST_MODE == TEST_SPI)
+
+#define SPI_DEVICE_MASTER 1 ///1:master ; 0:slave
+
+#if (SPI_DEVICE_MASTER) ///just for spi master
+ #define BUFF_DATA_LEN 16
+ #define SPI_CS_PIN GPIO_PC2//SPI CS pin
+ #define SLAVE_ADDR 0x8000
+ #define SLAVE_ADDR_LEN 2
+
+ volatile unsigned char spi_tx_buff[BUFF_DATA_LEN]={0x00,0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0xaa,0xbb,0xcc,0xdd,0xee,0xff};
+ volatile unsigned char spi_rx_buff[BUFF_DATA_LEN]={0x00};
+ u32 spi_start_tick = 0;
+#endif
+
+
+//////////////////////////////
+void app_spi_test_init(void){
+ #if (SPI_DEVICE_MASTER) ///master
+ spi_master_init((unsigned char)(CLOCK_SYS_CLOCK_HZ/(2*500000)-1),SPI_MODE0);//div_clock. spi_clk = sys_clk/((div_clk+1)*2),mode select
+ spi_master_set_pin(SPI_GPIO_GROUP_C2C3C4C5);//master mode: spi pin set
+ spi_start_tick = clock_time();
+ #else ///SPI_SLAVE_DEVICE //slave
+ spi_slave_init((unsigned char)(CLOCK_SYS_CLOCK_HZ/(2*500000)-1),SPI_MODE0); //slave mode init
+ spi_slave_set_pin(SPI_GPIO_GROUP_C2C3C4C5); //slave mode spi pin set
+
+ spi_irq_enable();
+
+ #endif
+}
+
+////////////////////////
+#if (SPI_DEVICE_MASTER)
+ void spi_master_mainloop(void){
+ spi_tx_buff[0] ++;
+ spi_write_buff(SLAVE_ADDR, SLAVE_ADDR_LEN,(unsigned char*)spi_tx_buff, BUFF_DATA_LEN,SPI_CS_PIN);
+ spi_read_buff(SLAVE_ADDR, SLAVE_ADDR_LEN,(unsigned char*)spi_rx_buff, BUFF_DATA_LEN,SPI_CS_PIN);
+ WaitMs(100);
+ }
+#else
+ void spi_slave_mainloop(void){
+
+ }
+#endif
+
+////////////////////////////
+void app_spi_test_start(void){
+ #if (SPI_DEVICE_MASTER)
+ spi_master_mainloop();
+ #else
+ spi_slave_mainloop();
+ #endif
+}
+
+u32 spi_irq_cnt = 0;
+_attribute_ram_code_ void app_spi_test_irq_proc(void){
+
+ unsigned char irq_status = reg_spi_slave_irq_status;
+ //irq will occur when cs low then high
+ if(irq_status & FLD_HOST_CMD_IRQ) ///spi can not distinguish host write and read.
+ {
+ reg_spi_slave_irq_status = irq_status;
+ spi_irq_cnt ++; ///just for debug
+ DBG_CHN0_TOGGLE;
+ }
+}
+
+
+#endif ///end of #if (DRIVER_TEST_MODE == TEST_SPI)
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_timer.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_timer.c
new file mode 100644
index 0000000000000..b26f5af8824fc
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_timer.c
@@ -0,0 +1,97 @@
+/********************************************************************************************************
+ * @file app_timer.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author BLE Group
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ * @par History:
+ * 1.initial release(DEC. 26 2018)
+ *
+ * @version A001
+ *
+ *******************************************************************************************************/
+#include "tl_common.h"
+#include "drivers.h"
+
+#if (DRIVER_TEST_MODE == TEST_HW_TIMER)
+
+#define TIMER_SYS_CLOCK_MODE 1
+#define TIMER_GPIO_TRIGGER_MODE 2
+#define TIMER_GPIO_WIDTH_MODE 3
+#define TIMER_TICK_MODE 4
+
+#define TIMER_MODE TIMER_TICK_MODE
+//////////////////////////////////////
+#define GPIO_TRIGGER_PIN GPIO_PC2
+#define GPIO_PULSE_PIN GPIO_PC2
+
+void app_timerModule_led_init(void){
+ //1.init the LED pin,for indication
+ gpio_set_func(GPIO_LED ,AS_GPIO);
+ gpio_set_output_en(GPIO_LED, 1); //enable output
+ gpio_set_input_en(GPIO_LED ,0); //disable input
+ gpio_write(GPIO_LED, 0); //LED On
+}
+
+void app_timer_test_init(void){
+ WaitMs(2000); //leave enough time for SWS_reset when power on
+
+ #if (TIMER_MODE==TIMER_SYS_CLOCK_MODE)
+ timer2_set_mode(TIMER_MODE_SYSCLK,0,1000 * CLOCK_SYS_CLOCK_1MS);
+ timer_start(TIMER2);
+ #elif(TIMER_MODE==TIMER_GPIO_TRIGGER_MODE)
+ timer2_gpio_init(GPIO_TRIGGER_PIN, GPIO_Pol_falling);
+ irq_enable();
+ timer2_set_mode(TIMER_MODE_GPIO_TRIGGER,0,3);
+ timer_start(TIMER2);
+ #elif(TIMER_MODE==TIMER_GPIO_WIDTH_MODE)
+ timer2_gpio_init(GPIO_PULSE_PIN, GPIO_Pol_falling);
+ irq_enable();
+ timer2_set_mode(TIMER_MODE_GPIO_WIDTH,0,0);
+ timer_start(TIMER2);
+ #elif(TIMER_MODE==TIMER_TICK_MODE)
+ timer2_set_mode(TIMER_MODE_TICK,0,0);
+ timer_start(TIMER2);
+ #endif
+}
+
+int timer2_irq_cnt = 0;
+unsigned int gpio_width =0;
+
+_attribute_ram_code_ void app_timer_test_irq_proc(void){
+ #if(TIMER_MODE == TIMER_GPIO_TRIGGER_MODE)
+
+ if(reg_tmr_sta & FLD_TMR_STA_TMR2)
+ {
+ reg_tmr_sta |= FLD_TMR_STA_TMR2; //clear irq status
+
+ timer2_irq_cnt ++;
+ gpio_toggle(GPIO_LED);
+ }
+ #elif(TIMER_MODE == TIMER_GPIO_WIDTH_MODE)
+
+ if(reg_tmr_sta & FLD_TMR_STA_TMR2)
+ {
+ reg_tmr_sta |= FLD_TMR_STA_TMR2; //clear irq status
+
+ gpio_width = reg_tmr2_tick;
+ reg_tmr2_tick = 0;
+ }
+ #endif
+}
+
+
+#endif /////end of #if (DRIVER_TEST_MODE == TEST_HW_TIMER)
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_uart.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_uart.c
new file mode 100644
index 0000000000000..ebbe340b58e83
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_driver_test/app_uart.c
@@ -0,0 +1,234 @@
+/********************************************************************************************************
+ * @file app_uart.c
+ *
+ * @brief This is the source file for TLSR8232
+ *
+ * @author peng.sun ; yang.ye
+ * @date May 8, 2018
+ *
+ * @par Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee or the terms described here-in. This heading
+ * MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ * @par History:
+ * 1.initial release(DEC. 26 2018)
+ *
+ * @version A001
+ *
+ *******************************************************************************************************/
+#include "tl_common.h"
+#include "drivers.h"
+
+#if (DRIVER_TEST_MODE == TEST_UART)
+
+#define UART_DMA 1
+#define UART_NDMA 2
+#define UART_MODE UART_DMA
+
+#if (UART_MODE == UART_NDMA)
+ #define NORMAL 1
+ #define USE_CTS 2
+ #define USE_RTS 3
+
+ #define FLOW_CTR NORMAL
+
+ #if( FLOW_CTR==NORMAL)
+ u8 uart_rx_flag = 0;
+ u8 uart_ndmairq_index = 0;
+ u8 uart_ndmairq_cnt = 0;
+ #endif
+ #if( FLOW_CTR==USE_CTS)
+ u8 uart_cts_count = 0;
+ #define STOP_VOLT 1 //0 :Low level stops TX. 1 :High level stops TX.
+ #endif
+
+ #if (FLOW_CTR==USE_RTS)
+ #define RTS_MODE UART_RTS_MODE_AUTO //It can be UART_RTS_MODE_AUTO/UART_RTS_MODE_MANUAL.
+ #define RTS_THRESH 4 //UART_RTS_MODE_AUTO need.It indicates RTS trigger threshold.
+ #define RTS_INVERT 1 //UART_RTS_MODE_AUTO need.0 indicates RTS_pin will change from low to hign.
+ #define RTS_POLARITY 0 //UART_RTS_MODE_MANUAL need. It indicates RTS_POLARITY .
+ #endif
+#endif
+
+volatile unsigned char uart_dmairq_tx_cnt;
+volatile unsigned char uart_dmairq_rx_cnt;
+
+
+#define REV_BUFF_LE 16
+#define TRANS_BUFF_LEN 16
+
+__attribute__((aligned(4))) unsigned char rec_buff[REV_BUFF_LE] = {0};
+// dma len must be 4 byte
+__attribute__((aligned(4))) unsigned char trans_buff[TRANS_BUFF_LEN] = {0x0c, 0x00, 0x00, 0x00, 0x11, 0x22, 0x33, 0x44,
+ 0x55, 0x66, 0x77, 0x88, 0x99, 0xaa, 0xbb, 0xcc};
+
+
+#if(UART_MODE == UART_DMA)
+ void app_uart_test_init(void){
+ WaitMs(2000); //leave enough time for SWS_reset when power on
+ //note: dma addr must be set first before any other uart initialization! (confirmed by sihui)
+ uart_set_recbuff( (unsigned short *)&rec_buff, sizeof(rec_buff));
+
+ uart_set_pin(UART_TX_PA3, UART_RX_PA4);// uart tx/rx pin set
+
+ uart_reset(); //will reset uart digital registers from 0x90 ~ 0x9f, so uart setting must set after this reset
+
+ ////9&13 indicate baud rate is 115200. other baud rate, pls use lua tool to calculate.
+ uart_init_baudrate(9, 13,PARITY_NONE, STOP_BIT_ONE);
+
+ uart_dma_en(1, 1); //uart data in hardware buffer moved by dma, so we need enable them first
+
+ irq_set_mask(FLD_IRQ_DMA_EN);
+
+ dma_chn_irq_enable(FLD_DMA_CHN_UART_RX | FLD_DMA_CHN_UART_TX, 1); //uart Rx/Tx dma irq enable
+
+ uart_irq_en(0, 0); //uart Rx/Tx irq no need, disable them
+
+ irq_enable();
+ }
+
+ void app_uart_test_start(void){
+ WaitMs(1000);
+ uart_dma_send((unsigned short*)&rec_buff);
+ WaitMs(300);
+ uart_dma_send((unsigned short*)&trans_buff);
+ }
+
+#elif(UART_MODE == UART_NDMA)
+ void app_uart_test_init(void){
+ WaitMs(2000); //leave enough time for SWS_reset when power on
+ //note: dma addr must be set first before any other uart initialization! (confirmed by sihui)
+ uart_set_recbuff( (unsigned short *)&rec_buff, sizeof(rec_buff));
+
+ uart_set_pin(UART_TX_PA3, UART_RX_PA4);// uart tx/rx pin set
+
+ uart_reset(); //will reset uart digital registers from 0x90 ~ 0x9f, so uart setting must set after this reset
+
+ //9&13 indicate the baud rate is 115200. other baud rate, pls use lua tool to calculate.
+ uart_init_baudrate(9, 13, PARITY_NONE, STOP_BIT_ONE);
+
+ #if( FLOW_CTR == NORMAL)
+
+ uart_dma_en(0, 0);
+
+ irq_clr_mask(FLD_IRQ_DMA_EN);
+
+ dma_chn_irq_enable(FLD_DMA_CHN_UART_RX | FLD_DMA_CHN_UART_TX, 0);
+
+ uart_irq_en(1,0); //uart RX irq enable
+
+ uart_ndma_set_triglevel(1,0); //set the trig level. 1 indicate one byte will occur interrupt
+
+ #elif( FLOW_CTR == USE_CTS )
+ //CTS pin.It can be A1/B2/B7/C2.
+ uart_set_cts(1, STOP_VOLT, UART_CTS_PC2);
+
+ uart_dma_en(0, 0); //Disable DMA
+
+ irq_clr_mask(FLD_IRQ_DMA_EN);
+
+ dma_chn_irq_enable(FLD_DMA_CHN_UART_RX | FLD_DMA_CHN_UART_TX, 0); //Disable DMA irq
+
+ uart_irq_en(0,0); //uart RX irq disable
+
+ #elif( FLOW_CTR == USE_RTS )
+ // RTS pin : A2 B3 B6 C3
+ uart_set_rts(1, RTS_MODE, RTS_THRESH, RTS_INVERT,UART_RTS_PA2);
+ uart_dma_en(0, 0);
+
+ irq_clr_mask(FLD_IRQ_DMA_EN);
+ dma_chn_irq_enable(FLD_DMA_CHN_UART_RX | FLD_DMA_CHN_UART_TX, 0);
+
+ uart_irq_en(1,0); //uart RX irq enable
+
+ uart_ndma_set_triglevel(RTS_THRESH,0);
+ #endif
+
+ irq_enable();
+ }
+
+
+ void app_uart_test_start(void){
+ WaitMs(1000);
+ #if( FLOW_CTR == NORMAL)
+
+ for(unsigned char i=0;i0){
+ uart_ndmairq_cnt=0; //Clear uart_ndmairq_cnt
+ uart_rx_flag=0;
+ for(unsigned char i=0;i
+#include "drivers.h"
+#include "stack/ble/ble.h"
+#include "../common/user_config.h"
+
+#if (REMOTE_IR_ENABLE)
+#include "rc_ir.h"
+#endif
+
+extern void user_init();
+extern void main_loop (void);
+extern _attribute_ram_code_ void app_pwm_ir_test_proc(void);
+extern _attribute_ram_code_ void app_uart_test_irq_proc(void);
+extern _attribute_ram_code_ void app_i2c_test_irq_proc(void);
+extern _attribute_ram_code_ void app_spi_test_irq_proc(void);
+extern _attribute_ram_code_ void app_gpio_test_irq_proc(void);
+
+_attribute_ram_code_ void irq_handler(void)
+{
+ #if (DRIVER_TEST_MODE == TEST_HW_TIMER)
+ app_timer_test_irq_proc();
+ #elif (DRIVER_TEST_MODE == TEST_PWM)
+ app_pwm_irq_test_proc();
+ #elif(DRIVER_TEST_MODE == TEST_UART)
+ app_uart_test_irq_proc();
+ #elif(DRIVER_TEST_MODE == TEST_IIC)
+ app_i2c_test_irq_proc();
+ #elif(DRIVER_TEST_MODE == TEST_SPI)
+ app_spi_test_irq_proc();
+ #elif(DRIVER_TEST_MODE == TEST_GPIO_IRQ)
+ app_gpio_test_irq_proc();
+ #endif
+}
+
+int main(void){
+
+ blc_pm_select_internal_32k_crystal();
+
+ cpu_wakeup_init();
+
+ clock_init(SYS_CLK_16M_Crystal);
+
+ gpio_init();
+
+ /* load customized freq_offset CAP value and TP value.*/
+ blc_app_loadCustomizedParameters(); //do this operation before "rf_drv_init"
+
+ rf_drv_init(RF_MODE_BLE_1M);
+
+ user_init ();
+
+ while (1) {
+ #if (MODULE_WATCHDOG_ENABLE)
+ wd_clear(); //clear watch dog
+ #endif
+ main_loop ();
+ }
+}
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/app.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/app.c
new file mode 100644
index 0000000000000..476146a035d00
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/app.c
@@ -0,0 +1,917 @@
+/********************************************************************************************************
+ * @file app.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include
+#include "tl_common.h"
+#include "drivers.h"
+#include "../common/blt_led.h"
+#include "../common/keyboard.h"
+#include "../common/blt_soft_timer.h"
+#include "../common/blt_common.h"
+#include "rf_2p4g.h"
+#include "battery_check.h"
+#include "rc_ir.h"
+
+
+#if (__PROJECT_5316_DUAL_MODE__)
+
+systemStatus_t sys_status = {
+ 0,
+ 0,
+ 0,
+ SYS_2P4G_MODE,
+};
+
+#define RC_DEEP_SLEEP_EN 1
+#define ADV_IDLE_ENTER_DEEP_TIME 60 //60 s
+#define CONN_IDLE_ENTER_DEEP_TIME 60 //60 s
+
+#define MY_DIRECT_ADV_TMIE 2000000
+
+#define MY_APP_ADV_CHANNEL BLT_ENABLE_ADV_ALL
+
+#define MY_ADV_INTERVAL_MIN ADV_INTERVAL_30MS
+#define MY_ADV_INTERVAL_MAX ADV_INTERVAL_35MS
+
+
+
+#define BLE_DEVICE_ADDRESS_TYPE BLE_DEVICE_ADDRESS_PUBLIC
+
+own_addr_type_t app_own_address_type = OWN_ADDRESS_PUBLIC;
+
+
+
+MYFIFO_INIT(blt_rxfifo, 64, 8);
+MYFIFO_INIT(blt_txfifo, 40, 16);
+
+
+/* ADV Packet, SCAN Response Packet define */
+const u8 tbl_advData[] = {
+ 0x05, 0x09, 'G', 'h', 'i', 'd',
+ 0x02, 0x01, 0x05, // BLE limited discoverable mode and BR/EDR not supported
+ 0x03, 0x19, 0x80, 0x01, // 384, Generic Remote Control, Generic category
+ 0x05, 0x02, 0x12, 0x18, 0x0F, 0x18, // incomplete list of service class UUIDs (0x1812, 0x180F)
+};
+
+const u8 tbl_scanRsp [] = {
+ 0x08, 0x09, 'G', 'R', 'e', 'm', 'o', 't', 'e',
+};
+
+u32 interval_update_tick = 0;
+int device_in_connection_state;
+
+/* LED Management define */
+enum{
+ LED_POWER_ON = 0,
+ LED_AUDIO_ON, //1
+ LED_AUDIO_OFF, //2
+ LED_SHINE_SLOW, //3
+ LED_SHINE_FAST, //4
+ LED_SHINE_OTA, //5
+};
+
+const led_cfg_t led_cfg[] = {
+ {1000, 0, 1, 0x00, }, //power-on, 1s on
+ {100, 0 , 0xff, 0x02, }, //audio on, long on
+ {0, 100 , 0xff, 0x02, }, //audio off, long off
+ {500, 500 , 2, 0x04, }, //1Hz for 3 seconds
+ {250, 250 , 4, 0x04, }, //2Hz for 3 seconds
+ {250, 250 , 200, 0x08, }, //2Hz for 50 seconds
+};
+
+u32 advertise_begin_tick;
+
+
+unsigned int lowBattDet_tick = 0;
+
+int ui_mtu_size_exchange_req = 0;
+
+/* Key type Macro */
+#define IDLE_KEY 0
+#define CONSUMER_KEY 1
+#define KEYBOARD_KEY 2
+#define IR_KEY 3
+
+u8 key_type;
+u8 user_key_mode;
+
+u8 key_buf[8] = {0};
+
+int key_not_released;
+
+int ir_not_released;
+
+u32 latest_user_event_tick;
+
+u8 user_task_flg;
+u8 sendTerminate_before_enterDeep = 0;
+u8 ota_is_working = 0;
+
+/* User Consumer Key Map */
+static u16 vk_consumer_map[16] = {
+ MKEY_VOL_UP,
+ MKEY_VOL_DN,
+ MKEY_MUTE,
+ MKEY_CHN_UP,
+
+ MKEY_CHN_DN,
+ MKEY_POWER,
+ MKEY_AC_SEARCH,
+ MKEY_RECORD,
+
+ MKEY_PLAY,
+ MKEY_PAUSE,
+ MKEY_STOP,
+ MKEY_FAST_FORWARD, //can not find fast_backword in <>
+
+ MKEY_FAST_FORWARD,
+ MKEY_AC_HOME,
+ MKEY_AC_BACK,
+ MKEY_MENU,
+};
+
+#if (STUCK_KEY_PROCESS_ENABLE)
+ u32 stuckKey_keyPressTime;
+#endif
+
+/*----------------------------------------------------------------------------*/
+/*------------- IR Function ----------------*/
+/*----------------------------------------------------------------------------*/
+#if (REMOTE_IR_ENABLE)
+//ir key
+#define TYPE_IR_SEND 1
+#define TYPE_IR_RELEASE 2
+
+///////////////////// key mode //////////////////////
+#define KEY_MODE_BLE 0 //ble key
+#define KEY_MODE_IR 1 //ir key
+
+static const u8 kb_map_ble[] = KB_MAP_BLE; //5*6
+static const u8 kb_map_ir[] = KB_MAP_IR; //5*6
+
+void ir_dispatch(u8 type, u8 syscode ,u8 ircode){
+ if(type == TYPE_IR_SEND){
+ ir_nec_send(syscode,~(syscode),ircode);
+
+ }
+ else if(type == TYPE_IR_RELEASE){
+ ir_send_release();
+ }
+}
+#endif
+
+
+/*----------------------------------------------------------------------------*/
+/*------------- OTA Function ----------------*/
+/*----------------------------------------------------------------------------*/
+#if (BLE_REMOTE_OTA_ENABLE)
+void entry_ota_mode(void)
+{
+ ota_is_working = 1;
+ device_led_setup(led_cfg[LED_SHINE_OTA]);
+ bls_ota_setTimeout(15 * 1000 * 1000); //set OTA timeout 15 seconds
+}
+
+void LED_show_ota_result(int result)
+{
+ #if 0
+ irq_disable();
+ WATCHDOG_DISABLE;
+
+ gpio_set_output_en(GPIO_LED, 1);
+
+ if(result == OTA_SUCCESS){ //OTA success
+ gpio_write(GPIO_LED, 1);
+ sleep_us(2000000); //led on for 2 second
+ gpio_write(GPIO_LED, 0);
+ }
+ else{ //OTA fail
+
+ }
+
+ gpio_set_output_en(GPIO_LED, 0);
+ #endif
+}
+#endif
+
+
+
+
+/*----------------------------------------------------------------------------*/
+/*------------- CallBack function of BLE ----------------*/
+/*----------------------------------------------------------------------------*/
+void app_switch_to_indirect_adv(u8 e, u8 *p, int n)
+{
+
+ bls_ll_setAdvParam( MY_ADV_INTERVAL_MIN, MY_ADV_INTERVAL_MAX,
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, app_own_address_type,
+ 0, NULL,
+ MY_APP_ADV_CHANNEL,
+ ADV_FP_NONE);
+
+ bls_ll_setAdvEnable(1); //must: set adv enable
+}
+
+void ble_remote_terminate(u8 e,u8 *p, int n) //*p is terminate reason
+{
+ device_in_connection_state = 0;
+
+ if(*p == HCI_ERR_CONN_TIMEOUT){
+
+ }else if(*p == HCI_ERR_REMOTE_USER_TERM_CONN){ //0x13
+
+ }else if(*p == HCI_ERR_CONN_TERM_MIC_FAILURE){
+
+ }else{
+
+ }
+
+#if (BLE_REMOTE_PM_ENABLE)
+ //user has push terminate pkt to ble TX buffer before deepsleep
+ if(sendTerminate_before_enterDeep == 1){
+ sendTerminate_before_enterDeep = 2;
+ }
+#endif
+
+
+ advertise_begin_tick = clock_time();
+}
+
+void task_connect (u8 e, u8 *p, int n)
+{
+ bls_l2cap_requestConnParamUpdate (8, 8, 99, 400); //interval=10ms latency=99 timeout=4s
+
+ latest_user_event_tick = clock_time();
+
+ ui_mtu_size_exchange_req = 1;
+
+ device_in_connection_state = 1;//
+
+ interval_update_tick = clock_time() | 1; //none zero
+}
+
+/*----------------------------------------------------------------------------*/
+/*------------- Key Function ----------------*/
+/*----------------------------------------------------------------------------*/
+#if(RC_BTN_ENABLE)
+void deep_wakeup_proc(void)
+{
+#if(DEEPBACK_FAST_KEYSCAN_ENABLE)
+
+#if (REMOTE_IR_ENABLE)
+ if(KEY_MODE_IR == analog_read(DEEP_ANA_REG1)){
+ return ;
+ }
+#endif
+ //if deepsleep wakeup is wakeup by GPIO(key press), we must quickly scan this
+ //press, hold this data to the cache, when connection established OK, send to master
+ //deepsleep_wakeup_fast_keyscan
+ if(analog_read(DEEP_ANA_REG0) == CONN_DEEP_FLG){
+ if(kb_scan_key (KB_NUMLOCK_STATUS_POWERON, 1) && kb_event.cnt){
+ deepback_key_state = DEEPBACK_KEY_CACHE;
+ key_not_released = 1;
+ memcpy(&kb_event_cache,&kb_event,sizeof(kb_event));
+ }
+
+ analog_write(DEEP_ANA_REG0, 0);
+ }
+#endif
+}
+
+void deepback_pre_proc(int *det_key)
+{
+#if (DEEPBACK_FAST_KEYSCAN_ENABLE)
+ // to handle deepback key cache
+ if(!(*det_key) && deepback_key_state == DEEPBACK_KEY_CACHE
+ && blc_ll_getCurrentState() == BLS_LINK_STATE_CONN
+ && clock_time_exceed(bls_ll_getConnectionCreateTime(), 25000))
+ {
+ memcpy(&kb_event,&kb_event_cache,sizeof(kb_event));
+ *det_key = 1;
+
+ if(key_not_released || kb_event_cache.keycode[0] == VOICE){ //no need manual release
+ deepback_key_state = DEEPBACK_KEY_IDLE;
+ }
+ else{ //need manual release
+ deepback_key_tick = clock_time();
+ deepback_key_state = DEEPBACK_KEY_WAIT_RELEASE;
+ }
+ }
+#endif
+}
+
+void deepback_post_proc(void)
+{
+#if (DEEPBACK_FAST_KEYSCAN_ENABLE)
+ //manual key release
+ if(deepback_key_state == DEEPBACK_KEY_WAIT_RELEASE && clock_time_exceed(deepback_key_tick,150000)){
+ key_not_released = 0;
+
+ key_buf[2] = 0;
+ bls_att_pushNotifyData (HID_NORMAL_KB_REPORT_INPUT_DP_H, key_buf, 8); //release
+ deepback_key_state = DEEPBACK_KEY_IDLE;
+ }
+#endif
+}
+
+void key_change_proc(void)
+{
+ latest_user_event_tick = clock_time(); //record latest key change time
+
+ u8 key0 = kb_event.keycode[0];
+ //u8 key1 = kb_event.keycode[1];
+ u8 key_value;
+
+ key_not_released = 1;
+ if (kb_event.cnt == 2) //two key press, do not process
+ {
+#if KB_MODE_EXCHANGE
+ if((kb_event.keycode[0] == VK_ENTER && kb_event.keycode[1] == VK_RIGHT)
+ ||(kb_event.keycode[0] == VK_RIGHT && kb_event.keycode[1] == VK_ENTER) ){
+ combination_key.key_2p4g_ui_press_flg = 1;
+ }
+#endif
+ }
+ else if(kb_event.cnt == 1)
+ {
+ if(key0 == KEY_MODE_SWITCH)
+ {
+ user_key_mode = !user_key_mode;
+ device_led_setup(led_cfg[LED_SHINE_SLOW + user_key_mode]);
+ }
+
+#if (REMOTE_IR_ENABLE)
+ else if(user_key_mode == KEY_MODE_BLE)
+ {
+ key_value = kb_map_ble[key0];
+ if(key_value >= 0xf0 ){
+ key_type = CONSUMER_KEY;
+ u16 consumer_key = vk_consumer_map[key_value & 0x0f];
+ bls_att_pushNotifyData (HID_CONSUME_REPORT_INPUT_DP_H, (u8 *)&consumer_key, 2);
+ }
+ else
+ {
+ key_type = KEYBOARD_KEY;
+ key_buf[2] = key_value;
+ bls_att_pushNotifyData (HID_NORMAL_KB_REPORT_INPUT_DP_H, key_buf, 8);
+ }
+
+ }
+ else if(user_key_mode == KEY_MODE_IR)
+ { //IR mode
+ key_value = kb_map_ir[key0];
+ key_type = IR_KEY;
+ if(!ir_not_released){
+ ir_dispatch(TYPE_IR_SEND, 0x88, key_value);
+ ir_not_released = 1;
+ }
+ }
+ else
+ {
+ key_type = IDLE_KEY;
+ }
+#else
+ else
+ {
+ key_value = key0;
+ if(key_value >= 0xf0 ){
+ key_type = CONSUMER_KEY;
+ u16 consumer_key = vk_consumer_map[key_value & 0x0f];
+ bls_att_pushNotifyData (HID_CONSUME_REPORT_INPUT_DP_H, (u8 *)&consumer_key, 2);
+ }
+ else
+ {
+ key_type = KEYBOARD_KEY;
+ key_buf[2] = key_value;
+ bls_att_pushNotifyData (HID_NORMAL_KB_REPORT_INPUT_DP_H, key_buf, 8);
+ }
+ }
+#endif
+ }
+ else //kb_event.cnt == 0, key release
+ {
+ key_not_released = 0;
+#if KB_MODE_EXCHANGE
+ if(combination_key.key_2p4g_ui_press_flg){
+ combination_key.key_2p4g_ui_press_flg = 0;
+ if(clock_time_exceed(combination_key.key_vaild_tick , 1000000)){
+ sys_status.sys_2p4g_mode_chg_flg = 1;
+ }
+ }
+#endif
+ if(key_type == CONSUMER_KEY)
+ {
+ u16 consumer_key = 0;
+ bls_att_pushNotifyData (HID_CONSUME_REPORT_INPUT_DP_H, (u8 *)&consumer_key, 2);
+ }
+ else if(key_type == KEYBOARD_KEY)
+ {
+ key_buf[2] = 0;
+ bls_att_pushNotifyData (HID_NORMAL_KB_REPORT_INPUT_DP_H, key_buf, 8); //release
+ }
+#if (REMOTE_IR_ENABLE)
+ else if(key_type == IR_KEY)
+ {
+ if(ir_not_released){
+ ir_not_released = 0;
+ ir_dispatch(TYPE_IR_RELEASE, 0, 0); //release
+ }
+ }
+#endif
+ }
+}
+
+
+
+#define GPIO_WAKEUP_KEYPROC_CNT 3
+
+void proc_keyboard (u8 e, u8 *p, int n)
+{
+ static int gpioWakeup_keyProc_cnt = 0;
+ static u32 keyScanTick = 0;
+ //when key press gpio wakeup suspend, proc keyscan at least GPIO_WAKEUP_KEYPROC_CNT times
+ //regardless of 8000 us interval
+ if(e == BLT_EV_FLAG_GPIO_EARLY_WAKEUP){
+ gpioWakeup_keyProc_cnt = GPIO_WAKEUP_KEYPROC_CNT;
+ }
+ else if(gpioWakeup_keyProc_cnt){
+ gpioWakeup_keyProc_cnt --;
+ }
+
+ if(gpioWakeup_keyProc_cnt || clock_time_exceed(keyScanTick, 8000)){
+ keyScanTick = clock_time();
+ }
+ else{
+ return;
+ }
+
+ kb_event.keycode[0] = 0;
+ int det_key = kb_scan_key (0, 1);
+
+ #if(DEEPBACK_FAST_KEYSCAN_ENABLE)
+ if(deepback_key_state != DEEPBACK_KEY_IDLE){
+ deepback_pre_proc(&det_key);
+ }
+ #endif
+
+ if (det_key){
+ key_change_proc();
+ }
+
+
+ #if(DEEPBACK_FAST_KEYSCAN_ENABLE)
+ if(deepback_key_state != DEEPBACK_KEY_IDLE){
+ deepback_post_proc();
+ }
+ #endif
+}
+#endif
+
+void sys_mode_chg_proc(void)
+{
+ if((sys_status.sys_mode == SYS_BLE_MODE_1M) && sys_status.sys_2p4g_mode_chg_flg){//switch to 2p4g mode
+ u8 mode_chg = 0;
+
+ if(sendTerminate_before_enterDeep == 2){ //Terminate OK
+ mode_chg = 1;
+ sendTerminate_before_enterDeep = 0;
+ analog_write(DEEP_ANA_REG0, CONN_DEEP_FLG);
+ }
+ else{
+ if(blc_ll_getCurrentState() == BLS_LINK_STATE_ADV){
+ mode_chg = 1;
+ bls_ll_setAdvEnable(0); //disable adv
+ }
+ else if(blc_ll_getCurrentState() == BLS_LINK_STATE_CONN){
+ if(!sendTerminate_before_enterDeep){
+ bls_ll_terminateConnection(HCI_ERR_REMOTE_USER_TERM_CONN); //push terminate cmd into ble TX buffer
+ bls_ll_setAdvEnable(0); //disable adv
+ sendTerminate_before_enterDeep = 1;
+ }
+ }
+ else if(blc_ll_getCurrentState() == BLS_LINK_STATE_IDLE){
+ mode_chg = 1;
+ }
+ }
+
+ if(mode_chg){
+ #if (REMOTE_IR_ENABLE)
+ analog_write(DEEP_ANA_REG1, user_key_mode);
+ #endif
+ sys_status.sys_2p4g_mode_chg_flg = 0;
+ rf_ble_switch_phy(TLK_PRIVATE_2M);
+
+ user_2p4g_init();
+ analog_write (PM_REG_SYS_MODE, SYS_2P4G_MODE);
+ sys_status.sys_mode = SYS_2P4G_MODE;
+ }
+ }
+ else if((sys_status.sys_mode == SYS_2P4G_MODE) && sys_status.sys_ble_1m_chg_flg){// to ble mode
+ sys_status.sys_ble_1m_chg_flg = 0;
+
+ rf_ble_switch_phy(BLE_PHY_1M);
+ user_ble_init ();
+
+ analog_write(PM_REG_SYS_MODE,SYS_BLE_MODE_1M);
+ sys_status.sys_mode = SYS_BLE_MODE_1M;
+ }
+}
+
+
+extern u32 scan_pin_need;
+//_attribute_ram_code_
+void blt_pm_proc(void)
+{
+ if(sys_status.sys_2p4g_mode_chg_flg){
+ return;
+ }
+ else {
+ #if(BLE_REMOTE_PM_ENABLE)
+ #if(REMOTE_IR_ENABLE)
+ if( ir_send_ctrl.is_sending)
+ {
+ bls_pm_setSuspendMask(SUSPEND_DISABLE);
+ }
+ else
+ #endif
+ {
+ bls_pm_setSuspendMask (SUSPEND_ADV | SUSPEND_CONN);
+
+ user_task_flg = ota_is_working || scan_pin_need || key_not_released || DEVICE_LED_BUSY;
+
+ if(user_task_flg){
+ #if (LONG_PRESS_KEY_POWER_OPTIMIZE)
+ extern int key_matrix_same_as_last_cnt;
+ if(!ota_is_working && key_matrix_same_as_last_cnt > 5){ //key matrix stable can optize
+ bls_pm_setManualLatency(3);
+ }
+ else{
+ bls_pm_setManualLatency(0); //latency off: 0
+ }
+ #else
+ bls_pm_setManualLatency(0);
+ #endif
+ }
+
+
+ #if(RC_DEEP_SLEEP_EN) //deepsleep
+ if(sendTerminate_before_enterDeep == 1){ //sending Terminate and wait for ack before enter deepsleep
+ if(user_task_flg){ //detect key Press again, can not enter deep now
+ sendTerminate_before_enterDeep = 0;
+ bls_ll_setAdvEnable(1); //enable adv again
+ }
+ }
+ else if(sendTerminate_before_enterDeep == 2){ //Terminate OK
+ analog_write(DEEP_ANA_REG0, CONN_DEEP_FLG);
+
+ #if (REMOTE_IR_ENABLE)
+ analog_write(DEEP_ANA_REG1, user_key_mode);
+ #endif
+ cpu_sleep_wakeup(DEEPSLEEP_MODE, PM_WAKEUP_PAD, 0); //deepsleep
+ }
+
+ //adv 60s, deepsleep
+ if( blc_ll_getCurrentState() == BLS_LINK_STATE_ADV && !sendTerminate_before_enterDeep && \
+ clock_time_exceed(advertise_begin_tick , ADV_IDLE_ENTER_DEEP_TIME * 1000000))
+ {
+
+ #if (REMOTE_IR_ENABLE)
+ analog_write(DEEP_ANA_REG1, user_key_mode);
+ #endif
+ cpu_sleep_wakeup(DEEPSLEEP_MODE, PM_WAKEUP_PAD, 0); //deepsleep
+ }
+ //conn 60s no event(key/voice/led), enter deepsleep
+ else if( device_in_connection_state && !user_task_flg && \
+ clock_time_exceed(latest_user_event_tick, CONN_IDLE_ENTER_DEEP_TIME * 1000000) )
+ {
+ bls_ll_terminateConnection(HCI_ERR_REMOTE_USER_TERM_CONN); //push terminate cmd into ble TX buffer
+ bls_ll_setAdvEnable(0); //disable adv
+ sendTerminate_before_enterDeep = 1;
+ }
+ #endif
+ }
+ #endif //END of BLE_REMOTE_PM_ENABLE
+ }
+}
+
+void ble_remote_set_sleep_wakeup(u8 e, u8 *p, int n)
+{ //3995*16 sys_tick_per_us
+ if( blc_ll_getCurrentState() == BLS_LINK_STATE_CONN && ((u32)(bls_pm_getSystemWakeupTick() - clock_time())) > 80 *CLOCK_16M_SYS_TIMER_CLK_1MS ){ //suspend time > 30ms.add gpio wakeup
+ bls_pm_setWakeupSource(PM_WAKEUP_CORE); //gpio CORE wakeup suspend
+ }
+}
+
+
+/////////////////////////////////////////////////
+/////////////////////////////////////////////////
+#if (BLT_TEST_SOFT_TIMER_ENABLE)
+
+int gpio_test0(void)
+{
+ //gpio 0 toggle to see the effect
+ DBG_CHN0_TOGGLE;
+
+ return 0;
+}
+
+static u8 timer_change_flg = 0;
+int gpio_test1(void)
+{
+ //gpio 1 toggle to see the effect
+ DBG_CHN1_TOGGLE;
+
+
+ timer_change_flg = !timer_change_flg;
+ if(timer_change_flg){
+ return 7000;
+ }
+ else{
+ return 17000;
+ }
+
+}
+
+int gpio_test2(void)
+{
+ //gpio 2 toggle to see the effect
+ DBG_CHN2_TOGGLE;
+
+ //timer last for 5 second
+ if(clock_time_exceed(0, 5000000)){
+ return -1;
+ //blt_soft_timer_delete(&gpio_test2);
+ }
+ else{
+
+ }
+
+ return 0;
+}
+
+int gpio_test3(void)
+{
+ //gpio 3 toggle to see the effect
+ DBG_CHN3_TOGGLE;
+
+ return 0;
+}
+
+#endif
+//////////////////////////////////////////////////////
+
+
+void user_ble_init()
+{
+ blt_txfifo.wptr = 0;
+ blt_txfifo.rptr = 0;
+ blt_rxfifo.wptr = 0;
+ blt_rxfifo.rptr = 0;
+
+ /***********************************************************************************
+ * Keyboard matrix initialization. These section must be before battery_power_check.
+ * Because when low battery,chip will entry deep.if placed after battery_power_check,
+ * it is possible that can not wake up chip.
+ * *******************************************************************************/
+#if(RC_BTN_ENABLE)
+ u32 pin[] = KB_DRIVE_PINS;
+ for(int i=0; i<(sizeof (pin)/sizeof(*pin)); i++)
+ {
+ gpio_set_wakeup(pin[i],1,1); //drive pin core(gpio) high wakeup suspend
+ cpu_set_gpio_wakeup (pin[i],1,1); //drive pin pad high wakeup deepsleep
+ }
+
+ bls_app_registerEventCallback (BLT_EV_FLAG_GPIO_EARLY_WAKEUP, &proc_keyboard);
+#endif
+
+ /*****************************************************************************************
+ Note: battery check must do before any flash write/erase operation, cause flash write/erase
+ under a low or unstable power supply will lead to error flash operation
+
+ Some module initialization may involve flash write/erase, include: OTA initialization,
+ SMP initialization, ..
+ So these initialization must be done after battery check
+ *****************************************************************************************/
+ #if(BATT_CHECK_ENABLE)
+ if(analog_read(DEEP_ANA_REG2) == BATTERY_VOL_LOW){
+ battery_power_check(BATTERY_VOL_MIN + 200);//2.2V
+ }
+ else{
+ battery_power_check(BATTERY_VOL_MIN);//2.0 V
+ }
+ #endif
+
+ /*-- BLE stack initialization --------------------------------------------*/
+ u8 mac_public[6];
+ u8 mac_random_static[6];
+ blc_initMacAddress(CFG_ADR_MAC, mac_public, mac_random_static);
+
+ #if(BLE_DEVICE_ADDRESS_TYPE == BLE_DEVICE_ADDRESS_PUBLIC)
+ app_own_address_type = OWN_ADDRESS_PUBLIC;
+ #elif(BLE_DEVICE_ADDRESS_TYPE == BLE_DEVICE_ADDRESS_RANDOM_STATIC)
+ app_own_address_type = OWN_ADDRESS_RANDOM;
+ blc_ll_setRandomAddr(mac_random_static);
+ #endif
+
+ /*-- BLE Controller initialization ---------------------------------------*/
+ blc_ll_initBasicMCU(mac_public);//mandatory
+ blc_ll_initAdvertising_module(mac_public);//adv module: mandatory for BLE slave,
+ blc_ll_initSlaveRole_module();//slave module: mandatory for BLE slave,
+
+ /*-- BLE Host initialization ---------------------------------------------*/
+ extern void my_att_init(void);
+ //GATT initialization
+ my_att_init();
+ //L2CAP initialization
+ blc_l2cap_register_handler(blc_l2cap_packet_receive);
+
+ /*-- BLE SMP initialization ----------------------------------------------*/
+#if (BLE_REMOTE_SECURITY_ENABLE)
+ blc_smp_param_setBondingDeviceMaxNumber(4); //default is SMP_BONDING_DEVICE_MAX_NUM, can not bigger that this value
+ //and this func must call before bls_smp_enableParing
+ bls_smp_enableParing (SMP_PARING_CONN_TRRIGER );
+#else
+ bls_smp_enableParing (SMP_PARING_DISABLE_TRRIGER );
+#endif
+
+ //HID_service_on_android7p0_init(); //hid device on android 7.0/7.1
+
+ /*-- USER application initialization -------------------------------------*/
+ bls_ll_setAdvData( (u8 *)tbl_advData, sizeof(tbl_advData) );
+ bls_ll_setScanRspData( (u8 *)tbl_scanRsp, sizeof(tbl_scanRsp));
+
+
+ /* Configure ADV packet */
+#if(BLE_REMOTE_SECURITY_ENABLE)
+ //get bonded device number
+ u8 bond_number = blc_smp_param_getCurrentBondingDeviceNumber();
+ smp_param_save_t bondInfo;
+ if(bond_number) //at least 1 bonding device exist
+ {
+ //get the latest bonding device (index: bond_number-1 )
+ blc_smp_param_loadByIndex( bond_number - 1, &bondInfo);
+ }
+
+ if(bond_number)//set direct adv
+ {
+ //set direct adv
+ u8 status = bls_ll_setAdvParam( MY_ADV_INTERVAL_MIN, MY_ADV_INTERVAL_MAX,
+ ADV_TYPE_CONNECTABLE_DIRECTED_LOW_DUTY, app_own_address_type,
+ bondInfo.peer_addr_type, bondInfo.peer_addr,
+ MY_APP_ADV_CHANNEL,
+ ADV_FP_NONE);
+ //debug: ADV setting err
+ if(status != BLE_SUCCESS) { write_reg8(0x8000, 0x11); while(1); }
+
+ //it is recommended that direct adv only last for several seconds, then switch to indirect adv
+ bls_ll_setAdvDuration(MY_DIRECT_ADV_TMIE, 1);
+ bls_app_registerEventCallback (BLT_EV_FLAG_ADV_DURATION_TIMEOUT, &app_switch_to_indirect_adv);
+ }
+ else//set indirect ADV
+#endif
+ {
+ u8 status = bls_ll_setAdvParam( MY_ADV_INTERVAL_MIN, MY_ADV_INTERVAL_MAX,
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, app_own_address_type,
+ 0, NULL,
+ MY_APP_ADV_CHANNEL,
+ ADV_FP_NONE);
+ //debug: ADV setting err
+ if(status != BLE_SUCCESS) { write_reg8(0x8000, 0x11); while(1); }
+ }
+
+ bls_ll_setAdvEnable(1); //adv enable
+ rf_set_power_level_index (RF_POWER_7P9dBm);//OK
+
+ //ble event call back
+ bls_app_registerEventCallback (BLT_EV_FLAG_CONNECT, &task_connect);
+ bls_app_registerEventCallback (BLT_EV_FLAG_TERMINATE, &ble_remote_terminate);
+
+
+ /* Power Management initialization */
+#if(BLE_REMOTE_PM_ENABLE)
+ blc_ll_initPowerManagement_module(); //pm module: optional
+ bls_pm_setSuspendMask (SUSPEND_ADV | SUSPEND_CONN);
+ bls_app_registerEventCallback (BLT_EV_FLAG_SUSPEND_ENTER, &ble_remote_set_sleep_wakeup);
+#else
+ bls_pm_setSuspendMask (SUSPEND_DISABLE);
+#endif
+
+
+ /* IR Function initialization */
+#if(REMOTE_IR_ENABLE)
+ user_key_mode = analog_read(DEEP_ANA_REG1);
+ analog_write(DEEP_ANA_REG1, 0x00);
+ rc_ir_init();
+#endif
+
+
+
+ /* OTA Function Initialization */
+#if(BLE_REMOTE_OTA_ENABLE)
+ bls_ota_clearNewFwDataArea(); //must
+ bls_ota_registerStartCmdCb(entry_ota_mode);
+ bls_ota_registerResultIndicateCb(LED_show_ota_result);
+#endif
+
+
+ /* LED Indicator Initialization */
+#if (BLT_APP_LED_ENABLE)
+ device_led_init(GPIO_LED, 1);
+#endif
+
+#if (BLT_TEST_SOFT_TIMER_ENABLE)
+ blt_soft_timer_init();
+ blt_soft_timer_add(&gpio_test0, 23000);//23ms
+ blt_soft_timer_add(&gpio_test1, 7000); //7ms <-> 17ms
+ blt_soft_timer_add(&gpio_test2, 13000);//13ms
+ blt_soft_timer_add(&gpio_test3, 27000);//27ms
+#endif
+
+ advertise_begin_tick = clock_time();
+}
+
+
+void user_init(){
+ if(sys_status.sys_mode == SYS_BLE_MODE_1M){//ble mode
+
+ #if(RC_BTN_ENABLE)
+ deep_wakeup_proc();
+ #endif
+
+ #if FIRMWARES_SIGNATURE_ENABLE
+ blt_firmware_signature_check();
+ #endif
+
+ user_ble_init ();
+ }
+ else{ //2p4g mode
+ user_2p4g_init();
+ }
+}
+
+void main_loop_ble(void){
+
+ /* BLE entry -------------------------------------------------------------*/
+ blt_sdk_main_loop();
+
+ /* UI entry --------------------------------------------------------------*/
+ #if (BATT_CHECK_ENABLE)
+ if(clock_time_exceed(lowBattDet_tick, 500*1000)){
+ lowBattDet_tick = clock_time();
+ battery_power_check(BATTERY_VOL_MIN);
+ }
+ #endif
+
+ #if (BLT_TEST_SOFT_TIMER_ENABLE)
+ blt_soft_timer_process(MAINLOOP_ENTRY);
+ #endif
+
+ #if(RC_BTN_ENABLE)
+ proc_keyboard(0, 0, 0);
+ #endif
+
+ #if (BLT_APP_LED_ENABLE)
+ device_led_process();
+ #endif
+
+ /*-- Power Management -------------------------------------------------------*/
+ blt_pm_proc();
+}
+
+/*----------------------------------------------------------------------------*/
+/*--------- Main Loop ------------*/
+/*----------------------------------------------------------------------------*/
+u32 tick_loop;
+void main_loop (void)
+{
+ tick_loop ++;
+
+ sys_mode_chg_proc();
+
+ if(sys_status.sys_mode == SYS_BLE_MODE_1M){
+ main_loop_ble();
+ }
+ else if(sys_status.sys_mode == SYS_2P4G_MODE){
+ main_loop_2p4g();
+ }
+}
+#endif //end of__PROJECT_5316_BLE_REMOTE__
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/app.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/app.h
new file mode 100644
index 0000000000000..cc76767cd58ed
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/app.h
@@ -0,0 +1,36 @@
+/********************************************************************************************************
+ * @file app.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef _APP_H
+#define _APP_H
+
+#include "drivers.h"
+
+/* Audio Operation Function ------------------------------------------------- */
+
+extern void deep_wakeup_proc(void);
+
+extern void user_ble_init();
+extern void user_init();
+extern void main_loop (void);
+extern void main_loop_ble(void);
+
+#endif /* APP_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/app_att.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/app_att.c
new file mode 100644
index 0000000000000..3a82dc9ac682c
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/app_att.c
@@ -0,0 +1,438 @@
+/********************************************************************************************************
+ * @file app_att.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#include "tl_common.h"
+#include
+
+
+#if (__PROJECT_5316_DUAL_MODE__)
+
+typedef struct
+{
+ /** Minimum value for the connection event (interval. 0x0006 - 0x0C80 * 1.25 ms) */
+ u16 intervalMin;
+ /** Maximum value for the connection event (interval. 0x0006 - 0x0C80 * 1.25 ms) */
+ u16 intervalMax;
+ /** Number of LL latency connection events (0x0000 - 0x03e8) */
+ u16 latency;
+ /** Connection Timeout (0x000A - 0x0C80 * 10 ms) */
+ u16 timeout;
+} gap_periConnectParams_t;
+
+const u16 clientCharacterCfgUUID = GATT_UUID_CLIENT_CHAR_CFG;
+
+const u16 extReportRefUUID = GATT_UUID_EXT_REPORT_REF;
+
+const u16 reportRefUUID = GATT_UUID_REPORT_REF;
+
+const u16 characterPresentFormatUUID = GATT_UUID_CHAR_PRESENT_FORMAT;
+
+const u16 my_primaryServiceUUID = GATT_UUID_PRIMARY_SERVICE;
+
+static const u16 my_characterUUID = GATT_UUID_CHARACTER;
+
+const u16 my_devServiceUUID = SERVICE_UUID_DEVICE_INFORMATION;
+
+const u16 my_PnPUUID = CHARACTERISTIC_UUID_PNP_ID;
+
+const u16 my_devNameUUID = GATT_UUID_DEVICE_NAME;
+
+//device information
+const u16 my_gapServiceUUID = SERVICE_UUID_GENERIC_ACCESS;
+// Appearance Characteristic Properties
+const u16 my_appearanceUIID = 0x2a01;
+const u16 my_periConnParamUUID = 0x2a04;
+u16 my_appearance = GAP_APPEARE_UNKNOWN;
+gap_periConnectParams_t my_periConnParameters = {20, 40, 0, 1000};
+
+
+const u16 my_gattServiceUUID = SERVICE_UUID_GENERIC_ATTRIBUTE;
+const u16 serviceChangeUIID = GATT_UUID_SERVICE_CHANGE;
+u16 serviceChangeVal[2] = {0};
+static u8 serviceChangeCCC[2]={0,0};
+
+
+
+
+const u8 my_devName[] = {'G','R','e','m','o','t','e'};
+
+
+
+const u8 my_PnPtrs [] = {0x02, 0x8a, 0x24, 0x66, 0x82, 0x01, 0x00};
+
+//////////////////////// Battery /////////////////////////////////////////////////
+const u16 my_batServiceUUID = SERVICE_UUID_BATTERY;
+const u16 my_batCharUUID = CHARACTERISTIC_UUID_BATTERY_LEVEL;
+static u8 batteryValueInCCC[2];
+u8 my_batVal[1] = {99};
+
+//////////////////////// HID /////////////////////////////////////////////////////
+
+const u16 my_hidServiceUUID = SERVICE_UUID_HUMAN_INTERFACE_DEVICE;
+
+const u16 hidServiceUUID = SERVICE_UUID_HUMAN_INTERFACE_DEVICE;
+const u16 hidProtocolModeUUID = CHARACTERISTIC_UUID_HID_PROTOCOL_MODE;
+const u16 hidReportUUID = CHARACTERISTIC_UUID_HID_REPORT;
+const u16 hidReportMapUUID = CHARACTERISTIC_UUID_HID_REPORT_MAP;
+const u16 hidbootKeyInReportUUID = CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT;
+const u16 hidbootKeyOutReportUUID = CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT;
+const u16 hidbootMouseInReportUUID = CHARACTERISTIC_UUID_HID_BOOT_MOUSE_INPUT;
+const u16 hidinformationUUID = CHARACTERISTIC_UUID_HID_INFORMATION;
+const u16 hidCtrlPointUUID = CHARACTERISTIC_UUID_HID_CONTROL_POINT;
+const u16 hidIncludeUUID = GATT_UUID_INCLUDE;
+
+u8 protocolMode = DFLT_HID_PROTOCOL_MODE;
+
+
+// Key in Report characteristic variables
+u8 reportKeyIn[8];
+u8 reportKeyInCCC[2];
+// HID Report Reference characteristic descriptor, key input
+static u8 reportRefKeyIn[2] =
+ { HID_REPORT_ID_KEYBOARD_INPUT, HID_REPORT_TYPE_INPUT };
+
+// Key out Report characteristic variables
+u8 reportKeyOut[1];
+u8 reportKeyOutCCC[2];
+static u8 reportRefKeyOut[2] =
+ { HID_REPORT_ID_KEYBOARD_INPUT, HID_REPORT_TYPE_OUTPUT };
+
+// Consumer Control input Report
+static u8 reportConsumerControlIn[2];
+static u8 reportConsumerControlInCCC[2];
+static u8 reportRefConsumerControlIn[2] = { HID_REPORT_ID_CONSUME_CONTROL_INPUT, HID_REPORT_TYPE_INPUT };
+
+
+
+// Boot Keyboard Input Report
+static u8 bootKeyInReport;
+static u8 bootKeyInReportCCC[2];
+
+// Boot Keyboard Output Report
+static u8 bootKeyOutReport;
+
+
+// HID Information characteristic
+const u8 hidInformation[] =
+{
+ U16_LO(0x0111), U16_HI(0x0111), // bcdHID (USB HID version)
+ 0x00, // bCountryCode
+ 0x01 // Flags
+};
+
+// HID Control Point characteristic
+static u8 controlPoint;
+
+// HID Report Map characteristic
+// Keyboard report descriptor (using format for Boot interface descriptor)
+
+static const u8 reportMap[] =
+{
+ //keyboard report in
+ 0x05, 0x01, // Usage Pg (Generic Desktop)
+ 0x09, 0x06, // Usage (Keyboard)
+ 0xA1, 0x01, // Collection: (Application)
+ 0x85, HID_REPORT_ID_KEYBOARD_INPUT, // Report Id (keyboard)
+ //
+ 0x05, 0x07, // Usage Pg (Key Codes)
+ 0x19, 0xE0, // Usage Min (224) VK_CTRL:0xe0
+ 0x29, 0xE7, // Usage Max (231) VK_RWIN:0xe7
+ 0x15, 0x00, // Log Min (0)
+ 0x25, 0x01, // Log Max (1)
+ //
+ // Modifier byte
+ 0x75, 0x01, // Report Size (1) 1 bit * 8
+ 0x95, 0x08, // Report Count (8)
+ 0x81, 0x02, // Input: (Data, Variable, Absolute)
+ //
+ // Reserved byte
+ 0x95, 0x01, // Report Count (1)
+ 0x75, 0x08, // Report Size (8)
+ 0x81, 0x01, // Input: (Constant)
+
+ //keyboard output
+ //5 bit led ctrl: NumLock CapsLock ScrollLock Compose kana
+ 0x95, 0x05, //Report Count (5)
+ 0x75, 0x01, //Report Size (1)
+ 0x05, 0x08, //Usage Pg (LEDs )
+ 0x19, 0x01, //Usage Min
+ 0x29, 0x05, //Usage Max
+ 0x91, 0x02, //Output (Data, Variable, Absolute)
+ //3 bit reserved
+ 0x95, 0x01, //Report Count (1)
+ 0x75, 0x03, //Report Size (3)
+ 0x91, 0x01, //Output (Constant)
+
+ // Key arrays (6 bytes)
+ 0x95, 0x06, // Report Count (6)
+ 0x75, 0x08, // Report Size (8)
+ 0x15, 0x00, // Log Min (0)
+ 0x25, 0xF1, // Log Max (241)
+ 0x05, 0x07, // Usage Pg (Key Codes)
+ 0x19, 0x00, // Usage Min (0)
+ 0x29, 0xf1, // Usage Max (241)
+ 0x81, 0x00, // Input: (Data, Array)
+
+ 0xC0, // End Collection
+
+
+
+
+ //consumer report in
+ 0x05, 0x0C, // Usage Page (Consumer)
+ 0x09, 0x01, // Usage (Consumer Control)
+ 0xA1, 0x01, // Collection (Application)
+ 0x85, HID_REPORT_ID_CONSUME_CONTROL_INPUT, // Report Id
+ 0x75,0x10, //global, report size 16 bits
+ 0x95,0x01, //global, report count 1
+ 0x15,0x01, //global, min 0x01
+ 0x26,0x8c,0x02, //global, max 0x28c
+ 0x19,0x01, //local, min 0x01
+ 0x2a,0x8c,0x02, //local, max 0x28c
+ 0x81,0x00, //main, input data varible, absolute
+ 0xc0, //main, end collection
+
+};
+
+// HID External Report Reference Descriptor for report map
+static u16 extServiceUUID;
+
+
+/////////////////////////////////////////////////////////
+const u8 my_OtaUUID[16] = TELINK_SPP_DATA_OTA;
+const u8 my_OtaServiceUUID[16] = TELINK_OTA_UUID_SERVICE;
+const u16 userdesc_UUID = GATT_UUID_CHAR_USER_DESC;
+
+
+u8 my_OtaData = 0x00;
+
+const u8 my_OtaName[] = {'O', 'T', 'A'};
+
+
+// Include attribute (Battery service)
+static u16 include[3] = {BATT_PS_H, BATT_LEVEL_INPUT_CCB_H, SERVICE_UUID_BATTERY};
+
+
+
+
+static const u8 my_devNameCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(GenericAccess_DeviceName_DP_H), U16_HI(GenericAccess_DeviceName_DP_H),
+ U16_LO(GATT_UUID_DEVICE_NAME), U16_HI(GATT_UUID_DEVICE_NAME)
+};
+static const u8 my_appearanceCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(GenericAccess_Appearance_DP_H), U16_HI(GenericAccess_Appearance_DP_H),
+ U16_LO(GATT_UUID_APPEARANCE), U16_HI(GATT_UUID_APPEARANCE)
+};
+static const u8 my_periConnParamCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(CONN_PARAM_DP_H), U16_HI(CONN_PARAM_DP_H),
+ U16_LO(GATT_UUID_PERI_CONN_PARAM), U16_HI(GATT_UUID_PERI_CONN_PARAM)
+};
+
+
+//// GATT attribute values
+static const u8 my_serviceChangeCharVal[5] = {
+ CHAR_PROP_INDICATE,
+ U16_LO(GenericAttribute_ServiceChanged_DP_H), U16_HI(GenericAttribute_ServiceChanged_DP_H),
+ U16_LO(GATT_UUID_SERVICE_CHANGE), U16_HI(GATT_UUID_SERVICE_CHANGE)
+};
+
+
+//// device Information attribute values
+static const u8 my_PnCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(DeviceInformation_pnpID_DP_H), U16_HI(DeviceInformation_pnpID_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_PNP_ID), U16_HI(CHARACTERISTIC_UUID_PNP_ID)
+};
+
+
+//// HID attribute values
+static const u8 my_hidProtocolModeCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_PROTOCOL_MODE_DP_H), U16_HI(HID_PROTOCOL_MODE_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_PROTOCOL_MODE), U16_HI(CHARACTERISTIC_UUID_HID_PROTOCOL_MODE)
+};
+static const u8 my_hidbootKeyInReporCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(HID_BOOT_KB_REPORT_INPUT_DP_H), U16_HI(HID_BOOT_KB_REPORT_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT), U16_HI(CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT)
+};
+static const u8 my_hidbootKeyOutReporCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_BOOT_KB_REPORT_OUTPUT_DP_H), U16_HI(HID_BOOT_KB_REPORT_OUTPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT), U16_HI(CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT)
+};
+static const u8 my_hidReportCCinCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(HID_CONSUME_REPORT_INPUT_DP_H), U16_HI(HID_CONSUME_REPORT_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT), U16_HI(CHARACTERISTIC_UUID_HID_REPORT)
+};
+static const u8 my_hidReportKEYinCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(HID_NORMAL_KB_REPORT_INPUT_DP_H), U16_HI(HID_NORMAL_KB_REPORT_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT), U16_HI(CHARACTERISTIC_UUID_HID_REPORT)
+};
+static const u8 my_hidReportKEYoutCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_NORMAL_KB_REPORT_OUTPUT_DP_H), U16_HI(HID_NORMAL_KB_REPORT_OUTPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT), U16_HI(CHARACTERISTIC_UUID_HID_REPORT)
+};
+static const u8 my_hidReportMapCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(HID_REPORT_MAP_DP_H), U16_HI(HID_REPORT_MAP_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT_MAP), U16_HI(CHARACTERISTIC_UUID_HID_REPORT_MAP)
+};
+static const u8 my_hidinformationCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(HID_INFORMATION_DP_H), U16_HI(HID_INFORMATION_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_INFORMATION), U16_HI(CHARACTERISTIC_UUID_HID_INFORMATION)
+};
+static const u8 my_hidCtrlPointCharVal[5] = {
+ CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_CONTROL_POINT_DP_H), U16_HI(HID_CONTROL_POINT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_CONTROL_POINT), U16_HI(CHARACTERISTIC_UUID_HID_CONTROL_POINT)
+};
+
+
+//// Battery attribute values
+static const u8 my_batCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(BATT_LEVEL_INPUT_DP_H), U16_HI(BATT_LEVEL_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_BATTERY_LEVEL), U16_HI(CHARACTERISTIC_UUID_BATTERY_LEVEL)
+};
+
+
+//// OTA attribute values
+static const u8 my_OtaCharVal[19] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(OTA_CMD_OUT_DP_H), U16_HI(OTA_CMD_OUT_DP_H),
+ TELINK_SPP_DATA_OTA,
+};
+
+
+
+
+
+const attribute_t my_Attributes[] = {
+
+ {ATT_END_H - 1, 0,0,0,0,0}, // total num of attribute
+
+
+ // 0001 - 0007 gap
+ {7,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_gapServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_devNameCharVal),(u8*)(&my_characterUUID), (u8*)(my_devNameCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_devName), (u8*)(&my_devNameUUID), (u8*)(my_devName), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_appearanceCharVal),(u8*)(&my_characterUUID), (u8*)(my_appearanceCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_appearance), (u8*)(&my_appearanceUIID), (u8*)(&my_appearance), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_periConnParamCharVal),(u8*)(&my_characterUUID), (u8*)(my_periConnParamCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_periConnParameters),(u8*)(&my_periConnParamUUID), (u8*)(&my_periConnParameters), 0},
+
+ // 0008 - 000b gatt
+ {4,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_gattServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_serviceChangeCharVal),(u8*)(&my_characterUUID), (u8*)(my_serviceChangeCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (serviceChangeVal), (u8*)(&serviceChangeUIID), (u8*)(&serviceChangeVal), 0},
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof (serviceChangeCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(serviceChangeCCC), 0},
+
+
+ // 000c - 000e device Information Service
+ {3,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_devServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_PnCharVal),(u8*)(&my_characterUUID), (u8*)(my_PnCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_PnPtrs),(u8*)(&my_PnPUUID), (u8*)(my_PnPtrs), 0},
+
+
+ /////////////////////////////////// 4. HID Service /////////////////////////////////////////////////////////
+ // 000f
+ //{27, ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_hidServiceUUID), 0},
+ {HID_CONTROL_POINT_DP_H - HID_PS_H + 1, ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_hidServiceUUID), 0},
+
+ // 0010 include battery service
+ {0,ATT_PERMISSIONS_READ,2,sizeof(include),(u8*)(&hidIncludeUUID), (u8*)(include), 0},
+
+ // 0011 - 0012 protocol mode
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidProtocolModeCharVal), (u8*)(&my_characterUUID), (u8*)(my_hidProtocolModeCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,2, sizeof(protocolMode),(u8*)(&hidProtocolModeUUID), (u8*)(&protocolMode), 0}, //value
+
+ // 0013 - 0015 boot keyboard input report (char-val-client)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidbootKeyInReporCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidbootKeyInReporCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2,sizeof(bootKeyInReport),(u8*)(&hidbootKeyInReportUUID), (u8*)(&bootKeyInReport), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(bootKeyInReportCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(bootKeyInReportCCC), 0}, //value
+
+ // 0016 - 0017 boot keyboard output report (char-val)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidbootKeyOutReporCharVal), (u8*)(&my_characterUUID), (u8*)(my_hidbootKeyOutReporCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,2, sizeof(bootKeyOutReport), (u8*)(&hidbootKeyOutReportUUID), (u8*)(&bootKeyOutReport), 0}, //value
+
+
+ // 0018 - 001b. consume report in: 4 (char-val-client-ref)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportCCinCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportCCinCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2, sizeof(reportConsumerControlIn),(u8*)(&hidReportUUID), (u8*)(reportConsumerControlIn), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR|ATT_PERMISSIONS_AUTHEN_WRITE,2,sizeof(reportConsumerControlInCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(reportConsumerControlInCCC), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportRefConsumerControlIn),(u8*)(&reportRefUUID), (u8*)(reportRefConsumerControlIn), 0}, //value
+
+ // 001c - 001f . keyboard report in : 4 (char-val-client-ref)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportKEYinCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportKEYinCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2, sizeof(reportKeyIn),(u8*)(&hidReportUUID), (u8*)(reportKeyIn), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR|ATT_PERMISSIONS_AUTHEN_WRITE,2,sizeof(reportKeyInCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(reportKeyInCCC), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportRefKeyIn),(u8*)(&reportRefUUID), (u8*)(reportRefKeyIn), 0}, //value
+
+ // 0020 - 0022 . keyboard report out: 3 (char-val-ref)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportKEYoutCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportKEYoutCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportKeyOut),(u8*)(&hidReportUUID), (u8*)(reportKeyOut), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportRefKeyOut),(u8*)(&reportRefUUID), (u8*)(reportRefKeyOut), 0}, //value
+
+
+ // 0023 - 0025 . report map: 3
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportMapCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportMapCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2,sizeof(reportMap),(u8*)(&hidReportMapUUID), (u8*)(reportMap), 0}, //value
+ {0,ATT_PERMISSIONS_READ|ATT_PERMISSIONS_WRITE,2,sizeof(extServiceUUID),(u8*)(&extReportRefUUID), (u8*)(&extServiceUUID), 0}, //value
+
+ // 0026 - 0027 . hid information: 2
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidinformationCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidinformationCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2, sizeof(hidInformation),(u8*)(&hidinformationUUID), (u8*)(hidInformation), 0}, //value
+
+ // 0028 - 0029 . control point: 2
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidCtrlPointCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidCtrlPointCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_WRITE,2, sizeof(controlPoint),(u8*)(&hidCtrlPointUUID), (u8*)(&controlPoint), 0}, //value
+
+ ////////////////////////////////////// Battery Service /////////////////////////////////////////////////////
+ // 002a - 002d
+ {4,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_batServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_batCharVal),(u8*)(&my_characterUUID), (u8*)(my_batCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_batVal),(u8*)(&my_batCharUUID), (u8*)(my_batVal), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(batteryValueInCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(batteryValueInCCC), 0}, //value
+
+ ////////////////////////////////////// OTA /////////////////////////////////////////////////////
+ // 002e - 0031
+ {4,ATT_PERMISSIONS_READ, 2,16,(u8*)(&my_primaryServiceUUID), (u8*)(&my_OtaServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ, 2,sizeof(my_OtaCharVal),(u8*)(&my_characterUUID), (u8*)(my_OtaCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,16,sizeof(my_OtaData),(u8*)(&my_OtaUUID), (&my_OtaData), &otaWrite, &otaRead}, //value
+ {0,ATT_PERMISSIONS_READ, 2,sizeof (my_OtaName),(u8*)(&userdesc_UUID), (u8*)(my_OtaName), 0},
+
+};
+
+void my_att_init(void)
+{
+ bls_att_setAttributeTable ((u8 *)my_Attributes);
+}
+
+#endif //end of __PROJECT_5316_BLE_REMOTE__
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/app_config.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/app_config.h
new file mode 100644
index 0000000000000..d98973577c91a
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/app_config.h
@@ -0,0 +1,455 @@
+/********************************************************************************************************
+ * @file app_config.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+
+/* Function Select -----------------------------------------------------------*/
+#define BLE_REMOTE_PM_ENABLE 1
+#define BLE_REMOTE_SECURITY_ENABLE 1
+#define BLE_REMOTE_OTA_ENABLE 1
+#define REMOTE_IR_ENABLE 0
+#define BATT_CHECK_ENABLE 1//enable or disable battery voltage detection
+#define RC_BTN_ENABLE 1
+#define BLT_APP_LED_ENABLE 1
+
+/***select flash size***/
+#define FLASH_SIZE_OPTION_128K 0
+#define FLASH_SIZE_OPTION_512K 1
+
+#define FLASH_SIZE_OPTION FLASH_SIZE_OPTION_512K
+
+/***firmware check***/
+#define FIRMWARES_SIGNATURE_ENABLE 0
+
+/* software timer -----------------------------------------------------------*/
+#define BLT_TEST_SOFT_TIMER_ENABLE 0
+
+#if (BLT_TEST_SOFT_TIMER_ENABLE)
+ #define BLT_SOFTWARE_TIMER_ENABLE 1
+#endif
+
+
+/* LED -----------------------------------------------------------------------*/
+#define GPIO_LED GPIO_PB0
+
+
+/* Matrix Key Configuration --------------------------------------------------*/
+#define MATRIX_ROW_PULL PM_PIN_PULLDOWN_100K
+#define MATRIX_COL_PULL PM_PIN_PULLUP_10K
+
+#define KB_LINE_HIGH_VALID 0 //dirve pin output 0 when keyscan, scanpin read 0 is valid
+#define DEEPBACK_FAST_KEYSCAN_ENABLE 1 //proc fast scan when deepsleep back trigged by key press, in case key loss
+#define KEYSCAN_IRQ_TRIGGER_MODE 1
+#define LONG_PRESS_KEY_POWER_OPTIMIZE 1 //lower power when pressing key without release
+
+//stuck key
+#define STUCK_KEY_PROCESS_ENABLE 0
+#define STUCK_KEY_ENTERDEEP_TIME 60 //in s
+
+//repeat key
+#define KB_REPEAT_KEY_ENABLE 0
+#define KB_REPEAT_KEY_INTERVAL_MS 200
+#define KB_REPEAT_KEY_NUM 1
+#define KB_MAP_REPEAT {VK_1, }
+
+#define KB_MODE_EXCHANGE 1
+
+
+
+#define CR_VOL_UP 0xf0 ////
+#define CR_VOL_DN 0xf1
+#define CR_VOL_MUTE 0xf2
+#define CR_CHN_UP 0xf3
+#define CR_CHN_DN 0xf4 ////
+#define CR_POWER 0xf5
+#define CR_SEARCH 0xf6
+#define CR_RECORD 0xf7
+#define CR_PLAY 0xf8 ////
+#define CR_PAUSE 0xf9
+#define CR_STOP 0xfa
+#define CR_FAST_BACKWARD 0xfb
+#define CR_FAST_FORWARD 0xfc ////
+#define CR_HOME 0xfd
+#define CR_BACK 0xfe
+#define CR_MENU 0xff
+
+//special key
+#define VOICE 0xc0
+#define KEY_MODE_SWITCH 0xc1
+#define PHY_TEST 0xc2
+
+
+#define IR_VK_0 0x00
+#define IR_VK_1 0x01
+#define IR_VK_2 0x02
+#define IR_VK_3 0x03
+#define IR_VK_4 0x04
+#define IR_VK_5 0x05
+#define IR_VK_6 0x06
+#define IR_VK_7 0x07
+#define IR_VK_8 0x08
+#define IR_VK_9 0x09
+
+#define IR_POWER 0x12
+#define IR_AUDIO_MUTE 0x0d
+#define IR_NETFLIX 0x0f
+#define IR_BACK 0x0e
+#define IR_VOL_UP 0x0b
+#define IR_VOL_DN 0x0c
+#define IR_NEXT 0x20
+#define IR_PREV 0x21
+#define IR_MENU 0x23
+#define IR_HOME 0x24
+#define IR_OPER_KEY 0x2e
+#define IR_INFO 0x2f
+#define IR_REWIND 0x32
+#define IR_FAST_FOWARD 0x34
+#define IR_PLAY_PAUSE 0x35
+#define IR_GUIDE 0x41
+#define IR_UP 0x45
+#define IR_DN 0x44
+#define IR_LEFT 0x42
+#define IR_RIGHT 0x43
+#define IR_SEL 0x46
+#define IR_RED_KEY 0x6b
+#define IR_GREEN_KEY 0x6c
+#define IR_YELLOW_KEY 0x6d
+#define IR_BLUE_KEY 0x6e
+#define IR_RECORD 0x72
+#define IR_OPTION 0x73
+#define IR_STOP 0x74
+#define IR_SEARCH 0x75
+#define IR_TEXT 0x76
+#define IR_VOICE 0x77
+#define IR_PAUSE 0x78
+
+#define T_VK_CH_UP 0xd0
+#define T_VK_CH_DN 0xd1
+
+
+#if(RC_BTN_ENABLE)
+//5316 hardware: C1T125A5_V1.0
+#if (REMOTE_IR_ENABLE) //with IR key map
+ #define GPIO_IR_CONTROL GPIO_PA0
+
+ #define KB_MAP_NORMAL {\
+ {0, 1, 2, 3, 4}, \
+ {KEY_MODE_SWITCH, 6, 7, 8, 9}, \
+ {10, 11, 12, 13, 14}, \
+ {15, 16, 17, 18, 19}, \
+ {20, 21, 22, 23, 24}, \
+ {25, 26, 27, 28, 29}, }
+
+ #define KB_MAP_BLE {\
+ VK_NONE, VK_UP, VK_ENTER, VK_DOWN, VK_NONE, \
+ KEY_MODE_SWITCH, VK_LEFT, CR_MENU, CR_VOL_MUTE, VK_RIGHT, \
+ VK_POWER , CR_HOME, VK_7, VK_2, CR_BACK, \
+ VK_NONE, CR_VOL_DN, VK_NONE, VK_5, CR_VOL_UP, \
+ VK_NONE, VK_1, VK_0, VK_8, VK_3, \
+ VK_NONE, VK_4, VK_NONE, VK_9, VK_6, }
+
+
+ #define KB_MAP_IR {\
+ VK_NONE, IR_UP, IR_SEL, IR_DN, VK_NONE, \
+ KEY_MODE_SWITCH, IR_LEFT, IR_MENU, VK_NONE, IR_RIGHT, \
+ IR_POWER , IR_HOME, IR_VK_7, IR_VK_2, IR_BACK, \
+ VK_NONE, IR_VOL_DN, VK_NONE, IR_VK_5, IR_VOL_UP, \
+ VK_NONE, IR_VK_1, IR_VK_0, IR_VK_8, IR_VK_3, \
+ VK_NONE, IR_VK_4, VK_NONE, IR_VK_9, IR_VK_6, }
+#else//key map
+ #define KB_MAP_NORMAL {\
+ {VK_NONE, VK_UP, VK_ENTER, VK_DOWN, VK_NONE}, \
+ {KEY_MODE_SWITCH, VK_LEFT, CR_MENU, CR_VOL_MUTE, VK_RIGHT}, \
+ {VK_POWER, CR_HOME, VK_7, VK_2, CR_BACK}, \
+ {VK_NONE, CR_VOL_DN, VK_NONE, VK_5, CR_VOL_UP}, \
+ {VK_NONE, VK_1, VK_0, VK_8, VK_3}, \
+ {VK_NONE, VK_4, VK_NONE, VK_9, VK_6}, }
+#endif //end of REMOTE_IR_ENABLE
+
+#define KB_DRIVE_PINS {GPIO_PA5, GPIO_PA4, GPIO_PA3, GPIO_PA2, GPIO_PA1}
+#define KB_SCAN_PINS {GPIO_PC6, GPIO_PC5, GPIO_PC4, GPIO_PC3, GPIO_PC2, GPIO_PC1}
+
+//drive pin need 100K pulldown
+#define PULL_WAKEUP_SRC_PA5 MATRIX_ROW_PULL
+#define PULL_WAKEUP_SRC_PA4 MATRIX_ROW_PULL
+#define PULL_WAKEUP_SRC_PA3 MATRIX_ROW_PULL
+#define PULL_WAKEUP_SRC_PA2 MATRIX_ROW_PULL
+#define PULL_WAKEUP_SRC_PA1 MATRIX_ROW_PULL
+
+//scan pin need 10K pullup
+#define PULL_WAKEUP_SRC_PC6 MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PC5 MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PC4 MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PC3 MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PC2 MATRIX_COL_PULL
+#define PULL_WAKEUP_SRC_PC1 MATRIX_COL_PULL
+
+//drive pin open input to read gpio wakeup level
+#define PA5_INPUT_ENABLE 1
+#define PA4_INPUT_ENABLE 1
+#define PA3_INPUT_ENABLE 1
+#define PA2_INPUT_ENABLE 1
+#define PA1_INPUT_ENABLE 1
+
+//scan pin open input to read gpio level
+#define PC6_INPUT_ENABLE 1
+#define PC5_INPUT_ENABLE 1
+#define PC4_INPUT_ENABLE 1
+#define PC3_INPUT_ENABLE 1
+#define PC2_INPUT_ENABLE 1
+#define PC1_INPUT_ENABLE 1
+
+#endif
+
+#define KB_MAP_NUM KB_MAP_NORMAL
+#define KB_MAP_FN KB_MAP_NORMAL
+
+
+
+/* System clock initialization -----------------------------------------------*/
+#define CLOCK_SYS_CLOCK_HZ 16000000
+enum{
+ CLOCK_SYS_CLOCK_1S = CLOCK_SYS_CLOCK_HZ,
+ CLOCK_SYS_CLOCK_1MS = (CLOCK_SYS_CLOCK_1S / 1000),
+ CLOCK_SYS_CLOCK_1US = (CLOCK_SYS_CLOCK_1S / 1000000),
+};
+
+
+/* WatchDog ------------------------------------------------------------------*/
+#define MODULE_WATCHDOG_ENABLE 0
+#define WATCHDOG_INIT_TIMEOUT 500 //Unit:ms
+
+/* ATT Handle define ---------------------------------------------------------*/
+typedef enum
+{
+ ATT_H_START = 0,
+
+
+ //// Gap ////
+ /**********************************************************************************************/
+ GenericAccess_PS_H, //UUID: 2800, VALUE: uuid 1800
+ GenericAccess_DeviceName_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ GenericAccess_DeviceName_DP_H, //UUID: 2A00, VALUE: device name
+ GenericAccess_Appearance_CD_H, //UUID: 2803, VALUE: Prop: Read
+ GenericAccess_Appearance_DP_H, //UUID: 2A01, VALUE: appearance
+ CONN_PARAM_CD_H, //UUID: 2803, VALUE: Prop: Read
+ CONN_PARAM_DP_H, //UUID: 2A04, VALUE: connParameter
+
+
+ //// gatt ////
+ /**********************************************************************************************/
+ GenericAttribute_PS_H, //UUID: 2800, VALUE: uuid 1801
+ GenericAttribute_ServiceChanged_CD_H, //UUID: 2803, VALUE: Prop: Indicate
+ GenericAttribute_ServiceChanged_DP_H, //UUID: 2A05, VALUE: service change
+ GenericAttribute_ServiceChanged_CCB_H, //UUID: 2902, VALUE: serviceChangeCCC
+
+
+ //// device information ////
+ /**********************************************************************************************/
+ DeviceInformation_PS_H, //UUID: 2800, VALUE: uuid 180A
+ DeviceInformation_pnpID_CD_H, //UUID: 2803, VALUE: Prop: Read
+ DeviceInformation_pnpID_DP_H, //UUID: 2A50, VALUE: PnPtrs
+
+
+ //// HID ////
+ /**********************************************************************************************/
+ HID_PS_H, //UUID: 2800, VALUE: uuid 1812
+
+ //include
+ HID_INCLUDE_H, //UUID: 2802, VALUE: include
+
+ //protocol
+ HID_PROTOCOL_MODE_CD_H, //UUID: 2803, VALUE: Prop: read | write_without_rsp
+ HID_PROTOCOL_MODE_DP_H, //UUID: 2A4E, VALUE: protocolMode
+
+ //boot keyboard input report
+ HID_BOOT_KB_REPORT_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ HID_BOOT_KB_REPORT_INPUT_DP_H, //UUID: 2A22, VALUE: bootKeyInReport
+ HID_BOOT_KB_REPORT_INPUT_CCB_H, //UUID: 2902, VALUE: bootKeyInReportCCC
+
+ //boot keyboard output report
+ HID_BOOT_KB_REPORT_OUTPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | write| write_without_rsp
+ HID_BOOT_KB_REPORT_OUTPUT_DP_H, //UUID: 2A32, VALUE: bootKeyOutReport
+
+ //consume report in
+ HID_CONSUME_REPORT_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ HID_CONSUME_REPORT_INPUT_DP_H, //UUID: 2A4D, VALUE: reportConsumerIn
+ HID_CONSUME_REPORT_INPUT_CCB_H, //UUID: 2902, VALUE: reportConsumerInCCC
+ HID_CONSUME_REPORT_INPUT_REF_H, //UUID: 2908 VALUE: REPORT_ID_CONSUMER, TYPE_INPUT
+
+ //keyboard report in
+ HID_NORMAL_KB_REPORT_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ HID_NORMAL_KB_REPORT_INPUT_DP_H, //UUID: 2A4D, VALUE: reportKeyIn
+ HID_NORMAL_KB_REPORT_INPUT_CCB_H, //UUID: 2902, VALUE: reportKeyInInCCC
+ HID_NORMAL_KB_REPORT_INPUT_REF_H, //UUID: 2908 VALUE: REPORT_ID_KEYBOARD, TYPE_INPUT
+
+ //keyboard report out
+ HID_NORMAL_KB_REPORT_OUTPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | write| write_without_rsp
+ HID_NORMAL_KB_REPORT_OUTPUT_DP_H, //UUID: 2A4D, VALUE: reportKeyOut
+ HID_NORMAL_KB_REPORT_OUTPUT_REF_H, //UUID: 2908 VALUE: REPORT_ID_KEYBOARD, TYPE_OUTPUT
+
+ // report map
+ HID_REPORT_MAP_CD_H, //UUID: 2803, VALUE: Prop: Read
+ HID_REPORT_MAP_DP_H, //UUID: 2A4B, VALUE: reportKeyIn
+ HID_REPORT_MAP_EXT_REF_H, //UUID: 2907 VALUE: extService
+
+ //hid information
+ HID_INFORMATION_CD_H, //UUID: 2803, VALUE: Prop: read
+ HID_INFORMATION_DP_H, //UUID: 2A4A VALUE: hidInformation
+
+ //control point
+ HID_CONTROL_POINT_CD_H, //UUID: 2803, VALUE: Prop: write_without_rsp
+ HID_CONTROL_POINT_DP_H, //UUID: 2A4C VALUE: controlPoint
+
+
+ //// battery service ////
+ /**********************************************************************************************/
+ BATT_PS_H, //UUID: 2800, VALUE: uuid 180f
+ BATT_LEVEL_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ BATT_LEVEL_INPUT_DP_H, //UUID: 2A19 VALUE: batVal
+ BATT_LEVEL_INPUT_CCB_H, //UUID: 2902, VALUE: batValCCC
+
+
+ //// Ota ////
+ /**********************************************************************************************/
+ OTA_PS_H, //UUID: 2800, VALUE: telink ota service uuid
+ OTA_CMD_OUT_CD_H, //UUID: 2803, VALUE: Prop: read | write_without_rsp
+ OTA_CMD_OUT_DP_H, //UUID: telink ota uuid, VALUE: otaData
+ OTA_CMD_OUT_DESC_H, //UUID: 2901, VALUE: otaName
+
+
+
+ ATT_END_H,
+
+}ATT_HANDLE;
+
+
+#define SYS_BLE_MODE_1M BIT(0)
+#define SYS_2P4G_MODE BIT(5)
+
+typedef struct{
+ unsigned char sys_2p4g_mode_chg_flg;
+ unsigned char sys_ble_1m_chg_flg;
+ unsigned char sys_ble_2m_chg_flg;
+ unsigned char sys_mode;
+}systemStatus_t;
+
+
+extern systemStatus_t sys_status;
+
+
+
+
+
+
+
+
+
+
+
+/* Debug Interface -----------------------------------------------------------*/
+#define DEBUG_GPIO_ENABLE 0
+
+#if(DEBUG_GPIO_ENABLE)
+ #define PB2_FUNC AS_GPIO //debug gpio chn0 : PB2
+ #define PB3_FUNC AS_GPIO //debug gpio chn1 : PB3
+ #define PB4_FUNC AS_GPIO //debug gpio chn2 : PB4
+ #define PB5_FUNC AS_GPIO //debug gpio chn3 : PB5
+ #define PA6_FUNC AS_GPIO //debug gpio chn4 : PA6
+
+ #define PB2_INPUT_ENABLE 0
+ #define PB3_INPUT_ENABLE 0
+ #define PB4_INPUT_ENABLE 0
+ #define PB5_INPUT_ENABLE 0
+ #define PA6_INPUT_ENABLE 0
+ #define PA7_INPUT_ENABLE 0
+
+ #define PB2_OUTPUT_ENABLE 1
+ #define PB3_OUTPUT_ENABLE 1
+ #define PB4_OUTPUT_ENABLE 1
+ #define PB5_OUTPUT_ENABLE 1
+ #define PA6_OUTPUT_ENABLE 1
+
+
+ #define DBG_CHN0_LOW ( *(unsigned char *)0x80058b &= (~(1<<2)) )
+ #define DBG_CHN0_HIGH ( *(unsigned char *)0x80058b |= (1<<2) )
+ #define DBG_CHN0_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<2) )
+
+ #define DBG_CHN1_LOW ( *(unsigned char *)0x80058b &= (~(1<<3)) )
+ #define DBG_CHN1_HIGH ( *(unsigned char *)0x80058b |= (1<<3) )
+ #define DBG_CHN1_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<3) )
+
+ #define DBG_CHN2_LOW ( *(unsigned char *)0x80058b &= (~(1<<4)) )
+ #define DBG_CHN2_HIGH ( *(unsigned char *)0x80058b |= (1<<4) )
+ #define DBG_CHN2_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<4) )
+
+ #define DBG_CHN3_LOW ( *(unsigned char *)0x80058b &= (~(1<<5)) )
+ #define DBG_CHN3_HIGH ( *(unsigned char *)0x80058b |= (1<<5) )
+ #define DBG_CHN3_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<5) )
+
+ #define DBG_CHN4_LOW ( *(unsigned char *)0x800583 &= (~(1<<6)) )
+ #define DBG_CHN4_HIGH ( *(unsigned char *)0x800583 |= (1<<6) )
+ #define DBG_CHN4_TOGGLE ( *(unsigned char *)0x800583 ^= (1<<6) )
+#else
+ #define DBG_CHN0_LOW
+ #define DBG_CHN0_HIGH
+ #define DBG_CHN0_TOGGLE
+ #define DBG_CHN1_LOW
+ #define DBG_CHN1_HIGH
+ #define DBG_CHN1_TOGGLE
+ #define DBG_CHN2_LOW
+ #define DBG_CHN2_HIGH
+ #define DBG_CHN2_TOGGLE
+ #define DBG_CHN3_LOW
+ #define DBG_CHN3_HIGH
+ #define DBG_CHN3_TOGGLE
+ #define DBG_CHN4_LOW
+ #define DBG_CHN4_HIGH
+ #define DBG_CHN4_TOGGLE
+ #define DBG_CHN5_LOW
+ #define DBG_CHN5_HIGH
+ #define DBG_CHN5_TOGGLE
+
+#endif //end of DEBUG_GPIO_ENABLE
+
+
+
+
+
+
+
+
+
+
+/////////////////// set default ////////////////
+
+#include "../common/default_config.h"
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/battery_check.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/battery_check.c
new file mode 100644
index 0000000000000..27aedeb6006e2
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/battery_check.c
@@ -0,0 +1,140 @@
+/********************************************************************************************************
+ * @file battery_check.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "battery_check.h"
+#include "tl_common.h"
+#include "drivers.h"
+
+int adc_hw_initialized = 0;
+
+/**
+ * @Brief: Bubble sort.
+ * @Param: pData -> pointer point to data
+ * @Param: len -> lenght of data
+ * @Return: None.
+ */
+void bubble_sort(unsigned short *pData, unsigned int len)
+{
+ for(volatile int i = 0; i< len-1; i++)
+ {
+ for(volatile int j = 0; j pData[j+1])
+ {
+ unsigned short temp = pData[j];
+ pData[j] = pData[j+1];
+ pData[j+1] = temp;
+ }
+ }
+ }
+}
+
+/**
+ * @Brief: Battery check.
+ * @Param: None.
+ * @Return: None.
+ */
+volatile signed short adcValue[BATTERY_SAMPLE_NUM];
+void battery_power_check(int minVol_mV)
+{
+
+ if(!adc_hw_initialized){
+ adc_hw_initialized = 1;
+ adc_init();
+ adc_vbat_init(BATTERY_CHECK_PIN);
+ }
+
+ adc_reset();
+ aif_reset(); ///refer to driver
+ adc_power_on(1);
+
+ //clear adcValue buffer
+ for(volatile int i=0; i> 2;
+
+ //////////////// adc sample data convert to voltage(mv) ////////////////
+ // (1180mV Vref, 1/8 scaler) (BIT<12~0> valid data)
+ // = adc_result * 1160 * 8 / 0x2000
+ // = adc_result * 4680 >>12
+ // = adc_result * 295 >>8
+ // u16 vol = (adcValueAvg * 1180 * 8)>>13;//Unit:mV; cause reference voltage is not accurate and the real value is 1.18v(Vref = 1.2V);*8 indicate 1/8 scaler
+ u16 vol;
+ if((adc_cal_value!=0xffff)&&(adc_cal_value != 0x0000)) //Already calibrated
+ {
+ vol = adcValueAvg*1000/adc_cal_value; //this used 1000mV calibrated value
+ }
+ else
+ {
+ vol = (adcValueAvg * 295)>>8; ////vol = (adcValueAvg * 1180 * 8)>>13;
+ }
+
+ /* Low voltage processing. Enter deep sleep. */
+ if(vol < minVol_mV){
+
+ #if (1 && BLT_APP_LED_ENABLE) //led indicate
+ gpio_set_output_en(GPIO_LED, 1); //output enable
+ for(int k=0;k<3;k++){
+ gpio_write(GPIO_LED, 1);
+ sleep_us(200000);
+ gpio_write(GPIO_LED, 0);
+ sleep_us(200000);
+ }
+ gpio_set_output_en(GPIO_LED, 0);
+ #endif
+
+ analog_write(DEEP_ANA_REG2, BATTERY_VOL_LOW);
+ cpu_sleep_wakeup(PM_SLeepMode_Deep, PM_WAKEUP_PAD, 0);
+ }
+}
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/battery_check.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/battery_check.h
new file mode 100644
index 0000000000000..5c255d109d80b
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/battery_check.h
@@ -0,0 +1,37 @@
+/********************************************************************************************************
+ * @file battery_check.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef BATTERY_CHECK_H_
+#define BATTERY_CHECK_H_
+
+#include "drivers.h"
+
+#define BATTERY_CHECK_PIN GPIO_PA7 ///GPIO_PB3
+
+#define BATTERY_VOL_OK 0x00
+#define BATTERY_VOL_LOW 0x01
+
+#define BATTERY_VOL_MIN (2000)//Unit: mV
+#define BATTERY_SAMPLE_NUM 8 ///please make sure this value is x*8 (integer multiple of eight)
+
+void battery_power_check(int minVol_mV);
+
+#endif /* BATTERY_CHECK_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/main.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/main.c
new file mode 100644
index 0000000000000..92c920b28c604
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/main.c
@@ -0,0 +1,108 @@
+/********************************************************************************************************
+ * @file main.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include
+#include "drivers.h"
+#include "stack/ble/ble.h"
+#include "../common/user_config.h"
+#include "../common/blt_fw_sign.h"
+
+#include "../link_layer/rf_ll.h"
+#include "rf_2p4g.h"
+
+
+#if(REMOTE_IR_ENABLE)
+ extern void rc_ir_irq_prc(void);
+#endif
+
+_attribute_ram_code_ void irq_handler(void)
+{
+ if(sys_status.sys_mode == SYS_2P4G_MODE){ //2p4g mode
+
+ u16 src_rf = reg_rf_irq_status;
+ if(src_rf & FLD_RF_IRQ_RX){
+ DBG_CHN2_TOGGLE;
+ irq_device_rx();
+ }
+
+ if(src_rf & FLD_RF_IRQ_TX){
+ DBG_CHN3_TOGGLE;
+ irq_device_tx();
+ }
+
+ }
+ else{
+
+ #if(REMOTE_IR_ENABLE)
+ rc_ir_irq_prc();
+ #endif
+ irq_blt_sdk_handler();
+
+ }
+
+}
+
+int main(void){
+
+ blc_pm_select_internal_32k_crystal();
+// blc_pm_select_external_32k_crystal();
+
+ /***********************************************
+ * if the bin size is less than 48K, we recommend using this setting.
+ */
+ #if (FLASH_SIZE_OPTION == FLASH_SIZE_OPTION_128K) ///FLASH_SIZE_OPTION_128K
+ bls_ota_setFirmwareSizeAndOffset(48, 0x10000);///default : ota_firmware_size_k=128;ota_program_bootAddr=0x20000; it is for hawk 128K flash
+ bls_smp_configParingSecurityInfoStorageAddr(0x1C000);
+ #endif
+
+ cpu_wakeup_init();
+
+ #if (CLOCK_SYS_CLOCK_HZ == 16000000)
+ clock_init(SYS_CLK_16M_Crystal);
+ #elif (CLOCK_SYS_CLOCK_HZ == 32000000)
+ clock_init(SYS_CLK_32M_Crystal);
+ #elif (CLOCK_SYS_CLOCK_HZ == 48000000)
+ clock_init(SYS_CLK_48M_Crystal);
+ #endif
+
+ gpio_init();
+
+ u8 system_mode = analog_read(PM_REG_SYS_MODE);
+ sys_status.sys_mode = (system_mode & (SYS_BLE_MODE_1M | SYS_2P4G_MODE)) ? system_mode : SYS_2P4G_MODE; // default is 2p4g mode;
+
+ /* load customized freq_offset CAP value and TP value.*/
+ blc_app_loadCustomizedParameters();//do this operation before "rf_drv_init"
+
+ rf_drv_init(sys_status.sys_mode);
+
+ user_init();
+
+ irq_enable();
+
+ while (1) {
+ #if (MODULE_WATCHDOG_ENABLE)
+ wd_clear(); //clear watch dog
+ #endif
+ main_loop ();
+ }
+}
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/rc_ir.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/rc_ir.c
new file mode 100644
index 0000000000000..564416c91fcb1
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/rc_ir.c
@@ -0,0 +1,396 @@
+/********************************************************************************************************
+ * @file rc_ir.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "drivers.h"
+#include "tl_common.h"
+#include "rc_ir.h"
+#include "app_config.h"
+
+#if (REMOTE_IR_ENABLE)
+
+
+#define ADD_REPEAT_ONE_BY_ONE 0
+
+///////////// NEC protocol /////////////////////////////////////////////
+//start
+#define IR_INTRO_CARR_TIME_NEC 9000
+#define IR_INTRO_NO_CARR_TIME_NEC 4500
+//stop
+#define IR_END_TRANS_TIME_NEC 563 // user define
+//repeat
+#define IR_REPEAT_CARR_TIME_NEC 9000
+#define IR_REPEAT_NO_CARR_TIME_NEC 2250
+#define IR_REPEAT_LOW_CARR_TIME_NEC 560
+//data "1"
+#define IR_HIGH_CARR_TIME_NEC 560
+#define IR_HIGH_NO_CARR_TIME_NEC 1690
+//data "0"
+#define IR_LOW_CARR_TIME_NEC 560
+#define IR_LOW_NO_CARR_TIME_NEC 560
+
+
+
+
+
+#define PWM_IR_MAX_NUM 80 //user can define this max number according to application
+typedef struct{
+ unsigned int dma_len; // dma len
+ unsigned short data[PWM_IR_MAX_NUM];
+ unsigned int data_num;
+}pwm_dma_data_t;
+
+
+pwm_dma_data_t T_dmaData_buf;
+
+u16 waveform_start_bit_1st;
+u16 waveform_start_bit_2nd;
+u16 waveform_stop_bit_1st;
+u16 waveform_stop_bit_2nd;
+
+u16 waveform_logic_0_1st;
+u16 waveform_logic_0_2nd;
+u16 waveform_logic_1_1st;
+u16 waveform_logic_1_2nd;
+
+u16 waveform_repeat_1st;
+u16 waveform_repeat_2nd;
+u16 waveform_repeat_3rd;
+u16 waveform_repeat_4th;
+
+u16 waveform_wait_to_repeat;
+
+int ir_sending_check(void);
+
+
+
+
+void ir_nec_send(u8 addr1, u8 addr2, u8 cmd)
+{
+
+ if(ir_send_ctrl.last_cmd != cmd)
+ {
+ if(ir_sending_check())
+ {
+ return;
+ }
+
+
+ ir_send_ctrl.last_cmd = cmd;
+
+ //// set waveform input in sequence //////
+ T_dmaData_buf.data_num = 0;
+
+ //waveform for start bit
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_start_bit_1st;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_start_bit_2nd;
+
+
+ //add data
+ u32 data = (~cmd)<<24 | cmd<<16 | addr2<<8 | addr1;
+ for(int i=0;i<32;i++){
+ if(data & BIT(i)){
+ //waveform for logic_1
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_logic_1_1st;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_logic_1_2nd;
+ }
+ else{
+ //waveform for logic_0
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_logic_0_1st;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_logic_0_2nd;
+ }
+ }
+
+ //waveform for stop bit
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_stop_bit_1st;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_stop_bit_2nd;
+
+
+ T_dmaData_buf.dma_len = T_dmaData_buf.data_num * 2;
+
+ if(1){ //need repeat
+ ir_send_ctrl.repeat_enable = 1; //need repeat signal
+ }
+ else{ //no need repeat
+ ir_send_ctrl.repeat_enable = 0; //no need repeat signal
+ }
+
+
+ reg_pwm_irq_sta = FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //clear dma fifo mode done irq status
+ reg_pwm_irq_mask |= FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //enable dma fifo mode done irq mask
+
+
+ ir_send_ctrl.is_sending = IR_SENDING_DATA;
+
+ ir_send_ctrl.sending_start_time = clock_time();
+
+// gpio_set_func(GPIO_PB3, AS_PWM0_N);
+ pwm_start_dma_ir_sending();
+
+ }
+}
+
+
+
+
+
+
+int ir_is_sending()
+{
+ if(ir_send_ctrl.is_sending && clock_time_exceed(ir_send_ctrl.sending_start_time, 300*1000))
+ {
+ ir_send_ctrl.is_sending = IR_SENDING_NONE;
+
+ pwm_stop_dma_ir_sending();
+ }
+
+ return ir_send_ctrl.is_sending;
+}
+
+int ir_sending_check(void)
+{
+ u8 r = irq_disable();
+ if(ir_is_sending()){
+ irq_restore(r);
+ return 1;
+ }
+ irq_restore(r);
+ return 0;
+}
+
+
+
+void ir_send_release(void)
+{
+ u8 r = irq_disable();
+
+ ir_send_ctrl.last_cmd = 0xff;
+
+#if(!ADD_REPEAT_ONE_BY_ONE)
+ if(ir_send_ctrl.is_sending != IR_SENDING_NONE){
+ pwm_stop_dma_ir_sending();
+ }
+#endif
+
+ ir_send_ctrl.is_sending = IR_SENDING_NONE;
+
+ reg_pwm_irq_sta = FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //clear irq status
+ reg_pwm_irq_mask &= ~FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //disable irq mask
+
+
+ irq_restore(r);
+}
+
+
+
+
+
+
+//int AA_pwm_irq_cnt = 0;
+
+#if (ADD_REPEAT_ONE_BY_ONE)
+
+
+
+
+_attribute_ram_code_
+void rc_ir_irq_prc(void)
+{
+
+ if(reg_pwm_irq_sta & FLD_IRQ_PWM0_IR_DMA_FIFO_DONE){
+ reg_pwm_irq_sta = FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //clear irq status
+
+
+ if(ir_send_ctrl.repeat_enable){
+
+ if(ir_send_ctrl.is_sending == IR_SENDING_DATA){
+ ir_send_ctrl.is_sending = IR_SENDING_REPEAT;
+
+ T_dmaData_buf.data_num = 0;
+
+ u32 tick_2_repeat_sysClockTimer16M = 110*CLOCK_16M_SYS_TIMER_CLK_1MS - (clock_time() - ir_send_ctrl.sending_start_time);
+ u32 tick_2_repeat_sysTimer = (tick_2_repeat_sysClockTimer16M*CLOCK_SYS_CLOCK_1US>>4);
+
+
+ waveform_wait_to_repeat = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, tick_2_repeat_sysTimer/PWM_CARRIER_CYCLE_TICK);
+
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_wait_to_repeat;
+
+
+ T_dmaData_buf.dma_len = T_dmaData_buf.data_num * 2;
+
+ pwm_start_dma_ir_sending();
+ }
+ else if(ir_send_ctrl.is_sending == IR_SENDING_REPEAT){
+
+ T_dmaData_buf.data_num = 0;
+
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_1st;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_2nd;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_3rd;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_4th;
+
+ T_dmaData_buf.dma_len = T_dmaData_buf.data_num * 2;
+ pwm_start_dma_ir_sending();
+
+ }
+ }
+ else{
+ ir_send_release();
+ }
+
+ }
+}
+
+
+
+
+
+#else
+
+_attribute_ram_code_
+void rc_ir_irq_prc(void)
+{
+
+ if(reg_pwm_irq_sta & FLD_IRQ_PWM0_IR_DMA_FIFO_DONE){
+ reg_pwm_irq_sta = FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //clear irq status
+
+// AA_pwm_irq_cnt ++;
+
+ if(ir_send_ctrl.repeat_enable){
+
+ if(ir_send_ctrl.is_sending == IR_SENDING_DATA){
+ ir_send_ctrl.is_sending = IR_SENDING_REPEAT;
+
+ T_dmaData_buf.data_num = 0;
+
+ u32 tick_2_repeat_sysClockTimer16M = 110*CLOCK_16M_SYS_TIMER_CLK_1MS - (clock_time() - ir_send_ctrl.sending_start_time);
+ u32 tick_2_repeat_sysTimer = (tick_2_repeat_sysClockTimer16M*CLOCK_SYS_CLOCK_1US>>4);
+
+
+ waveform_wait_to_repeat = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, tick_2_repeat_sysTimer/PWM_CARRIER_CYCLE_TICK);
+
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_wait_to_repeat;
+
+ for(int i=0;i<5;i++){
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_1st;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_2nd;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_3rd;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_4th;
+ }
+
+ T_dmaData_buf.dma_len = T_dmaData_buf.data_num * 2;
+
+ pwm_start_dma_ir_sending();
+ }
+ else if(ir_send_ctrl.is_sending == IR_SENDING_REPEAT){
+
+ T_dmaData_buf.data_num = 0;
+ for(int i=0;i<5;i++){
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_1st;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_2nd;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_3rd;
+ T_dmaData_buf.data[T_dmaData_buf.data_num ++] = waveform_repeat_4th;
+ }
+
+ T_dmaData_buf.dma_len = T_dmaData_buf.data_num * 2;
+ pwm_start_dma_ir_sending();
+
+ }
+ }
+ else{
+ ir_send_release();
+ }
+
+ }
+}
+
+
+#endif
+
+
+
+
+
+
+
+void rc_ir_init(void)
+{
+
+//only pwm0 support fifo mode
+ pwm_n_revert(PWM0_ID); //if use PWMx_N, user must set "pwm_n_revert" before gpio_set_func(pwmx_N).
+ gpio_set_func(GPIO_PA0, AS_PWM0);
+ pwm_set_mode(PWM0_ID, PWM_IR_DMA_FIFO_MODE);
+ pwm_set_cycle_and_duty(PWM0_ID, PWM_CARRIER_CYCLE_TICK, PWM_CARRIER_HIGH_TICK ); //config carrier: 38k, 1/3 duty
+
+
+ pwm_set_dma_address(&T_dmaData_buf);
+
+
+//logic_0, 560 us carrier, 560 us low
+ waveform_logic_0_1st = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+ waveform_logic_0_2nd = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+//logic_1, 560 us carrier, 1690 us low
+ waveform_logic_1_1st = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+ waveform_logic_1_2nd = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 1690 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+
+//start bit, 9000 us carrier, 4500 us low
+ waveform_start_bit_1st = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 9000 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+ waveform_start_bit_2nd = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 4500 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+
+//stop bit, 560 us carrier, 500 us low
+ waveform_stop_bit_1st = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+ waveform_stop_bit_2nd = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 500 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+
+
+//repeat signal first part, 9000 us carrier, 2250 us low
+ waveform_repeat_1st = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 9000 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+ waveform_repeat_2nd = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 2250 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+//repeat signal second part, 560 us carrier, 99190 us low(110 ms - 9000us - 2250us - 560us = 99190 us)
+ waveform_repeat_3rd = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+ waveform_repeat_4th = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 99190 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
+
+
+
+
+//add fifo stop irq, when all waveform send over, this irq will triggers
+ //enable system irq PWM
+ reg_irq_mask |= FLD_IRQ_SW_PWM_EN;
+
+ //enable pwm0 fifo stop irq
+ reg_pwm_irq_sta = FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //clear irq status
+// reg_pwm_irq_mask |= FLD_IRQ_PWM0_IR_DMA_FIFO_DONE;
+
+ ir_send_ctrl.last_cmd = 0xff; //must
+}
+
+
+
+
+
+
+
+
+#endif //end of REMOTE_IR_ENABLE
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/rc_ir.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/rc_ir.h
new file mode 100644
index 0000000000000..16e6f7fa066c4
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/rc_ir.h
@@ -0,0 +1,128 @@
+/********************************************************************************************************
+ * @file rc_ir.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef _RC_IR_H_
+#define _RC_IR_H_
+
+#include
+#include
+
+#define IR_CARRIER_FREQ 38000 // 1 frame -> 1/38k -> 1000/38 = 26 us
+#define PWM_CARRIER_CYCLE_TICK ( CLOCK_SYS_CLOCK_HZ/IR_CARRIER_FREQ ) //16M: 421 tick, f = 16000000/421 = 38004,T = 421/16=26.3125 us
+#define PWM_CARRIER_HIGH_TICK ( PWM_CARRIER_CYCLE_TICK/3 ) // 1/3 duty
+
+#define PWM_CARRIER_HALF_CYCLE_TICK (PWM_CARRIER_CYCLE_TICK>>1)
+
+
+#define IR_HIGH_CARR_TIME 565 // in us
+#define IR_HIGH_NO_CARR_TIME 1685
+#define IR_LOW_CARR_TIME 560
+#define IR_LOW_NO_CARR_TIME 565
+#define IR_INTRO_CARR_TIME 9000
+#define IR_INTRO_NO_CARR_TIME 4500
+
+#define IR_SWITCH_CODE 0x0d
+#define IR_ADDR_CODE 0x00
+#define IR_CMD_CODE 0xbf
+
+#define IR_REPEAT_INTERVAL_TIME 40500
+#define IR_REPEAT_NO_CARR_TIME 2250
+#define IR_END_TRANS_TIME 563
+
+//#define IR_CARRIER_FREQ 37917//38222
+#define IR_CARRIER_DUTY 3
+#define IR_LEARN_SERIES_CNT 160
+
+
+
+
+enum{
+ IR_SEND_TYPE_TIME_SERIES,
+ IR_SEND_TYPE_BYTE,
+ IR_SEND_TYPE_HALF_TIME_SERIES,
+};
+
+
+
+typedef struct{
+ u32 cycle;
+ u16 hich;
+ u16 cnt;
+}ir_ctrl_t;
+
+
+typedef struct{
+ ir_ctrl_t *ptr_irCtl;
+ u8 type;
+ u8 start_high;
+ u8 ir_number;
+ u8 code;
+}ir_send_ctrl_data_t;
+
+
+#define IR_GROUP_MAX 8
+
+#define IR_SENDING_NONE 0
+#define IR_SENDING_DATA 1
+#define IR_SENDING_REPEAT 2
+
+typedef struct{
+ u8 is_sending;
+ u8 repeat_enable;
+ u8 last_cmd;
+ u8 rsvd;
+
+ u32 sending_start_time;
+}ir_send_ctrl_t;
+
+ir_send_ctrl_t ir_send_ctrl;
+
+
+
+
+
+
+
+
+
+void ir_config_carrier(u16 cycle_tick, u16 high_tick);
+void ir_config_byte_timing(u32 logic_1_carr, u32 logic_1_none, u32 logic_0_carr, u32 logic_0_none);
+
+void ir_send_add_series_item(u32 *time_series, u8 series_cnt, ir_ctrl_t *pIrCtrl, u8 start_high);
+void ir_send_add_byte_item(u8 code, u8 start_high);
+
+
+void rc_ir_init(void);
+void ir_send_release(void);
+
+void ir_irq_send(void);
+void ir_repeat_handle(void);
+
+
+
+
+
+
+
+void ir_nec_send(u8 addr1, u8 addr2, u8 cmd);
+
+
+#endif /* RC_IR_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/rf_2p4g.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/rf_2p4g.c
new file mode 100644
index 0000000000000..133a0b366aa48
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/rf_2p4g.c
@@ -0,0 +1,286 @@
+/********************************************************************************************************
+ * @file rf_2p4g.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date August. 30, 2019
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "rf_2p4g.h"
+#include "app.h"
+#include "app_config.h"
+
+#include "vendor/link_layer/rf_ll.h"
+#include "vendor/common/keyboard.h"
+
+rf_packet_pairing_t pkt_pairing = {
+ sizeof (rf_packet_pairing_t) - 4, // dma_len
+ sizeof (rf_packet_pairing_t) - 5, // rf_len
+ RF_PROTO_BYTE, // proto
+ PKT_FLOW_TOKEN, // flow
+ FRAME_TYPE_KEYBOARD, // type
+ 0, // rssi
+ 0, // per
+ 0, // seq_no
+ 0, // reserved
+};
+
+rf_packet_keyboard_t pkt_km = {
+ sizeof (rf_packet_keyboard_t) - 4, // dma_len
+ sizeof (rf_packet_keyboard_t) - 5, // rf_len, 28-5 = 0x17
+ RF_PROTO_BYTE, // proto, 0x51
+ PKT_FLOW_DIR, // flow, 0x80
+ FRAME_TYPE_KEYBOARD, // type, 0x01
+ 0, // rssi
+ 0, // per
+ 0, // seq_no
+ 1, // pno
+};
+
+kb_status_t kb_status;
+
+u8 km_dat_sending = 0;
+u8 pipe1_send_id_flg = 0;
+u8 key_2p4g_not_released = 0;
+
+u8* kb_rf_pkt = (u8*)&pkt_pairing;
+
+u32 tick_key_pressed;
+
+extern kb_data_t kb_event;
+extern systemStatus_t sys_status;
+
+extern unsigned int cpu_wakup_last_tick;
+
+
+void user_2p4g_init(){
+
+ kb_status.no_ack = 1;
+
+ //get id from flash 76000(ble MAC address low 4 byte)
+ if ( *(u32 *) CFG_ADR_MAC != U32_MAX) {
+ pkt_pairing.did = *(u32 *) CFG_ADR_MAC;
+ }
+
+ kb_status.link_ok = analog_read(PM_REG_MODE_LINK);
+ if(kb_status.link_ok){
+ u32 did;
+ u8 * pd = (u8 *) &did;
+ int i;
+ for (i=PM_REG_DONGLE_PIPECODE_LOW; i<=PM_REG_DONGLE_PIPECODE_HIGH; i++) {
+ *pd ++ = analog_read (i);
+ }
+ kb_status.dongle_pipeCode = did;
+ rf_set_access_code_data (did);
+ kb_status.kb_mode = STATE_CONNECT;
+ }
+ else{
+ kb_status.link_ok = 0;
+ kb_status.dongle_pipeCode = 0;
+ rf_set_access_code_pairing (0x39517695);
+ kb_status.kb_mode = STATE_PAIRING;
+ }
+
+ //rf init
+ ll_device_init ();
+ rf_receiving_pipe_enble(0x3f); //open all RX receive pipe(pipe0 - pipe5)
+ kb_status.tx_retry = 5;
+ kb_status.tx_power = RF_POWER_7dBm;
+
+ if(kb_status.kb_mode == STATE_CONNECT){
+ kb_rf_pkt = (u8*)&pkt_km;
+ rf_set_power_level_index(kb_status.tx_power);
+ }
+ else{
+ kb_rf_pkt = (u8*)&pkt_pairing;
+ rf_set_power_level_index (RF_POWER_0dBm);
+ }
+ /***********************************************************************************
+ * Keyboard matrix initialization. These section must be before battery_power_check.
+ * Because when low battery,chip will entry deep.if placed after battery_power_check,
+ * it is possible that can not wake up chip.
+ * *******************************************************************************/
+ u32 pin[] = KB_DRIVE_PINS;
+ for(int i=0; i<(sizeof (pin)/sizeof(*pin)); i++)
+ {
+ gpio_set_wakeup(pin[i],1,1); //drive pin core(gpio) high wakeup suspend
+ cpu_set_gpio_wakeup (pin[i],1,1); //drive pin pad high wakeup deepsleep
+ }
+
+ km_dat_sending = 1;
+ tick_key_pressed = clock_time();
+}
+
+_attribute_ram_code_ int rf_rx_process(u8 * p)
+{
+ rf_packet_ack_pairing_t *p_pkt = (rf_packet_ack_pairing_t *) (p + 8);
+ if (p_pkt->proto == RF_PROTO_BYTE) {
+ pkt_pairing.rssi = p[4];
+ /////////////// Paring/Link ACK //////////////////////////
+ if ( p_pkt->type == FRAME_TYPE_ACK && (p_pkt->did == pkt_pairing.did) ) { //paring/link request
+ rf_set_access_code_data(p_pkt->gid1);//need change to pipe2 that is for kb's data
+ kb_status.dongle_pipeCode = p_pkt->gid1;
+ kb_status.link_ok = 1;
+ return 1;
+ }
+ ////////// end of PIPE0 /////////////////////////////////////
+ ///////////// PIPE1: ACK /////////////////////////////
+ else if (p_pkt->type == FRAME_TYPE_ACK_KEYBOARD) {
+ kb_status.kb_pipe_rssi = p[4];
+ pipe1_send_id_flg = 0;
+ return 1;
+ }
+ else if (p_pkt->type == FRAME_AUTO_ACK_KB_ASK_ID){
+ pipe1_send_id_flg = 1;//fix auto bug
+ return 1;
+ }
+ ////////// end of PIPE1 /////////////////////////////////////
+ }
+ return 0;
+}
+
+_attribute_ram_code_ void rf_2p4g_proc( u32 det_key ){
+ static u32 kb_tx_retry_thresh = 0;
+
+ if (kb_status.link_ok ) {
+ if ( det_key ){
+ memcpy ((void *) &pkt_km.data[0], (void *) &kb_event, sizeof(kb_data_t));
+ pkt_km.seq_no++;
+ km_dat_sending = 1;
+ kb_tx_retry_thresh = 0x400;
+ }
+#if 1 //KEYBOARD_PIPE1_DATA_WITHOUT_DID
+ //fix auto paring bug, if dongle ACK ask for id,send it in on pipe1
+ int allow_did_in_kb_data = 0;
+ if(pipe1_send_id_flg){
+ if(det_key){ //kb data with did in last 4 byte
+ if(kb_event.cnt < 3){
+ allow_did_in_kb_data = 1;
+ }
+ }
+ else{ //no kb data, only did in last 4 byte; seq_no keep same, so dongle reject this invalid data
+ allow_did_in_kb_data = 1;
+ }
+
+ if(allow_did_in_kb_data){
+ *(u32 *) (&pkt_km.data[4]) = pkt_pairing.did; //did in last 4 byte
+ pkt_km.type = FRAME_TYPE_KB_SEND_ID;
+ km_dat_sending = 1;
+ kb_tx_retry_thresh = 0x400;
+ }
+ else{
+ pkt_km.type = FRAME_TYPE_KEYBOARD;
+ }
+ }
+ else{
+ pkt_km.type = FRAME_TYPE_KEYBOARD;
+ }
+#endif
+
+ if (km_dat_sending) {
+ if ( kb_tx_retry_thresh-- == 0 ){
+ km_dat_sending = 0;
+ }
+ }
+ }
+ else{
+ pkt_pairing.seq_no++;
+ }
+
+ if((km_dat_sending || !kb_status.link_ok)){
+ if(device_send_packet ( kb_rf_pkt, 550, kb_status.tx_retry, 0) ){
+ km_dat_sending = 0;
+ kb_status.no_ack = 0;
+ }
+ else{
+ kb_status.no_ack ++;
+ pkt_km.per ++;
+ }
+ }
+}
+
+void pm_2p4g_proc(void){
+ if (!key_2p4g_not_released && clock_time_exceed (tick_key_pressed, 10* 1000000)){
+ if(kb_status.link_ok){
+ u32 did;
+ did = kb_status.dongle_pipeCode;
+ u8 * pd = (u8 *) &did;
+ for (int i = PM_REG_DONGLE_PIPECODE_LOW; i <= PM_REG_DONGLE_PIPECODE_HIGH; i++) {
+ analog_write (i, *pd ++);
+ }
+ analog_write (PM_REG_MODE_LINK, kb_status.link_ok);
+ }
+ cpu_sleep_wakeup (DEEPSLEEP_MODE, PM_WAKEUP_PAD , 0) ; //deep
+ }
+ else
+ {
+ cpu_sleep_wakeup (SUSPEND_MODE, PM_WAKEUP_TIMER, cpu_wakup_last_tick + 12 * CLOCK_SYS_CLOCK_1MS) ;
+ }
+}
+
+void main_loop_2p4g(void){
+ cpu_wakup_last_tick = clock_time();
+ kb_event.keycode[0] = 0;
+ u32 det_key = kb_scan_key (0, !km_dat_sending);
+ if (det_key){
+ key_2p4g_not_released = 1;
+ tick_key_pressed = clock_time();
+ if(kb_event.cnt == 2){
+ det_key = 0;
+ if((kb_event.keycode[0] == VK_ENTER && kb_event.keycode[1] == VK_UP)
+ || (kb_event.keycode[0] == VK_UP && kb_event.keycode[1] == VK_ENTER) ){
+ combination_key.key_ble_1m_ui_press_flg = 1;
+ }
+ }
+ else{
+ key_2p4g_not_released = 0;
+ if(sys_status.sys_mode == SYS_2P4G_MODE ){
+ if(combination_key.key_ble_1m_ui_press_flg){
+ combination_key.key_ble_1m_ui_press_flg = 0;
+ if(clock_time_exceed(combination_key.key_vaild_tick , 1000000)){
+ sys_status.sys_ble_1m_chg_flg = 1;
+ }
+ }
+
+ if(sys_status.sys_ble_1m_chg_flg){
+ if(kb_status.link_ok){
+ u32 did;
+ did = kb_status.dongle_pipeCode;
+ u8 * pd = (u8 *) &did;
+ for (int i = PM_REG_DONGLE_PIPECODE_LOW; i <= PM_REG_DONGLE_PIPECODE_HIGH; i++) {
+ analog_write (i, *pd ++);
+ }
+ analog_write (PM_REG_MODE_LINK, kb_status.link_ok);
+
+ }
+ return;
+ }
+ }
+ }
+ }
+
+ if(kb_status.kb_mode != STATE_CONNECT && kb_status.link_ok){
+ kb_rf_pkt = (u8*)&pkt_km;
+ kb_status.kb_mode = STATE_CONNECT;
+ rf_set_power_level_index(kb_status.tx_power);
+ memset(&kb_event,0,sizeof(kb_event));
+ det_key = 1;
+ }
+
+ rf_2p4g_proc(det_key);
+
+ pm_2p4g_proc();
+}
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/rf_2p4g.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/rf_2p4g.h
new file mode 100644
index 0000000000000..e4a74d5ab25d2
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_dual_mode/rf_2p4g.h
@@ -0,0 +1,62 @@
+/********************************************************************************************************
+ * @file rf_2p4g.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date August. 30, 2019
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef RF_2P4G_H_
+#define RF_2P4G_H_
+
+#include "vendor/common/rf_frame.h"
+
+#define PM_REG_SYS_MODE DEEP_ANA_REG3
+#define PM_REG_MODE_LINK DEEP_ANA_REG9
+#define PM_REG_DONGLE_PIPECODE_LOW DEEP_ANA_REG5
+#define PM_REG_DONGLE_PIPECODE_HIGH DEEP_ANA_REG8
+
+#define FRAME_TYPE_KB_SEND_ID 0x0a
+#define FRAME_AUTO_ACK_KB_ASK_ID 0x8a
+
+typedef struct {
+ u8 link_ok; //0: not connect 1: connected
+ u8 kb_pipe_rssi;
+ u8 tx_power;
+ u8 rsvd;
+
+ u8 kb_mode;
+ u8 tx_retry;
+ u16 no_ack;
+
+ u32 dongle_pipeCode;
+} kb_status_t;
+
+extern kb_status_t kb_status;
+
+typedef enum{
+ STATE_PAIRING = 0,
+ STATE_CONNECT,
+}KB_MODE;
+
+void user_2p4g_init();
+int rf_rx_process(u8 * p);
+void rf_2p4g_proc( u32 det_key );
+void pm_2p4g_proc(void);
+void main_loop_2p4g(void);
+
+
+#endif /* RF_2P4G_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/app.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/app.c
new file mode 100644
index 0000000000000..46d62ec69782b
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/app.c
@@ -0,0 +1,115 @@
+/********************************************************************************************************
+ * @file app.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include
+#include "tl_common.h"
+#include "drivers.h"
+#include "app_config.h"
+#include "vendor/common/blt_led.h"
+#include "vendor/common/keyboard.h"
+#include "vendor/common/blt_soft_timer.h"
+
+
+void user_init(void)
+{
+ #if( FEATURE_TEST_MODE == TEST_ADVERTISING_ONLY \
+ || FEATURE_TEST_MODE == TEST_ADV_IN_CONN_SLAVE_ROLE \
+ || FEATURE_TEST_MODE == TEST_SCAN_IN_ADV_AND_CONN_SLAVE_ROLE \
+ || FEATURE_TEST_MODE == TEST_ADV_SCAN_IN_CONN_SLAVE_ROLE)
+
+ feature_linklayer_state_test_init();
+
+ #elif(FEATURE_TEST_MODE == TEST_POWER_ADV)
+
+ feature_adv_power_test_init();
+
+ #elif(FEATURE_TEST_MODE == TEST_SMP_SECURITY)
+
+ feature_security_test_init_normal();
+
+ #elif(FEATURE_TEST_MODE == TEST_GATT_SECURITY)
+
+ feature_gatt_security_test_init_normal();
+
+ #elif(FEATURE_TEST_MODE == TEST_DATA_LENGTH_EXTENSION)
+
+ feature_sdle_test_init();
+
+ #elif(FEATURE_TEST_MODE == TEST_USER_BLT_SOFT_TIMER)
+
+ feature_soft_timer_test_init();
+
+ #elif(FEATURE_TEST_MODE == TEST_WHITELIST)
+
+ feature_whitelist_test_init();
+
+ #elif(FEATURE_TEST_MODE == TEST_BLE_PHY)
+
+ feature_phytest_init();
+
+ #elif(FEATURE_TEST_MODE == TEST_2M_PHY_CONNECTION)
+
+ feature_2m_phy_conn_init();
+
+ #endif
+}
+
+
+u32 tick_loop=0;
+/*----------------------------------------------------------------------------*/
+/*-------- Main Loop ----------*/
+/*----------------------------------------------------------------------------*/
+void main_loop (void)
+{
+ tick_loop++;
+
+ #if(FEATURE_TEST_MODE == TEST_USER_BLT_SOFT_TIMER)
+ blt_soft_timer_process(MAINLOOP_ENTRY);
+ feature_soft_timer_test_mainloop();
+ #endif
+
+ blt_sdk_main_loop();
+
+ #if(FEATURE_TEST_MODE == TEST_SMP_SECURITY)
+ feature_security_test_mainloop();
+
+ #elif(FEATURE_TEST_MODE == TEST_DATA_LENGTH_EXTENSION)
+ feature_sdle_test_mainloop();
+
+ #elif(FEATURE_TEST_MODE == TEST_2M_PHY_CONNECTION)
+ feature_2m_phy_conn_mainloop();
+
+ #elif(FEATURE_TEST_MODE == TEST_ADV_IN_CONN_SLAVE_ROLE)
+ feature_linklayer_state_test_main_loop();
+
+ #elif(FEATURE_TEST_MODE == TEST_POWER_ADV)
+ feature_adv_power_test_mainloop();
+
+ #elif(FEATURE_TEST_MODE == TEST_WHITELIST)
+ feature_whitelist_test_mainloop();
+
+ #endif
+}
+
+/*----------------------------- End of File ----------------------------------*/
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/app.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/app.h
new file mode 100644
index 0000000000000..f5efa4241a365
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/app.h
@@ -0,0 +1,54 @@
+/********************************************************************************************************
+ * @file app.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef _APP_H
+#define _APP_H
+
+#include "tl_common.h"
+#include "drivers.h"
+
+extern void user_init();
+extern void main_loop (void);
+
+extern void my_att_init(void);
+
+void feature_adv_power_test_init(void);
+void feature_adv_power_test_mainloop(void);
+
+void feature_linklayer_state_test_init(void);
+void feature_linklayer_state_test_main_loop(void);
+
+void feature_phytest_init(void);
+
+void feature_soft_timer_test_init(void);
+void feature_soft_timer_test_mainloop(void);
+
+//2m PHY test
+extern void feature_2m_phy_conn_init(void);
+extern void feature_2m_phy_conn_mainloop(void);
+
+//DLE test
+void feature_sdle_test_init(void);
+void feature_sdle_test_mainloop(void);
+
+void feature_whitelist_test_mainloop(void);
+
+#endif /* APP_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/app_att.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/app_att.c
new file mode 100644
index 0000000000000..eb509af3d6c7c
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/app_att.c
@@ -0,0 +1,561 @@
+/********************************************************************************************************
+ * @file app_att.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author public@telink-semi.com;
+ * @date May. 10, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "tl_common.h"
+#include "stack/ble/ble.h"
+
+
+typedef struct
+{
+ /** Minimum value for the connection event (interval. 0x0006 - 0x0C80 * 1.25 ms) */
+ u16 intervalMin;
+ /** Maximum value for the connection event (interval. 0x0006 - 0x0C80 * 1.25 ms) */
+ u16 intervalMax;
+ /** Number of LL latency connection events (0x0000 - 0x03e8) */
+ u16 latency;
+ /** Connection Timeout (0x000A - 0x0C80 * 10 ms) */
+ u16 timeout;
+} gap_periConnectParams_t;
+
+static const u16 clientCharacterCfgUUID = GATT_UUID_CLIENT_CHAR_CFG;
+
+static const u16 extReportRefUUID = GATT_UUID_EXT_REPORT_REF;
+
+static const u16 reportRefUUID = GATT_UUID_REPORT_REF;
+
+static const u16 characterPresentFormatUUID = GATT_UUID_CHAR_PRESENT_FORMAT;
+
+static const u16 userdesc_UUID = GATT_UUID_CHAR_USER_DESC;
+
+static const u16 serviceChangeUUID = GATT_UUID_SERVICE_CHANGE;
+
+static const u16 my_primaryServiceUUID = GATT_UUID_PRIMARY_SERVICE;
+
+static const u16 my_characterUUID = GATT_UUID_CHARACTER;
+
+static const u16 my_devServiceUUID = SERVICE_UUID_DEVICE_INFORMATION;
+
+static const u16 my_PnPUUID = CHARACTERISTIC_UUID_PNP_ID;
+
+static const u16 my_devNameUUID = GATT_UUID_DEVICE_NAME;
+
+static const u16 my_gapServiceUUID = SERVICE_UUID_GENERIC_ACCESS;
+
+static const u16 my_appearanceUIID = GATT_UUID_APPEARANCE;
+
+static const u16 my_periConnParamUUID = GATT_UUID_PERI_CONN_PARAM;
+
+static const u16 my_appearance = GAP_APPEARE_UNKNOWN;
+
+static const gap_periConnectParams_t my_periConnParameters = {20, 40, 0, 1000};
+
+static const u16 my_gattServiceUUID = SERVICE_UUID_GENERIC_ATTRIBUTE;
+
+static u16 serviceChangeVal[2] = {0};
+
+static u8 serviceChangeCCC[2] = {0,0};
+
+static const u8 my_devName[] = {'F','e','a','t','u','r','e'};
+
+static const u8 my_PnPtrs [] = {0x02, 0x8a, 0x24, 0x66, 0x82, 0x01, 0x00};
+
+
+
+//////////////////////// OTA ////////////////////////////////////////////////////
+static const u8 my_OtaUUID[16] = TELINK_SPP_DATA_OTA;
+static const u8 my_OtaServiceUUID[16] = TELINK_OTA_UUID_SERVICE;
+static u8 my_OtaData = 0x00;
+static const u8 my_OtaName[] = {'O', 'T', 'A'};
+
+
+#if(FEATURE_TEST_MODE == TEST_DATA_LENGTH_EXTENSION)
+////////////////////// SPP ////////////////////////////////////
+static const u8 TelinkSppServiceUUID[16] = TELINK_SPP_UUID_SERVICE;
+static const u8 TelinkSppDataServer2ClientUUID[16] = TELINK_SPP_DATA_SERVER2CLIENT;
+static const u8 TelinkSppDataClient2ServerUUID[16] = TELINK_SPP_DATA_CLIENT2SERVER;
+
+// Spp data from Server to Client characteristic variables
+static u8 SppDataServer2ClientDataCCC[2] = {0};
+//this array will not used for sending data(directly calling HandleValueNotify API), so cut array length from 20 to 1, saving some SRAM
+static u8 SppDataServer2ClientData[1] = {0}; //SppDataServer2ClientData[20]
+// Spp data from Client to Server characteristic variables
+//this array will not used for receiving data(data processed by Attribute Write CallBack function), so cut array length from 20 to 1, saving some SRAM
+static u8 SppDataClient2ServerData[1] = {0}; //SppDataClient2ServerData[20]
+
+//SPP data descriptor
+static const u8 TelinkSPPS2CDescriptor[] = "Telink SPP: Module->Phone";
+static const u8 TelinkSPPC2SDescriptor[] = "Telink SPP: Phone->Module";
+
+
+//// GAP attribute values
+static const u8 my_devNameCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(GenericAccess_DeviceName_DP_H), U16_HI(GenericAccess_DeviceName_DP_H),
+ U16_LO(GATT_UUID_DEVICE_NAME), U16_HI(GATT_UUID_DEVICE_NAME)
+};
+static const u8 my_appearanceCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(GenericAccess_Appearance_DP_H), U16_HI(GenericAccess_Appearance_DP_H),
+ U16_LO(GATT_UUID_APPEARANCE), U16_HI(GATT_UUID_APPEARANCE)
+};
+static const u8 my_periConnParamCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(CONN_PARAM_DP_H), U16_HI(CONN_PARAM_DP_H),
+ U16_LO(GATT_UUID_PERI_CONN_PARAM), U16_HI(GATT_UUID_PERI_CONN_PARAM)
+};
+
+
+//// GATT attribute values
+static const u8 my_serviceChangeCharVal[5] = {
+ CHAR_PROP_INDICATE,
+ U16_LO(GenericAttribute_ServiceChanged_DP_H), U16_HI(GenericAttribute_ServiceChanged_DP_H),
+ U16_LO(GATT_UUID_SERVICE_CHANGE), U16_HI(GATT_UUID_SERVICE_CHANGE)
+};
+
+
+//// device Information attribute values
+static const u8 my_PnCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(DeviceInformation_pnpID_DP_H), U16_HI(DeviceInformation_pnpID_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_PNP_ID), U16_HI(CHARACTERISTIC_UUID_PNP_ID)
+};
+
+
+//// Telink spp attribute values
+static const u8 TelinkSppDataServer2ClientCharVal[19] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(SPP_SERVER_TO_CLIENT_DP_H), U16_HI(SPP_SERVER_TO_CLIENT_DP_H),
+ TELINK_SPP_DATA_SERVER2CLIENT
+};
+static const u8 TelinkSppDataClient2ServerCharVal[19] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(SPP_CLIENT_TO_SERVER_DP_H), U16_HI(SPP_CLIENT_TO_SERVER_DP_H),
+ TELINK_SPP_DATA_CLIENT2SERVER
+};
+
+
+//// OTA attribute values
+static const u8 my_OtaCharVal[19] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(OTA_CMD_OUT_DP_H), U16_HI(OTA_CMD_OUT_DP_H),
+ TELINK_SPP_DATA_OTA
+};
+
+extern int module_onReceiveData(rf_packet_att_write_t *p);
+
+static const attribute_t my_Attributes[] =
+{
+ {ATT_END_H - 1, 0,0,0,0,0}, // total num of attribute
+
+ // 0001 - 0007 gap
+ {7,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_gapServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_devNameCharVal),(u8*)(&my_characterUUID), (u8*)(my_devNameCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_devName), (u8*)(&my_devNameUUID), (u8*)(my_devName), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_appearanceCharVal),(u8*)(&my_characterUUID), (u8*)(my_appearanceCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_appearance), (u8*)(&my_appearanceUIID), (u8*)(&my_appearance), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_periConnParamCharVal),(u8*)(&my_characterUUID), (u8*)(my_periConnParamCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_periConnParameters),(u8*)(&my_periConnParamUUID), (u8*)(&my_periConnParameters), 0},
+
+
+ // 0008 - 000b gatt
+ {4,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_gattServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_serviceChangeCharVal),(u8*)(&my_characterUUID), (u8*)(my_serviceChangeCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (serviceChangeVal), (u8*)(&serviceChangeUUID), (u8*)(&serviceChangeVal), 0},
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof (serviceChangeCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(serviceChangeCCC), 0},
+
+
+ // 000c - 000e device Information Service
+ {3,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_devServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_PnCharVal),(u8*)(&my_characterUUID), (u8*)(my_PnCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_PnPtrs),(u8*)(&my_PnPUUID), (u8*)(my_PnPtrs), 0},
+
+ // 000f - 0016 SPP
+ {8,ATT_PERMISSIONS_READ,2,16,(u8*)(&my_primaryServiceUUID), (u8*)(&TelinkSppServiceUUID), 0},
+ // server to client TX
+ {0,ATT_PERMISSIONS_READ,2,sizeof(TelinkSppDataServer2ClientCharVal),(u8*)(&my_characterUUID), (u8*)(TelinkSppDataServer2ClientCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,16,sizeof(SppDataServer2ClientData),(u8*)(&TelinkSppDataServer2ClientUUID), (u8*)(SppDataServer2ClientData), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,2,(u8*)&clientCharacterCfgUUID,(u8*)(&SppDataServer2ClientDataCCC)},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(TelinkSPPS2CDescriptor),(u8*)&userdesc_UUID,(u8*)(&TelinkSPPS2CDescriptor)},
+ // client to server RX
+ {0,ATT_PERMISSIONS_READ,2,sizeof(TelinkSppDataClient2ServerCharVal),(u8*)(&my_characterUUID), (u8*)(TelinkSppDataClient2ServerCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,16,sizeof(SppDataClient2ServerData),(u8*)(&TelinkSppDataClient2ServerUUID), (u8*)(SppDataClient2ServerData), &module_onReceiveData}, //value
+ {0,ATT_PERMISSIONS_READ,2,sizeof(TelinkSPPC2SDescriptor),(u8*)&userdesc_UUID,(u8*)(&TelinkSPPC2SDescriptor)},
+
+ ////////////////////////////////////// OTA /////////////////////////////////////////////////////
+ // 0017 - 001A OTA
+ {4,ATT_PERMISSIONS_READ, 2,16,(u8*)(&my_primaryServiceUUID), (u8*)(&my_OtaServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ, 2, sizeof(my_OtaCharVal),(u8*)(&my_characterUUID), (u8*)(my_OtaCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,16,sizeof(my_OtaData),(u8*)(&my_OtaUUID), (&my_OtaData), &otaWrite, &otaRead}, //value
+ {0,ATT_PERMISSIONS_READ, 2,sizeof (my_OtaName),(u8*)(&userdesc_UUID), (u8*)(my_OtaName), 0},
+
+};
+#else
+
+//////////////////////// Battery /////////////////////////////////////////////////
+static const u16 my_batServiceUUID = SERVICE_UUID_BATTERY;
+static const u16 my_batCharUUID = CHARACTERISTIC_UUID_BATTERY_LEVEL;
+static u8 batteryValueInCCC[2];
+static u8 my_batVal[1] = {99};
+
+//////////////////////// HID /////////////////////////////////////////////////////
+static const u16 my_hidServiceUUID = SERVICE_UUID_HUMAN_INTERFACE_DEVICE;
+
+static const u16 hidServiceUUID = SERVICE_UUID_HUMAN_INTERFACE_DEVICE;
+static const u16 hidProtocolModeUUID = CHARACTERISTIC_UUID_HID_PROTOCOL_MODE;
+static const u16 hidReportUUID = CHARACTERISTIC_UUID_HID_REPORT;
+static const u16 hidReportMapUUID = CHARACTERISTIC_UUID_HID_REPORT_MAP;
+static const u16 hidbootKeyInReportUUID = CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT;
+static const u16 hidbootKeyOutReportUUID = CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT;
+static const u16 hidbootMouseInReportUUID = CHARACTERISTIC_UUID_HID_BOOT_MOUSE_INPUT;
+static const u16 hidinformationUUID = CHARACTERISTIC_UUID_HID_INFORMATION;
+static const u16 hidCtrlPointUUID = CHARACTERISTIC_UUID_HID_CONTROL_POINT;
+static const u16 hidIncludeUUID = GATT_UUID_INCLUDE;
+
+static const u8 protocolMode = DFLT_HID_PROTOCOL_MODE;
+
+
+// Key in Report characteristic variables
+static u8 reportKeyIn[8];
+static u8 reportKeyInCCC[2];
+// HID Report Reference characteristic descriptor, key input
+static u8 reportRefKeyIn[2] =
+ { HID_REPORT_ID_KEYBOARD_INPUT, HID_REPORT_TYPE_INPUT };
+
+// Key out Report characteristic variables
+static u8 reportKeyOut[1];
+static u8 reportKeyOutCCC[2];
+static u8 reportRefKeyOut[2] =
+ { HID_REPORT_ID_KEYBOARD_INPUT, HID_REPORT_TYPE_OUTPUT };
+
+// Consumer Control input Report
+static u8 reportConsumerControlIn[2];
+static u8 reportConsumerControlInCCC[2];
+static u8 reportRefConsumerControlIn[2] = { HID_REPORT_ID_CONSUME_CONTROL_INPUT, HID_REPORT_TYPE_INPUT };
+
+
+
+// Boot Keyboard Input Report
+static u8 bootKeyInReport;
+static u8 bootKeyInReportCCC[2];
+
+// Boot Keyboard Output Report
+static u8 bootKeyOutReport;
+
+
+// HID Information characteristic
+const u8 hidInformation[] =
+{
+ U16_LO(0x0111), U16_HI(0x0111), // bcdHID (USB HID version)
+ 0x00, // bCountryCode
+ 0x01 // Flags
+};
+
+// HID Control Point characteristic
+static u8 controlPoint;
+
+// HID Report Map characteristic
+// Keyboard report descriptor (using format for Boot interface descriptor)
+
+static const u8 reportMap[] =
+{
+ //keyboard report in
+ 0x05, 0x01, // Usage Pg (Generic Desktop)
+ 0x09, 0x06, // Usage (Keyboard)
+ 0xA1, 0x01, // Collection: (Application)
+ 0x85, HID_REPORT_ID_KEYBOARD_INPUT, // Report Id (keyboard)
+ //
+ 0x05, 0x07, // Usage Pg (Key Codes)
+ 0x19, 0xE0, // Usage Min (224) VK_CTRL:0xe0
+ 0x29, 0xE7, // Usage Max (231) VK_RWIN:0xe7
+ 0x15, 0x00, // Log Min (0)
+ 0x25, 0x01, // Log Max (1)
+ //
+ // Modifier byte
+ 0x75, 0x01, // Report Size (1) 1 bit * 8
+ 0x95, 0x08, // Report Count (8)
+ 0x81, 0x02, // Input: (Data, Variable, Absolute)
+ //
+ // Reserved byte
+ 0x95, 0x01, // Report Count (1)
+ 0x75, 0x08, // Report Size (8)
+ 0x81, 0x01, // Input: (static constant)
+
+ //keyboard output
+ //5 bit led ctrl: NumLock CapsLock ScrollLock Compose kana
+ 0x95, 0x05, //Report Count (5)
+ 0x75, 0x01, //Report Size (1)
+ 0x05, 0x08, //Usage Pg (LEDs )
+ 0x19, 0x01, //Usage Min
+ 0x29, 0x05, //Usage Max
+ 0x91, 0x02, //Output (Data, Variable, Absolute)
+ //3 bit reserved
+ 0x95, 0x01, //Report Count (1)
+ 0x75, 0x03, //Report Size (3)
+ 0x91, 0x01, //Output (static constant)
+
+ // Key arrays (6 bytes)
+ 0x95, 0x06, // Report Count (6)
+ 0x75, 0x08, // Report Size (8)
+ 0x15, 0x00, // Log Min (0)
+ 0x25, 0xF1, // Log Max (241)
+ 0x05, 0x07, // Usage Pg (Key Codes)
+ 0x19, 0x00, // Usage Min (0)
+ 0x29, 0xf1, // Usage Max (241)
+ 0x81, 0x00, // Input: (Data, Array)
+
+ 0xC0, // End Collection
+
+
+
+
+ //consumer report in
+ 0x05, 0x0C, // Usage Page (Consumer)
+ 0x09, 0x01, // Usage (Consumer Control)
+ 0xA1, 0x01, // Collection (Application)
+ 0x85, HID_REPORT_ID_CONSUME_CONTROL_INPUT, // Report Id
+ 0x75,0x10, //global, report size 16 bits
+ 0x95,0x01, //global, report count 1
+ 0x15,0x01, //global, min 0x01
+ 0x26,0x8c,0x02, //global, max 0x28c
+ 0x19,0x01, //local, min 0x01
+ 0x2a,0x8c,0x02, //local, max 0x28c
+ 0x81,0x00, //main, input data varible, absolute
+ 0xc0, //main, end collection
+
+};
+
+// HID External Report Reference Descriptor for report map
+static u16 extServiceUUID;
+
+/////////////////////////////////////////////////////////
+static const u8 my_AudioUUID[16] = TELINK_AUDIO_UUID_SERVICE;
+static const u8 my_MicUUID[16] = TELINK_MIC_DATA;
+static const u8 my_SpeakerUUID[16] = TELINK_SPEAKER_DATA;
+
+static u8 my_MicData = 0x80;
+static u8 my_SpeakerData = 0x81;
+
+static const u8 my_MicName[] = {'M', 'i', 'c'};
+static const u8 my_SpeakerName[] = {'S', 'p', 'e', 'a', 'k', 'e', 'r'};
+
+// Include attribute (Battery service)
+static const u16 include[3] = {BATT_PS_H, BATT_LEVEL_INPUT_CCB_H, SERVICE_UUID_BATTERY};
+
+
+//// GAP attribute values
+static const u8 my_devNameCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(GenericAccess_DeviceName_DP_H), U16_HI(GenericAccess_DeviceName_DP_H),
+ U16_LO(GATT_UUID_DEVICE_NAME), U16_HI(GATT_UUID_DEVICE_NAME)
+};
+static const u8 my_appearanceCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(GenericAccess_Appearance_DP_H), U16_HI(GenericAccess_Appearance_DP_H),
+ U16_LO(GATT_UUID_APPEARANCE), U16_HI(GATT_UUID_APPEARANCE)
+};
+static const u8 my_periConnParamCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(CONN_PARAM_DP_H), U16_HI(CONN_PARAM_DP_H),
+ U16_LO(GATT_UUID_PERI_CONN_PARAM), U16_HI(GATT_UUID_PERI_CONN_PARAM)
+};
+
+
+//// GATT attribute values
+static const u8 my_serviceChangeCharVal[5] = {
+ CHAR_PROP_INDICATE,
+ U16_LO(GenericAttribute_ServiceChanged_DP_H), U16_HI(GenericAttribute_ServiceChanged_DP_H),
+ U16_LO(GATT_UUID_SERVICE_CHANGE), U16_HI(GATT_UUID_SERVICE_CHANGE)
+};
+
+
+//// device Information attribute values
+static const u8 my_PnCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(DeviceInformation_pnpID_DP_H), U16_HI(DeviceInformation_pnpID_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_PNP_ID), U16_HI(CHARACTERISTIC_UUID_PNP_ID)
+};
+
+
+//// HID attribute values
+static const u8 my_hidProtocolModeCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_PROTOCOL_MODE_DP_H), U16_HI(HID_PROTOCOL_MODE_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_PROTOCOL_MODE), U16_HI(CHARACTERISTIC_UUID_HID_PROTOCOL_MODE)
+};
+static const u8 my_hidbootKeyInReporCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(HID_BOOT_KB_REPORT_INPUT_DP_H), U16_HI(HID_BOOT_KB_REPORT_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT), U16_HI(CHARACTERISTIC_UUID_HID_BOOT_KEY_INPUT)
+};
+static const u8 my_hidbootKeyOutReporCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_BOOT_KB_REPORT_OUTPUT_DP_H), U16_HI(HID_BOOT_KB_REPORT_OUTPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT), U16_HI(CHARACTERISTIC_UUID_HID_BOOT_KEY_OUTPUT)
+};
+static const u8 my_hidReportCCinCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(HID_CONSUME_REPORT_INPUT_DP_H), U16_HI(HID_CONSUME_REPORT_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT), U16_HI(CHARACTERISTIC_UUID_HID_REPORT)
+};
+static const u8 my_hidReportKEYinCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(HID_NORMAL_KB_REPORT_INPUT_DP_H), U16_HI(HID_NORMAL_KB_REPORT_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT), U16_HI(CHARACTERISTIC_UUID_HID_REPORT)
+};
+static const u8 my_hidReportKEYoutCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_NORMAL_KB_REPORT_OUTPUT_DP_H), U16_HI(HID_NORMAL_KB_REPORT_OUTPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT), U16_HI(CHARACTERISTIC_UUID_HID_REPORT)
+};
+static const u8 my_hidReportMapCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(HID_REPORT_MAP_DP_H), U16_HI(HID_REPORT_MAP_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_REPORT_MAP), U16_HI(CHARACTERISTIC_UUID_HID_REPORT_MAP)
+};
+static const u8 my_hidinformationCharVal[5] = {
+ CHAR_PROP_READ,
+ U16_LO(HID_INFORMATION_DP_H), U16_HI(HID_INFORMATION_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_INFORMATION), U16_HI(CHARACTERISTIC_UUID_HID_INFORMATION)
+};
+static const u8 my_hidCtrlPointCharVal[5] = {
+ CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(HID_CONTROL_POINT_DP_H), U16_HI(HID_CONTROL_POINT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_HID_CONTROL_POINT), U16_HI(CHARACTERISTIC_UUID_HID_CONTROL_POINT)
+};
+
+
+//// Battery attribute values
+static const u8 my_batCharVal[5] = {
+ CHAR_PROP_READ | CHAR_PROP_NOTIFY,
+ U16_LO(BATT_LEVEL_INPUT_DP_H), U16_HI(BATT_LEVEL_INPUT_DP_H),
+ U16_LO(CHARACTERISTIC_UUID_BATTERY_LEVEL), U16_HI(CHARACTERISTIC_UUID_BATTERY_LEVEL)
+};
+
+
+//// OTA attribute values
+static const u8 my_OtaCharVal[19] = {
+ CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP,
+ U16_LO(OTA_CMD_OUT_DP_H), U16_HI(OTA_CMD_OUT_DP_H),
+ TELINK_SPP_DATA_OTA,
+};
+
+// TM : to modify
+static const attribute_t my_Attributes[] =
+{
+ {ATT_END_H - 1, 0,0,0,0,0}, // total num of attribute
+
+ // 0001 - 0007 gap
+ {7,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_gapServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_devNameCharVal),(u8*)(&my_characterUUID), (u8*)(my_devNameCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_devName), (u8*)(&my_devNameUUID), (u8*)(my_devName), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_appearanceCharVal),(u8*)(&my_characterUUID), (u8*)(my_appearanceCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_appearance), (u8*)(&my_appearanceUIID), (u8*)(&my_appearance), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_periConnParamCharVal),(u8*)(&my_characterUUID), (u8*)(my_periConnParamCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_periConnParameters),(u8*)(&my_periConnParamUUID), (u8*)(&my_periConnParameters), 0},
+
+
+ // 0008 - 000b gatt
+ {4,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_gattServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_serviceChangeCharVal),(u8*)(&my_characterUUID), (u8*)(my_serviceChangeCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (serviceChangeVal), (u8*)(&serviceChangeUUID), (u8*)(&serviceChangeVal), 0},
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof (serviceChangeCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(serviceChangeCCC), 0},
+
+
+ // 000c - 000e device Information Service
+ {3,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_devServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_PnCharVal),(u8*)(&my_characterUUID), (u8*)(my_PnCharVal), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_PnPtrs),(u8*)(&my_PnPUUID), (u8*)(my_PnPtrs), 0},
+
+
+ /////////////////////////////////// 4. HID Service /////////////////////////////////////////////////////////
+ // 000f
+ //{27, ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_hidServiceUUID), 0},
+ {HID_CONTROL_POINT_DP_H - HID_PS_H + 1, ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_hidServiceUUID), 0},
+
+ // 0010 include battery service
+ {0,ATT_PERMISSIONS_READ,2,sizeof(include),(u8*)(&hidIncludeUUID), (u8*)(include), 0},
+
+ // 0011 - 0012 protocol mode
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidProtocolModeCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidProtocolModeCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,2, sizeof(protocolMode),(u8*)(&hidProtocolModeUUID), (u8*)(&protocolMode), 0}, //value
+
+ // 0013 - 0015 boot keyboard input report (char-val-client)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidbootKeyInReporCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidbootKeyInReporCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2,sizeof(bootKeyInReport),(u8*)(&hidbootKeyInReportUUID), (u8*)(&bootKeyInReport), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(bootKeyInReportCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(bootKeyInReportCCC), 0}, //value
+
+ // 0016 - 0017 boot keyboard output report (char-val)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidbootKeyOutReporCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidbootKeyOutReporCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,2, sizeof(bootKeyOutReport), (u8*)(&hidbootKeyOutReportUUID), (u8*)(&bootKeyOutReport), 0}, //value
+
+
+ // 0018 - 001b. consume report in: 4 (char-val-client-ref)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportCCinCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportCCinCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2, sizeof(reportConsumerControlIn),(u8*)(&hidReportUUID), (u8*)(reportConsumerControlIn), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportConsumerControlInCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(reportConsumerControlInCCC), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportRefConsumerControlIn),(u8*)(&reportRefUUID), (u8*)(reportRefConsumerControlIn), 0}, //value
+
+ // 001c - 001f . keyboard report in : 4 (char-val-client-ref)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportKEYinCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportKEYinCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2, sizeof(reportKeyIn),(u8*)(&hidReportUUID), (u8*)(reportKeyIn), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportKeyInCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(reportKeyInCCC), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportRefKeyIn),(u8*)(&reportRefUUID), (u8*)(reportRefKeyIn), 0}, //value
+
+ // 0020 - 0022 . keyboard report out: 3 (char-val-ref)
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportKEYoutCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportKEYoutCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportKeyOut),(u8*)(&hidReportUUID), (u8*)(reportKeyOut), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(reportRefKeyOut),(u8*)(&reportRefUUID), (u8*)(reportRefKeyOut), 0}, //value
+
+
+ // 0023 - 0025 . report map: 3
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidReportMapCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidReportMapCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2,sizeof(reportMap),(u8*)(&hidReportMapUUID), (u8*)(reportMap), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(extServiceUUID),(u8*)(&extReportRefUUID), (u8*)(&extServiceUUID), 0}, //value
+
+ // 0026 - 0027 . hid information: 2
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidinformationCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidinformationCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2, sizeof(hidInformation),(u8*)(&hidinformationUUID), (u8*)(hidInformation), 0}, //value
+
+ // 0028 - 0029 . control point: 2
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_hidCtrlPointCharVal),(u8*)(&my_characterUUID), (u8*)(my_hidCtrlPointCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_WRITE,2, sizeof(controlPoint),(u8*)(&hidCtrlPointUUID), (u8*)(&controlPoint), 0}, //value
+
+ ////////////////////////////////////// Battery Service /////////////////////////////////////////////////////
+ // 002a - 002d
+ {4,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_batServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_batCharVal),(u8*)(&my_characterUUID), (u8*)(my_batCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,2,sizeof(my_batVal),(u8*)(&my_batCharUUID), (u8*)(my_batVal), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof(batteryValueInCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(batteryValueInCCC), 0}, //value
+
+ ////////////////////////////////////// OTA /////////////////////////////////////////////////////
+ // 002e - 0031
+ {4,ATT_PERMISSIONS_READ, 2,16,(u8*)(&my_primaryServiceUUID), (u8*)(&my_OtaServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ, 2, sizeof(my_OtaCharVal),(u8*)(&my_characterUUID), (u8*)(my_OtaCharVal), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,16,sizeof(my_OtaData),(u8*)(&my_OtaUUID), (&my_OtaData), &otaWrite, &otaRead}, //value
+ {0,ATT_PERMISSIONS_READ, 2,sizeof (my_OtaName),(u8*)(&userdesc_UUID), (u8*)(my_OtaName), 0},
+};
+#endif
+
+
+void my_att_init (void)
+{
+ bls_att_setAttributeTable((u8 *)my_Attributes);
+}
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/app_config.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/app_config.h
new file mode 100644
index 0000000000000..3f455b849fcb4
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/app_config.h
@@ -0,0 +1,309 @@
+/********************************************************************************************************
+ * @file app_config.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+
+#define BLE_REMOTE_SECURITY_ENABLE 1
+
+/***select flash size***/
+#define FLASH_SIZE_OPTION_128K 0
+#define FLASH_SIZE_OPTION_512K 1
+
+#define FLASH_SIZE_OPTION FLASH_SIZE_OPTION_512K
+
+/////////////////// TEST FEATURE SELECTION /////////////////////////////////
+
+//ble link layer test
+#define TEST_ADVERTISING_ONLY 1
+//text extend state machine
+#define TEST_ADV_IN_CONN_SLAVE_ROLE 2
+#define TEST_SCAN_IN_ADV_AND_CONN_SLAVE_ROLE 3
+#define TEST_ADV_SCAN_IN_CONN_SLAVE_ROLE 4
+
+//power test
+#define TEST_POWER_ADV 10
+
+//smp test
+#define TEST_SMP_PASSKEY_ENTRY 20
+
+//gatt secure test
+#define TEST_GATT_SECURITY 21 //If testing SECURITY, such as Passkey Entry or Numric_Comparison, we use the remote control board for testing
+
+//data length exchange test TEST_SDATA_LENGTH_EXTENSION
+#define TEST_DATA_LENGTH_EXTENSION 22
+
+
+
+//other test
+#define TEST_USER_BLT_SOFT_TIMER 30
+#define TEST_WHITELIST 31
+//phy test
+#define TEST_BLE_PHY 32
+
+#define TEST_2M_PHY_CONNECTION 40
+
+#define FEATURE_TEST_MODE TEST_DATA_LENGTH_EXTENSION
+
+
+#if (FEATURE_TEST_MODE == TEST_USER_BLT_SOFT_TIMER)
+ #define BLT_SOFTWARE_TIMER_ENABLE 1
+#endif
+
+
+
+/////////////////////HCI ACCESS OPTIONS///////////////////////////////////////
+
+#define PHYTEST_MODE_THROUGH_2_WIRE_UART 1 //Direct Test Mode through a 2-wire UART interface
+#define PHYTEST_MODE_OVER_HCI_WITH_UART 2 //Direct Test Mode over HCI(USB hardware interface)
+
+#if (FEATURE_TEST_MODE == TEST_BLE_PHY)
+ #define BLE_PHYTEST_MODE PHYTEST_MODE_OVER_HCI_WITH_UART
+#endif
+
+/////////////////// Clock /////////////////////////////////
+#define CLOCK_SYS_CLOCK_HZ 16000000
+enum{
+ CLOCK_SYS_CLOCK_1S = CLOCK_SYS_CLOCK_HZ,
+ CLOCK_SYS_CLOCK_1MS = (CLOCK_SYS_CLOCK_1S / 1000),
+ CLOCK_SYS_CLOCK_1US = (CLOCK_SYS_CLOCK_1S / 1000000),
+};
+
+
+///////////////////////////////////// ATT HANDLER define ///////////////////////////////////////
+typedef enum
+{
+ ATT_H_START = 0,
+
+ //// Gap ////
+ /**********************************************************************************************/
+ GenericAccess_PS_H, //UUID: 2800, VALUE: uuid 1800
+ GenericAccess_DeviceName_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ GenericAccess_DeviceName_DP_H, //UUID: 2A00, VALUE: device name
+ GenericAccess_Appearance_CD_H, //UUID: 2803, VALUE: Prop: Read
+ GenericAccess_Appearance_DP_H, //UUID: 2A01, VALUE: appearance
+ CONN_PARAM_CD_H, //UUID: 2803, VALUE: Prop: Read
+ CONN_PARAM_DP_H, //UUID: 2A04, VALUE: connParameter
+
+ //// gatt ////
+ /**********************************************************************************************/
+ GenericAttribute_PS_H, //UUID: 2800, VALUE: uuid 1801
+ GenericAttribute_ServiceChanged_CD_H, //UUID: 2803, VALUE: Prop: Indicate
+ GenericAttribute_ServiceChanged_DP_H, //UUID: 2A05, VALUE: service change
+ GenericAttribute_ServiceChanged_CCB_H, //UUID: 2902, VALUE: serviceChangeCCC
+
+ //// device information ////
+ /**********************************************************************************************/
+ DeviceInformation_PS_H, //UUID: 2800, VALUE: uuid 180A
+ DeviceInformation_pnpID_CD_H, //UUID: 2803, VALUE: Prop: Read
+ DeviceInformation_pnpID_DP_H, //UUID: 2A50, VALUE: PnPtrs
+
+ #if(FEATURE_TEST_MODE == TEST_DATA_LENGTH_EXTENSION)
+ //// SPP ////
+ /**********************************************************************************************/
+ SPP_PS_H, //UUID: 2800, VALUE: telink spp service uuid
+
+ //server to client
+ SPP_SERVER_TO_CLIENT_CD_H, //UUID: 2803, VALUE: Prop: read | Notify
+ SPP_SERVER_TO_CLIENT_DP_H, //UUID: telink spp s2c uuid, VALUE: SppDataServer2ClientData
+ SPP_SERVER_TO_CLIENT_CCB_H, //UUID: 2902, VALUE: SppDataServer2ClientDataCCC
+ SPP_SERVER_TO_CLIENT_DESC_H, //UUID: 2901, VALUE: TelinkSPPS2CDescriptor
+
+ //client to server
+ SPP_CLIENT_TO_SERVER_CD_H, //UUID: 2803, VALUE: Prop: read | write_without_rsp
+ SPP_CLIENT_TO_SERVER_DP_H, //UUID: telink spp c2s uuid, VALUE: SppDataClient2ServerData
+ SPP_CLIENT_TO_SERVER_DESC_H, //UUID: 2901, VALUE: TelinkSPPC2SDescriptor
+
+ //// Ota ////
+ /**********************************************************************************************/
+ OTA_PS_H, //UUID: 2800, VALUE: telink ota service uuid
+ OTA_CMD_OUT_CD_H, //UUID: 2803, VALUE: Prop: read | write_without_rsp
+ OTA_CMD_OUT_DP_H, //UUID: telink ota uuid, VALUE: otaData
+ OTA_CMD_OUT_DESC_H, //UUID: 2901, VALUE: otaName
+ #else
+
+ //// HID ////
+ /**********************************************************************************************/
+ HID_PS_H, //UUID: 2800, VALUE: uuid 1812
+
+ //include
+ HID_INCLUDE_H, //UUID: 2802, VALUE: include
+
+ //protocol
+ HID_PROTOCOL_MODE_CD_H, //UUID: 2803, VALUE: Prop: read | write_without_rsp
+ HID_PROTOCOL_MODE_DP_H, //UUID: 2A4E, VALUE: protocolMode
+
+ //boot keyboard input report
+ HID_BOOT_KB_REPORT_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ HID_BOOT_KB_REPORT_INPUT_DP_H, //UUID: 2A22, VALUE: bootKeyInReport
+ HID_BOOT_KB_REPORT_INPUT_CCB_H, //UUID: 2902, VALUE: bootKeyInReportCCC
+
+ //boot keyboard output report
+ HID_BOOT_KB_REPORT_OUTPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | write| write_without_rsp
+ HID_BOOT_KB_REPORT_OUTPUT_DP_H, //UUID: 2A32, VALUE: bootKeyOutReport
+
+ //consume report in
+ HID_CONSUME_REPORT_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ HID_CONSUME_REPORT_INPUT_DP_H, //UUID: 2A4D, VALUE: reportConsumerIn
+ HID_CONSUME_REPORT_INPUT_CCB_H, //UUID: 2902, VALUE: reportConsumerInCCC
+ HID_CONSUME_REPORT_INPUT_REF_H, //UUID: 2908 VALUE: REPORT_ID_CONSUMER, TYPE_INPUT
+
+ //keyboard report in
+ HID_NORMAL_KB_REPORT_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ HID_NORMAL_KB_REPORT_INPUT_DP_H, //UUID: 2A4D, VALUE: reportKeyIn
+ HID_NORMAL_KB_REPORT_INPUT_CCB_H, //UUID: 2902, VALUE: reportKeyInInCCC
+ HID_NORMAL_KB_REPORT_INPUT_REF_H, //UUID: 2908 VALUE: REPORT_ID_KEYBOARD, TYPE_INPUT
+
+ //keyboard report out
+ HID_NORMAL_KB_REPORT_OUTPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | write| write_without_rsp
+ HID_NORMAL_KB_REPORT_OUTPUT_DP_H, //UUID: 2A4D, VALUE: reportKeyOut
+ HID_NORMAL_KB_REPORT_OUTPUT_REF_H, //UUID: 2908 VALUE: REPORT_ID_KEYBOARD, TYPE_OUTPUT
+
+ // report map
+ HID_REPORT_MAP_CD_H, //UUID: 2803, VALUE: Prop: Read
+ HID_REPORT_MAP_DP_H, //UUID: 2A4B, VALUE: reportKeyIn
+ HID_REPORT_MAP_EXT_REF_H, //UUID: 2907 VALUE: extService
+
+ //hid information
+ HID_INFORMATION_CD_H, //UUID: 2803, VALUE: Prop: read
+ HID_INFORMATION_DP_H, //UUID: 2A4A VALUE: hidInformation
+
+ //control point
+ HID_CONTROL_POINT_CD_H, //UUID: 2803, VALUE: Prop: write_without_rsp
+ HID_CONTROL_POINT_DP_H, //UUID: 2A4C VALUE: controlPoint
+
+
+ //// battery service ////
+ /**********************************************************************************************/
+ BATT_PS_H, //UUID: 2800, VALUE: uuid 180f
+ BATT_LEVEL_INPUT_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ BATT_LEVEL_INPUT_DP_H, //UUID: 2A19 VALUE: batVal
+ BATT_LEVEL_INPUT_CCB_H, //UUID: 2902, VALUE: batValCCC
+
+
+ //// Ota ////
+ /**********************************************************************************************/
+ OTA_PS_H, //UUID: 2800, VALUE: telink ota service uuid
+ OTA_CMD_OUT_CD_H, //UUID: 2803, VALUE: Prop: read | write_without_rsp
+ OTA_CMD_OUT_DP_H, //UUID: telink ota uuid, VALUE: otaData
+ OTA_CMD_OUT_DESC_H, //UUID: 2901, VALUE: otaName
+ #endif
+
+ ATT_END_H,
+
+}ATT_HANDLE;
+
+
+/* Simulate uart debug Interface ---------------------------------------------*/
+#define SIMULATE_UART_EN 0
+#define DEBUG_TX_PIN GPIO_PB4
+#define DEBUG_BAUDRATE (115200)
+
+
+/* Debug Interface -----------------------------------------------------------*/
+#define DEBUG_GPIO_ENABLE 0
+
+#if(DEBUG_GPIO_ENABLE)
+ #define PB2_FUNC AS_GPIO //debug gpio chn0 : PB2
+ #define PB3_FUNC AS_GPIO //debug gpio chn1 : PB3
+ #define PB4_FUNC AS_GPIO //debug gpio chn2 : PB4
+ #define PB5_FUNC AS_GPIO //debug gpio chn3 : PB5
+ #define PA6_FUNC AS_GPIO //debug gpio chn4 : PA6
+ #define PA7_FUNC AS_GPIO //debug gpio chn4 : PA7
+
+ #define PB2_INPUT_ENABLE 0
+ #define PB3_INPUT_ENABLE 0
+ #define PB4_INPUT_ENABLE 0
+ #define PB5_INPUT_ENABLE 0
+ #define PA6_INPUT_ENABLE 0
+ #define PA7_INPUT_ENABLE 0
+
+ #define PB2_OUTPUT_ENABLE 1
+ #define PB3_OUTPUT_ENABLE 1
+ #define PB4_OUTPUT_ENABLE 1
+ #define PB5_OUTPUT_ENABLE 1
+ #define PA6_OUTPUT_ENABLE 1
+ #define PA7_OUTPUT_ENABLE 1
+
+ #define DBG_CHN0_LOW ( *(unsigned char *)0x80058b &= (~(1<<2)) )
+ #define DBG_CHN0_HIGH ( *(unsigned char *)0x80058b |= (1<<2) )
+ #define DBG_CHN0_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<2) )
+
+ #define DBG_CHN1_LOW ( *(unsigned char *)0x80058b &= (~(1<<3)) )
+ #define DBG_CHN1_HIGH ( *(unsigned char *)0x80058b |= (1<<3) )
+ #define DBG_CHN1_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<3) )
+
+ #define DBG_CHN2_LOW ( *(unsigned char *)0x80058b &= (~(1<<4)) )
+ #define DBG_CHN2_HIGH ( *(unsigned char *)0x80058b |= (1<<4) )
+ #define DBG_CHN2_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<4) )
+
+ #define DBG_CHN3_LOW ( *(unsigned char *)0x80058b &= (~(1<<5)) )
+ #define DBG_CHN3_HIGH ( *(unsigned char *)0x80058b |= (1<<5) )
+ #define DBG_CHN3_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<5) )
+
+ #define DBG_CHN4_LOW ( *(unsigned char *)0x800583 &= (~(1<<6)) )
+ #define DBG_CHN4_HIGH ( *(unsigned char *)0x800583 |= (1<<6) )
+ #define DBG_CHN4_TOGGLE ( *(unsigned char *)0x800583 ^= (1<<6) )
+
+ #define DBG_CHN5_LOW ( *(unsigned char *)0x800583 &= (~(1<<7)) )
+ #define DBG_CHN5_HIGH ( *(unsigned char *)0x800583 |= (1<<7) )
+ #define DBG_CHN5_TOGGLE ( *(unsigned char *)0x800583 ^= (1<<7) )
+#else
+ #define DBG_CHN0_LOW
+ #define DBG_CHN0_HIGH
+ #define DBG_CHN0_TOGGLE
+ #define DBG_CHN1_LOW
+ #define DBG_CHN1_HIGH
+ #define DBG_CHN1_TOGGLE
+ #define DBG_CHN2_LOW
+ #define DBG_CHN2_HIGH
+ #define DBG_CHN2_TOGGLE
+ #define DBG_CHN3_LOW
+ #define DBG_CHN3_HIGH
+ #define DBG_CHN3_TOGGLE
+ #define DBG_CHN4_LOW
+ #define DBG_CHN4_HIGH
+ #define DBG_CHN4_TOGGLE
+ #define DBG_CHN5_LOW
+ #define DBG_CHN5_HIGH
+ #define DBG_CHN5_TOGGLE
+
+#endif //end of DEBUG_GPIO_ENABLE
+
+
+
+
+
+
+
+#include "../common/default_config.h"
+
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_2m_phy.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_2m_phy.c
new file mode 100644
index 0000000000000..37f17b7d58dbe
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_2m_phy.c
@@ -0,0 +1,171 @@
+/********************************************************************************************************
+ * @file feature_2m_phy_conn.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author public@telink-semi.com;
+ * @date May. 10, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include "stack/ble/ble.h"
+#include "tl_common.h"
+#include "drivers.h"
+#include "vendor/common/blt_common.h"
+
+
+#if(FEATURE_TEST_MODE == TEST_2M_PHY_CONNECTION)
+
+#define BLE_PM_ENABLE 1
+
+MYFIFO_INIT(blt_rxfifo, 64, 8);
+MYFIFO_INIT(blt_txfifo, 40, 16);
+
+
+/* ADV Packet, SCAN Response Packet define */
+const u8 tbl_advData[] = {
+ 0x05, 0x09, 'G', 'h', 'i', 'd',
+ 0x02, 0x01, 0x05, // BLE limited discoverable mode and BR/EDR not supported
+ 0x03, 0x19, 0x80, 0x01, // 384, Generic Remote Control, Generic category
+ 0x05, 0x02, 0x12, 0x18, 0x0F, 0x18, // incomplete list of service class UUIDs (0x1812, 0x180F)
+};
+
+const u8 tbl_scanRsp [] = {
+ 0x08, 0x09, 'G', 'R', 'e', 'm', 'o', 't', 'e',
+};
+
+int device_in_connection_state;
+u32 device_connection_tick;
+u32 advertise_begin_tick;
+
+void task_connect(u8 e, u8 *p, int n)
+{
+ //bls_l2cap_requestConnParamUpdate (8, 8, 99, 400); //interval=10ms latency=99 timeout=4s
+ device_in_connection_state = 1;//
+
+ device_connection_tick = clock_time() | 1; //none zero
+}
+
+void task_terminate(u8 e,u8 *p, int n) //*p is terminate reason
+{
+ device_in_connection_state = 0;
+ device_connection_tick = 0;
+}
+
+void callback_phy_update_complete_event(u8 e,u8 *p, int n)
+{
+// hci_le_phyUpdateCompleteEvt_t *pEvt = (hci_le_phyUpdateCompleteEvt_t *)p;
+
+// DBG_CHN0_TOGGLE;
+
+ DBG_CHN5_TOGGLE;
+}
+
+void feature_2m_phy_conn_init(void)
+{
+ /*-- BLE stack initialization --------------------------------------------*/
+ u8 mac_public[6];
+ u8 mac_random_static[6];
+ blc_initMacAddress(CFG_ADR_MAC, mac_public, mac_random_static);
+
+ /*-- BLE Controller initialization ---------------------------------------*/
+ blc_ll_initBasicMCU(mac_public);//mandatory
+ blc_ll_initAdvertising_module(mac_public);//adv module: mandatory for BLE slave,
+ blc_ll_initSlaveRole_module();//slave module: mandatory for BLE slave,
+
+ blc_ll_init2MPhy_feature();
+
+ /*-- BLE Host initialization ---------------------------------------------*/
+ extern void my_att_init(void);
+ //GATT initialization
+ my_att_init();
+ //L2CAP initialization
+ blc_l2cap_register_handler(blc_l2cap_packet_receive);
+
+ /*-- BLE SMP initialization ----------------------------------------------*/
+#if(BLE_REMOTE_SECURITY_ENABLE)
+ blc_smp_param_setBondingDeviceMaxNumber(4); //default is SMP_BONDING_DEVICE_MAX_NUM, can not bigger that this value
+ //and this func must call before bls_smp_enableParing
+ bls_smp_enableParing (SMP_PARING_CONN_TRRIGER );
+#else
+ bls_smp_enableParing (SMP_PARING_DISABLE_TRRIGER );
+#endif
+
+ /*-- USER application initialization -------------------------------------*/
+ bls_ll_setAdvData( (u8 *)tbl_advData, sizeof(tbl_advData) );
+ bls_ll_setScanRspData( (u8 *)tbl_scanRsp, sizeof(tbl_scanRsp));
+
+ /* Configure ADV packet */
+ u8 status = bls_ll_setAdvParam( ADV_INTERVAL_50MS, ADV_INTERVAL_50MS,
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, OWN_ADDRESS_PUBLIC,
+ 0, NULL,
+ BLT_ENABLE_ADV_ALL,
+ ADV_FP_NONE);
+ //debug: ADV setting err
+ if(status != BLE_SUCCESS) { write_reg8(0x8000, 0x11); while(1); }
+
+ bls_ll_setAdvEnable(1); //adv enable
+ rf_set_power_level_index (RF_POWER_7P9dBm);//OK
+
+ //ble event call back
+ bls_app_registerEventCallback(BLT_EV_FLAG_CONNECT, &task_connect);
+ bls_app_registerEventCallback(BLT_EV_FLAG_TERMINATE, &task_terminate);
+ bls_app_registerEventCallback(BLT_EV_FLAG_PHY_UPDATE, &callback_phy_update_complete_event);
+
+ /* Power Management initialization */
+#if(BLE_PM_ENABLE)
+ blc_ll_initPowerManagement_module(); //pm module: optional
+ bls_pm_setSuspendMask (SUSPEND_ADV | SUSPEND_CONN);
+#else
+ bls_pm_setSuspendMask (SUSPEND_DISABLE);
+#endif
+}
+
+
+// main loop flow
+/////////////////////////////////////////////////////////////////////
+u32 tick_loop;
+u32 phy_update_test_tick = 0;
+u32 phy_update_test_seq = 0;
+
+void feature_2m_phy_conn_mainloop(void)
+{
+ if(device_connection_tick && clock_time_exceed(device_connection_tick, 2000000)){
+ device_connection_tick = 0;
+ phy_update_test_tick = clock_time() | 1;
+ phy_update_test_seq = 0; //reset
+ }
+
+ if(phy_update_test_tick && clock_time_exceed(phy_update_test_tick, 7000000)){
+ phy_update_test_tick = clock_time() | 1;
+
+ if((phy_update_test_seq++)%2 == 0){
+ blc_ll_setPhy(BLS_CONN_HANDLE, PHY_TRX_PREFER, PHY_PREFER_2M, PHY_PREFER_2M);
+ }
+ else{
+ blc_ll_setPhy(BLS_CONN_HANDLE, PHY_TRX_PREFER, PHY_PREFER_1M, PHY_PREFER_1M);
+ }
+
+ //phy_update_test_tick = 0;
+ //blc_ll_setPhy(BLS_CONN_HANDLE, PHY_TRX_PREFER, PHY_PREFER_2M, PHY_PREFER_2M);
+ }
+
+ #if(BLE_PM_ENABLE)
+ bls_pm_setSuspendMask(SUSPEND_ADV | SUSPEND_CONN);
+ #endif
+}
+
+#endif // end of (FEATURE_TEST_MODE == TEST_2M_PHY_CONNECTION)
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_adv_power.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_adv_power.c
new file mode 100644
index 0000000000000..354c35fdd00ad
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_adv_power.c
@@ -0,0 +1,176 @@
+/********************************************************************************************************
+ * @file feature_adv_power.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author public@telink-semi.com;
+ * @date May. 10, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include
+#include "tl_common.h"
+#include "drivers.h"
+#include "app_config.h"
+#include "vendor/common/blt_led.h"
+#include "vendor/common/blt_soft_timer.h"
+#include "vendor/common/blt_common.h"
+
+#if (FEATURE_TEST_MODE == TEST_POWER_ADV)
+
+
+#define BLE_PM_ENABLE 1
+
+#define RX_FIFO_SIZE 64
+#define RX_FIFO_NUM 8
+
+#define TX_FIFO_SIZE 40
+#define TX_FIFO_NUM 16
+
+
+
+
+
+
+ u8 blt_rxfifo_b[RX_FIFO_SIZE * RX_FIFO_NUM] = {0};
+my_fifo_t blt_rxfifo = {
+ RX_FIFO_SIZE,
+ RX_FIFO_NUM,
+ 0,
+ 0,
+ blt_rxfifo_b,};
+
+
+u8 blt_txfifo_b[TX_FIFO_SIZE * TX_FIFO_NUM] = {0};
+my_fifo_t blt_txfifo = {
+ TX_FIFO_SIZE,
+ TX_FIFO_NUM,
+ 0,
+ 0,
+ blt_txfifo_b,};
+
+
+
+
+
+
+
+
+int AA_dbg_suspend;
+void func_suspend_enter (u8 e, u8 *p, int n)
+{
+ AA_dbg_suspend ++;
+}
+
+#define MY_RF_POWER_INDEX RF_POWER_3P3dBm
+
+_attribute_ram_code_ void func_suspend_exit (u8 e, u8 *p, int n)
+{
+ rf_set_power_level_index (MY_RF_POWER_INDEX);
+}
+
+
+
+
+
+
+
+
+
+void feature_adv_power_test_init(void)
+{
+ u8 mac_public[6];
+ u8 mac_random_static[6];
+ blc_initMacAddress(CFG_ADR_MAC, mac_public, mac_random_static);
+
+ ////// Controller Initialization //////////
+ blc_ll_initBasicMCU(mac_public); //mandatory
+
+
+
+ sleep_us(2000000);
+
+
+
+
+ blc_ll_initAdvertising_module(mac_public);
+
+ u8 tbl_advData[] = {
+ 0x08, 0x09, 't', 'e', 's', 't', 'a', 'd', 'v',
+ 0x02, 0x01, 0x05,
+ };
+ u8 tbl_scanRsp [] = {
+ 0x08, 0x09, 'T', 'E', 'S', 'T', 'A', 'D', 'V', //scan name
+ };
+
+ bls_ll_setAdvData( (u8 *)tbl_advData, sizeof(tbl_advData) );
+ bls_ll_setScanRspData( (u8 *)tbl_scanRsp, sizeof(tbl_scanRsp));
+
+ //1S 1 channel 3.3dbm: 29 uA
+// u8 status = bls_ll_setAdvParam( ADV_INTERVAL_1S, ADV_INTERVAL_1S, \
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, OWN_ADDRESS_PUBLIC, \
+ 0, NULL, BLT_ENABLE_ADV_37, ADV_FP_ALLOW_SCAN_WL_ALLOW_CONN_WL); //no scan, no connect
+
+ //1S 3 channel 3.3dBm: 55 uA
+ u8 status = bls_ll_setAdvParam( ADV_INTERVAL_1S, ADV_INTERVAL_1S, \
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, OWN_ADDRESS_PUBLIC, \
+ 0, NULL, BLT_ENABLE_ADV_ALL, ADV_FP_ALLOW_SCAN_WL_ALLOW_CONN_WL); //no scan, no connect
+
+ //500mS 3 channel 3.3dBm: 101 uA
+// u8 status = bls_ll_setAdvParam( ADV_INTERVAL_500MS, ADV_INTERVAL_500MS, \
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, OWN_ADDRESS_PUBLIC, \
+ 0, NULL, BLT_ENABLE_ADV_ALL, ADV_FP_ALLOW_SCAN_WL_ALLOW_CONN_WL); //no scan, no connect
+
+ //30mS 3 channel 3.3dBm: 1516 uA
+// u8 status = bls_ll_setAdvParam( ADV_INTERVAL_30MS, ADV_INTERVAL_30MS, \
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, OWN_ADDRESS_PUBLIC, \
+ 0, NULL, BLT_ENABLE_ADV_ALL, ADV_FP_ALLOW_SCAN_WL_ALLOW_CONN_WL); //no scan, no connect
+
+
+
+ if(status != BLE_SUCCESS){ //adv setting err
+ write_reg8(0x40000, 0x11); //debug
+ while(1);
+ }
+
+ bls_ll_setAdvEnable(1); //adv enable
+
+
+ rf_set_power_level_index (MY_RF_POWER_INDEX);
+
+
+
+
+
+#if(BLE_PM_ENABLE)
+ blc_ll_initPowerManagement_module();
+
+ bls_pm_setSuspendMask (SUSPEND_ADV | SUSPEND_CONN);
+
+// bls_app_registerEventCallback (BLT_EV_FLAG_SUSPEND_EXIT, &func_suspend_exit);
+#else
+ bls_pm_setSuspendMask (SUSPEND_DISABLE);
+#endif
+}
+
+void feature_adv_power_test_mainloop(void)
+{
+#if(BLE_PM_ENABLE)
+ bls_pm_setSuspendMask(SUSPEND_ADV | SUSPEND_CONN);
+#endif
+}
+
+#endif
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_ll_state.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_ll_state.c
new file mode 100644
index 0000000000000..6a053cf648d2d
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_ll_state.c
@@ -0,0 +1,376 @@
+/********************************************************************************************************
+ * @file feature_ll_state.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author public@telink-semi.com;
+ * @date May. 10, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include
+#include "app_config.h"
+#include "vendor/common/blt_led.h"
+#include "vendor/common/blt_soft_timer.h"
+#include "vendor/common/blt_common.h"
+
+#if( FEATURE_TEST_MODE == TEST_ADVERTISING_ONLY \
+ ||FEATURE_TEST_MODE == TEST_ADV_IN_CONN_SLAVE_ROLE \
+ ||FEATURE_TEST_MODE == TEST_SCAN_IN_ADV_AND_CONN_SLAVE_ROLE \
+ ||FEATURE_TEST_MODE == TEST_ADV_SCAN_IN_CONN_SLAVE_ROLE)
+
+#define BLE_PM_ENABLE 0
+
+#define MY_RF_POWER_INDEX RF_POWER_7P9dBm
+
+#define RX_FIFO_SIZE 64
+#define RX_FIFO_NUM 8
+
+#define TX_FIFO_SIZE 40
+#define TX_FIFO_NUM 16
+
+u8 blt_rxfifo_b[RX_FIFO_SIZE * RX_FIFO_NUM] = {0};
+my_fifo_t blt_rxfifo = {
+ RX_FIFO_SIZE,
+ RX_FIFO_NUM,
+ 0,
+ 0,
+ blt_rxfifo_b,
+};
+
+u8 blt_txfifo_b[TX_FIFO_SIZE * TX_FIFO_NUM] = {0};
+my_fifo_t blt_txfifo = {
+ TX_FIFO_SIZE,
+ TX_FIFO_NUM,
+ 0,
+ 0,
+ blt_txfifo_b,
+};
+
+void task_connect(u8 e, u8 *p, int n)
+{
+ //bls_l2cap_requestConnParamUpdate(8,8,99,400);
+}
+
+void task_terminate(u8 e, u8 *p, int n)
+{
+
+}
+
+void func_suspend_enter(u8 e, u8 *p, int n)
+{
+
+}
+
+_attribute_ram_code_ void func_suspend_exit(u8 e, u8 *p, int n)
+{
+ rf_set_power_level_index(MY_RF_POWER_INDEX);
+}
+
+int hci_event_handle(u32 h, u8 *para, int n)
+{
+ u8 evCode = h & 0xff;
+ if(evCode == HCI_EVT_LE_META){
+ event_adv_report_t *p = (event_adv_report_t*)para;
+ u8 subEventCode = p->subcode;
+ if(subEventCode == HCI_SUB_EVT_LE_ADVERTISING_REPORT){
+ print_array(p->mac, 6);
+ }
+ }
+ return 0;
+}
+
+
+void feature_linklayer_state_test_init(void)
+{
+ u8 mac_public[6];
+ u8 mac_random_static[6];
+ blc_initMacAddress(CFG_ADR_MAC, mac_public, mac_random_static);
+
+ rf_set_power_level_index(MY_RF_POWER_INDEX);
+
+ ////// Controller Initialization //////////
+ blc_ll_initBasicMCU(mac_public); //mandatory
+
+#if(FEATURE_TEST_MODE == TEST_ADVERTISING_ONLY)
+
+ printf("\n\rtst adv only\n");
+ blc_ll_initAdvertising_module(mac_public);
+
+
+ u8 tbl_advData[] = {
+ 0x08, 0x09, 't', 'e', 's', 't', 'a', 'd', 'v',
+ 0x02, 0x01, 0x05,
+ };
+ u8 tbl_scanRsp [] = {
+ 0x08, 0x09, 'T', 'E', 'S', 'T', 'A', 'D', 'V', //scan name
+ };
+ bls_ll_setAdvData( (u8 *)tbl_advData, sizeof(tbl_advData) );
+ bls_ll_setScanRspData( (u8 *)tbl_scanRsp, sizeof(tbl_scanRsp));
+
+ u8 status = bls_ll_setAdvParam( ADV_INTERVAL_100MS, ADV_INTERVAL_100MS, \
+ ADV_TYPE_NONCONNECTABLE_UNDIRECTED, OWN_ADDRESS_PUBLIC, \
+ 0, NULL, BLT_ENABLE_ADV_ALL, ADV_FP_NONE);
+
+
+ if(status != BLE_SUCCESS){ //adv setting err
+ write_reg8(0x8000, 0x11); //debug
+ while(1);
+ }
+
+ blc_ll_setAdvCustomedChannel(37, 38, 39);
+ bls_ll_setAdvEnable(1); //adv enable
+
+#elif(FEATURE_TEST_MODE == TEST_ADV_IN_CONN_SLAVE_ROLE)
+ /*-- BLE Controller initialization ---------------------------------------*/
+ //blc_ll_initBasicMCU(mac_public);//mandatory
+ blc_ll_initAdvertising_module(mac_public);//adv module: mandatory for BLE slave,
+ blc_ll_initSlaveRole_module();//slave module: mandatory for BLE slave,
+
+ /*-- BLE Host initialization ---------------------------------------------*/
+ extern void my_att_init(void);
+ //GATT initialization
+ my_att_init();
+ //L2CAP initialization
+ blc_l2cap_register_handler(blc_l2cap_packet_receive);
+
+ /*-- BLE SMP initialization ----------------------------------------------*/
+ #if(BLE_REMOTE_SECURITY_ENABLE)
+ blc_smp_param_setBondingDeviceMaxNumber(4); //default is SMP_BONDING_DEVICE_MAX_NUM, can not bigger that this value
+ //and this func must call before bls_smp_enableParing
+ bls_smp_enableParing(SMP_PARING_CONN_TRRIGER );
+ #else
+ bls_smp_enableParing(SMP_PARING_DISABLE_TRRIGER );
+ #endif
+
+ /*-- USER application initialization -------------------------------------*/
+ u8 tbl_advData[] = {
+ 0x09, 0x09, 's', 'l', 'a', 'v', 'e', 'a', 'd', 'v',
+ 0x02, 0x01, 0x05,
+ };
+ u8 tbl_scanRsp[] = {
+ 0x09, 0x09, 'S', 'L', 'A', 'V', 'E', 'A', 'D', 'V',
+ };
+ bls_ll_setAdvData((u8 *)tbl_advData, sizeof(tbl_advData) );
+ bls_ll_setScanRspData((u8 *)tbl_scanRsp, sizeof(tbl_scanRsp));
+
+ u8 status = bls_ll_setAdvParam( ADV_INTERVAL_30MS, ADV_INTERVAL_30MS,
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, OWN_ADDRESS_PUBLIC,
+ 0, NULL, BLT_ENABLE_ADV_37, ADV_FP_NONE);
+ if(status != BLE_SUCCESS){
+ write_reg8(0x8000, 0x11); //debug
+ while(1);
+ }
+
+ bls_ll_setAdvEnable(1);
+ rf_set_power_level_index(RF_POWER_7P9dBm);
+
+ //ADV data in connection state
+ u8 tbl_advData_test[] = {
+ 0x09, 0x09, 'A', 'A', 'A', 'A', 'A', 'A', 'A', 'A',
+ 0x02, 0x01, 0x05,
+ };
+ u8 tbl_scanRsp_test[] = {
+ 0x09, 0x09, 'B', 'B', 'B', 'B', 'B', 'B', 'B', 'B',
+ };
+ blc_ll_addAdvertisingInConnSlaveRole();
+ blc_ll_setAdvParamInConnSlaveRole((u8 *)tbl_advData_test, sizeof(tbl_advData_test),
+ (u8 *)tbl_scanRsp_test, sizeof(tbl_scanRsp_test),
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, OWN_ADDRESS_PUBLIC,
+ BLT_ENABLE_ADV_ALL,
+ ADV_FP_NONE);
+
+ //ble event call back
+ bls_app_registerEventCallback(BLT_EV_FLAG_CONNECT, &task_connect);
+ bls_app_registerEventCallback(BLT_EV_FLAG_TERMINATE, &task_terminate);
+
+#elif(FEATURE_TEST_MODE == TEST_SCAN_IN_ADV_AND_CONN_SLAVE_ROLE)
+ /*-- BLE Controller initialization ---------------------------------------*/
+ //blc_ll_initBasicMCU(mac_public);//mandatory
+ blc_ll_initAdvertising_module(mac_public);//adv module: mandatory for BLE slave,
+ blc_ll_initSlaveRole_module();//slave module: mandatory for BLE slave,
+
+ /*-- BLE Host initialization ---------------------------------------------*/
+ extern void my_att_init(void);
+ //GATT initialization
+ my_att_init();
+ //L2CAP initialization
+ blc_l2cap_register_handler(blc_l2cap_packet_receive);
+
+ /*-- BLE SMP initialization ----------------------------------------------*/
+ #if(BLE_REMOTE_SECURITY_ENABLE)
+ blc_smp_param_setBondingDeviceMaxNumber(4); //default is SMP_BONDING_DEVICE_MAX_NUM, can not bigger that this value
+ //and this func must call before bls_smp_enableParing
+ bls_smp_enableParing(SMP_PARING_CONN_TRRIGER );
+ #else
+ bls_smp_enableParing(SMP_PARING_DISABLE_TRRIGER );
+ #endif
+
+ /*-- USER application initialization -------------------------------------*/
+ u8 tbl_advData[] = {
+ 0x09, 0x09, 's', 'l', 'a', 'v', 'e', 'a', 'd', 'v',
+ 0x02, 0x01, 0x05,
+ };
+ u8 tbl_scanRsp[] = {
+ 0x09, 0x09, 'S', 'L', 'A', 'V', 'E', 'A', 'D', 'V',
+ };
+ bls_ll_setAdvData( (u8 *)tbl_advData, sizeof(tbl_advData) );
+ bls_ll_setScanRspData( (u8 *)tbl_scanRsp, sizeof(tbl_scanRsp));
+
+ u8 status = bls_ll_setAdvParam( ADV_INTERVAL_30MS, ADV_INTERVAL_30MS,
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, OWN_ADDRESS_PUBLIC,
+ 0, NULL, BLT_ENABLE_ADV_37, ADV_FP_NONE);
+ if(status != BLE_SUCCESS){
+ write_reg8(0x8000, 0x11); //debug
+ while(1);
+ }
+
+ bls_ll_setAdvEnable(1);
+ rf_set_power_level_index(RF_POWER_7P9dBm);
+
+ //Scan
+ blc_ll_initScanning_module(mac_public);
+ blc_hci_le_setEventMask_cmd(HCI_LE_EVT_MASK_ADVERTISING_REPORT);
+ blc_hci_registerControllerEventHandler(&hci_event_handle);
+
+ #if 1 //report all adv
+ blc_ll_setScanParameter(SCAN_TYPE_PASSIVE, SCAN_INTERVAL_100MS, SCAN_INTERVAL_100MS,
+ OWN_ADDRESS_PUBLIC, SCAN_FP_ALLOW_ADV_ANY);
+ #else //report adv only in whitelist
+ ll_whiteList_reset();
+ u8 test_adv[6] = {0x33, 0x33, 0x33, 0x33, 0x33, 0x33};
+ ll_whiteList_add(BLE_ADDR_PUBLIC, test_adv);
+ blc_ll_setScanParameter(SCAN_TYPE_PASSIVE, SCAN_INTERVAL_100MS, SCAN_INTERVAL_100MS,
+ OWN_ADDRESS_PUBLIC, SCAN_FP_ALLOW_ADV_WL);
+ #endif
+ blc_ll_addScanningInAdvState(); //add scan in adv state
+ blc_ll_addScanningInConnSlaveRole(); //add scan in conn slave role
+
+ //ble event call back
+ bls_app_registerEventCallback(BLT_EV_FLAG_CONNECT, &task_connect);
+ bls_app_registerEventCallback(BLT_EV_FLAG_TERMINATE, &task_terminate);
+
+ uart_set_pin(UART_TX_PB4,UART_RX_PB5);
+ uart_init_baudrate(9,13,PARITY_NONE, STOP_BIT_ONE);
+#elif(FEATURE_TEST_MODE == TEST_ADV_SCAN_IN_CONN_SLAVE_ROLE)
+ /*-- BLE Controller initialization ---------------------------------------*/
+ //blc_ll_initBasicMCU(mac_public);//mandatory
+ blc_ll_initAdvertising_module(mac_public);//adv module: mandatory for BLE slave,
+ blc_ll_initSlaveRole_module();//slave module: mandatory for BLE slave,
+
+ /*-- BLE Host initialization ---------------------------------------------*/
+ extern void my_att_init(void);
+ //GATT initialization
+ my_att_init();
+ //L2CAP initialization
+ blc_l2cap_register_handler(blc_l2cap_packet_receive);
+
+ /*-- BLE SMP initialization ----------------------------------------------*/
+ #if(BLE_REMOTE_SECURITY_ENABLE)
+ blc_smp_param_setBondingDeviceMaxNumber(4); //default is SMP_BONDING_DEVICE_MAX_NUM, can not bigger that this value
+ //and this func must call before bls_smp_enableParing
+ bls_smp_enableParing(SMP_PARING_CONN_TRRIGER );
+ #else
+ bls_smp_enableParing(SMP_PARING_DISABLE_TRRIGER );
+ #endif
+
+ /*-- USER application initialization -------------------------------------*/
+ u8 tbl_advData[] = {
+ 0x09, 0x09, 's', 'l', 'a', 'v', 'e', 'a', 'd', 'v',
+ 0x02, 0x01, 0x05,
+ };
+ u8 tbl_scanRsp[] = {
+ 0x09, 0x09, 'S', 'L', 'A', 'V', 'E', 'A', 'D', 'V',
+ };
+ bls_ll_setAdvData( (u8 *)tbl_advData, sizeof(tbl_advData) );
+ bls_ll_setScanRspData( (u8 *)tbl_scanRsp, sizeof(tbl_scanRsp));
+
+ u8 status = bls_ll_setAdvParam( ADV_INTERVAL_30MS, ADV_INTERVAL_30MS,
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, OWN_ADDRESS_PUBLIC,
+ 0, NULL, BLT_ENABLE_ADV_37, ADV_FP_NONE);
+ if(status != BLE_SUCCESS){
+ write_reg8(0x8000, 0x11); //debug
+ while(1);
+ }
+
+ bls_ll_setAdvEnable(1);
+ rf_set_power_level_index(RF_POWER_7P9dBm);
+
+ //ADV data in connection state
+ u8 tbl_advData_test[] = {
+ 0x09, 0x09, 'A', 'A', 'A', 'A', 'A', 'A', 'A', 'A',
+ 0x02, 0x01, 0x05,
+ };
+ u8 tbl_scanRsp_test[] = {
+ 0x09, 0x09, 'B', 'B', 'B', 'B', 'B', 'B', 'B', 'B',
+ };
+ blc_ll_addAdvertisingInConnSlaveRole();
+ blc_ll_setAdvParamInConnSlaveRole((u8 *)tbl_advData_test, sizeof(tbl_advData_test),
+ (u8 *)tbl_scanRsp_test, sizeof(tbl_scanRsp_test),
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, OWN_ADDRESS_PUBLIC,
+ BLT_ENABLE_ADV_ALL,
+ ADV_FP_NONE);
+
+ //Scan
+ blc_ll_initScanning_module(mac_public);
+ blc_hci_le_setEventMask_cmd(HCI_LE_EVT_MASK_ADVERTISING_REPORT);
+ blc_hci_registerControllerEventHandler(&hci_event_handle);
+
+ #if 1 //report all adv
+ blc_ll_setScanParameter(SCAN_TYPE_PASSIVE, SCAN_INTERVAL_100MS, SCAN_INTERVAL_100MS,
+ OWN_ADDRESS_PUBLIC, SCAN_FP_ALLOW_ADV_ANY);
+ #else //report adv only in whitelist
+ ll_whiteList_reset();
+ u8 test_adv[6] = {0x33, 0x33, 0x33, 0x33, 0x33, 0x33};
+ ll_whiteList_add(BLE_ADDR_PUBLIC, test_adv);
+ blc_ll_setScanParameter(SCAN_TYPE_PASSIVE, SCAN_INTERVAL_100MS, SCAN_INTERVAL_100MS,
+ OWN_ADDRESS_PUBLIC, SCAN_FP_ALLOW_ADV_WL);
+ #endif
+
+ blc_ll_addScanningInConnSlaveRole(); //add scan in conn slave role
+
+ //ble event call back
+ bls_app_registerEventCallback(BLT_EV_FLAG_CONNECT, &task_connect);
+ bls_app_registerEventCallback(BLT_EV_FLAG_TERMINATE, &task_terminate);
+
+ uart_set_pin(UART_TX_PB4,UART_RX_PB5);
+ uart_init_baudrate(9,13,PARITY_NONE, STOP_BIT_ONE);
+#endif
+
+
+#if(BLE_PM_ENABLE)
+ blc_ll_initPowerManagement_module();
+ bls_pm_setSuspendMask(SUSPEND_ADV | SUSPEND_CONN);
+
+ //bls_app_registerEventCallback(BLT_EV_FLAG_SUSPEND_ENTER, &func_suspend_enter);
+ //bls_app_registerEventCallback(BLT_EV_FLAG_SUSPEND_EXIT, &func_suspend_exit);
+#else
+ bls_pm_setSuspendMask(SUSPEND_DISABLE);
+#endif
+}
+
+
+static u8 test_data[] = {1,2,3,4,5,6,7,8,9,0,1,2,3,4,5,6,7,8,9,0};
+void feature_linklayer_state_test_main_loop(void)
+{
+ if(BLE_SUCCESS == bls_att_pushNotifyData(0x0015, test_data, sizeof(test_data))){
+ test_data[0]++;
+ }
+}
+
+
+#endif
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_phytest.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_phytest.c
new file mode 100644
index 0000000000000..84ee461160e62
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_phytest.c
@@ -0,0 +1,237 @@
+/********************************************************************************************************
+ * @file feature_phytest.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author public@telink-semi.com;
+ * @date May. 10, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include
+#include "tl_common.h"
+#include "drivers.h"
+#include "app_config.h"
+#include "vendor/common/blt_led.h"
+#include "vendor/common/blt_soft_timer.h"
+#include "vendor/common/blt_common.h"
+
+
+
+#if (FEATURE_TEST_MODE == TEST_BLE_PHY)
+
+#define BLE_PM_ENABLE 0
+
+
+#if(FEATURE_TEST_MODE == TEST_BLE_PHY)
+ MYFIFO_INIT(hci_rx_fifo, 72, 2);
+ MYFIFO_INIT(hci_tx_fifo, 72, 8);
+#endif
+
+
+
+
+#define RX_FIFO_SIZE 64
+#define RX_FIFO_NUM 8
+
+#define TX_FIFO_SIZE 40
+#define TX_FIFO_NUM 16
+
+
+
+
+ u8 blt_rxfifo_b[RX_FIFO_SIZE * RX_FIFO_NUM] = {0};
+my_fifo_t blt_rxfifo = {
+ RX_FIFO_SIZE,
+ RX_FIFO_NUM,
+ 0,
+ 0,
+ blt_rxfifo_b,};
+
+
+ u8 blt_txfifo_b[TX_FIFO_SIZE * TX_FIFO_NUM] = {0};
+my_fifo_t blt_txfifo = {
+ TX_FIFO_SIZE,
+ TX_FIFO_NUM,
+ 0,
+ 0,
+ blt_txfifo_b,};
+
+
+
+
+
+
+
+int AA_dbg_suspend;
+void func_suspend_enter (u8 e, u8 *p, int n)
+{
+ AA_dbg_suspend ++;
+}
+
+#define MY_RF_POWER_INDEX RF_POWER_3P3dBm
+
+_attribute_ram_code_ void func_suspend_exit (u8 e, u8 *p, int n)
+{
+ rf_set_power_level_index (MY_RF_POWER_INDEX);
+}
+
+
+
+
+
+#if (BLE_PHYTEST_MODE == PHYTEST_MODE_OVER_HCI_WITH_UART)
+
+ int rx_from_uart_cb (void)
+ {
+ if(uart_is_parity_error()){
+ uart_clear_parity_error();
+ }
+ ////////
+
+ if(my_fifo_get(&hci_rx_fifo) == 0)
+ {
+ return 0;
+ }
+
+ u8* p = my_fifo_get(&hci_rx_fifo);
+ u32 rx_len = p[0]; //usually <= 255 so 1 byte should be sufficient
+
+ if (rx_len)
+ {
+ blc_hci_handler(&p[4], rx_len - 4);
+ my_fifo_pop(&hci_rx_fifo);
+ }
+
+ return 0;
+ }
+
+ static u32 uart_tx_tick = 0;
+ int tx_to_uart_cb (void)
+ {
+
+ if(uart_is_parity_error()){
+ uart_clear_parity_error();
+ }
+ //////////
+ uart_data_t T_txdata_buf;
+
+ u8 *p = my_fifo_get (&hci_tx_fifo);
+
+
+ #if (ADD_DELAY_FOR_UART_DATA)
+ if (p && !uart_tx_is_busy () && clock_time_exceed(uart_tx_tick, 30000))
+ #else
+ if (p && !uart_tx_is_busy ())
+ #endif
+ {
+ memcpy(&T_txdata_buf.data, p + 2, p[0]+p[1]*256);
+ T_txdata_buf.len = p[0]+p[1]*256 ;
+ uart_dma_send((unsigned short*)&T_txdata_buf);
+
+ my_fifo_pop (&hci_tx_fifo);
+ uart_tx_tick = clock_time();
+ }
+ return 0;
+ }
+#endif
+
+
+
+
+
+void feature_phytest_init(void)
+{
+ u8 mac_public[6];
+ u8 mac_random_static[6];
+ blc_initMacAddress(CFG_ADR_MAC, mac_public, mac_random_static);
+
+ rf_set_power_level_index (MY_RF_POWER_INDEX);
+
+ ////// Controller Initialization //////////
+ blc_ll_initBasicMCU(mac_public); //mandatory
+
+
+ write_reg8(0x402, 0x2b); //set rf packet preamble for BQB
+ blc_phy_initPhyTest_module();
+ blc_phy_setPhyTestEnable( BLC_PHYTEST_ENABLE );
+ blc_phy_preamble_length_set(12); //kite code is 11; 5317 code is 12;
+
+
+
+ #if(BLE_PHYTEST_MODE == PHYTEST_MODE_THROUGH_2_WIRE_UART || BLE_PHYTEST_MODE == PHYTEST_MODE_OVER_HCI_WITH_UART) //uart
+ uart_set_pin(UART_TX_PB4, UART_RX_PB5); //UART TX/RX pin set
+ uart_reset();
+ #endif
+
+ uart_set_recbuff((unsigned short*)hci_rx_fifo_b, hci_rx_fifo.size);
+
+ #if (CLOCK_SYS_CLOCK_HZ == 16000000)
+ uart_init_baudrate(9, 13,PARITY_NONE, STOP_BIT_ONE); //(9,13:115200;;)Baud rate's setting, please use LUA script tool to calculate.
+ #endif
+
+ uart_dma_en(1, 1); //UART data in hardware buffer moved by DMA, so we enable them first
+
+ irq_set_mask(FLD_IRQ_DMA_EN);
+ dma_chn_irq_enable(FLD_DMA_CHN_UART_RX | FLD_DMA_CHN_UART_TX, 1);//uart Rx/Tx dma irq enable
+ uart_irq_en(1,0);
+
+ #if (BLE_PHYTEST_MODE == PHYTEST_MODE_THROUGH_2_WIRE_UART)
+ blc_register_hci_handler (phy_test_2_wire_rx_from_uart, phy_test_2_wire_tx_to_uart);
+ #elif(BLE_PHYTEST_MODE == PHYTEST_MODE_OVER_HCI_WITH_UART)
+ blc_register_hci_handler (rx_from_uart_cb, tx_to_uart_cb); //default handler
+ #endif
+
+
+ //phy test can not enter suspend/deep
+ bls_pm_setSuspendMask (SUSPEND_DISABLE);
+}
+
+
+
+void app_phytest_irq_proc(void)
+{
+ unsigned char uart_dma_irqsrc;
+ //1. UART irq
+ uart_dma_irqsrc = dma_chn_irq_status_get();///in function,interrupt flag have already been cleared,so need not to clear DMA interrupt flag here
+ if(uart_dma_irqsrc & FLD_DMA_CHN_UART_RX)
+ {
+ dma_chn_irq_status_clr(FLD_DMA_CHN_UART_RX);
+ u8* w = hci_rx_fifo.p + (hci_rx_fifo.wptr & (hci_rx_fifo.num-1)) * hci_rx_fifo.size;
+ if(w[0]!=0)
+ {
+ my_fifo_next(&hci_rx_fifo);
+ u8* p = hci_rx_fifo.p + (hci_rx_fifo.wptr & (hci_rx_fifo.num-1)) * hci_rx_fifo.size;
+ reg_dma0_addr = (u16)((u32)p);
+ }
+ }
+ if(uart_dma_irqsrc & FLD_DMA_CHN_UART_TX){
+ dma_chn_irq_status_clr(FLD_DMA_CHN_UART_TX);
+ }
+
+}
+
+
+
+
+
+
+
+
+
+
+
+#endif // end of (FEATURE_TEST_MODE == TEST_BLE_PHY)
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_slave_dle.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_slave_dle.c
new file mode 100644
index 0000000000000..d8b4c45018ad5
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_slave_dle.c
@@ -0,0 +1,260 @@
+/********************************************************************************************************
+ * @file feature_data_len_extension.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author public@telink-semi.com;
+ * @date May. 10, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#include "app.h"
+#include
+#include "tl_common.h"
+#include "drivers.h"
+#include "app_config.h"
+#include "vendor/common/blt_common.h"
+
+#if (FEATURE_TEST_MODE == TEST_DATA_LENGTH_EXTENSION)
+
+#define BLE_PM_ENABLE 0
+
+#if (1) // support RF RX/TX MAX data Length: 251byte
+#define RX_FIFO_SIZE 288 //rx-28 max:251+28 = 279 16 align-> 288
+#define RX_FIFO_NUM 4
+
+#define TX_FIFO_SIZE 264 //tx-12 max:251+12 = 263 4 align-> 264
+#define TX_FIFO_NUM 4
+
+#define MTU_SIZE_SETTING 247
+#define DLE_TX_SUPPORTED_DATA_LEN MAX_OCTETS_DATA_LEN_EXTENSION //264-12 = 252 > Tx max:251
+#else
+#define RX_FIFO_SIZE 228 //rx-28 max:200+28 = 228 16 align-> 224
+#define RX_FIFO_NUM 4
+
+#define TX_FIFO_SIZE 212 //tx-12 max:200+12 = 212 4 align-> 212
+#define TX_FIFO_NUM 4
+
+#define MTU_SIZE_SETTING 196
+#define DLE_TX_SUPPORTED_DATA_LEN (TX_FIFO_SIZE - 12)
+#endif
+
+u8 blt_rxfifo_b[RX_FIFO_SIZE * RX_FIFO_NUM] = {0};
+my_fifo_t blt_rxfifo = {
+ RX_FIFO_SIZE,
+ RX_FIFO_NUM,
+ 0,
+ 0,
+ blt_rxfifo_b,
+};
+
+u8 blt_txfifo_b[TX_FIFO_SIZE * TX_FIFO_NUM] = {0};
+my_fifo_t blt_txfifo = {
+ TX_FIFO_SIZE,
+ TX_FIFO_NUM,
+ 0,
+ 0,
+ blt_txfifo_b,
+};
+
+
+u32 connect_event_occurTick = 0;
+u32 mtuExchange_check_tick = 0;
+
+int dle_started_flg = 0;
+
+int mtuExchange_started_flg = 0;
+
+u16 final_MTU_size = 23;
+
+const u8 test_data[] = {
+ 7,7,7,7,7,7,7,7,7,7,
+ 7,7,7,7,7,7,7,7,7,7,
+ 7,7,7,7,7,7,
+};
+
+int module_onReceiveData(rf_packet_att_write_t *p)
+{
+ u8 len = p->l2capLen - 3;
+ if (len > 0)
+ {
+ printf("RF_RX len: %d\nc2s:write data: %d\n", p->rf_len, len);
+ //array_printf(&p->value, len);
+ printf("\n");
+
+ if(BLE_SUCCESS == bls_att_pushNotifyData(SPP_SERVER_TO_CLIENT_DP_H, (u8*)&test_data[0], sizeof(test_data))){
+ printf("NOTIFY OK\n");
+ }
+ }
+ return 0;
+}
+
+void task_connect(u8 e, u8 *p, int n)
+{
+ printf("----- connected -----\n");
+ connect_event_occurTick = clock_time() | 1;
+
+ bls_l2cap_requestConnParamUpdate(8, 8, 19, 200); //interval=10ms latency=19 timeout=2s
+
+ //MTU size reset to default 23 bytes every new connection, it can be only updated by MTU size exchange procedure
+ final_MTU_size = 23;
+}
+
+void task_terminate(u8 e, u8 *p, int n)
+{
+ printf("----- terminate rsn: 0x%x -----\n", *p);
+ connect_event_occurTick = 0;
+ mtuExchange_check_tick = 0;
+
+ //MTU size exchange and data length exchange procedure must be executed on every new connection,
+ //so when connection terminate, relative flags must be cleared
+ dle_started_flg = 0;
+ mtuExchange_started_flg = 0;
+
+ //MTU size reset to default 23 bytes when connection terminated
+ final_MTU_size = 23;
+}
+
+void mtu_size_exchange_func(u16 connHandle, u16 remoteMtuSize, u16 effectMtuSize)
+{
+ final_MTU_size = effectMtuSize;
+ mtuExchange_started_flg = 1;
+
+ printf("------ MTU Size exchange ------\n");
+ printf("remote MTU size: %d\n", remoteMtuSize);
+ printf("local MTU size: %d\n", MTU_SIZE_SETTING);
+ printf("effect MTU size: %d\n", effectMtuSize);
+}
+
+void task_dle_exchange(u8 e, u8 *p, int n)
+{
+ dle_started_flg = 1;
+
+ ll_data_extension_t* dle_param = (ll_data_extension_t*)p;
+ printf("----- DLE exchange: -----\n");
+ printf("connMaxRxOctets: %d\n", dle_param->connMaxRxOctets);
+ printf("connMaxTxOctets: %d\n", dle_param->connMaxTxOctets);
+ printf("connRemoteMaxRxOctets: %d\n", dle_param->connRemoteMaxRxOctets);
+ printf("connRemoteMaxTxOctets: %d\n", dle_param->connRemoteMaxTxOctets);
+ printf("connEffectiveMaxRxOctets: %d\n", dle_param->connEffectiveMaxRxOctets);
+ printf("connEffectiveMaxTxOctets: %d\n", dle_param->connEffectiveMaxTxOctets);
+}
+
+void feature_sdle_test_init(void)
+{
+ u8 mac_public[6];
+ u8 mac_random_static[6];
+ blc_initMacAddress(CFG_ADR_MAC, mac_public, mac_random_static);
+
+
+
+ ////// Controller Initialization //////////
+ blc_ll_initBasicMCU(mac_public); //mandatory
+ blc_ll_initAdvertising_module(mac_public); //adv module: mandatory for BLE slave,
+ blc_ll_initSlaveRole_module(); //slave module: mandatory for BLE slave,
+
+ ////// Host Initialization //////////
+ my_att_init(); //GATT initialization
+
+ //ATT initialization
+ //If not set RX MTU size, default is: 23 bytes. In this situation, if master send MtuSize Request before slave send MTU size request,
+ //slave will response default RX MTU size 23 bytes, then master will not send long packet on host l2cap layer, link layer data length
+ //extension feature can not be used. So in data length extension application, RX MTU size must be enlarged when initialization.
+ blc_att_setRxMtuSize(MTU_SIZE_SETTING);
+ blc_att_registerMtuSizeExchangeCb(mtu_size_exchange_func);
+
+ blc_l2cap_register_handler(blc_l2cap_packet_receive); //l2cap initialization
+
+/*-- BLE SMP initialization ----------------------------------------------*/
+#if (BLE_REMOTE_SECURITY_ENABLE)
+ blc_smp_param_setBondingDeviceMaxNumber(4); //default is SMP_BONDING_DEVICE_MAX_NUM, can not bigger that this value
+ //and this func must call before bls_smp_enableParing
+ bls_smp_enableParing(SMP_PARING_CONN_TRRIGER);
+#else
+ bls_smp_enableParing(SMP_PARING_DISABLE_TRRIGER);
+#endif
+
+ ///////////////////// USER application initialization ///////////////////
+ u8 tbl_advData[] = {
+ 0x08,
+ 0x09,'t','e','s','t','D','L','E',
+ };
+ u8 tbl_scanRsp[] = {
+ 0x08,
+ 0x09,'t','e','s','t','D','L','E',
+ };
+ bls_ll_setAdvData((u8 *)tbl_advData, sizeof(tbl_advData));
+ bls_ll_setScanRspData((u8 *)tbl_scanRsp, sizeof(tbl_scanRsp));
+
+ bls_ll_setAdvParam(ADV_INTERVAL_30MS, ADV_INTERVAL_30MS,
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, OWN_ADDRESS_PUBLIC,
+ 0, NULL, BLT_ENABLE_ADV_ALL, ADV_FP_NONE);
+
+ bls_ll_setAdvEnable(1); //adv enable
+ rf_set_power_level_index(RF_POWER_7P9dBm);
+
+ //ble event call back
+ bls_app_registerEventCallback(BLT_EV_FLAG_CONNECT, &task_connect);
+ bls_app_registerEventCallback(BLT_EV_FLAG_TERMINATE, &task_terminate);
+ bls_app_registerEventCallback(BLT_EV_FLAG_DATA_LENGTH_EXCHANGE, &task_dle_exchange);
+
+#if (BLE_PM_ENABLE)
+ blc_ll_initPowerManagement_module();
+ bls_pm_setSuspendMask(SUSPEND_ADV | SUSPEND_CONN);
+ //bls_app_registerEventCallback(BLT_EV_FLAG_SUSPEND_EXIT, &func_suspend_exit);
+#else
+ bls_pm_setSuspendMask(SUSPEND_DISABLE);
+#endif
+
+ blc_att_setRxMtuSize(MTU_SIZE_SETTING);
+
+ //printf debug
+ uart_set_pin(UART_TX_PB4,UART_RX_PB5);
+ uart_init_baudrate(9,13,PARITY_NONE, STOP_BIT_ONE);
+}
+
+void feature_sdle_test_mainloop(void)
+{
+ if(connect_event_occurTick && clock_time_exceed(connect_event_occurTick, 1500000))
+ { //1.5s after connection established
+ connect_event_occurTick = 0;
+
+ if(!mtuExchange_started_flg)
+ { //master do not send MTU exchange request in time
+ blc_att_requestMtuSizeExchange(BLS_CONN_HANDLE, MTU_SIZE_SETTING);
+ printf("After conn 1.5s, S send MTU size req to the Master.\n");
+ }
+
+ mtuExchange_check_tick = clock_time() | 1;
+ }
+
+ if (mtuExchange_check_tick && clock_time_exceed(mtuExchange_check_tick, 500000))
+ {
+ //2s after connection established
+ mtuExchange_check_tick = 0;
+
+ if(!dle_started_flg)
+ { //master do not send data length request in time
+ printf("Master hasn't initiated the DLE yet, S send DLE req to the Master.\n");
+ blc_ll_exchangeDataLength(LL_LENGTH_REQ, DLE_TX_SUPPORTED_DATA_LEN);
+ }
+ }
+
+ #if(BLE_PM_ENABLE)
+ bls_pm_setSuspendMask(SUSPEND_ADV | SUSPEND_CONN);
+ #endif
+}
+
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_soft_timer.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_soft_timer.c
new file mode 100644
index 0000000000000..7def9b76516b5
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_soft_timer.c
@@ -0,0 +1,235 @@
+/********************************************************************************************************
+ * @file feature_soft_timer.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author public@telink-semi.com;
+ * @date May. 10, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#include "app.h"
+#include
+#include "tl_common.h"
+#include "drivers.h"
+#include "app_config.h"
+#include "vendor/common/blt_soft_timer.h"
+#include "vendor/common/blt_common.h"
+
+
+#if (FEATURE_TEST_MODE == TEST_USER_BLT_SOFT_TIMER)
+
+#define BLE_PM_ENABLE 1
+
+
+#define RX_FIFO_SIZE 64
+#define RX_FIFO_NUM 8
+
+#define TX_FIFO_SIZE 40
+#define TX_FIFO_NUM 16
+
+
+
+
+
+u8 blt_rxfifo_b[RX_FIFO_SIZE * RX_FIFO_NUM] = {0};
+my_fifo_t blt_rxfifo = {
+ RX_FIFO_SIZE,
+ RX_FIFO_NUM,
+ 0,
+ 0,
+ blt_rxfifo_b,};
+
+
+u8 blt_txfifo_b[TX_FIFO_SIZE * TX_FIFO_NUM] = {0};
+my_fifo_t blt_txfifo = {
+ TX_FIFO_SIZE,
+ TX_FIFO_NUM,
+ 0,
+ 0,
+ blt_txfifo_b,};
+
+
+
+
+#define MY_RF_POWER_INDEX RF_POWER_0dBm
+
+_attribute_ram_code_ void func_suspend_exit (u8 e, u8 *p, int n)
+{
+ rf_set_power_level_index (MY_RF_POWER_INDEX);
+}
+
+
+
+void task_connect (u8 e, u8 *p, int n)
+{
+ bls_l2cap_requestConnParamUpdate (8, 8, 99, 400); //interval=10ms latency=99 timeout=4s
+
+}
+
+void task_terminate (u8 e, u8 *p, int n)
+{
+
+}
+
+
+
+
+
+int gpio_test0(void)
+{
+ //gpio 0 toggle to see the effect
+ DBG_CHN0_TOGGLE;
+
+ return 0;
+}
+
+static u8 timer_change_flg = 0;
+
+int gpio_test1(void)
+{
+ //gpio 1 toggle to see the effect
+ DBG_CHN1_TOGGLE;
+
+
+ timer_change_flg = !timer_change_flg;
+ if(timer_change_flg){
+ return 7000;
+ }
+ else{
+ return 17000;
+ }
+
+}
+
+int gpio_test2(void)
+{
+ //gpio 2 toggle to see the effect
+ DBG_CHN2_TOGGLE;
+
+ //timer last for 5 second
+ if(clock_time_exceed(0, 5000000)){
+ //return -1;
+ //blt_soft_timer_delete(&gpio_test2);
+ }
+ else{
+
+ }
+
+ return 0;
+}
+
+int gpio_test3(void)
+{
+ //gpio 3 toggle to see the effect
+ DBG_CHN3_TOGGLE;
+
+ return 0;
+}
+
+
+
+
+
+
+void feature_soft_timer_test_init(void)
+{
+
+ u8 mac_public[6];
+ u8 mac_random_static[6];
+ blc_initMacAddress(CFG_ADR_MAC, mac_public, mac_random_static);
+
+ rf_set_power_level_index (MY_RF_POWER_INDEX);
+
+ ////// Controller Initialization //////////
+ blc_ll_initBasicMCU(mac_public); //mandatory
+ blc_ll_initAdvertising_module(mac_public); //adv module: mandatory for BLE slave,
+ blc_ll_initSlaveRole_module(); //slave module: mandatory for BLE slave,
+
+ ////// Host Initialization //////////
+ extern void my_att_init ();
+ my_att_init (); //gatt initialization
+ blc_l2cap_register_handler (blc_l2cap_packet_receive); //l2cap initialization
+
+
+ /*-- BLE SMP initialization ----------------------------------------------*/
+ #if (BLE_REMOTE_SECURITY_ENABLE)
+ blc_smp_param_setBondingDeviceMaxNumber(4); //default is SMP_BONDING_DEVICE_MAX_NUM, can not bigger that this value
+ //and this func must call before bls_smp_enableParing
+ bls_smp_enableParing (SMP_PARING_CONN_TRRIGER );
+ #else
+ bls_smp_enableParing (SMP_PARING_DISABLE_TRRIGER );
+ #endif
+
+///////////////////// USER application initialization ///////////////////
+ u8 tbl_advData[] = {
+ 0x08, 0x09, 't', 'e', 's', 't', 'T', 'I', 'M',
+ 0x02, 0x01, 0x05,
+ };
+ u8 tbl_scanRsp [] = {
+ 0x08, 0x09, 't', 'e', 's', 't', 'T', 'I', 'M',
+ };
+ bls_ll_setAdvData( (u8 *)tbl_advData, sizeof(tbl_advData) );
+ bls_ll_setScanRspData( (u8 *)tbl_scanRsp, sizeof(tbl_scanRsp));
+
+ u8 status = bls_ll_setAdvParam( ADV_INTERVAL_30MS, ADV_INTERVAL_30MS, \
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, OWN_ADDRESS_PUBLIC, \
+ 0, NULL, BLT_ENABLE_ADV_ALL, ADV_FP_NONE);
+ if(status != BLE_SUCCESS){
+
+ }
+
+ bls_ll_setAdvEnable(1); //adv enable
+
+ //ble event call back
+ bls_app_registerEventCallback (BLT_EV_FLAG_CONNECT, &task_connect);
+ bls_app_registerEventCallback (BLT_EV_FLAG_TERMINATE, &task_terminate);
+
+
+ #if(BLE_PM_ENABLE)
+ blc_ll_initPowerManagement_module();
+
+ bls_pm_setSuspendMask (SUSPEND_ADV | SUSPEND_CONN);
+
+ //bls_app_registerEventCallback (BLT_EV_FLAG_SUSPEND_ENTER, &func_suspend_enter);
+ bls_app_registerEventCallback (BLT_EV_FLAG_SUSPEND_EXIT, &func_suspend_exit);
+ #else
+ bls_pm_setSuspendMask (SUSPEND_DISABLE);
+ #endif
+
+
+
+
+
+ //////////////// TEST /////////////////////////
+ //common/blt_soft_timer.h #define BLT_SOFTWARE_TIMER_ENABLE 1
+ blt_soft_timer_init();
+ blt_soft_timer_add(&gpio_test0, 23000);//23ms
+ blt_soft_timer_add(&gpio_test1, 7000); //7ms <-> 17ms
+ blt_soft_timer_add(&gpio_test2, 13000);//13ms
+ blt_soft_timer_add(&gpio_test3, 27000);//27ms
+
+}
+
+void feature_soft_timer_test_mainloop(void)
+{
+ #if(BLE_PM_ENABLE)
+ bls_pm_setSuspendMask(SUSPEND_ADV | SUSPEND_CONN);
+ #endif
+}
+
+
+
+#endif //end of (FEATURE_TEST_MODE == TEST_USER_BLT_SOFT_TIMER)
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_whitelist.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_whitelist.c
new file mode 100644
index 0000000000000..c2bac68dd6579
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/feature_whitelist.c
@@ -0,0 +1,222 @@
+/********************************************************************************************************
+ * @file feature_whitelist.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author public@telink-semi.com;
+ * @date May. 10, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include
+#include "tl_common.h"
+#include "drivers.h"
+#include "app_config.h"
+#include "vendor/common/blt_led.h"
+#include "vendor/common/blt_soft_timer.h"
+#include "vendor/common/blt_common.h"
+
+
+
+#if (FEATURE_TEST_MODE == TEST_WHITELIST)
+
+#define BLE_PM_ENABLE 1
+
+#define RX_FIFO_SIZE 64
+#define RX_FIFO_NUM 8
+
+#define TX_FIFO_SIZE 40
+#define TX_FIFO_NUM 16
+
+
+
+
+
+
+u8 blt_rxfifo_b[RX_FIFO_SIZE * RX_FIFO_NUM] = {0};
+my_fifo_t blt_rxfifo = {
+ RX_FIFO_SIZE,
+ RX_FIFO_NUM,
+ 0,
+ 0,
+ blt_rxfifo_b,};
+
+
+u8 blt_txfifo_b[TX_FIFO_SIZE * TX_FIFO_NUM] = {0};
+my_fifo_t blt_txfifo = {
+ TX_FIFO_SIZE,
+ TX_FIFO_NUM,
+ 0,
+ 0,
+ blt_txfifo_b,};
+
+
+
+
+
+
+int app_whilteList_enable;
+
+
+
+void task_connect (u8 e, u8 *p, int n)
+{
+
+}
+
+
+void task_terminate (u8 e, u8 *p, int n)
+{
+
+}
+
+
+
+
+
+
+int AA_dbg_suspend;
+void func_suspend_enter (u8 e, u8 *p, int n)
+{
+ AA_dbg_suspend ++;
+}
+
+#define MY_RF_POWER_INDEX RF_POWER_3P3dBm
+
+_attribute_ram_code_ void func_suspend_exit (u8 e, u8 *p, int n)
+{
+ rf_set_power_level_index (MY_RF_POWER_INDEX);
+}
+
+
+
+
+
+void feature_whitelist_test_init(void)
+{
+ u8 mac_public[6];
+ u8 mac_random_static[6];
+ blc_initMacAddress(CFG_ADR_MAC, mac_public, mac_random_static);
+
+ rf_set_power_level_index (MY_RF_POWER_INDEX);
+
+ ////// Controller Initialization //////////
+ blc_ll_initBasicMCU(mac_public); //mandatory
+ blc_ll_initAdvertising_module(mac_public); //adv module: mandatory for BLE slave,
+ blc_ll_initSlaveRole_module(); //slave module: mandatory for BLE slave,
+
+ ////// Host Initialization //////////
+ extern void my_att_init ();
+ my_att_init (); //gatt initialization
+ blc_l2cap_register_handler (blc_l2cap_packet_receive); //l2cap initialization
+
+
+ /*-- BLE SMP initialization ----------------------------------------------*/
+ #if (BLE_REMOTE_SECURITY_ENABLE)
+ blc_smp_param_setBondingDeviceMaxNumber(4); //default is SMP_BONDING_DEVICE_MAX_NUM, can not bigger that this value
+ //and this func must call before bls_smp_enableParing
+ bls_smp_enableParing (SMP_PARING_CONN_TRRIGER );
+ #else
+ bls_smp_enableParing (SMP_PARING_DISABLE_TRRIGER );
+ #endif
+
+
+///////////////////// USER application initialization ///////////////////
+ u8 tbl_advData[] = {
+ 0x05, 0x09, 't', 'e', 's', 't',
+ 0x02, 0x01, 0x05,
+ 0x05, 0x02, 0x12, 0x18, 0x0F, 0x18,
+ };
+ u8 tbl_scanRsp [] = {
+ 0x05, 0x09, 't', 'e', 's', 't',
+ };
+ bls_ll_setAdvData( (u8 *)tbl_advData, sizeof(tbl_advData) );
+ bls_ll_setScanRspData( (u8 *)tbl_scanRsp, sizeof(tbl_scanRsp));
+
+
+
+ smp_param_save_t bondInfo;
+ u8 bond_number = blc_smp_param_getCurrentBondingDeviceNumber(); //get bonded device number
+ if(bond_number) //get latest device info
+ {
+ blc_smp_param_loadByIndex( bond_number - 1, &bondInfo); //get the latest bonding device (index: bond_number-1 )
+ }
+
+
+ ll_whiteList_reset(); //clear whitelist
+ ll_resolvingList_reset(); //clear resolving list
+
+
+ if(bond_number) //use whitelist to filter master device
+ {
+ app_whilteList_enable = 1;
+
+ //if master device use RPA(resolvable private address), must add irk to resolving list
+ if( IS_RESOLVABLE_PRIVATE_ADDR(bondInfo.peer_addr_type, bondInfo.peer_addr) ){
+ //resolvable private address, should add peer irk to resolving list
+ ll_resolvingList_add(bondInfo.peer_id_adrType, bondInfo.peer_id_addr, bondInfo.peer_irk, NULL); //no local IRK
+ ll_resolvingList_setAddrResolutionEnable(1);
+ }
+ else{
+ //if not resolvable random address, add peer address to whitelist
+ ll_whiteList_add(bondInfo.peer_addr_type, bondInfo.peer_addr);
+ }
+
+
+ bls_ll_setAdvParam( ADV_INTERVAL_30MS, ADV_INTERVAL_30MS, \
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, OWN_ADDRESS_PUBLIC, \
+ 0, NULL, BLT_ENABLE_ADV_37, ADV_FP_ALLOW_SCAN_WL_ALLOW_CONN_WL);
+
+ }
+ else{
+
+ bls_ll_setAdvParam( ADV_INTERVAL_30MS, ADV_INTERVAL_30MS,
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, OWN_ADDRESS_PUBLIC,
+ 0, NULL, BLT_ENABLE_ADV_37, ADV_FP_NONE);
+ }
+
+
+
+ bls_ll_setAdvEnable(1); //adv enable
+
+
+
+ //ble event call back
+ bls_app_registerEventCallback (BLT_EV_FLAG_CONNECT, &task_connect);
+ bls_app_registerEventCallback (BLT_EV_FLAG_TERMINATE, &task_terminate);
+
+
+
+#if(BLE_PM_ENABLE)
+ blc_ll_initPowerManagement_module();
+ bls_pm_setSuspendMask (SUSPEND_ADV | SUSPEND_CONN);
+
+ //bls_app_registerEventCallback (BLT_EV_FLAG_SUSPEND_ENTER, &func_suspend_enter);
+ bls_app_registerEventCallback (BLT_EV_FLAG_SUSPEND_EXIT, &func_suspend_exit);
+#else
+ bls_pm_setSuspendMask (SUSPEND_DISABLE);
+#endif
+
+}
+
+void feature_whitelist_test_mainloop(void)
+{
+ #if(BLE_PM_ENABLE)
+ bls_pm_setSuspendMask(SUSPEND_ADV | SUSPEND_CONN);
+ #endif
+}
+
+
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/main.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/main.c
new file mode 100644
index 0000000000000..ea237ae32b19b
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_feature_test/main.c
@@ -0,0 +1,77 @@
+/********************************************************************************************************
+ * @file main.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include
+#include "drivers.h"
+#include "stack/ble/ble.h"
+#include "../common/user_config.h"
+
+_attribute_ram_code_ void irq_handler(void)
+{
+ irq_blt_sdk_handler();
+
+#if(FEATURE_TEST_MODE == TEST_BLE_PHY)
+ app_phytest_irq_proc();
+#endif
+}
+
+int main(void){
+
+ blc_pm_select_internal_32k_crystal();
+
+ /**
+ * if the bin size is less than 48K, we recommend using this setting.
+ */
+ #if(FLASH_SIZE_OPTION == FLASH_SIZE_OPTION_128K) ///FLASH_SIZE_OPTION_128K
+ bls_ota_setFirmwareSizeAndOffset(48, 0x10000);///default : ota_firmware_size_k=128;ota_program_bootAddr=0x20000; it is for hawk 128K flash
+ bls_smp_configParingSecurityInfoStorageAddr(0x1C000);
+ #endif
+
+ cpu_wakeup_init();
+
+ #if(CLOCK_SYS_CLOCK_HZ == 16000000)
+ clock_init(SYS_CLK_16M_Crystal);
+ #elif(CLOCK_SYS_CLOCK_HZ == 32000000)
+ clock_init(SYS_CLK_32M_Crystal);
+ #elif(CLOCK_SYS_CLOCK_HZ == 48000000)
+ clock_init(SYS_CLK_48M_Crystal);
+ #endif
+
+ gpio_init();
+
+ /* load customized freq_offset CAP value and TP value.*/
+ blc_app_loadCustomizedParameters();
+
+ rf_drv_init(RF_MODE_BLE_1M);
+
+ user_init ();
+
+ irq_enable();
+
+ while(1){
+ #if(MODULE_WATCHDOG_ENABLE)
+ wd_clear(); //clear watch dog
+ #endif
+ main_loop ();
+ }
+}
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_hci/app.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_hci/app.c
new file mode 100644
index 0000000000000..64ee46147f72d
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_hci/app.c
@@ -0,0 +1,298 @@
+/********************************************************************************************************
+ * @file app.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include
+#include "tl_common.h"
+#include "drivers.h"
+#include "../common/blt_led.h"
+#include "../common/keyboard.h"
+#include "../common/blt_soft_timer.h"
+#include "../common/blt_common.h"
+
+
+#if (__PROJECT_5316_HCI__ )
+
+#define ADV_IDLE_ENTER_DEEP_TIME 60 //60 s
+#define CONN_IDLE_ENTER_DEEP_TIME 60 //60 s
+
+#define MY_DIRECT_ADV_TMIE 2000000
+
+#define MY_APP_ADV_CHANNEL BLT_ENABLE_ADV_ALL
+
+#define MY_ADV_INTERVAL_MIN ADV_INTERVAL_30MS
+#define MY_ADV_INTERVAL_MAX ADV_INTERVAL_35MS
+
+
+
+#define BLE_DEVICE_ADDRESS_TYPE BLE_DEVICE_ADDRESS_PUBLIC
+
+own_addr_type_t app_own_address_type = OWN_ADDRESS_PUBLIC;
+
+
+
+MYFIFO_INIT(blt_rxfifo, 64, 8);
+MYFIFO_INIT(blt_txfifo, 40, 16);
+
+
+//module spp Tx / Rx fifo
+#define HCI_RXFIFO_SIZE 80
+#define HCI_RXFIFO_NUM 4
+
+#define HCI_TXFIFO_SIZE 80
+#define HCI_TXFIFO_NUM 8
+
+u8 hci_rx_fifo_b[HCI_RXFIFO_SIZE * HCI_RXFIFO_NUM] = {0};
+my_fifo_t hci_rx_fifo = {
+ HCI_RXFIFO_SIZE,
+ HCI_RXFIFO_NUM,
+ 0,
+ 0,
+ hci_rx_fifo_b,};
+
+u8 hci_tx_fifo_b[HCI_TXFIFO_SIZE * HCI_TXFIFO_NUM] = {0};
+my_fifo_t hci_tx_fifo = {
+ HCI_TXFIFO_SIZE,
+ HCI_TXFIFO_NUM,
+ 0,
+ 0,
+ hci_tx_fifo_b,};
+////ending
+
+/* ADV Packet, SCAN Response Packet define */
+const u8 tbl_advData[] = {
+ 0x05, 0x09, 'G', 'h', 'i', 'd',
+ 0x02, 0x01, 0x05, // BLE limited discoverable mode and BR/EDR not supported
+ 0x03, 0x19, 0x80, 0x01, // 384, Generic Remote Control, Generic category
+ 0x05, 0x02, 0x12, 0x18, 0x0F, 0x18, // incomplete list of service class UUIDs (0x1812, 0x180F)
+};
+
+const u8 tbl_scanRsp [] = {
+ 0x08, 0x09, 'G', 'R', 'e', 'm', 'o', 't', 'e',
+};
+
+
+u32 tick_wakeup;
+int mcu_uart_working; //depends on the wakeup scheme, attention to the use
+int module_uart_working;
+int module_task_busy;
+
+#define UART_TX_BUSY ( (hci_tx_fifo.rptr != hci_tx_fifo.wptr) || uart_tx_is_busy() )
+#define UART_RX_BUSY (hci_rx_fifo.rptr != hci_rx_fifo.wptr)
+
+
+
+/* LED Management define */
+enum{
+ LED_POWER_ON = 0,
+ LED_AUDIO_ON, //1
+ LED_AUDIO_OFF, //2
+ LED_SHINE_SLOW, //3
+ LED_SHINE_FAST, //4
+ LED_SHINE_OTA, //5
+};
+
+const led_cfg_t led_cfg[] = {
+ {1000, 0, 1, 0x00, }, //power-on, 1s on
+ {100, 0 , 0xff, 0x02, }, //audio on, long on
+ {0, 100 , 0xff, 0x02, }, //audio off, long off
+ {500, 500 , 2, 0x04, }, //1Hz for 3 seconds
+ {250, 250 , 4, 0x04, }, //2Hz for 3 seconds
+ {250, 250 , 200, 0x08, }, //2Hz for 50 seconds
+};
+
+int app_module_busy ()
+{
+ mcu_uart_working = gpio_read(GPIO_WAKEUP_MODULE); //mcu use GPIO_WAKEUP_MODULE to indicate the UART data transmission or receiving state
+ module_uart_working = UART_TX_BUSY || UART_RX_BUSY; //module checks to see if UART rx and tX are all processed
+ module_task_busy = mcu_uart_working || module_uart_working;
+ return module_task_busy;
+}
+
+void app_suspend_exit ()
+{
+ GPIO_WAKEUP_MODULE_HIGH; //module enter working state
+ bls_pm_setSuspendMask(SUSPEND_DISABLE);
+ tick_wakeup = clock_time () | 1;
+}
+
+int app_suspend_enter ()
+{
+ if (app_module_busy ())
+ {
+ app_suspend_exit ();
+ return 0;
+ }
+ return 1;
+}
+
+void app_power_management ()
+{
+#if (BLE_HCI_PM_ENABLE)
+
+ if (!app_module_busy() && !tick_wakeup)
+ {
+
+ bls_pm_setSuspendMask(SUSPEND_ADV | SUSPEND_CONN);
+
+ bls_pm_setWakeupSource(PM_WAKEUP_PAD); // GPIO_WAKEUP_MODULE needs to be wakened
+ }
+
+ if (tick_wakeup && clock_time_exceed (tick_wakeup, 500))
+ {
+ GPIO_WAKEUP_MODULE_LOW;
+ tick_wakeup = 0;
+ }
+
+#endif
+}
+
+
+/////////////////////////////////////blc_register_hci_handler for spp////////////////////////////
+int rx_from_uart_cb (void)//UART data send to Master,we will handler the data as CMD or DATA
+{
+ u8 *p = my_fifo_get(&hci_rx_fifo);
+ if(p == NULL){
+ return 0;
+ }
+
+ //u8* p = my_fifo_get(&hci_rx_fifo);
+ u32 rx_len = p[0]; //usually <= 255 so 1 byte should be sufficient
+
+ if (rx_len)
+ {
+ blc_hci_handler(&p[4], rx_len - 4);//
+ *((u32*)p) = 0;//Clear DMA length field for distributing HCI Rx buffer of interrupt
+ my_fifo_pop(&hci_rx_fifo);
+ }
+
+ return 0;
+}
+
+uart_data_t T_txdata_buf;
+int tx_to_uart_cb (void)
+{
+ u8 *p = my_fifo_get (&hci_tx_fifo);
+ if (p && !uart_tx_is_busy ())
+ {
+ memcpy(&T_txdata_buf.data, p + 2, p[0]+p[1]*256);
+ T_txdata_buf.len = p[0]+p[1]*256 ;
+
+ if (uart_dma_send((u16 *)(&T_txdata_buf)))
+ {
+ my_fifo_pop (&hci_tx_fifo);
+ }
+ }
+ return 0;
+}
+
+
+
+void user_init()
+{
+ /*-- BLE stack initialization --------------------------------------------*/
+ u8 mac_public[6];
+ u8 mac_random_static[6];
+ blc_initMacAddress(CFG_ADR_MAC, mac_public, mac_random_static);
+
+ #if(BLE_DEVICE_ADDRESS_TYPE == BLE_DEVICE_ADDRESS_PUBLIC)
+ app_own_address_type = OWN_ADDRESS_PUBLIC;
+ #elif(BLE_DEVICE_ADDRESS_TYPE == BLE_DEVICE_ADDRESS_RANDOM_STATIC)
+ app_own_address_type = OWN_ADDRESS_RANDOM;
+ blc_ll_setRandomAddr(mac_random_static);
+ #endif
+
+ /*-- BLE Controller initialization ---------------------------------------*/
+ blc_ll_initBasicMCU(mac_public);//mandatory
+ blc_ll_initAdvertising_module(mac_public);//adv module: mandatory for BLE slave,
+ blc_ll_initSlaveRole_module();//slave module: mandatory for BLE slave,
+
+ //L2CAP initialization
+ blc_l2cap_register_handler(blc_hci_sendACLData2Host);/// blc_l2cap_packet_receive
+ blc_hci_registerControllerEventHandler(blc_hci_send_data);
+
+ ///////////////////// USER application initialization ///////////////////
+ bls_ll_setAdvData( (u8 *)tbl_advData, sizeof(tbl_advData) );
+ bls_ll_setScanRspData( (u8 *)tbl_scanRsp, sizeof(tbl_scanRsp));
+
+ u8 status = bls_ll_setAdvParam( MY_ADV_INTERVAL_MIN, MY_ADV_INTERVAL_MAX,
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, app_own_address_type,
+ 0, NULL,
+ MY_APP_ADV_CHANNEL,
+ ADV_FP_NONE);
+ //debug: ADV setting err
+ if(status != BLE_SUCCESS) { write_reg8(0x8000, 0x11); while(1); }
+
+ bls_ll_setAdvEnable(0); //adv disable
+
+ rf_set_power_level_index (RF_POWER_7P9dBm);//OK
+
+ ////////////////// SPP initialization ///////////////////////////////////
+
+ //note: dma addr must be set first before any other uart initialization! (confirmed by sihui)
+ uart_set_recbuff( (unsigned short *)hci_rx_fifo_b, hci_rx_fifo.size);
+ uart_set_pin(UART_TX_PB4, UART_RX_PB5);// uart tx/rx pin set UART_TX_PA3, UART_RX_PA4
+ uart_reset(); //will reset uart digital registers from 0x90 ~ 0x9f, so uart setting must set after this reset
+
+ ///it is only for 16000000 system clock. other baud rate setting, need to user lua tool to calculate.
+ uart_init_baudrate(9, 13,PARITY_NONE, STOP_BIT_ONE); ///115200
+
+ uart_dma_en(1, 1); //uart data in hardware buffer moved by dma, so we need enable them first
+ irq_set_mask(FLD_IRQ_DMA_EN);
+ dma_chn_irq_enable(FLD_DMA_CHN_UART_RX | FLD_DMA_CHN_UART_TX, 1); //uart Rx/Tx dma irq enable
+ uart_irq_en(0, 0); //uart Rx/Tx irq no need, disable them
+
+ blc_register_hci_handler(rx_from_uart_cb, tx_to_uart_cb);
+
+ /* Power Management initialization */
+#if (BLE_HCI_PM_ENABLE)
+ blc_ll_initPowerManagement_module(); //pm module: optional
+
+ bls_pm_setSuspendMask (SUSPEND_ADV | SUSPEND_CONN);
+
+ //mcu can wake up module from suspend or deepsleep by pulling up GPIO_WAKEUP_MODULE
+ cpu_set_gpio_wakeup (GPIO_WAKEUP_MODULE, GPIO_Level_High, 1); // pad high wakeup deepsleep
+
+ GPIO_WAKEUP_MODULE_LOW;
+
+ bls_pm_registerFuncBeforeSuspend( &app_suspend_enter );
+#else
+ bls_pm_setSuspendMask (SUSPEND_DISABLE);
+#endif
+ /////
+}
+
+/*----------------------------------------------------------------------------*/
+/*--------- Main Loop ------------*/
+/*----------------------------------------------------------------------------*/
+u32 tick_loop;
+void main_loop (void)
+{
+ tick_loop ++;
+
+ /* BLE entry -------------------------------------------------------------*/
+ blt_sdk_main_loop();
+
+ /* HCI power management --------------------------------------------------*/
+ app_power_management();
+}
+#endif //end of__PROJECT_5316_BLE_REMOTE__
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_hci/app.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_hci/app.h
new file mode 100644
index 0000000000000..6f2084dcbf8f3
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_hci/app.h
@@ -0,0 +1,34 @@
+/********************************************************************************************************
+ * @file app.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef _APP_H
+#define _APP_H
+
+#include "drivers.h"
+
+/* Audio Operation Function ------------------------------------------------- */
+
+//extern void deep_wakeup_proc(void);
+
+extern void user_init();
+extern void main_loop (void);
+
+#endif /* APP_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_hci/app_config.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_hci/app_config.h
new file mode 100644
index 0000000000000..50c886747c7d7
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_hci/app_config.h
@@ -0,0 +1,163 @@
+/********************************************************************************************************
+ * @file app_config.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+
+
+
+/////////////////////HCI ACCESS OPTIONS/////////////////////
+#define HCI_USE_UART 1
+#define HCI_USE_USB 0
+#define HCI_ACCESS HCI_USE_UART
+
+/* Function Select -----------------------------------------------------------*/
+#define BLE_HCI_PM_ENABLE 0
+
+
+/***select flash size***/
+#define FLASH_SIZE_OPTION_128K 0
+#define FLASH_SIZE_OPTION_512K 1
+
+#define FLASH_SIZE_OPTION FLASH_SIZE_OPTION_512K
+
+
+/* LED -----------------------------------------------------------------------*/
+#define GPIO_LED GPIO_PB0
+
+
+//////////////////////////// MODULE PM GPIO /////////////////////////////////
+#define GPIO_WAKEUP_MODULE GPIO_PB2 //mcu wakeup module
+#define PB2_FUNC AS_GPIO
+#define PB2_INPUT_ENABLE 1
+#define PB2_OUTPUT_ENABLE 0
+#define PB2_DATA_OUT 0
+#define GPIO_WAKEUP_MODULE_HIGH gpio_setup_up_down_resistor(GPIO_WAKEUP_MODULE, PM_PIN_PULLUP_10K);
+#define GPIO_WAKEUP_MODULE_LOW gpio_setup_up_down_resistor(GPIO_WAKEUP_MODULE, PM_PIN_PULLDOWN_100K);
+
+#define GPIO_WAKEUP_MCU GPIO_PB3 //module wakeup mcu
+#define PB3_FUNC AS_GPIO
+#define PB3_INPUT_ENABLE 1
+#define PB3_OUTPUT_ENABLE 1
+#define PB3_DATA_OUT 0
+#define GPIO_WAKEUP_MCU_HIGH do{gpio_set_output_en(GPIO_WAKEUP_MCU, 1); gpio_write(GPIO_WAKEUP_MCU, 1);}while(0)
+#define GPIO_WAKEUP_MCU_LOW do{gpio_set_output_en(GPIO_WAKEUP_MCU, 1); gpio_write(GPIO_WAKEUP_MCU, 0);}while(0)
+#define GPIO_WAKEUP_MCU_FLOAT do{gpio_set_output_en(GPIO_WAKEUP_MCU, 0); gpio_write(GPIO_WAKEUP_MCU, 0);}while(0)
+
+
+/* System clock initialization -----------------------------------------------*/
+#define CLOCK_SYS_CLOCK_HZ 16000000
+enum{
+ CLOCK_SYS_CLOCK_1S = CLOCK_SYS_CLOCK_HZ,
+ CLOCK_SYS_CLOCK_1MS = (CLOCK_SYS_CLOCK_1S / 1000),
+ CLOCK_SYS_CLOCK_1US = (CLOCK_SYS_CLOCK_1S / 1000000),
+};
+
+
+
+
+
+/* Debug Interface -----------------------------------------------------------*/
+#define DEBUG_GPIO_ENABLE 0
+
+#if(DEBUG_GPIO_ENABLE)
+ #define PB2_FUNC AS_GPIO //debug gpio chn0 : PB2
+ #define PB3_FUNC AS_GPIO //debug gpio chn1 : PB3
+ #define PB4_FUNC AS_GPIO //debug gpio chn2 : PB4
+ #define PB5_FUNC AS_GPIO //debug gpio chn3 : PB5
+ #define PA6_FUNC AS_GPIO //debug gpio chn4 : PA6
+
+ #define PB2_INPUT_ENABLE 0
+ #define PB3_INPUT_ENABLE 0
+ #define PB4_INPUT_ENABLE 0
+ #define PB5_INPUT_ENABLE 0
+ #define PA6_INPUT_ENABLE 0
+
+ #define PB2_OUTPUT_ENABLE 1
+ #define PB3_OUTPUT_ENABLE 1
+ #define PB4_OUTPUT_ENABLE 1
+ #define PB5_OUTPUT_ENABLE 1
+ #define PA6_OUTPUT_ENABLE 1
+
+
+ #define DBG_CHN0_LOW ( *(unsigned char *)0x80058b &= (~(1<<2)) )
+ #define DBG_CHN0_HIGH ( *(unsigned char *)0x80058b |= (1<<2) )
+ #define DBG_CHN0_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<2) )
+
+ #define DBG_CHN1_LOW ( *(unsigned char *)0x80058b &= (~(1<<3)) )
+ #define DBG_CHN1_HIGH ( *(unsigned char *)0x80058b |= (1<<3) )
+ #define DBG_CHN1_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<3) )
+
+ #define DBG_CHN2_LOW ( *(unsigned char *)0x80058b &= (~(1<<4)) )
+ #define DBG_CHN2_HIGH ( *(unsigned char *)0x80058b |= (1<<4) )
+ #define DBG_CHN2_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<4) )
+
+ #define DBG_CHN3_LOW ( *(unsigned char *)0x80058b &= (~(1<<5)) )
+ #define DBG_CHN3_HIGH ( *(unsigned char *)0x80058b |= (1<<5) )
+ #define DBG_CHN3_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<5) )
+
+ #define DBG_CHN4_LOW ( *(unsigned char *)0x800583 &= (~(1<<6)) )
+ #define DBG_CHN4_HIGH ( *(unsigned char *)0x800583 |= (1<<6) )
+ #define DBG_CHN4_TOGGLE ( *(unsigned char *)0x800583 ^= (1<<6) )
+#else
+ #define DBG_CHN0_LOW
+ #define DBG_CHN0_HIGH
+ #define DBG_CHN0_TOGGLE
+ #define DBG_CHN1_LOW
+ #define DBG_CHN1_HIGH
+ #define DBG_CHN1_TOGGLE
+ #define DBG_CHN2_LOW
+ #define DBG_CHN2_HIGH
+ #define DBG_CHN2_TOGGLE
+ #define DBG_CHN3_LOW
+ #define DBG_CHN3_HIGH
+ #define DBG_CHN3_TOGGLE
+ #define DBG_CHN4_LOW
+ #define DBG_CHN4_HIGH
+ #define DBG_CHN4_TOGGLE
+ #define DBG_CHN5_LOW
+ #define DBG_CHN5_HIGH
+ #define DBG_CHN5_TOGGLE
+
+#endif //end of DEBUG_GPIO_ENABLE
+
+
+
+
+
+
+
+
+
+
+/////////////////// set default ////////////////
+
+#include "../common/default_config.h"
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_hci/main.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_hci/main.c
new file mode 100644
index 0000000000000..16db88633a9ea
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_hci/main.c
@@ -0,0 +1,89 @@
+/********************************************************************************************************
+ * @file main.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include
+#include "drivers.h"
+#include "stack/ble/ble.h"
+#include "../common/user_config.h"
+
+extern my_fifo_t hci_rx_fifo;
+
+_attribute_ram_code_ void irq_handler(void)
+{
+ irq_blt_sdk_handler();
+
+#if (HCI_ACCESS==HCI_USE_UART)
+ unsigned char irqS = dma_chn_irq_status_get();
+ if(irqS & FLD_DMA_CHN_UART_RX) //rx
+ {
+ dma_chn_irq_status_clr(FLD_DMA_CHN_UART_RX);
+
+ u8* w = hci_rx_fifo.p + (hci_rx_fifo.wptr & (hci_rx_fifo.num-1)) * hci_rx_fifo.size;
+ if(w[0]!=0)
+ {
+ my_fifo_next(&hci_rx_fifo);
+ u8* p = hci_rx_fifo.p + (hci_rx_fifo.wptr & (hci_rx_fifo.num-1)) * hci_rx_fifo.size;
+ reg_dma_uart_rx_addr = (u16)((u32)p); //switch uart RX dma address
+ }
+ }
+
+ if(irqS & FLD_DMA_CHN_UART_TX) //tx
+ {
+ dma_chn_irq_status_clr(FLD_DMA_CHN_UART_TX);
+ }
+#endif
+
+}
+
+int main(void){
+
+ blc_pm_select_internal_32k_crystal();
+
+ cpu_wakeup_init();
+
+ #if (CLOCK_SYS_CLOCK_HZ == 16000000)
+ clock_init(SYS_CLK_16M_Crystal);
+ #elif (CLOCK_SYS_CLOCK_HZ == 32000000)
+ clock_init(SYS_CLK_32M_Crystal);
+ #elif (CLOCK_SYS_CLOCK_HZ == 48000000)
+ clock_init(SYS_CLK_48M_Crystal);
+ #endif
+
+ gpio_init();
+
+ /* load customized freq_offset CAP value and TP value.*/
+ blc_app_loadCustomizedParameters();
+
+ rf_drv_init(RF_MODE_BLE_1M);
+
+ user_init ();
+
+ irq_enable();
+
+ while (1) {
+ #if (MODULE_WATCHDOG_ENABLE)
+ wd_clear(); //clear watch dog
+ #endif
+ main_loop ();
+ }
+}
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/app.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/app.c
new file mode 100644
index 0000000000000..d7414e1699481
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/app.c
@@ -0,0 +1,395 @@
+/********************************************************************************************************
+ * @file app.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include
+#include "tl_common.h"
+#include "../common/blt_led.h"
+#include "../common/keyboard.h"
+#include "../common/blt_soft_timer.h"
+#include "../common/blt_common.h"
+#include "battery_check.h"
+#include "spp.h"
+
+
+#if (__PROJECT_5316_MODULE__ )
+
+#define ADV_IDLE_ENTER_DEEP_TIME 60 //60 s
+#define CONN_IDLE_ENTER_DEEP_TIME 60 //60 s
+
+#define MY_DIRECT_ADV_TMIE 2000000
+#define MY_APP_ADV_CHANNEL BLT_ENABLE_ADV_ALL
+
+#define MY_ADV_INTERVAL_MIN ADV_INTERVAL_30MS
+#define MY_ADV_INTERVAL_MAX ADV_INTERVAL_35MS
+
+#define BLE_DEVICE_ADDRESS_TYPE BLE_DEVICE_ADDRESS_PUBLIC
+
+own_addr_type_t app_own_address_type = OWN_ADDRESS_PUBLIC;
+
+
+
+MYFIFO_INIT(blt_rxfifo, 64, 8);
+MYFIFO_INIT(blt_txfifo, 40, 16);
+
+
+//module spp Tx / Rx fifo
+#define SPP_RXFIFO_SIZE 64 //72
+#define SPP_RXFIFO_NUM 2
+
+#define SPP_TXFIFO_SIZE 64 //72
+#define SPP_TXFIFO_NUM 8
+
+u8 spp_rx_fifo_b[SPP_RXFIFO_SIZE * SPP_RXFIFO_NUM] = {0};
+my_fifo_t spp_rx_fifo = {
+ SPP_RXFIFO_SIZE,
+ SPP_RXFIFO_NUM,
+ 0,
+ 0,
+ spp_rx_fifo_b,};
+
+u8 spp_tx_fifo_b[SPP_TXFIFO_SIZE * SPP_TXFIFO_NUM] = {0};
+my_fifo_t spp_tx_fifo = {
+ SPP_TXFIFO_SIZE,
+ SPP_TXFIFO_NUM,
+ 0,
+ 0,
+ spp_tx_fifo_b,};
+////ending
+
+/* ADV Packet, SCAN Response Packet define */
+const u8 tbl_advData[] = {
+ 0x05, 0x09, 'G', 'M', 'o', 'd',
+ 0x02, 0x01, 0x05, // BLE limited discoverable mode and BR/EDR not supported
+ 0x03, 0x19, 0x80, 0x01, // 384, Generic Remote Control, Generic category
+ 0x05, 0x02, 0x12, 0x18, 0x0F, 0x18, // incomplete list of service class UUIDs (0x1812, 0x180F)
+};
+
+const u8 tbl_scanRsp [] = {
+ 0x08, 0x09, 'G', 'M', 'o', 'd', 'u', 'l', 'e',
+};
+
+
+u32 tick_wakeup;
+int mcu_uart_working; //depends on the wakeup scheme, attention to the use
+volatile int module_uart_working;
+int module_task_busy;
+
+
+#define UART_TX_BUSY ( (spp_tx_fifo.rptr != spp_tx_fifo.wptr) || uart_tx_is_busy() )
+#define UART_RX_BUSY (spp_rx_fifo.rptr != spp_rx_fifo.wptr)
+
+
+/* LED Management define */
+enum{
+ LED_POWER_ON = 0,
+ LED_AUDIO_ON, //1
+ LED_AUDIO_OFF, //2
+ LED_SHINE_SLOW, //3
+ LED_SHINE_FAST, //4
+ LED_SHINE_OTA, //5
+};
+
+const led_cfg_t led_cfg[] = {
+ {1000, 0, 1, 0x00, }, //power-on, 1s on
+ {100, 0 , 0xff, 0x02, }, //audio on, long on
+ {0, 100 , 0xff, 0x02, }, //audio off, long off
+ {500, 500 , 2, 0x04, }, //1Hz for 3 seconds
+ {250, 250 , 4, 0x04, }, //2Hz for 3 seconds
+ {250, 250 , 200, 0x08, }, //2Hz for 50 seconds
+};
+
+
+/*----------------------------------------------------------------------------*/
+/*------------- OTA Function ----------------*/
+/*----------------------------------------------------------------------------*/
+#if (BLE_MODULE_OTA_ENABLE)
+volatile u8 ota_is_working = 0;
+void entry_ota_mode(void)
+{
+ ota_is_working = 1;
+ device_led_setup(led_cfg[LED_SHINE_OTA]);
+ bls_ota_setTimeout(50 * 1000 * 1000); //set OTA timeout 15 seconds
+}
+
+void LED_show_ota_result(int result)
+{
+ #if 0
+ irq_disable();
+ WATCHDOG_DISABLE;
+
+ gpio_set_output_en(GPIO_LED, 1);
+
+ if(result == OTA_SUCCESS){ //OTA success
+ gpio_write(GPIO_LED, 1);
+ sleep_us(2000000); //led on for 2 second
+ gpio_write(GPIO_LED, 0);
+ }
+ else{ //OTA fail
+
+ }
+
+ gpio_set_output_en(GPIO_LED, 0);
+ #endif
+}
+#endif
+
+
+int module_uart_send_flg;
+u32 module_wakeup_mcu_tick;
+
+int app_module_busy ()
+{
+ mcu_uart_working = gpio_read(GPIO_WAKEUP_MODULE); // mcu use GPIO_WAKEUP_MODULE to indicate the UART data transmission or receiving state
+ module_uart_working = UART_TX_BUSY || UART_RX_BUSY; // module checks to see if UART rx and tX are all processed
+ module_task_busy = mcu_uart_working || module_uart_working;
+ return module_task_busy;
+}
+
+void app_suspend_exit ()
+{
+ GPIO_WAKEUP_MODULE_HIGH; //module enter working state
+ bls_pm_setSuspendMask(SUSPEND_DISABLE);
+ tick_wakeup = clock_time () | 1;
+}
+
+int app_suspend_enter ()
+{
+ if (app_module_busy ())
+ {
+ app_suspend_exit ();
+ return 0;
+ }
+ return 1;
+}
+
+void app_power_management ()
+{
+
+#if (BLE_MODULE_INDICATE_DATA_TO_MCU)
+ module_uart_working = UART_TX_BUSY || UART_RX_BUSY;
+
+ //When module's UART data is sent, the GPIO_WAKEUP_MCU is lowered or suspended (depending on how the user is designed)
+ if(module_uart_send_flg && !module_uart_working){
+ module_uart_send_flg = 0;
+ module_wakeup_mcu_tick = 0;
+ GPIO_WAKEUP_MCU_LOW;
+ }
+#endif
+
+ // pullup GPIO_WAKEUP_MODULE: exit from suspend
+ // pulldown GPIO_WAKEUP_MODULE: enter suspend
+
+#if (BLE_MODULE_PM_ENABLE)
+
+ if (!app_module_busy() && !tick_wakeup)
+ {
+ if(ota_is_working){
+ return ;
+ }
+ //////////////////////////////
+ bls_pm_setSuspendMask(SUSPEND_ADV | SUSPEND_CONN);
+ bls_pm_setWakeupSource(PM_WAKEUP_PAD); // GPIO_WAKEUP_MODULE needs to be wakened
+ }
+
+ if (tick_wakeup && clock_time_exceed (tick_wakeup, 500))
+ {
+ GPIO_WAKEUP_MODULE_LOW;
+ tick_wakeup = 0;
+ }
+
+#endif
+}
+
+#define MY_MTU_SIZE 100
+u8 mtu_size_exchanged = false;
+void mtu_size_exchange_cb(u16 connHandle, u16 remoteMtuSize, u16 effectMtuSize)
+{
+ mtu_size_exchanged = true;
+}
+
+unsigned int lowBattDet_tick = 0;
+
+void user_init()
+{
+ /***********************************************************************************
+ * Power Management initialization and gpio wake up source setting.
+ * Note: These section must be before battery_power_check.
+ * Because when low battery,chip will entry deep.if placed after battery_power_check,
+ * it is possible that can not wake up chip.(gpio wakeup setting will be lost in deep mode)
+ * *******************************************************************************/
+ #if (BLE_MODULE_PM_ENABLE)
+ blc_ll_initPowerManagement_module(); //pm module: optional
+
+ bls_pm_setSuspendMask (SUSPEND_ADV | SUSPEND_CONN);
+
+ gpio_set_wakeup(GPIO_WAKEUP_MODULE,1,1); //drive pin core(gpio) high wakeup suspend
+ //mcu can wake up module from suspend or deepsleep by pulling up GPIO_WAKEUP_MODULE
+ cpu_set_gpio_wakeup(GPIO_WAKEUP_MODULE, GPIO_Level_High, 1); // pad high wakeup deepsleep
+
+ GPIO_WAKEUP_MODULE_LOW;
+
+ bls_pm_registerFuncBeforeSuspend( &app_suspend_enter );
+ #else
+ bls_pm_setSuspendMask (SUSPEND_DISABLE);
+ #endif
+
+ /*****************************************************************************************
+ Note: battery check must do before any flash write/erase operation, cause flash write/erase
+ under a low or unstable power supply will lead to error flash operation
+
+ Some module initialization may involve flash write/erase, include: OTA initialization,
+ SMP initialization, ..
+ So these initialization must be done after battery check
+ *****************************************************************************************/
+ #if(BATT_CHECK_ENABLE)
+ if(analog_read(DEEP_ANA_REG2) == BATTERY_VOL_LOW){
+ battery_power_check(BATTERY_VOL_MIN + 200);//2.2V
+ }
+ else{
+ battery_power_check(BATTERY_VOL_MIN);//2.0 V
+ }
+ #endif
+
+ /*-- BLE stack initialization --------------------------------------------*/
+ u8 mac_public[6];
+ u8 mac_random_static[6];
+ blc_initMacAddress(CFG_ADR_MAC, mac_public, mac_random_static);
+
+ #if(BLE_DEVICE_ADDRESS_TYPE == BLE_DEVICE_ADDRESS_PUBLIC)
+ app_own_address_type = OWN_ADDRESS_PUBLIC;
+ #elif(BLE_DEVICE_ADDRESS_TYPE == BLE_DEVICE_ADDRESS_RANDOM_STATIC)
+ app_own_address_type = OWN_ADDRESS_RANDOM;
+ blc_ll_setRandomAddr(mac_random_static);
+ #endif
+
+ /*-- BLE Controller initialization ---------------------------------------*/
+ blc_ll_initBasicMCU(mac_public); //mandatory
+ blc_ll_initAdvertising_module(mac_public); //adv module: mandatory for BLE slave,
+ blc_ll_initSlaveRole_module(); //slave module: mandatory for BLE slave,
+
+
+ ////// Host Initialization //////////
+ extern void my_att_init ();
+ my_att_init (); //gatt initialization
+ blc_l2cap_register_handler (blc_l2cap_packet_receive); //l2cap initialization
+
+ /*-- BLE SMP initialization ----------------------------------------------*/
+#if (BLE_MODULE_SECURITY_ENABLE)
+ blc_smp_param_setBondingDeviceMaxNumber(4); //default is SMP_BONDING_DEVICE_MAX_NUM, can not bigger that this value
+ //and this func must call before bls_smp_enableParing
+ bls_smp_enableParing (SMP_PARING_CONN_TRRIGER );
+#else
+ bls_smp_enableParing (SMP_PARING_DISABLE_TRRIGER );
+#endif
+
+// HID_service_on_android7p0_init(); //hid device on android 7.0/7.1
+
+ /*-- USER application initialization -------------------------------------*/
+ bls_ll_setAdvData( (u8 *)tbl_advData, sizeof(tbl_advData) );
+ bls_ll_setScanRspData( (u8 *)tbl_scanRsp, sizeof(tbl_scanRsp));
+
+ u8 status = bls_ll_setAdvParam( MY_ADV_INTERVAL_MIN, MY_ADV_INTERVAL_MAX,
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, app_own_address_type,
+ 0, NULL,
+ MY_APP_ADV_CHANNEL,
+ ADV_FP_NONE);
+ //debug: ADV setting err
+ if(status != BLE_SUCCESS) { write_reg8(0x8000, 0x11); while(1); }
+
+ bls_ll_setAdvEnable(1); //adv enable
+ rf_set_power_level_index (RF_POWER_7P9dBm);
+
+ //MTU Size
+ blc_att_setRxMtuSize(MY_MTU_SIZE);
+ blc_att_registerMtuSizeExchangeCb(mtu_size_exchange_cb);
+
+ /*-- SPP initialization --------------------------------------------------*/
+ //note: dma addr must be set first before any other uart initialization! (confirmed by sihui)
+ uart_set_recbuff( (unsigned short *)spp_rx_fifo_b, spp_rx_fifo.size);
+ uart_set_pin(UART_TX_PB4, UART_RX_PB5); //UART TX/RX pin set
+ uart_reset(); //will reset UART digital registers from 0x90 ~ 0x9f, so UART setting must set after this reset
+
+ #if (CLOCK_SYS_CLOCK_HZ == 16000000)
+ uart_init_baudrate(9, 13,PARITY_NONE, STOP_BIT_ONE); //(9,13:115200;;)Baud rate's setting, please use LUA script tool to calculate.
+ #elif (CLOCK_SYS_CLOCK_HZ == 32000000)
+ uart_init_baudrate(30, 8,PARITY_NONE, STOP_BIT_ONE); //115200
+ #elif (CLOCK_SYS_CLOCK_HZ == 48000000)
+ uart_init_baudrate(25, 15,PARITY_NONE, STOP_BIT_ONE); //115200
+ #endif
+
+ uart_dma_en(1, 1); //UART data in hardware buffer moved by DMA, so we enable them first
+ irq_set_mask(FLD_IRQ_DMA_EN);
+ dma_chn_irq_enable(FLD_DMA_CHN_UART_RX | FLD_DMA_CHN_UART_TX, 1); //UART RX/TX DMA irq enable
+ uart_irq_en(0, 0); //UART RX/TX irq no need, disable them
+
+ extern int rx_from_uart_cb (void);
+ extern int tx_to_uart_cb (void);
+ blc_register_hci_handler(rx_from_uart_cb, tx_to_uart_cb);
+
+ /////////////////
+ extern int controller_event_handler(u32 h, u8 *para, int n);
+ blc_hci_registerControllerEventHandler(controller_event_handler); //register event callback
+ bls_hci_mod_setEventMask_cmd(0xfffff); //enable all 18 events,event list see ble_ll.h
+
+
+#if (BLE_MODULE_OTA_ENABLE)
+ // OTA init
+ bls_ota_clearNewFwDataArea(); //must
+ bls_ota_registerStartCmdCb(entry_ota_mode);
+ bls_ota_registerResultIndicateCb(LED_show_ota_result);
+#endif
+}
+
+/*----------------------------------------------------------------------------*/
+/*--------- Main Loop ------------*/
+/*----------------------------------------------------------------------------*/
+u32 tick_loop;
+void main_loop (void)
+{
+ tick_loop ++;
+
+ if(!mtu_size_exchanged && blc_ll_getCurrentState() == BLS_LINK_STATE_CONN
+ && clock_time_exceed(connected_start_tick, 5000*1000))
+ {
+ blc_att_requestMtuSizeExchange(BLS_CONN_HANDLE, MY_MTU_SIZE);
+ mtu_size_exchanged = true;
+ //write_reg32(0x8000, 0xaaaa5555);
+ }
+
+ /* BLE entry -------------------------------------------------------------*/
+ blt_sdk_main_loop(); ///rx_from_uart_cb tx_to_uart_cb
+
+ /* UI entry --------------------------------------------------------------*/
+ #if (BATT_CHECK_ENABLE)
+ if(clock_time_exceed(lowBattDet_tick, 500*1000)){
+ lowBattDet_tick = clock_time();
+ battery_power_check(BATTERY_VOL_MIN);
+ }
+ #endif
+
+ /* module power management -----------------------------------------------*/
+ app_power_management();
+
+ spp_restart_proc();
+}
+#endif //end of__PROJECT_5316_BLE_REMOTE__
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/app.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/app.h
new file mode 100644
index 0000000000000..6f2084dcbf8f3
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/app.h
@@ -0,0 +1,34 @@
+/********************************************************************************************************
+ * @file app.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef _APP_H
+#define _APP_H
+
+#include "drivers.h"
+
+/* Audio Operation Function ------------------------------------------------- */
+
+//extern void deep_wakeup_proc(void);
+
+extern void user_init();
+extern void main_loop (void);
+
+#endif /* APP_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/app_att.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/app_att.c
new file mode 100644
index 0000000000000..fa4e1d8c87e00
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/app_att.c
@@ -0,0 +1,206 @@
+/********************************************************************************************************
+ * @file app_att.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author public@telink-semi.com;
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "tl_common.h"
+#include "drivers.h"
+#include "stack/ble/ble.h"
+
+#include "spp.h"
+
+typedef struct
+{
+ /** Minimum value for the connection event (interval. 0x0006 - 0x0C80 * 1.25 ms) */
+ u16 intervalMin;
+ /** Maximum value for the connection event (interval. 0x0006 - 0x0C80 * 1.25 ms) */
+ u16 intervalMax;
+ /** Number of LL latency connection events (0x0000 - 0x03e8) */
+ u16 latency;
+ /** Connection Timeout (0x000A - 0x0C80 * 10 ms) */
+ u16 timeout;
+} gap_periConnectParams_t;
+
+const u16 clientCharacterCfgUUID = GATT_UUID_CLIENT_CHAR_CFG;
+
+const u16 extReportRefUUID = GATT_UUID_EXT_REPORT_REF;
+
+const u16 reportRefUUID = GATT_UUID_REPORT_REF;
+
+const u16 characterPresentFormatUUID = GATT_UUID_CHAR_PRESENT_FORMAT;
+
+const u16 my_primaryServiceUUID = GATT_UUID_PRIMARY_SERVICE;
+
+static const u16 my_characterUUID = GATT_UUID_CHARACTER;
+
+const u16 my_devServiceUUID = SERVICE_UUID_DEVICE_INFORMATION;
+
+const u16 my_PnPUUID = CHARACTERISTIC_UUID_PNP_ID;
+
+const u16 my_devNameUUID = GATT_UUID_DEVICE_NAME;
+
+//device information
+const u16 my_gapServiceUUID = SERVICE_UUID_GENERIC_ACCESS;
+// Device Name Characteristic Properties
+static u8 my_devNameCharacter = CHAR_PROP_READ | CHAR_PROP_NOTIFY;
+// Appearance Characteristic Properties
+const u16 my_appearanceUIID = 0x2a01;
+const u16 my_periConnParamUUID = 0x2a04;
+static u8 my_appearanceCharacter = CHAR_PROP_READ;
+// Peripheral Preferred Connection Parameters Characteristic Properties
+static u8 my_periConnParamChar = CHAR_PROP_READ;
+u16 my_appearance = GAP_APPEARE_UNKNOWN;
+gap_periConnectParams_t my_periConnParameters = {20, 40, 0, 1000};
+
+
+const u16 my_gattServiceUUID = SERVICE_UUID_GENERIC_ATTRIBUTE;
+const u8 serviceChangedProp = CHAR_PROP_INDICATE;
+const u16 serviceChangeUIID = GATT_UUID_SERVICE_CHANGE;
+u16 serviceChangeVal[2] = {0};
+static u8 serviceChangeCCC[2]={0,0};
+
+
+
+#define DEV_NAME "GModule"
+extern u8 ble_devName[];
+
+// Device Name Characteristic Properties
+static u8 my_PnPCharacter = CHAR_PROP_READ;
+
+
+const u8 my_PnPtrs [] = {0x02, 0x8a, 0x24, 0x66, 0x82, 0x01, 0x00};
+
+//////////////////////// Battery /////////////////////////////////////////////////
+const u16 my_batServiceUUID = SERVICE_UUID_BATTERY;
+const u16 my_batCharUUID = CHARACTERISTIC_UUID_BATTERY_LEVEL;
+u8 my_batVal[1] = {99};
+
+/////////////////////////////////////////////////////////
+const u16 userdesc_UUID = GATT_UUID_CHAR_USER_DESC;
+
+/////////////////////////////////////////spp/////////////////////////////////////
+#if (TELIK_SPP_SERVICE_ENABLE)
+u8 TelinkSppServiceUUID[16] = TELINK_SPP_UUID_SERVICE;
+u8 TelinkSppDataServer2ClientUUID[16] = TELINK_SPP_DATA_SERVER2CLIENT;
+u8 TelinkSppDataClient2ServerUUID[16] = TELINK_SPP_DATA_CLIENT2SERVER;
+
+// Spp data from Server to Client characteristic variables
+static u8 SppDataServer2ClientProp = CHAR_PROP_READ | CHAR_PROP_NOTIFY;
+u8 SppDataServer2ClientData[ATT_MTU_SIZE - 3];
+static u8 SppDataServer2ClientDataCCC[2] = {0};
+
+// Spp data from Client to Server characteristic variables
+//CHAR_PROP_WRITE: Need response from slave, low transmission speed
+static u8 SppDataClient2ServerProp = CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP; //CHAR_PROP_WRITE;
+u8 SppDataClient2ServerData[ATT_MTU_SIZE - 3];
+
+//SPP data descriptor
+const u8 TelinkSPPS2CDescriptor[] = "Telink SPP: Module->Phone";
+const u8 TelinkSPPC2SDescriptor[] = "Telink SPP: Phone->Module";
+
+
+int module_onReceiveData(rf_packet_att_write_t *p)
+{
+ u8 len = p->l2capLen - 3;
+ if(len > 0)
+ {
+ spp_event_t *pEvt = (spp_event_t *)p;
+ pEvt->token = 0xFF;
+ pEvt->paramLen = p->l2capLen + 2; //l2cap_len + 2 byte (eventId)
+ pEvt->eventId = 0x07a0; //data received event
+ memcpy(pEvt->param, &p->opcode, len + 3);
+
+ spp_send_data(HCI_FLAG_EVENT_TLK_MODULE, pEvt);
+ }
+
+
+ return 0;
+}
+#endif
+
+
+const u8 my_OtaServiceUUID[16] = TELINK_OTA_UUID_SERVICE;
+const u8 my_OtaUUID[16] = TELINK_SPP_DATA_OTA;
+
+static u8 my_OtaProp = CHAR_PROP_READ | CHAR_PROP_WRITE_WITHOUT_RSP;
+const u8 my_OtaName[] = {'O', 'T', 'A'};
+u8 my_OtaData = 0x00;
+
+
+// TM : to modify
+const attribute_t my_Attributes[] = {
+#if (TELIK_SPP_SERVICE_ENABLE)
+ {26,0,0,0,0,0}, // total num of attribute
+#else
+ {18,0,0,0,0,0}, // total num of attribute
+#endif
+
+ // 0001 - 0007 gap
+ {7,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_gapServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,1,(u8*)(&my_characterUUID), (u8*)(&my_devNameCharacter), 0},
+ {0,ATT_PERMISSIONS_READ,2,MAX_DEV_NAME_LEN, (u8*)(&my_devNameUUID), (u8*)(&ble_devName), 0},
+ {0,ATT_PERMISSIONS_READ,2,1,(u8*)(&my_characterUUID), (u8*)(&my_appearanceCharacter), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_appearance), (u8*)(&my_appearanceUIID), (u8*)(&my_appearance), 0},
+ {0,ATT_PERMISSIONS_READ,2,1,(u8*)(&my_characterUUID), (u8*)(&my_periConnParamChar), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_periConnParameters),(u8*)(&my_periConnParamUUID), (u8*)(&my_periConnParameters), 0},
+
+
+ // 0008 - 000b gatt
+ {4,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_gattServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,1,(u8*)(&my_characterUUID), (u8*)(&serviceChangedProp), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (serviceChangeVal), (u8*)(&serviceChangeUIID), (u8*)(&serviceChangeVal), 0},
+ {0,ATT_PERMISSIONS_RDWR,2,sizeof (serviceChangeCCC),(u8*)(&clientCharacterCfgUUID), (u8*)(serviceChangeCCC), 0},
+
+
+
+ // 000c - 000e device Information Service
+ {3,ATT_PERMISSIONS_READ,2,2,(u8*)(&my_primaryServiceUUID), (u8*)(&my_devServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ,2,1,(u8*)(&my_characterUUID), (u8*)(&my_PnPCharacter), 0},
+ {0,ATT_PERMISSIONS_READ,2,sizeof (my_PnPtrs),(u8*)(&my_PnPUUID), (u8*)(my_PnPtrs), 0},
+
+////////////////////////////////////// SPP Service /////////////////////////////////////////////////////
+#if (TELIK_SPP_SERVICE_ENABLE)
+ {8,ATT_PERMISSIONS_READ,2,16,(u8*)(&my_primaryServiceUUID), (u8*)(&TelinkSppServiceUUID), 0},
+
+ {0,ATT_PERMISSIONS_READ,2,1,(u8*)(&my_characterUUID), (u8*)(&SppDataServer2ClientProp), 0}, //prop
+ {0,ATT_PERMISSIONS_READ,16,sizeof(SppDataServer2ClientData),(u8*)(&TelinkSppDataServer2ClientUUID), (u8*)(SppDataServer2ClientData), 0}, //value
+ {0,ATT_PERMISSIONS_RDWR,2,2,(u8*)&clientCharacterCfgUUID,(u8*)(&SppDataServer2ClientDataCCC)},
+ {0,ATT_PERMISSIONS_READ,2,sizeof(TelinkSPPS2CDescriptor),(u8*)&userdesc_UUID,(u8*)(&TelinkSPPS2CDescriptor)},
+
+ {0,ATT_PERMISSIONS_READ,2,1,(u8*)(&my_characterUUID), (u8*)(&SppDataClient2ServerProp), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,16,sizeof(SppDataClient2ServerData),(u8*)(&TelinkSppDataClient2ServerUUID), (u8*)(SppDataClient2ServerData), &module_onReceiveData}, //value
+ {0,ATT_PERMISSIONS_READ,2,sizeof(TelinkSPPC2SDescriptor),(u8*)&userdesc_UUID,(u8*)(&TelinkSPPC2SDescriptor)},
+#endif
+
+ // OTA
+ {4,ATT_PERMISSIONS_READ, 2,16,(u8*)(&my_primaryServiceUUID), (u8*)(&my_OtaServiceUUID), 0},
+ {0,ATT_PERMISSIONS_READ, 2, 1,(u8*)(&my_characterUUID), (u8*)(&my_OtaProp), 0}, //prop
+ {0,ATT_PERMISSIONS_RDWR,16,sizeof(my_OtaData),(u8*)(&my_OtaUUID), (&my_OtaData), &otaWrite, &otaRead}, //value
+ {0,ATT_PERMISSIONS_READ, 2,sizeof (my_OtaName),(u8*)(&userdesc_UUID), (u8*)(my_OtaName), 0},
+
+};
+
+void my_att_init ()
+{
+ bls_att_setAttributeTable ((u8 *)my_Attributes);
+
+ u8 device_name[] = DEV_NAME;
+ bls_att_setDeviceName(device_name, sizeof(DEV_NAME));
+}
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/app_config.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/app_config.h
new file mode 100644
index 0000000000000..811e9f1ed0b9d
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/app_config.h
@@ -0,0 +1,226 @@
+/********************************************************************************************************
+ * @file app_config.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+
+
+
+/////////////////////HCI ACCESS OPTIONS/////////////////////
+#define HCI_USE_UART 1
+//#define HCI_USE_USB 0
+#define HCI_ACCESS HCI_USE_UART
+
+/* Function Select -----------------------------------------------------------*/
+#define BLE_MODULE_PM_ENABLE 1
+
+//////////////// SMP SETTING //////////////////////////////
+#define BLE_MODULE_SECURITY_ENABLE 1
+
+/////////////////// MODULE /////////////////////////////////
+#define BLE_MODULE_OTA_ENABLE 1
+#define TELIK_SPP_SERVICE_ENABLE 1
+#define BLE_MODULE_INDICATE_DATA_TO_MCU 1
+#define BATT_CHECK_ENABLE 1 //enable or disable battery voltage detection
+#define BLT_APP_LED_ENABLE 1
+
+
+/***select flash size***/
+#define FLASH_SIZE_OPTION_128K 0
+#define FLASH_SIZE_OPTION_512K 1
+#define FLASH_SIZE_OPTION FLASH_SIZE_OPTION_512K
+
+/* System clock initialization -----------------------------------------------*/
+#define CLOCK_SYS_CLOCK_HZ 16000000
+enum{
+ CLOCK_SYS_CLOCK_1S = CLOCK_SYS_CLOCK_HZ,
+ CLOCK_SYS_CLOCK_1MS = (CLOCK_SYS_CLOCK_1S / 1000),
+ CLOCK_SYS_CLOCK_1US = (CLOCK_SYS_CLOCK_1S / 1000000),
+};
+
+/* LED -----------------------------------------------------------------------*/
+#define GPIO_LED GPIO_PB0
+
+
+//////////////////////////// MODULE PM GPIO /////////////////////////////////
+#define GPIO_WAKEUP_MODULE GPIO_PB2 //mcu wakeup module
+#define PB2_FUNC AS_GPIO
+#define PB2_INPUT_ENABLE 1
+#define PB2_OUTPUT_ENABLE 0
+#define PB2_DATA_OUT 0
+#define GPIO_WAKEUP_MODULE_HIGH gpio_setup_up_down_resistor(GPIO_WAKEUP_MODULE, PM_PIN_PULLUP_10K);
+#define GPIO_WAKEUP_MODULE_LOW gpio_setup_up_down_resistor(GPIO_WAKEUP_MODULE, PM_PIN_PULLDOWN_100K);
+
+#define GPIO_WAKEUP_MCU GPIO_PB3 //module wakeup mcu
+#define PB3_FUNC AS_GPIO
+#define PB3_INPUT_ENABLE 1
+#define PB3_OUTPUT_ENABLE 1
+#define PB3_DATA_OUT 0
+#define GPIO_WAKEUP_MCU_HIGH do{gpio_set_output_en(GPIO_WAKEUP_MCU, 1); gpio_write(GPIO_WAKEUP_MCU, 1);}while(0)
+#define GPIO_WAKEUP_MCU_LOW do{gpio_set_output_en(GPIO_WAKEUP_MCU, 1); gpio_write(GPIO_WAKEUP_MCU, 0);}while(0)
+#define GPIO_WAKEUP_MCU_FLOAT do{gpio_set_output_en(GPIO_WAKEUP_MCU, 0); gpio_write(GPIO_WAKEUP_MCU, 0);}while(0)
+
+
+///////////////////////////////////// ATT HANDLER define ///////////////////////////////////////
+typedef enum
+{
+ ATT_H_START = 0,
+
+
+ //// Gap ////
+ /**********************************************************************************************/
+ GenericAccess_PS_H, //UUID: 2800, VALUE: uuid 1800
+ GenericAccess_DeviceName_CD_H, //UUID: 2803, VALUE: Prop: Read | Notify
+ GenericAccess_DeviceName_DP_H, //UUID: 2A00, VALUE: device name
+ GenericAccess_Appearance_CD_H, //UUID: 2803, VALUE: Prop: Read
+ GenericAccess_Appearance_DP_H, //UUID: 2A01, VALUE: appearance
+ CONN_PARAM_CD_H, //UUID: 2803, VALUE: Prop: Read
+ CONN_PARAM_DP_H, //UUID: 2A04, VALUE: connParameter
+
+
+ //// gatt ////
+ /**********************************************************************************************/
+ GenericAttribute_PS_H, //UUID: 2800, VALUE: uuid 1801
+ GenericAttribute_ServiceChanged_CD_H, //UUID: 2803, VALUE: Prop: Indicate
+ GenericAttribute_ServiceChanged_DP_H, //UUID: 2A05, VALUE: service change
+ GenericAttribute_ServiceChanged_CCB_H, //UUID: 2902, VALUE: serviceChangeCCC
+
+
+ //// device information ////
+ /**********************************************************************************************/
+ DeviceInformation_PS_H, //UUID: 2800, VALUE: uuid 180A
+ DeviceInformation_pnpID_CD_H, //UUID: 2803, VALUE: Prop: Read
+ DeviceInformation_pnpID_DP_H, //UUID: 2A50, VALUE: PnPtrs
+
+#if (TELIK_SPP_SERVICE_ENABLE)
+ //// SPP ////
+ /**********************************************************************************************/
+ SPP_PS_H, //UUID: 2800, VALUE: telink spp service uuid
+
+ //server to client
+ SPP_SERVER_TO_CLIENT_CD_H, //UUID: 2803, VALUE: Prop: read | Notify
+ SPP_SERVER_TO_CLIENT_DP_H, //UUID: telink spp s2c uuid, VALUE: SppDataServer2ClientData
+ SPP_SERVER_TO_CLIENT_CCB_H, //UUID: 2902, VALUE: SppDataServer2ClientDataCCC
+ SPP_SERVER_TO_CLIENT_DESC_H, //UUID: 2901, VALUE: TelinkSPPS2CDescriptor
+
+ //client to server
+ SPP_CLIENT_TO_SERVER_CD_H, //UUID: 2803, VALUE: Prop: read | write_without_rsp
+ SPP_CLIENT_TO_SERVER_DP_H, //UUID: telink spp c2s uuid, VALUE: SppDataClient2ServerData
+ SPP_CLIENT_TO_SERVER_DESC_H, //UUID: 2901, VALUE: TelinkSPPC2SDescriptor
+#endif
+ //// Ota ////
+ /**********************************************************************************************/
+ OTA_PS_H, //UUID: 2800, VALUE: telink ota service uuid
+ OTA_CMD_OUT_CD_H, //UUID: 2803, VALUE: Prop: read | write_without_rsp
+ OTA_CMD_OUT_DP_H, //UUID: telink ota uuid, VALUE: otaData
+ OTA_CMD_OUT_DESC_H, //UUID: 2901, VALUE: otaName
+
+ ATT_END_H,
+
+}ATT_HANDLE;
+
+
+/* Debug Interface -----------------------------------------------------------*/
+#define DEBUG_GPIO_ENABLE 0
+
+#if(DEBUG_GPIO_ENABLE)
+ #define PB2_FUNC AS_GPIO //debug gpio chn0 : PB2
+ #define PB3_FUNC AS_GPIO //debug gpio chn1 : PB3
+ #define PB4_FUNC AS_GPIO //debug gpio chn2 : PB4
+ #define PB5_FUNC AS_GPIO //debug gpio chn3 : PB5
+ #define PA6_FUNC AS_GPIO //debug gpio chn4 : PA6
+
+ #define PB2_INPUT_ENABLE 0
+ #define PB3_INPUT_ENABLE 0
+ #define PB4_INPUT_ENABLE 0
+ #define PB5_INPUT_ENABLE 0
+ #define PA6_INPUT_ENABLE 0
+
+ #define PB2_OUTPUT_ENABLE 1
+ #define PB3_OUTPUT_ENABLE 1
+ #define PB4_OUTPUT_ENABLE 1
+ #define PB5_OUTPUT_ENABLE 1
+ #define PA6_OUTPUT_ENABLE 1
+
+
+ #define DBG_CHN0_LOW ( *(unsigned char *)0x80058b &= (~(1<<2)) )
+ #define DBG_CHN0_HIGH ( *(unsigned char *)0x80058b |= (1<<2) )
+ #define DBG_CHN0_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<2) )
+
+ #define DBG_CHN1_LOW ( *(unsigned char *)0x80058b &= (~(1<<3)) )
+ #define DBG_CHN1_HIGH ( *(unsigned char *)0x80058b |= (1<<3) )
+ #define DBG_CHN1_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<3) )
+
+ #define DBG_CHN2_LOW ( *(unsigned char *)0x80058b &= (~(1<<4)) )
+ #define DBG_CHN2_HIGH ( *(unsigned char *)0x80058b |= (1<<4) )
+ #define DBG_CHN2_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<4) )
+
+ #define DBG_CHN3_LOW ( *(unsigned char *)0x80058b &= (~(1<<5)) )
+ #define DBG_CHN3_HIGH ( *(unsigned char *)0x80058b |= (1<<5) )
+ #define DBG_CHN3_TOGGLE ( *(unsigned char *)0x80058b ^= (1<<5) )
+
+ #define DBG_CHN4_LOW ( *(unsigned char *)0x800583 &= (~(1<<6)) )
+ #define DBG_CHN4_HIGH ( *(unsigned char *)0x800583 |= (1<<6) )
+ #define DBG_CHN4_TOGGLE ( *(unsigned char *)0x800583 ^= (1<<6) )
+#else
+ #define DBG_CHN0_LOW
+ #define DBG_CHN0_HIGH
+ #define DBG_CHN0_TOGGLE
+ #define DBG_CHN1_LOW
+ #define DBG_CHN1_HIGH
+ #define DBG_CHN1_TOGGLE
+ #define DBG_CHN2_LOW
+ #define DBG_CHN2_HIGH
+ #define DBG_CHN2_TOGGLE
+ #define DBG_CHN3_LOW
+ #define DBG_CHN3_HIGH
+ #define DBG_CHN3_TOGGLE
+ #define DBG_CHN4_LOW
+ #define DBG_CHN4_HIGH
+ #define DBG_CHN4_TOGGLE
+ #define DBG_CHN5_LOW
+ #define DBG_CHN5_HIGH
+ #define DBG_CHN5_TOGGLE
+
+#endif //end of DEBUG_GPIO_ENABLE
+
+
+
+
+
+
+
+
+
+
+/////////////////// set default ////////////////
+
+#include "../common/default_config.h"
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/battery_check.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/battery_check.c
new file mode 100644
index 0000000000000..70ff86b1e1ee3
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/battery_check.c
@@ -0,0 +1,152 @@
+/********************************************************************************************************
+ * @file battery_check.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "battery_check.h"
+#include "tl_common.h"
+#include "drivers.h"
+
+int adc_hw_initialized = 0;
+
+/**
+ * @Brief: Bubble sort.
+ * @Param: pData -> pointer point to data
+ * @Param: len -> lenght of data
+ * @Return: None.
+ */
+void bubble_sort(unsigned short *pData, unsigned int len)
+{
+ for(volatile int i = 0; i< len-1; i++)
+ {
+ for(volatile int j = 0; j pData[j+1])
+ {
+ unsigned short temp = pData[j];
+ pData[j] = pData[j+1];
+ pData[j+1] = temp;
+ }
+ }
+ }
+}
+
+int app_suspend_enter_low_battery (void)
+{
+ if (gpio_read(GPIO_WAKEUP_MODULE))
+ {
+ return 0;
+ }
+ return 1;
+}
+
+/**
+ * @Brief: Battery check.
+ * @Param: None.
+ * @Return: None.
+ */
+volatile signed short adcValue[BATTERY_SAMPLE_NUM];
+void battery_power_check(int minVol_mV)
+{
+
+ if(!adc_hw_initialized){
+ adc_hw_initialized = 1;
+ adc_init();
+ adc_vbat_init(BATTERY_CHECK_PIN);
+ }
+
+ adc_reset();
+ aif_reset(); ///refer to driver
+ adc_power_on(1);
+
+ //clear adcValue buffer
+ for(volatile int i=0; i> 2;
+
+ //////////////// adc sample data convert to voltage(mv) ////////////////
+ // (1180mV Vref, 1/8 scaler) (BIT<12~0> valid data)
+ // = adc_result * 1160 * 8 / 0x2000
+ // = adc_result * 4680 >>12
+ // = adc_result * 295 >>8
+ // u16 vol = (adcValueAvg * 1180 * 8)>>13;//Unit:mV; ���ڲο���ѹ����ʵ�ʵIJο���ѹΪ1.18V(Vref = 1.2V);*8 indicate 1/8 scaler
+ u16 vol;
+ if((adc_cal_value!=0xffff)&&(adc_cal_value != 0x0000)) //Already calibrated
+ {
+ vol = adcValueAvg*1000/adc_cal_value; //this used 1000mV calibrated value
+ }
+ else
+ {
+ vol = (adcValueAvg * 295)>>8; ////vol = (adcValueAvg * 1180 * 8)>>13;//Unit:mV; ���ڲο���ѹ����ʵ�ʵIJο���ѹΪ1.18V(Vref = 1.2V);*8 indicate 1/8 scaler
+ }
+
+ /* Low voltage processing. Enter deep sleep. */
+ if(vol < minVol_mV){
+
+ #if (1 && BLT_APP_LED_ENABLE) //led indicate
+ gpio_set_output_en(GPIO_LED, 1); //output enable
+ for(int k=0;k<3;k++){
+ gpio_write(GPIO_LED, 1);
+ sleep_us(200000);
+ gpio_write(GPIO_LED, 0);
+ sleep_us(200000);
+ }
+ gpio_set_output_en(GPIO_LED, 0);
+ #endif
+
+ GPIO_WAKEUP_MODULE_LOW;
+ bls_pm_registerFuncBeforeSuspend( &app_suspend_enter_low_battery );
+
+ analog_write(DEEP_ANA_REG2, BATTERY_VOL_LOW);
+ cpu_sleep_wakeup(PM_SLeepMode_Deep, PM_WAKEUP_PAD, 0);
+ }
+}
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/battery_check.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/battery_check.h
new file mode 100644
index 0000000000000..5c255d109d80b
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/battery_check.h
@@ -0,0 +1,37 @@
+/********************************************************************************************************
+ * @file battery_check.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef BATTERY_CHECK_H_
+#define BATTERY_CHECK_H_
+
+#include "drivers.h"
+
+#define BATTERY_CHECK_PIN GPIO_PA7 ///GPIO_PB3
+
+#define BATTERY_VOL_OK 0x00
+#define BATTERY_VOL_LOW 0x01
+
+#define BATTERY_VOL_MIN (2000)//Unit: mV
+#define BATTERY_SAMPLE_NUM 8 ///please make sure this value is x*8 (integer multiple of eight)
+
+void battery_power_check(int minVol_mV);
+
+#endif /* BATTERY_CHECK_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/main.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/main.c
new file mode 100644
index 0000000000000..c8224bed9c106
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/main.c
@@ -0,0 +1,96 @@
+/********************************************************************************************************
+ * @file main.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "app.h"
+#include
+#include "drivers.h"
+#include "stack/ble/ble.h"
+#include "../common/user_config.h"
+
+
+extern my_fifo_t spp_rx_fifo;
+
+_attribute_ram_code_ void irq_handler(void)
+{
+ irq_blt_sdk_handler();
+
+#if (HCI_ACCESS==HCI_USE_UART)
+ unsigned char irqS = dma_chn_irq_status_get();
+ if(irqS & FLD_DMA_CHN_UART_RX) //rx
+ {
+ dma_chn_irq_status_clr(FLD_DMA_CHN_UART_RX);
+
+ /////
+ u8* w = spp_rx_fifo.p + (spp_rx_fifo.wptr & (spp_rx_fifo.num-1)) * spp_rx_fifo.size;
+ if(w[0]!=0)
+ {
+ my_fifo_next(&spp_rx_fifo);
+ u8* p = spp_rx_fifo.p + (spp_rx_fifo.wptr & (spp_rx_fifo.num-1)) * spp_rx_fifo.size;
+ reg_dma_uart_rx_addr = (u16)((u32)p); //switch uart RX dma address
+ }
+ }
+
+ if(irqS & FLD_DMA_CHN_UART_TX) //tx
+ {
+ dma_chn_irq_status_clr(FLD_DMA_CHN_UART_TX);
+ }
+#endif
+}
+
+int main(void){
+
+ blc_pm_select_internal_32k_crystal();
+ //blc_pm_select_external_32k_crystal();
+
+ #if(FLASH_SIZE_OPTION == FLASH_SIZE_OPTION_128K) ///FLASH_SIZE_OPTION_128K
+ bls_ota_setFirmwareSizeAndOffset(48, 0x10000);///default : ota_firmware_size_k=128;ota_program_bootAddr=0x20000; it is for hawk 128K flash
+ bls_smp_configParingSecurityInfoStorageAddr(0x1C000);
+ #endif
+
+ cpu_wakeup_init();
+
+ #if (CLOCK_SYS_CLOCK_HZ == 16000000)
+ clock_init(SYS_CLK_16M_Crystal);
+ #elif (CLOCK_SYS_CLOCK_HZ == 32000000)
+ clock_init(SYS_CLK_32M_Crystal);
+ #elif (CLOCK_SYS_CLOCK_HZ == 48000000)
+ clock_init(SYS_CLK_48M_Crystal);
+ #endif
+
+ gpio_init();
+
+ /* load customized freq_offset CAP value and TP value.*/
+ blc_app_loadCustomizedParameters();
+
+ rf_drv_init(RF_MODE_BLE_1M);
+
+ user_init();
+
+ irq_enable();
+
+ while (1) {
+ #if (MODULE_WATCHDOG_ENABLE)
+ wd_clear(); //clear watch dog
+ #endif
+ main_loop ();
+ }
+}
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/spp.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/spp.c
new file mode 100644
index 0000000000000..fbf6b42192fd7
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/spp.c
@@ -0,0 +1,504 @@
+/********************************************************************************************************
+ * @file spp.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author public@telink-semi.com;
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "tl_common.h"
+#include "drivers.h"
+#include "stack/ble/ble.h"
+//#include
+
+#include "spp.h"
+
+
+extern int module_uart_send_flg;
+extern u32 module_wakeup_mcu_tick;
+
+extern my_fifo_t spp_rx_fifo;
+extern my_fifo_t spp_tx_fifo;
+extern void app_suspend_exit ();
+
+u8 pm_ctrl_flg;
+u8 pairing_end_status;
+///////////the code below is just for demonstration of the event callback only////////////
+
+u32 spp_cmd_restart_flag;
+
+u32 connected_start_tick = 0;
+extern u8 mtu_size_exchanged;
+
+int controller_event_handler(u32 h, u8 *para, int n)
+{
+
+ if((h&HCI_FLAG_EVENT_TLK_MODULE)!= 0) //module event
+ {
+
+ u8 event = (u8)(h&0xff);
+
+ u8 retPara[8] = {0};
+ spp_event_t *pEvt = (spp_event_t *)&retPara;
+ pEvt->token = 0xFF;
+ pEvt->paramLen = 2; //default 2(eventID), will change in specific cmd process
+ pEvt->eventId = 0x0780 + event;
+ pEvt->param[0] = BLE_SUCCESS; //default all success, will change in specific cmd process
+
+
+ switch(event)
+ {
+ case BLT_EV_FLAG_SCAN_RSP:
+ break;
+
+
+ case BLT_EV_FLAG_CONNECT:
+ {
+ bls_l2cap_requestConnParamUpdate (8, 12, 99, 400);
+
+ connected_start_tick = clock_time()|1;
+
+ spp_send_data(HCI_FLAG_EVENT_TLK_MODULE, pEvt);
+ }
+ break;
+
+
+ case BLT_EV_FLAG_TERMINATE:
+ {
+ connected_start_tick = 0;
+ mtu_size_exchanged = false;
+ spp_send_data(HCI_FLAG_EVENT_TLK_MODULE, pEvt);
+ }
+ break;
+
+ case BLT_EV_FLAG_GPIO_EARLY_WAKEUP:
+ break;
+
+ case BLT_EV_FLAG_CHN_MAP_REQ:
+ break;
+
+
+ case BLT_EV_FLAG_CONN_PARA_REQ:
+ {
+ //Slave received Master's LL_Connect_Update_Req pkt.
+ rf_packet_ll_updateConnPara_t p;
+ memcpy((u8*)&p.winSize, para, 11);
+
+// printf("Receive Master's LL_Connect_Update_Req pkt.\n");
+// printf("Connection interval:%dus.\n", p.interval*1250);
+ }
+ break;
+
+
+ case BLT_EV_FLAG_CHN_MAP_UPDATE:
+ {
+ spp_send_data(HCI_FLAG_EVENT_TLK_MODULE, pEvt);
+ }
+ break;
+
+
+ case BLT_EV_FLAG_CONN_PARA_UPDATE:
+ {
+ spp_send_data(HCI_FLAG_EVENT_TLK_MODULE, pEvt);
+
+ //Master send SIG_Connection_Param_Update_Rsp pkt,and the reply result is 0x0000. When connection event counter value is equal
+ //to the instant, a callback event BLT_EV_FLAG_CONN_PARA_UPDATE will generate. The connection interval at this time should be the
+ //currently updated and valid connection interval!
+// printf("Update param event occur.\n");
+// printf("Current Connection interval:%dus.\n", bls_ll_getConnectionInterval() * 1250);
+ }
+ break;
+
+
+ case BLT_EV_FLAG_ADV_DURATION_TIMEOUT:
+ break;
+
+
+ case BLT_EV_FLAG_SUSPEND_ENTER:
+ break;
+
+
+ case BLT_EV_FLAG_SUSPEND_EXIT:
+// app_suspend_exit ();
+ break;
+
+
+ default:
+ break;
+ }
+ }
+}
+
+#if 0 ///not support master
+int app_host_event_callback (u32 h, u8 *para, int n)
+{
+ u8 event = h & 0xFF;
+
+ switch(event)
+ {
+ case GAP_EVT_SMP_PARING_BEAGIN:
+ {
+
+ }
+ break;
+
+ case GAP_EVT_SMP_PARING_SUCCESS:
+ {
+ gap_smp_paringSuccessEvt_t* p = (gap_smp_paringSuccessEvt_t*)para;
+
+ if(p->bonding_result){
+
+ }
+ else{
+
+ }
+ }
+ break;
+
+ case GAP_EVT_SMP_PARING_FAIL:
+ {
+ gap_smp_paringFailEvt_t* p = (gap_smp_paringFailEvt_t*)para;
+ }
+ break;
+
+ case GAP_EVT_SMP_CONN_ENCRYPTION_DONE:
+ {
+ gap_smp_connEncDoneEvt_t* p = (gap_smp_connEncDoneEvt_t*)para;
+
+ if(p->re_connect == SMP_STANDARD_PAIR){ //first paring
+
+ }
+ else if(p->re_connect == SMP_FAST_CONNECT){ //auto connect
+
+ }
+ }
+ break;
+
+ case GAP_EVT_SMP_TK_DISPALY:
+ {
+ char pc[7];
+ u32 pinCode = *(u32*)para;
+ }
+ break;
+
+ case GAP_EVT_SMP_TK_REQUEST_PASSKEY:
+ {
+
+ }
+ break;
+
+ case GAP_EVT_SMP_TK_REQUEST_OOB:
+ {
+
+ }
+ break;
+
+ case GAP_EVT_SMP_TK_NUMERIC_COMPARE:
+ {
+ char pc[7];
+ u32 pinCode = *(u32*)para;
+ }
+ break;
+
+ default:
+ break;
+ }
+
+ return 0;
+}
+#endif
+
+/////////////////////////////////////blc_register_hci_handler for spp////////////////////////////
+int rx_from_uart_cb (void)//UART data send to Master,we will handler the data as CMD or DATA
+{
+ if(uart_is_parity_error()){
+ uart_clear_parity_error();
+ }
+ //////
+ u8 *p = my_fifo_get(&spp_rx_fifo);
+ if(p == NULL){
+ return 0;
+ }
+
+ //u8* p = my_fifo_get(&spp_rx_fifo);
+ u32 rx_len = p[0]; //usually <= 255 so 1 byte should be sufficient
+
+ if (rx_len)
+ {
+ bls_uart_handler(&p[4], rx_len - 4);///rx_len - 4 ??
+ *((u32*)p) = 0;//clear DMA length field for distributing Rx buffer of interrupt
+ my_fifo_pop(&spp_rx_fifo);
+ }
+
+ return 0;
+}
+
+///////////////////////////////////////////the default bls_uart_handler///////////////////////////////
+int bls_uart_handler (u8 *p, int n)
+{
+
+ spp_cmd_t *pCmd = (spp_cmd_t *)p;
+ u16 spp_cmd = pCmd->cmdId;
+ u8 *cmdPara = pCmd->param;
+
+
+ u8 retPara[20] = {0};
+ spp_event_t *pEvt = (spp_event_t *)&retPara;
+ pEvt->token = 0xFF;
+ pEvt->paramLen = 3; //default 2(eventID) + 1(status), will change in specific cmd process
+ pEvt->eventId = ((spp_cmd & 0x3ff) | 0x400);
+ pEvt->param[0] = BLE_SUCCESS; //default all success, will change in specific cmd process
+
+
+
+ // set advertising interval: 01 ff 02 00 50 00: 80 *0.625ms
+ if (spp_cmd == SPP_CMD_SET_ADV_INTV)
+ {
+ u8 interval = cmdPara[0] ;
+ pEvt->param[0] = bls_ll_setAdvInterval(interval, interval);
+ }
+ // set advertising data: 02 ff 06 00 01 02 03 04 05 06
+ else if (spp_cmd == SPP_CMD_SET_ADV_DATA)
+ {
+ pEvt->param[0] = (u8)bls_ll_setAdvData(cmdPara, pCmd->paramLen);
+ }
+ // enable/disable advertising: 0a ff 01 00 01
+ else if (spp_cmd == SPP_CMD_SET_ADV_ENABLE)
+ {
+ pEvt->param[0] = (u8)bls_ll_setAdvEnable(cmdPara[0]);
+ }
+ // send data: 0b ff 05 00 01 02 03 04 05
+ //change format to 0b ff 07 handle(2bytes) 00 01 02 03 04 05
+ else if (spp_cmd == 0xFF0B)
+ {
+
+ }
+ // get module available data buffer: 0c ff 00 00
+ else if (spp_cmd == SPP_CMD_GET_BUF_SIZE)
+ {
+ u8 r[4];
+ pEvt->param[0] = (u8)blc_hci_le_readBufferSize_cmd( (u8 *)(r) );
+ pEvt->param[1] = r[2];
+ pEvt->paramLen = 4; //eventID + param
+ }
+ // set advertising type: 0d ff 01 00 00
+ else if (spp_cmd == SPP_CMD_SET_ADV_TYPE)
+ {
+ pEvt->param[0] = bls_ll_setAdvType(cmdPara[0]);
+ }
+ // set advertising addr type: 0e ff 01 00 00
+ else if (spp_cmd == SPP_CMD_SET_ADV_ADDR_TYPE)
+ {
+ pEvt->param[0] = blt_set_adv_addrtype(cmdPara); //bls_ll_setAdvType
+ }
+ // set advertising direct initiator address & addr type: 0e ff 07 00 00(public; 1 for random) 01 02 03 04 05 06
+ else if (spp_cmd == SPP_CMD_SET_ADV_DIRECT_ADDR)
+ {
+ pEvt->param[0] = blt_set_adv_direct_init_addrtype(cmdPara);
+ }
+ // add white list entry: 0f ff 07 00 01 02 03 04 05 06
+ else if (spp_cmd == SPP_CMD_ADD_WHITE_LST_ENTRY)
+ {
+ pEvt->param[0] = (u8)ll_whiteList_add(cmdPara[0], cmdPara + 1);
+ }
+ // delete white list entry: 10 ff 07 00 01 02 03 04 05 06
+ else if (spp_cmd == SPP_CMD_DEL_WHITE_LST_ENTRY)
+ {
+ pEvt->param[0] = (u8)ll_whiteList_delete(cmdPara[0], cmdPara + 1);
+ }
+ // reset white list entry: 11 ff 00 00
+ else if (spp_cmd == SPP_CMD_RST_WHITE_LST)
+ {
+ pEvt->param[0] = (u8)ll_whiteList_reset();
+ }
+ // set filter policy: 12 ff 10 00 00(bit0: scan WL enable; bit1: connect WL enable)
+ else if (spp_cmd == SPP_CMD_SET_FLT_POLICY)
+ {
+ pEvt->param[0] = bls_ll_setAdvFilterPolicy(cmdPara[0]);
+ }
+ // set device name: 13 ff 0a 00 01 02 03 04 05 06 07 08 09 0a
+ else if (spp_cmd == SPP_CMD_SET_DEV_NAME)
+ {
+ pEvt->param[0] = bls_att_setDeviceName(cmdPara,p[2]);
+ }
+ // get connection parameter: 14 ff 00 00
+ else if (spp_cmd == SPP_CMD_GET_CONN_PARA)
+ {
+ u16 interval = bls_ll_getConnectionInterval();
+ u16 latency = bls_ll_getConnectionLatency();
+ u16 timeout = bls_ll_getConnectionTimeout();
+
+ if(interval){
+ pEvt->param[0] = BLE_SUCCESS;
+ pEvt->param[1] = interval&0xff;
+ pEvt->param[2] = interval>>8;
+ pEvt->param[3] = latency&0xff;
+ pEvt->param[4] = latency>>8;
+ pEvt->param[5] = timeout&0xff;
+ pEvt->param[6] = timeout>>8;
+ }
+ else{ //no connection
+ pEvt->param[0] = HCI_ERR_CONN_NOT_ESTABLISH; ///LL_ERR_CONNECTION_NOT_ESTABLISH;
+ }
+
+ pEvt->paramLen = 9; //eventID + param
+ }
+ // set connection parameter: 15 ff 08 00 a0 00 a2 00 00 00 2c 01 (min, max, latency, timeout)
+ else if (spp_cmd == SPP_CMD_SET_CONN_PARA)
+ {
+ u16 interval_min = cmdPara[0] | cmdPara[1]<<8;
+ u16 interval_max = cmdPara[2] | cmdPara[3]<<8;
+ u16 latency = cmdPara[4] | cmdPara[5]<<8;
+ u16 timeout = cmdPara[6] | cmdPara[7]<<8;
+
+ bls_l2cap_requestConnParamUpdate(interval_min, interval_max, latency, timeout);
+ }
+ // get module current work state: 16 ff 00 00
+ else if (spp_cmd == SPP_CMD_GET_CUR_STATE)
+ {
+ pEvt->param[1] = blc_ll_getCurrentState();
+ pEvt->paramLen = 4; //eventID + param
+ }
+ // terminate connection: 17 ff 00 00
+ else if (spp_cmd == SPP_CMD_TERMINATE)
+ {
+ bls_ll_terminateConnection(HCI_ERR_REMOTE_USER_TERM_CONN);
+ }
+ // restart module: 18 ff 00 00
+ else if (spp_cmd == SPP_CMD_RESTART_MOD)
+ {
+ spp_cmd_restart_flag = clock_time() | 1;
+ }
+ // enable/disable MAC binding function: 19 ff 01 00 00(disable, 01 enable)
+ else if (spp_cmd == 0x19)
+ {
+
+ }
+ // add MAC address to binding table: 1a ff 06 00 01 02 03 04 05 06
+ else if (spp_cmd == 0x1a)
+ {
+
+ }
+ // delete MAC address from binding table: 1b ff 06 00 01 02 03 04 05 06
+ else if (spp_cmd == 0x1b)
+ {
+
+ }
+ //change format to 1c ff 07 00 11 00 01 02 03 04 05
+ else if (spp_cmd == SPP_CMD_SEND_NOTIFY_DATA)
+ {
+ if (pCmd->paramLen > 42)
+ {
+ pEvt->param[0] = HCI_ERR_INVALID_HCI_CMD_PARAMS; //data too long
+ }
+ else
+ {
+ pEvt->param[0] = bls_att_pushNotifyData( cmdPara[0] | (cmdPara[1]<<8), cmdPara + 2, pCmd->paramLen - 2);//spp_cmd_t
+ }
+ }
+
+
+ spp_send_data (HCI_FLAG_EVENT_TLK_MODULE, pEvt);
+ return 0;
+}
+
+
+
+int spp_send_data (u32 header, spp_event_t * pEvt)
+{
+
+ u8 *p = my_fifo_wptr (&spp_tx_fifo);
+ if (!p || (pEvt->paramLen+4) >= spp_tx_fifo.size)
+ {
+ return -1;
+ }
+
+#if (BLE_MODULE_INDICATE_DATA_TO_MCU)
+ if(!module_uart_send_flg){ //UART idle, new data is sent
+ GPIO_WAKEUP_MCU_HIGH; //Notify MCU that there is data here
+ module_wakeup_mcu_tick = clock_time() | 1;
+ module_uart_send_flg = 1;
+ }
+#endif
+
+
+ int sppEvt_len = pEvt->paramLen + 2;
+ if (header & HCI_FLAG_EVENT_TLK_MODULE)
+ {
+ *p++ = sppEvt_len;
+ *p++ = sppEvt_len >> 8;
+ #if 1
+ memcpy (p, (u8 *)pEvt, pEvt->paramLen + 2);
+ p += pEvt->paramLen + 2;
+ #else
+ *p++ = pEvt->token;
+ *p++ = pEvt->paramLen;
+ *p++ = pEvt->eventId;
+ *p++ = pEvt->eventId>>8;
+ if(pEvt->paramLen - 2 > 0){
+ memcpy (p, pEvt->param, pEvt->paramLen - 2);
+ p += pEvt->paramLen - 2;
+ }
+ #endif
+ }
+
+ my_fifo_next (&spp_tx_fifo);
+ return 0;
+}
+
+uart_data_t T_txdata_buf;
+
+int tx_to_uart_cb (void)
+{
+ if(uart_is_parity_error()){
+ uart_clear_parity_error();
+ }
+ ////////
+ u8 *p = my_fifo_get (&spp_tx_fifo);
+ if (p && !uart_tx_is_busy ())
+ {
+ memcpy(&T_txdata_buf.data, p + 2, p[0]+p[1]*256);
+ T_txdata_buf.len = p[0]+p[1]*256 ;
+
+
+#if (BLE_MODULE_INDICATE_DATA_TO_MCU)
+ //If the MCU side is designed to have low power consumption and the module has data to pull up
+ //the GPIO_WAKEUP_MCU will only wake up the MCU, then you need to consider whether MCU needs a
+ //reply time T from wakeup to a stable receive UART data. If you need a response time of T, ch-
+ //ange the following 100US to the actual time required by user.
+ if(module_wakeup_mcu_tick){
+ while( !clock_time_exceed(module_wakeup_mcu_tick, 100) );
+ }
+#endif
+
+
+
+ if (uart_dma_send((u16 *)(&T_txdata_buf))) ///just send the data in DMA module.
+ {
+ my_fifo_pop (&spp_tx_fifo);
+ }
+ }
+ return 0;
+}
+
+
+void spp_restart_proc(void)
+{
+ //when received SPP_CMD_RESTART_MOD, leave 500ms(you can change this time) for moudle to send uart ack to host, then restart.
+ if(spp_cmd_restart_flag && clock_time_exceed(spp_cmd_restart_flag, 500000)){
+ cpu_sleep_wakeup(DEEPSLEEP_MODE, PM_WAKEUP_TIMER, clock_time() + 10000 * sys_tick_per_us);
+ }
+}
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/spp.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/spp.h
new file mode 100644
index 0000000000000..e1bb6773219db
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/5316_module/spp.h
@@ -0,0 +1,78 @@
+/********************************************************************************************************
+ * @file spp.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author public@telink-semi.com;
+ * @date Sep. 18, 2015
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+/*
+ * spp.h
+ *
+ * Created on: 2016-11-3
+ * Author: Administrator
+ */
+
+#ifndef SPP_H_
+#define SPP_H_
+
+
+#define SPP_CMD_SET_ADV_INTV 0xFF01
+#define SPP_CMD_SET_ADV_DATA 0xFF02
+
+#define SPP_CMD_SET_ADV_ENABLE 0xFF0A
+#define SPP_CMD_GET_BUF_SIZE 0xFF0C
+#define SPP_CMD_SET_ADV_TYPE 0xFF0D
+#define SPP_CMD_SET_ADV_ADDR_TYPE 0xFF0E
+#define SPP_CMD_ADD_WHITE_LST_ENTRY 0xFF0F
+#define SPP_CMD_DEL_WHITE_LST_ENTRY 0xFF10
+#define SPP_CMD_RST_WHITE_LST 0xFF11
+#define SPP_CMD_SET_FLT_POLICY 0xFF12
+#define SPP_CMD_SET_DEV_NAME 0xFF13
+#define SPP_CMD_GET_CONN_PARA 0xFF14
+#define SPP_CMD_SET_CONN_PARA 0xFF15
+#define SPP_CMD_GET_CUR_STATE 0xFF16
+#define SPP_CMD_TERMINATE 0xFF17
+#define SPP_CMD_RESTART_MOD 0xFF18
+#define SPP_CMD_SET_ADV_DIRECT_ADDR 0xFF19
+#define SPP_CMD_SEND_NOTIFY_DATA 0xFF1C
+
+
+
+typedef struct {
+ u16 cmdId;
+ u16 paramLen;
+ u8 param[0];
+} spp_cmd_t;
+
+
+typedef struct {
+ u8 token;
+ u8 paramLen;
+ u16 eventId;
+ u8 param[0];
+} spp_event_t;
+
+extern u32 connected_start_tick;
+
+int bls_uart_handler (u8 *p, int n);
+int spp_send_data (u32 header, spp_event_t * pEvt);
+
+void spp_restart_proc(void);
+
+int app_host_event_callback (u32 h, u8 *para, int n);
+
+#endif /* SPP_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_common.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_common.c
new file mode 100644
index 0000000000000..79972c6ac415c
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_common.c
@@ -0,0 +1,75 @@
+/********************************************************************************************************
+ * @file blt_common.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#include "tl_common.h"
+#include "drivers.h"
+
+
+/*
+ * VVWWXX38C1A4YYZZ
+ * public_mac: VVWWXX 38C1A4
+ * random_static_mac: VVWWXXYYZZ C0
+ */
+
+void blc_initMacAddress(int flash_addr, u8 *mac_public, u8 *mac_random_static)
+{
+// u8 mac_public[6] = {0x00, 0x00, 0x00, 0x38, 0xC1, 0xA4}; //company id: 0xA4C138
+// u8 mac_random_static[6] = {0x00, 0x00, 0x00, 0x00, 0x00, 0xC0};
+
+ u8 mac_read[8];
+ flash_read_page(flash_addr, 8, mac_read);
+
+ u8 value_rand[5];
+ generateRandomNum(5, value_rand);
+
+ u8 ff_six_byte[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+ if ( memcmp(mac_read, ff_six_byte, 6) ) {
+ memcpy(mac_public, mac_read, 6); //copy public address from flash
+ }
+ else{ //no public address on flash
+ mac_public[0] = value_rand[0];
+ mac_public[1] = value_rand[1];
+ mac_public[2] = value_rand[2];
+ mac_public[3] = 0x38; //company id: 0xA4C138
+ mac_public[4] = 0xC1;
+ mac_public[5] = 0xA4;
+
+ flash_write_page (flash_addr, 6, mac_public);
+ }
+
+ mac_random_static[0] = mac_public[0];
+ mac_random_static[1] = mac_public[1];
+ mac_random_static[2] = mac_public[2];
+ mac_random_static[5] = 0xC0; //for random static
+
+ u16 high_2_byte = (mac_read[6] | mac_read[7]<<8);
+ if(high_2_byte != 0xFFFF){
+ memcpy( (u8 *)(mac_random_static + 3), (u8 *)(mac_read + 6), 2);
+ }
+ else{
+ mac_random_static[3] = value_rand[3];
+ mac_random_static[4] = value_rand[4];
+
+ flash_write_page (flash_addr + 6, 2, (u8 *)(mac_random_static + 3) );
+ }
+}
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_common.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_common.h
new file mode 100644
index 0000000000000..aae2208b70865
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_common.h
@@ -0,0 +1,37 @@
+/********************************************************************************************************
+ * @file blt_common.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date Sep. 18, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#ifndef BLT_COMMON_H_
+#define BLT_COMMON_H_
+
+
+
+
+
+
+
+void blc_initMacAddress(int flash_addr, u8 *mac_public, u8 *mac_random_static);
+
+
+
+
+#endif /* BLT_COMMON_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_fw_sign.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_fw_sign.c
new file mode 100644
index 0000000000000..4874ecd56d8cb
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_fw_sign.c
@@ -0,0 +1,49 @@
+/********************************************************************************************************
+ * @file blt_fw_sign.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date June. 12, 2019
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#include "tl_common.h"
+#include "drivers.h"
+#include "blt_fw_sign.h"
+#include "stack/ble/blt_config.h"
+#include "proj_lib/firmware_encrypt.h"
+
+#if FIRMWARES_SIGNATURE_ENABLE
+
+void blt_firmware_signature_check(void)
+{
+ unsigned int flash_mid;
+ unsigned char flash_uid[16];
+ unsigned char signature_enc_key[16];
+ int flag = flash_read_mid_uid_with_check(&flash_mid, flash_uid);
+
+ if(flag==0){ //reading flash UID error
+ while(1);
+ }
+
+ firmware_encrypt_based_on_uid (flash_uid, signature_enc_key);
+
+ if(memcmp(signature_enc_key, (u8*)CUST_FIRMWARE_SIGNKEY_ADDR, 16)){ //signature not match
+ while(1); //user can change the code here to stop firmware running
+ }
+}
+
+#endif
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_fw_sign.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_fw_sign.h
new file mode 100644
index 0000000000000..7daba2844b1fe
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_fw_sign.h
@@ -0,0 +1,31 @@
+/********************************************************************************************************
+ * @file blt_fw_sign.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date June. 12, 2019
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#ifndef BLT_FW_SIGN_H_
+#define BLT_FW_SIGN_H_
+
+
+void blt_firmware_signature_check(void);
+
+
+
+#endif /* BLT_FW_SIGNATURE_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_led.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_led.c
new file mode 100644
index 0000000000000..eb52bcda7ea26
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_led.c
@@ -0,0 +1,103 @@
+/********************************************************************************************************
+ * @file blt_led.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#include "tl_common.h"
+#include "drivers.h"
+#include "../common/blt_led.h"
+
+device_led_t device_led;
+
+
+void device_led_on_off(u8 on)
+{
+ gpio_write( device_led.gpio_led, on^device_led.polar );
+ gpio_set_output_en(device_led.gpio_led,on);
+ device_led.isOn = on;
+}
+
+void device_led_init(u32 gpio,u8 polarity){ //polarity: 1 for high led on, 0 for low led on
+ device_led.gpio_led = gpio;
+ device_led.polar = !polarity;
+ gpio_set_func(device_led.gpio_led,AS_GPIO);
+ gpio_set_input_en(device_led.gpio_led,0);
+ gpio_set_output_en(device_led.gpio_led,0);
+
+ device_led_on_off(0);
+}
+
+int device_led_setup(led_cfg_t led_cfg)
+{
+ if( device_led.repeatCount && device_led.priority >= led_cfg.priority){
+ return 0; //new led event priority not higher than the not ongoing one
+ }
+ else{
+ device_led.onTime_ms = led_cfg.onTime_ms;
+ device_led.offTime_ms = led_cfg.offTime_ms;
+ device_led.repeatCount = led_cfg.repeatCount;
+ device_led.priority = led_cfg.priority;
+
+ if(led_cfg.repeatCount == 0xff){ //for long on/long off
+ device_led.repeatCount = 0;
+ }
+ else{ //process one of on/off Time is zero situation
+ if(!device_led.onTime_ms){ //onTime is zero
+ device_led.offTime_ms *= device_led.repeatCount;
+ device_led.repeatCount = 1;
+ }
+ else if(!device_led.offTime_ms){
+ device_led.onTime_ms *= device_led.repeatCount;
+ device_led.repeatCount = 1;
+ }
+ }
+
+ device_led.startTick = clock_time();
+ device_led_on_off(device_led.onTime_ms ? 1 : 0);
+
+ return 1;
+ }
+}
+
+void led_proc(void)
+{
+ if(device_led.isOn){
+ if(clock_time_exceed(device_led.startTick,(device_led.onTime_ms)*1000)){
+ device_led_on_off(0);
+ if(device_led.offTime_ms){ //offTime not zero
+ device_led.startTick += (device_led.onTime_ms * CLOCK_16M_SYS_TIMER_CLK_1MS);
+ }
+ else{
+ device_led.repeatCount = 0;
+ }
+ }
+ }
+ else{
+ if(clock_time_exceed(device_led.startTick,(device_led.offTime_ms)*1000)){
+ if(--device_led.repeatCount){
+ device_led_on_off(1);
+ device_led.startTick += (device_led.offTime_ms*CLOCK_16M_SYS_TIMER_CLK_1MS);
+ }
+ }
+ }
+}
+
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_led.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_led.h
new file mode 100644
index 0000000000000..5eac194368ea6
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_led.h
@@ -0,0 +1,69 @@
+/********************************************************************************************************
+ * @file blt_led.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef BLT_LED_H_
+#define BLT_LED_H_
+
+#include "tl_common.h"
+
+
+//led management
+typedef struct{
+ unsigned short onTime_ms;
+ unsigned short offTime_ms;
+
+ unsigned char repeatCount; //0xff special for long on(offTime_ms=0)/long off(onTime_ms=0)
+ unsigned char priority; //0x00 < 0x01 < 0x02 < 0x04 < 0x08 < 0x10 < 0x20 < 0x40 < 0x80
+} led_cfg_t;
+
+typedef struct {
+ unsigned char isOn;
+ unsigned char polar;
+ unsigned char repeatCount;
+ unsigned char priority;
+
+
+ unsigned short onTime_ms;
+ unsigned short offTime_ms;
+
+ unsigned int gpio_led;
+ unsigned int startTick;
+}device_led_t;
+
+extern device_led_t device_led;
+
+#define DEVICE_LED_BUSY (device_led.repeatCount)
+
+extern void led_proc(void);
+extern void device_led_init(u32 gpio,u8 polarity);
+int device_led_setup(led_cfg_t led_cfg);
+
+static inline void device_led_process(void)
+{
+ if(DEVICE_LED_BUSY){
+ led_proc();
+ }
+}
+
+
+
+
+#endif /* BLT_LED_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_soft_timer.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_soft_timer.c
new file mode 100644
index 0000000000000..907211c6d944c
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/blt_soft_timer.c
@@ -0,0 +1,209 @@
+/********************************************************************************************************
+ * @file blt_soft_timer.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#include
+#include "tl_common.h"
+#include "blt_soft_timer.h"
+
+
+#if (BLT_SOFTWARE_TIMER_ENABLE)
+
+
+
+
+blt_soft_timer_t blt_timer;
+
+/***
+ * ort timers by timing order, so that timers can be triggered sequentially
+ */
+int blt_soft_timer_sort(void)
+{
+ if(blt_timer.currentNum < 1 || blt_timer.currentNum > MAX_TIMER_NUM){
+ write_reg32(0x8000, 0x11111120); while(1); //debug ERR
+ return 0;
+ }
+ else{
+ //BubbleSort
+ int n = blt_timer.currentNum;
+ u8 temp[sizeof(blt_time_event_t)];
+
+ for(int i=0;i= MAX_TIMER_NUM){ //timer full
+ return 0;
+ }
+ else{
+ blt_timer.timer[blt_timer.currentNum].cb = func;
+ blt_timer.timer[blt_timer.currentNum].interval = interval_us * CLOCK_16M_SYS_TIMER_CLK_1US;
+ blt_timer.timer[blt_timer.currentNum].t = now + blt_timer.timer[blt_timer.currentNum].interval;
+ blt_timer.currentNum ++;
+
+ blt_soft_timer_sort();
+
+ bls_pm_setAppWakeupLowPower(blt_timer.timer[0].t, 1);
+
+ return 1;
+ }
+}
+
+
+/**
+ * when delete one soft timer, move forward the post soft timer.
+ * thus, we not need to re-sort.
+ */
+int blt_soft_timer_delete_by_index(u8 index)
+{
+ if(index >= blt_timer.currentNum){
+ write_reg32(0x8000, 0x11111121); while(1); //debug ERR
+ return 0;
+ }
+
+
+ for(int i=index; i t2 return 1
+#define TIME_COMPARE_BIG(t1,t2) ( (u32)((t1) - (t2)) < BIT(30) )
+
+
+#define BLT_TIMER_SAFE_MARGIN_PRE (CLOCK_16M_SYS_TIMER_CLK_1US<<7) //128 us
+#define BLT_TIMER_SAFE_MARGIN_POST (CLOCK_16M_SYS_TIMER_CLK_1S<<3) // 8S
+static int inline blt_is_timer_expired(u32 t, u32 now) {
+ return ((u32)(now + BLT_TIMER_SAFE_MARGIN_PRE - t) < BLT_TIMER_SAFE_MARGIN_POST);
+}
+
+
+
+
+typedef int (*blt_timer_callback_t)(void);
+
+
+
+
+typedef struct blt_time_event_t {
+ blt_timer_callback_t cb;
+ u32 t;
+ u32 interval;
+} blt_time_event_t;
+
+
+// timer table management
+typedef struct blt_soft_timer_t {
+ blt_time_event_t timer[MAX_TIMER_NUM]; //timer0 - timer3
+ u8 currentNum; //total valid timer num
+} blt_soft_timer_t;
+
+
+
+
+//////////////////////// USER INTERFACE ///////////////////////////////////
+//return 0 means Fail, others OK
+int blt_soft_timer_add(blt_timer_callback_t func, u32 interval_us);
+int blt_soft_timer_delete(blt_timer_callback_t func);
+
+
+
+
+//////////////////////// SOFT TIMER MANAGEMENT INTERFACE ///////////////////////////////////
+void blt_soft_timer_init(void);
+void blt_soft_timer_process(int type);
+int blt_soft_timer_delete_by_index(u8 index);
+
+
+int is_timer_expired(blt_timer_callback_t *e);
+
+
+#endif /* BLT_SOFT_TIMER_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/common/default_config.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/default_config.h
new file mode 100644
index 0000000000000..08863adcb6ebc
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/default_config.h
@@ -0,0 +1,130 @@
+/********************************************************************************************************
+ * @file default_config.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+
+#include "config.h"
+
+//////////// product Information //////////////////////////////
+#ifndef ID_VENDOR
+#define ID_VENDOR 0x248a // for report
+#endif
+#ifndef ID_PRODUCT_BASE
+#define ID_PRODUCT_BASE 0x8800
+#endif
+#ifndef STRING_VENDOR
+#define STRING_VENDOR L"Telink"
+#endif
+#ifndef STRING_PRODUCT
+#define STRING_PRODUCT L"2.4G Wireless Audio"
+#endif
+#ifndef STRING_SERIAL
+#define STRING_SERIAL L"TLSR8869"
+#endif
+
+
+
+//#ifndef MODULE_WATCHDOG_ENABLE
+//#define MODULE_WATCHDOG_ENABLE 0
+//#endif
+//
+//
+//
+//#ifndef WATCHDOG_INIT_TIMEOUT
+//#define WATCHDOG_INIT_TIMEOUT 200 // in ms
+//#endif
+
+
+
+
+/////////////////// USB /////////////////////////////////
+#ifndef IRQ_USB_PWDN_ENABLE
+#define IRQ_USB_PWDN_ENABLE 0
+#endif
+
+
+#ifndef USB_PRINTER_ENABLE
+#define USB_PRINTER_ENABLE 0
+#endif
+#ifndef USB_SPEAKER_ENABLE
+#define USB_SPEAKER_ENABLE 0
+#endif
+#ifndef USB_MIC_ENABLE
+#define USB_MIC_ENABLE 0
+#endif
+#ifndef USB_MOUSE_ENABLE
+#define USB_MOUSE_ENABLE 0
+#endif
+#ifndef USB_KEYBOARD_ENABLE
+#define USB_KEYBOARD_ENABLE 0
+#endif
+#ifndef USB_SOMATIC_ENABLE
+#define USB_SOMATIC_ENABLE 0
+#endif
+#ifndef USB_CUSTOM_HID_REPORT
+#define USB_CUSTOM_HID_REPORT 0
+#endif
+#ifndef USB_AUDIO_441K_ENABLE
+#define USB_AUDIO_441K_ENABLE 0
+#endif
+#ifndef USB_MASS_STORAGE_ENABLE
+#define USB_MASS_STORAGE_ENABLE 0
+#endif
+#ifndef MIC_CHANNLE_COUNT
+#define MIC_CHANNLE_COUNT 2
+#endif
+
+#ifndef USB_DESCRIPTER_CONFIGURATION_FOR_KM_DONGLE
+#define USB_DESCRIPTER_CONFIGURATION_FOR_KM_DONGLE 0
+#endif
+
+#ifndef USB_ID_AND_STRING_CUSTOM
+#define USB_ID_AND_STRING_CUSTOM 0
+#endif
+
+#define KEYBOARD_RESENT_MAX_CNT 3
+#define KEYBOARD_REPEAT_CHECK_TIME 300000 // in us
+#define KEYBOARD_REPEAT_INTERVAL 100000 // in us
+#define KEYBOARD_SCAN_INTERVAL 16000 // in us
+#define MOUSE_SCAN_INTERVAL 8000 // in us
+#define SOMATIC_SCAN_INTERVAL 8000
+
+#define USB_KEYBOARD_POLL_INTERVAL 10 // in ms USB_KEYBOARD_POLL_INTERVAL < KEYBOARD_SCAN_INTERVAL to ensure PC no missing key
+#define USB_MOUSE_POLL_INTERVAL 4 // in ms
+#define USB_SOMATIC_POLL_INTERVAL 8 // in ms
+
+#define USB_KEYBOARD_RELEASE_TIMEOUT (450000) // in us
+#define USB_MOUSE_RELEASE_TIMEOUT (200000) // in us
+#define USB_SOMATIC_RELEASE_TIMEOUT (200000) // in us
+
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/common/keyboard.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/keyboard.c
new file mode 100644
index 0000000000000..0a0b96f38db29
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/keyboard.c
@@ -0,0 +1,412 @@
+/********************************************************************************************************
+ * @file keyboard.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#include "tl_common.h"
+#include "drivers.h"
+#include "keyboard.h"
+
+
+
+#if (defined(KB_DRIVE_PINS) && defined(KB_SCAN_PINS))
+
+u16 drive_pins[] = KB_DRIVE_PINS;
+u16 scan_pins[] = KB_SCAN_PINS;
+
+#if (STUCK_KEY_PROCESS_ENABLE)
+unsigned char stuckKeyPress[ARRAY_SIZE(drive_pins)];
+#endif
+
+kb_data_t kb_event;
+kb_data_t kb_event_cache;
+unsigned char deepback_key_state;
+u32 deepback_key_tick;
+
+#ifndef SCAN_PIN_50K_PULLUP_ENABLE
+#define SCAN_PIN_50K_PULLUP_ENABLE 0
+#endif
+
+#ifndef KB_MAP_DEFAULT
+#define KB_MAP_DEFAULT 1
+#endif
+
+#ifndef KB_LINE_MODE
+#define KB_LINE_MODE 0
+#endif
+
+#ifndef KB_LINE_HIGH_VALID
+#define KB_LINE_HIGH_VALID 1
+#endif
+
+#ifndef KB_KEY_FLASH_PIN_MULTI_USE
+#define KB_KEY_FLASH_PIN_MULTI_USE 0
+#endif
+
+#ifndef KB_HAS_CTRL_KEYS
+#define KB_HAS_CTRL_KEYS 1
+#endif
+
+#ifndef KB_RM_GHOST_KEY_EN
+#define KB_RM_GHOST_KEY_EN 0
+#endif
+
+
+#ifndef KB_DRV_DELAY_TIME
+#define KB_DRV_DELAY_TIME 10
+#endif
+
+
+#if KB_REPEAT_KEY_ENABLE
+
+#ifndef KB_REPEAT_KEY_INTERVAL_MS
+#define KB_REPEAT_KEY_INTERVAL_MS 200
+#endif
+#ifndef KB_REPEAT_KEY_NUM
+#define KB_REPEAT_KEY_NUM 4
+#endif
+static const unsigned char kb_map_repeat[KB_REPEAT_KEY_NUM] = KB_MAP_REPEAT;
+
+repeatKey_t repeat_key = {
+ 0,
+ 0,
+ 0,
+ 0,
+ U32_MAX,
+};
+
+#endif
+
+#if KB_MODE_EXCHANGE
+
+combinationKey_t combination_key = {
+ 0,
+ 0,
+ 0,
+ 0,
+ U32_MAX,
+};
+
+#endif
+
+
+
+static const unsigned char kb_map_normal[ARRAY_SIZE(scan_pins)][ARRAY_SIZE(drive_pins)] = KB_MAP_NORMAL;
+
+
+
+u32 scan_pin_need;
+
+
+void kb_rmv_ghost_key(DTYPE_MATRIX * pressed_matrix){
+ DTYPE_MATRIX mix_final = 0;
+ foreach_arr(i, drive_pins){
+ for(int j = (i+1); j < ARRAY_SIZE(drive_pins); ++j){
+ DTYPE_MATRIX mix = (pressed_matrix[i] & pressed_matrix[j]);
+ // >=2 �����غ�, �Ǿ��� ghost key
+ //four or three key at "#" is pressed at the same time, should remove ghost key
+ if( mix && (!BIT_IS_POW2(mix) || (pressed_matrix[i] ^ pressed_matrix[j])) ){
+ // remove ghost keys
+ //pressed_matrix[i] &= ~mix;
+ //pressed_matrix[j] &= ~mix;
+ mix_final |= mix;
+ }
+ }
+ pressed_matrix[i] &= ~mix_final;
+ }
+}
+
+#if (LONG_PRESS_KEY_POWER_OPTIMIZE)
+int key_matrix_same_as_last_cnt = 0; //record key matrix no change cnt
+#endif
+
+unsigned int key_debounce_filter( DTYPE_MATRIX mtrx_cur[], u32 filt_en ){
+ u32 kc = 0;
+#if (LONG_PRESS_KEY_POWER_OPTIMIZE)
+ unsigned char matrix_differ = 0;
+#endif
+ static DTYPE_MATRIX mtrx_pre[ARRAY_SIZE(drive_pins)];
+ static DTYPE_MATRIX mtrx_last[ARRAY_SIZE(drive_pins)];
+ foreach_arr(i, drive_pins){
+ DTYPE_MATRIX mtrx_tmp = mtrx_cur[i];
+#if (STUCK_KEY_PROCESS_ENABLE)
+ stuckKeyPress[i] = mtrx_tmp ? 1 : 0;
+#endif
+ if( filt_en ){
+ //mtrx_cur[i] = (mtrx_last[i] ^ mtrx_tmp) ^ (mtrx_last[i] | mtrx_tmp); //key_matrix_pressed is valid when current and last value is the same
+ mtrx_cur[i] = ( ~mtrx_last[i] & (mtrx_pre[i] & mtrx_tmp) ) | ( mtrx_last[i] & (mtrx_pre[i] | mtrx_tmp) );
+ }
+ if ( mtrx_cur[i] != mtrx_last[i] ) {
+ kc = 1;
+ }
+#if (LONG_PRESS_KEY_POWER_OPTIMIZE)
+ if(mtrx_cur[i]^mtrx_pre[i]){ //when same, XOR value is 0
+ matrix_differ = 1;
+ }
+#endif
+ mtrx_pre[i] = mtrx_tmp;
+ mtrx_last[i] = mtrx_cur[i];
+ }
+
+#if (LONG_PRESS_KEY_POWER_OPTIMIZE)
+ if(matrix_differ){
+ key_matrix_same_as_last_cnt = 0;
+ }
+ else{
+ key_matrix_same_as_last_cnt++;
+ }
+#endif
+
+ return kc;
+}
+
+
+// input: pressed_matrix,
+// key_code: output keys array
+// key_max: max keys should be returned
+static inline void kb_remap_key_row(int drv_ind, DTYPE_MATRIX m, int key_max, kb_data_t *kb_data){
+ foreach_arr(i, scan_pins){
+ if(m & 0x01){
+ unsigned char kc = kb_map_normal[i][drv_ind];
+#if(KB_HAS_CTRL_KEYS)
+
+ if(kc >= VK_CTRL && kc <= VK_RWIN)
+ kb_data->ctrl_key |= BIT(kc - VK_CTRL);
+ //else if(kc == VK_MEDIA_END)
+ //lock_button_pressed = 1;
+ else if(VK_ZOOM_IN == kc || VK_ZOOM_OUT == kc){
+ kb_data->ctrl_key |= VK_MSK_LCTRL;
+ kb_data->keycode[kb_data->cnt++] = (VK_ZOOM_IN == kc)? VK_EQUAL : VK_MINUS;
+ }
+ else if(kc != VK_FN)//fix fn ghost bug
+ kb_data->keycode[kb_data->cnt++] = kc;
+
+#else
+ kb_data->keycode[kb_data->cnt++] = kc;
+#endif
+ if(kb_data->cnt >= key_max){
+ break;
+ }
+ }
+ m = m >> 1;
+ if(!m){
+ break;
+ }
+ }
+}
+
+static inline void kb_remap_key_code(DTYPE_MATRIX * pressed_matrix, int key_max, kb_data_t *kb_data, int numlock_status){
+
+ foreach_arr(i, drive_pins){
+ DTYPE_MATRIX m = pressed_matrix[i];
+ if(!m) continue;
+ kb_remap_key_row(i, m, key_max, kb_data);
+ if(kb_data->cnt >= key_max){
+ break;
+ }
+ }
+}
+
+
+u32 kb_scan_row(int drv_ind, unsigned char * gpio){
+ /*
+ * set as gpio mode if using spi flash pin
+ * */
+ unsigned char sr = irq_disable();
+#if (KB_KEY_FLASH_PIN_MULTI_USE)
+ MSPI_AS_GPIO;
+#endif
+
+#if(!KB_LINE_MODE)
+ u32 drv_pin = drive_pins[drv_ind];
+ gpio_write(drv_pin, KB_LINE_HIGH_VALID);
+ gpio_set_output_en(drv_pin, 1);
+#endif
+
+ DTYPE_MATRIX matrix = 0;
+ foreach_arr(j, scan_pins){
+ if(scan_pin_need & BIT(j)){
+ int key = !gpio_read_cache (scan_pins[j], gpio);
+ if(KB_LINE_HIGH_VALID != key) {
+ matrix |= (1 << j);
+ }
+ }
+ }
+ //sleep_us(KB_DRV_DELAY_TIME);
+ gpio_read_all (gpio);
+ /*
+ * set as spi mode if using spi flash pin
+ * */
+#if (KB_KEY_FLASH_PIN_MULTI_USE)
+ MSPI_AS_SPI;
+#endif
+
+#if(!KB_LINE_MODE)
+ //////// float drive pin ////////////////////////////
+ //sleep_us(KB_SCAN_DELAY_TIME);
+ gpio_write(drv_pin, 0);
+ gpio_set_output_en(drv_pin, 0);
+#endif
+
+ irq_restore(sr);
+ return matrix;
+}
+
+DTYPE_MATRIX matrix_buff[4][ARRAY_SIZE(drive_pins)];
+int matrix_wptr, matrix_rptr;
+
+
+u32 kb_key_pressed(unsigned char * gpio)
+{
+ foreach_arr(i,drive_pins){
+ gpio_write(drive_pins[i], KB_LINE_HIGH_VALID);
+ gpio_set_output_en(drive_pins[i], 1);
+ }
+ sleep_us (20);
+ gpio_read_all (gpio);
+
+ u32 ret = 0;
+ static unsigned char release_cnt = 0;
+ static u32 ret_last = 0;
+
+ foreach_arr(i,scan_pins){
+ if(KB_LINE_HIGH_VALID != !gpio_read_cache (scan_pins[i], gpio)){
+ ret |= (1 << i);
+ release_cnt = 6;
+ ret_last = ret;
+ }
+ //ret = ret && gpio_read(scan_pins[i]);
+ }
+ if(release_cnt){
+ ret = ret_last;
+ release_cnt--;
+ }
+ foreach_arr(i,drive_pins){
+ gpio_write(drive_pins[i], 0);
+ gpio_set_output_en(drive_pins[i], 0);
+ }
+ return ret;
+}
+
+u32 kb_scan_key_value (int numlock_status, int read_key,unsigned char * gpio)
+{
+ kb_event.cnt = 0;
+ kb_event.ctrl_key = 0;
+
+ DTYPE_MATRIX pressed_matrix[ARRAY_SIZE(drive_pins)] = {0};
+
+ kb_scan_row (0, gpio);
+ for (int i=0; i<=ARRAY_SIZE(drive_pins); i++) {
+ u32 r = kb_scan_row (i < ARRAY_SIZE(drive_pins) ? i : 0, gpio);
+ if (i) {
+ pressed_matrix[i - 1] = r;
+ }
+ }
+
+#if(KB_RM_GHOST_KEY_EN)
+ kb_rmv_ghost_key(&pressed_matrix[0]);
+#endif
+
+ u32 key_changed = key_debounce_filter( pressed_matrix, \
+ (numlock_status & KB_NUMLOCK_STATUS_POWERON) ? 0 : 1);
+#if KB_MODE_EXCHANGE
+ if(key_changed && (!combination_key.key_2p4g_ui_press_flg) && (!combination_key.key_ble_1m_ui_press_flg)
+ && (!combination_key.key_ble_2m_ui_press_flg)) {
+ combination_key.key_vaild_tick = clock_time();
+ }
+#endif
+#if (KB_REPEAT_KEY_ENABLE)
+ if(key_changed){
+ repeat_key.key_change_flg = KEY_CHANGE;
+ repeat_key.key_change_tick = clock_time();
+ }
+ else{
+ if(repeat_key.key_change_flg == KEY_CHANGE){
+ repeat_key.key_change_flg = KEY_SAME;
+ }
+
+ if( repeat_key.key_change_flg == KEY_SAME && repeat_key.key_repeat_flg && \
+ clock_time_exceed(repeat_key.key_change_tick,(KB_REPEAT_KEY_INTERVAL_MS-5)*1000)){
+ repeat_key.key_change_tick = clock_time();
+ key_changed = 1;
+ }
+ }
+#endif
+
+ ///////////////////////////////////////////////////////////////////
+ // insert buffer here
+ // key mapping requires NUMLOCK status
+ ///////////////////////////////////////////////////////////////////
+ DTYPE_MATRIX *pd;
+ if (key_changed) {
+ /////////// push to matrix buffer /////////////////////////
+ pd = matrix_buff[matrix_wptr&3];
+ for (int k=0; k 4 ) { //overwrite older data
+ matrix_rptr = (matrix_wptr - 4) & 7;
+ }
+ }
+
+ if (numlock_status & KB_NUMLOCK_STATUS_INVALID) {
+ return 1; //return empty key
+ }
+
+ ////////// read out //////////
+ if (matrix_wptr == matrix_rptr || !read_key) {
+ return 0; //buffer empty, no data
+ }
+ pd = matrix_buff[matrix_rptr&3];
+ matrix_rptr = (matrix_rptr + 1) & 7;
+
+ ///////////////////////////////////////////////////////////////////
+ kb_remap_key_code(pd, KB_RETURN_KEY_MAX, &kb_event, numlock_status);
+
+#if (KB_REPEAT_KEY_ENABLE)
+ if(repeat_key.key_change_flg == KEY_CHANGE){
+ repeat_key.key_repeat_flg = 0;
+
+ if(kb_event.cnt == 1){ //handle one key repeat only
+ for(int i=0;icnt || p->ctrl_key);
+}
+static inline void kb_set_key_invalid(kb_data_t *p){
+ p->cnt = p->ctrl_key = 0;
+}
+
+
+extern unsigned int kb_key_pressed(unsigned char * gpio);
+extern unsigned int kb_scan_key_value (int numlock_status, int read_key,unsigned char * gpio);
+
+extern unsigned int scan_pin_need;
+
+
+static inline unsigned int kb_scan_key (int numlock_status, int read_key) {
+ unsigned char gpio[8];
+
+#if(KEYSCAN_IRQ_TRIGGER_MODE)
+ static unsigned char key_not_released = 0;
+
+ if(numlock_status & KB_NUMLOCK_STATUS_POWERON){
+ key_not_released = 1;
+ }
+
+ if(reg_irq_src & FLD_IRQ_GPIO_EN){ //FLD_IRQ_GPIO_RISC2_EN
+ key_not_released = 1;
+ reg_irq_src = FLD_IRQ_GPIO_EN; //FLD_IRQ_GPIO_RISC2_EN
+ }
+ else{ //no key press
+ if(!key_not_released && !(numlock_status & KB_NUMLOCK_STATUS_POWERON)){
+ return 0;
+ }
+ }
+#endif
+
+ scan_pin_need = kb_key_pressed (gpio);
+ if(scan_pin_need){
+ return kb_scan_key_value(numlock_status,read_key,gpio);
+ }
+ else{
+#if (KB_REPEAT_KEY_ENABLE)
+ repeat_key.key_change_flg = KEY_NONE;
+#endif
+#if (KEYSCAN_IRQ_TRIGGER_MODE)
+ key_not_released = 0;
+#endif
+ return 0;
+ }
+}
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/common/rf_frame.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/rf_frame.h
new file mode 100644
index 0000000000000..a32e6143e2718
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/rf_frame.h
@@ -0,0 +1,240 @@
+/********************************************************************************************************
+ * @file rf_frame.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef _RF_FRAME_H_
+#define _RF_FRAME_H_
+#include "drivers.h"
+#include "keyboard.h"
+#include "tl_common.h"
+
+#define RF_PROTO_BYTE 0x51
+#define PIPE0_CODE 0x55556666
+#define PIPE1_CODE 0xaabbccdd
+
+
+
+#define MOUSE_FRAME_DATA_NUM 4
+
+typedef struct {
+ u8 btn;
+ s8 x;
+ s8 y;
+ s8 wheel;
+}mouse_data_t;
+
+
+
+enum{
+ PIPE_PARING = 0x00,
+ PIPE_MOUSE = 0x01,
+ PIPE_KEYBOARD = 0x02,
+ PIPE_AUDIO = 0x03,
+ PIPE_TOUCH = 0x04,
+ PIPE_RC = 0x05,
+};
+
+enum{
+ FRAME_TYPE_DEVICE = 0x00,
+ FRAME_TYPE_MOUSE = 0x01,
+ FRAME_TYPE_KEYBOARD = 0x02,
+ FRAME_TYPE_AUDIO = 0x03,
+ FRAME_TYPE_TOUCH = 0x04,
+ FRAME_TYPE_PARING = 0x10,
+
+ FRAME_TYPE_ACK = 0x80,
+ FRAME_TYPE_ACK_MOUSE = FRAME_TYPE_ACK | FRAME_TYPE_MOUSE,
+ FRAME_TYPE_ACK_KEYBOARD = FRAME_TYPE_ACK | FRAME_TYPE_KEYBOARD,
+ FRAME_TYPE_ACK_AUDIO = FRAME_TYPE_ACK | FRAME_TYPE_AUDIO,
+ FRAME_TYPE_ACK_TOUCH = FRAME_TYPE_ACK | FRAME_TYPE_TOUCH,
+ FRAME_TYPE_ACK_EMPTY = FRAME_TYPE_ACK | BIT(6),
+
+ FRAME_TYPE_DEBUG = 0x40,
+ FRAME_TYPE_MAX,
+};
+
+enum{
+ PKT_FLOW_CAL = BIT(0),
+ PKT_FLOW_SEARCH = BIT(2),
+ PKT_FLOW_ACK_REQ = BIT(3),
+ PKT_FLOW_PARING = BIT(4),
+ PKT_FLOW_TOKEN = BIT(6),
+ PKT_FLOW_DIR = BIT(7),
+};
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+
+ u8 rf_len;
+ u8 proto;
+ u8 flow;
+ u8 type;
+
+// u32 gid0; //pipe0 code, used as sync code for control pipe in hamster
+
+ u8 rssi;
+ u8 per;
+ u8 seq_no;
+ u8 rsvd;
+
+ u32 did;
+
+}rf_packet_pairing_t;
+
+typedef struct {
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+
+ u8 rf_len;
+ u8 proto;
+ u8 flow;
+ u8 type;
+
+// u32 gid; //pipe0 code, used as sync code for control pipe in hamster
+
+ u8 rssi;
+ u8 per;
+ u8 seq_no;
+ u8 pno;
+ u8 data[MOUSE_FRAME_DATA_NUM*sizeof(mouse_data_t)]; //now the data length is variable, if the previous no ACK, data will send again in next time
+
+}rf_packet_mouse_t;
+
+typedef struct {
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+
+ u8 rf_len;
+ u8 proto;
+ u8 flow;
+ u8 type;
+
+// u32 gid; //pipe0 code, used as sync code for control pipe in hamster
+
+ u8 rssi;
+ u8 per;
+ u8 seq_no;
+ u8 pno;
+
+// u32 did;
+
+ u8 data[sizeof(kb_data_t)]; //now the data length is variable, if the previous no ACK, data will send again in next time
+
+}rf_packet_keyboard_t;
+
+////////////////////////// host side ///////////////////////////////
+typedef struct{
+ u32 dma_len;
+
+ u8 rf_len;
+ u8 proto;
+ u8 flow;
+ u8 type;
+
+// u32 gid0;
+
+ u8 rssi;
+ u8 per;
+ u16 tick;
+
+ u8 chn;
+ u8 info0;
+ u8 info1;
+ u8 info2;
+
+ u32 gid1;
+ u32 did;
+
+}rf_packet_debug_t;
+
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+ u8 rf_len;
+ u8 proto;
+ u8 flow;
+ u8 type;
+
+// u32 gid0; //pipe0 code, used as sync code for control pipe in hamster
+
+ u8 rssi;
+ u8 per;
+ u16 tick;
+ u8 chn;
+}rf_ack_empty_t;
+
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+
+ u8 rf_len;
+ u8 proto;
+ u8 flow;
+ u8 type;
+
+// u32 gid0; //pipe0 code, used as sync code for control pipe in hamster
+
+ u8 rssi;
+ u8 per;
+ u16 tick;
+ u8 chn;
+ u8 info0;
+ u8 info1;
+ u8 info2;
+
+ u32 gid1; //pipe1 code, used as sync code for data pipe in hamster
+ u32 did;
+
+}rf_packet_ack_pairing_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+
+ u8 rf_len;
+ u8 proto;
+ u8 flow;
+ u8 type;
+
+// u32 gid; //pipe0 code, used as sync code for control pipe in hamster
+
+ u8 rssi;
+ u8 per;
+ u16 tick;
+ u8 chn;
+
+ u8 info;
+}rf_packet_ack_mouse_t;
+
+typedef struct{
+ u32 dma_len; //won't be a fixed number as previous, should adjust with the mouse package number
+
+ u8 rf_len;
+ u8 proto;
+ u8 flow;
+ u8 type;
+
+// u32 gid; //pipe0 code, used as sync code for control pipe in hamster
+
+ u8 rssi;
+ u8 per;
+ u16 tick;
+ u8 chn;
+ u8 status;
+}rf_packet_ack_keyboard_t;
+
+#endif /* LED_RF_FRAME_H_ */
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/common/user_config.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/user_config.h
new file mode 100644
index 0000000000000..601a4b3295b64
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/common/user_config.h
@@ -0,0 +1,43 @@
+/********************************************************************************************************
+ * @file user_config.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date May. 12, 2018
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+#if(__PROJECT_5316_BLE_REMOTE__)
+ #include "../5316_ble_remote/app_config.h"
+#elif(__PROJECT_5316_BLE_SAMPLE__)
+ #include "vendor/5316_ble_sample/app_config.h"
+#elif(__PROJECT_5316_DUAL_MODE__)
+ #include "../5316_dual_mode/app_config.h"
+#elif(__PROJECT_5316_HCI__)
+ #include "../5316_hci/app_config.h"
+#elif(__PROJECT_5316_MODULE__)
+ #include "../5316_module/app_config.h"
+#elif(__PROJECT_5316_DRIVER_TEST__)
+ #include "../5316_driver_test/app_config.h"
+#elif(__PROJECT_5316_FEATURE_TEST__)
+ #include "../5316_feature_test/app_config.h"
+#else
+ #include "../common/default_config.h"
+#endif
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/link_layer/rf_ll.c b/8232_BLE_SDK/ble_sdk_hawk/vendor/link_layer/rf_ll.c
new file mode 100644
index 0000000000000..eacc7da398405
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/link_layer/rf_ll.c
@@ -0,0 +1,222 @@
+/********************************************************************************************************
+ * @file rf_ll.c
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date August. 30, 2019
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#include "drivers.h"
+#include "rf_ll.h"
+#include "../common/rf_frame.h"
+
+#ifndef CHANNEL_SLOT_TIME
+#define CHANNEL_SLOT_TIME 8000
+#endif
+
+#define PKT_BUFF_SIZE 64
+
+#define LL_CHANNEL_SYNC_TH 2
+#define LL_CHANNEL_SEARCH_TH 60
+#define LL_CHANNEL_SEARCH_FLAG BIT(16)
+#define LL_NEXT_CHANNEL(c) ((c + 6) & 14)
+
+
+unsigned char rf_rx_buff[PKT_BUFF_SIZE*2] __attribute__((aligned(4)));
+
+u8 host_channel = 0;
+u8 chn_mask = 0x80;
+
+u32 ll_chn_mask = LL_CHANNEL_SEARCH_FLAG;
+int device_sync = 0;
+
+u8 device_channel;
+u8 ll_chn_sel;
+u8 ll_rssi;
+
+u16 ll_chn_tick;
+
+u32 ll_chn_rx_tick;
+u32 ll_clock_time;
+
+int rf_rx_wptr;
+
+unsigned int cpu_wakup_last_tick;
+volatile int device_ack_received = 0;
+
+extern rf_packet_pairing_t pkt_pairing;
+
+
+/////////////////////////////////////////////////////////////////////
+void rf_set_access_code_pairing(unsigned int code){ // for pairing
+ WRITE_REG32 (0x800408, 0x71 | (code & 0xffffff00));
+ WRITE_REG8 (0x80040c, code);
+}
+
+void rf_set_access_code_data(unsigned int code){ // for data
+ WRITE_REG32 (0x800408, 0x03 | (code & 0xffffff00));
+ WRITE_REG8 (0x80040c, code);
+}
+
+void rf_receiving_pipe_enble(u8 channel_mask)
+{
+ WRITE_REG8 (0x800407, channel_mask); // channel mask
+}
+
+u8 get_next_channel_with_mask(u32 mask, u8 chn)
+{
+ int chn_high = (mask >> 4) & 0x0f;
+
+ if (mask & LL_CHANNEL_SEARCH_FLAG) {
+ return LL_NEXT_CHANNEL (chn);
+ }
+ else if (chn_high != chn) {
+ ll_chn_sel = 1;
+ return chn_high;
+ }
+ else {
+ ll_chn_sel = 0;
+ return mask & 0x0f;
+ }
+}
+
+void ll_device_init (void)
+{
+ reg_dma_rf_rx_addr = (u16)(u32) (rf_rx_buff);
+ reg_dma2_ctrl = FLD_DMA_WR_MEM | (PKT_BUFF_SIZE>>4); // rf rx buffer enable & size
+ reg_dma_chn_irq_msk = 0;
+ reg_irq_mask |= FLD_IRQ_ZB_RT_EN; //enable RF & timer1 interrupt
+ reg_rf_irq_mask = FLD_RF_IRQ_RX | FLD_RF_IRQ_TX;
+}
+
+_attribute_ram_code_ void rf_send_packet (void* addr, unsigned short rx_waittime, unsigned char retry)
+{
+ analog_write (0x06, 0);
+ WRITE_REG8 (0x800f00, 0x80); // stop
+ WRITE_REG8 (0x800f14, retry); // number of retry
+ WRITE_REG16 (0x80050c, (unsigned short)((unsigned int)addr));
+ WRITE_REG16 (0x800f0a, rx_waittime);
+ WRITE_REG16 (0x800f00, 0x3f83);
+}
+
+_attribute_ram_code_ void irq_device_rx(void)
+{
+ static u32 irq_device_rx_no = 0;
+ u8 * raw_pkt = (u8 *) (rf_rx_buff + rf_rx_wptr * PKT_BUFF_SIZE);
+ rf_rx_wptr = (rf_rx_wptr + 1) & 1;
+ reg_dma_rf_rx_addr = (u16)(u32) (rf_rx_buff + rf_rx_wptr * PKT_BUFF_SIZE); //set next buffer
+
+ reg_rf_irq_status = FLD_RF_IRQ_RX;
+
+ if ( raw_pkt[0] >= 15 &&
+ RF_PACKET_2M_LENGTH_OK(raw_pkt) &&
+ RF_PACKET_CRC_OK(raw_pkt) ) {
+ DBG_CHN2_TOGGLE;
+ rf_packet_ack_pairing_t *p = (rf_packet_ack_pairing_t *)(raw_pkt + 8);
+ rf_set_tx_rx_off_auto_mode();
+ extern int rf_rx_process(u8 *);
+ if (rf_rx_process (raw_pkt) && ll_chn_tick != p->tick) {
+ ll_chn_tick = p->tick; //sync time
+#if 0
+ device_sync = 1;
+#endif
+ device_ack_received = 1;
+ ll_chn_mask = p->chn; //update channel
+ ll_chn_rx_tick = clock_time ();
+ ll_rssi = raw_pkt[4];
+ irq_device_rx_no++;
+ }
+ rf_set_channel (device_channel, RF_CHN_TABLE);
+ raw_pkt[0] = 1;
+ }
+}
+
+_attribute_ram_code_ void irq_device_tx(void)
+{
+ reg_rf_irq_status = FLD_RF_IRQ_TX;
+}
+
+_attribute_ram_code_ int device_send_packet (u8 * p, u32 timeout, int retry, int pairing_link)
+{
+ extern u32 cpu_wakup_last_tick;
+ while ( !clock_time_exceed (cpu_wakup_last_tick, 500) ); //delay to get stable pll clock
+
+
+ static u32 ack_miss_no;
+
+ device_ack_received = 0;
+ int i;
+ int step = 1;
+ if (device_sync)
+ step = retry + 1;
+ for (i=0; i<=retry; i += step) {
+ DBG_CHN3_TOGGLE;
+ rf_set_channel (device_channel, RF_CHN_TABLE);
+ u32 t = clock_time ();
+ rf_send_packet (p, 300, step - 1);
+ reg_rf_irq_status = 0xffff;
+
+ while ( !device_ack_received &&
+ !clock_time_exceed (t, timeout*step) &&
+ !(reg_rf_irq_status & (FLD_RF_IRX_RETRY_HIT | FLD_RF_IRX_CMD_DONE)) );
+
+ if (device_ack_received) {
+ ack_miss_no = 0;
+ break;
+ }
+ ack_miss_no ++;
+ if (ack_miss_no >= LL_CHANNEL_SEARCH_TH) {
+ device_sync = 0;
+ ll_chn_mask = LL_CHANNEL_SEARCH_FLAG;
+ }
+ else if (ack_miss_no >= LL_CHANNEL_SYNC_TH) {
+ device_sync = 0;
+ }
+
+ if (!device_sync) { //alternate channel while device not in sync mode
+ device_channel = get_next_channel_with_mask (ll_chn_mask, device_channel);
+ }
+ }
+
+ analog_write (0x06, 0xff);
+
+ if (i <= retry) {
+ return 1;
+ }
+ else{
+ return 0;
+ }
+}
+
+void ll_add_clock_time (u32 ms)
+{
+ if (ms > CHANNEL_SLOT_TIME * 8) {
+ device_sync = 0;
+ ll_clock_time = 0;
+ }
+ else {
+ ll_clock_time += ms;
+ while (ll_clock_time >= CHANNEL_SLOT_TIME) {
+ ll_clock_time -= CHANNEL_SLOT_TIME;
+ device_channel = get_next_channel_with_mask (ll_chn_mask, device_channel);
+ }
+ }
+
+}
+
+
+
+
diff --git a/8232_BLE_SDK/ble_sdk_hawk/vendor/link_layer/rf_ll.h b/8232_BLE_SDK/ble_sdk_hawk/vendor/link_layer/rf_ll.h
new file mode 100644
index 0000000000000..f5f374eeaffa3
--- /dev/null
+++ b/8232_BLE_SDK/ble_sdk_hawk/vendor/link_layer/rf_ll.h
@@ -0,0 +1,40 @@
+/********************************************************************************************************
+ * @file rf_ll.h
+ *
+ * @brief for TLSR chips
+ *
+ * @author BLE Group
+ * @date August. 30, 2019
+ *
+ * @par Copyright (c) Telink Semiconductor (Shanghai) Co., Ltd.
+ * All rights reserved.
+ *
+ * The information contained herein is confidential and proprietary property of Telink
+ * Semiconductor (Shanghai) Co., Ltd. and is available under the terms
+ * of Commercial License Agreement between Telink Semiconductor (Shanghai)
+ * Co., Ltd. and the licensee in separate contract or the terms described here-in.
+ * This heading MUST NOT be removed from this file.
+ *
+ * Licensees are granted free, non-transferable use of the information in this
+ * file under Mutual Non-Disclosure Agreement. NO WARRENTY of ANY KIND is provided.
+ *
+ *******************************************************************************************************/
+#ifndef RF_LL_H_
+#define RF_LL_H_
+
+u8 get_next_channel_with_mask(u32 mask, u8 chn);
+void rf_set_access_code_pairing(unsigned int code);
+void rf_set_access_code_data(unsigned int code);
+void rf_receiving_pipe_enble(u8 channel_mask);
+void rf_send_packet (void* addr, unsigned short rx_waittime, unsigned char retry);
+
+void irq_device_rx(void);
+void irq_device_tx(void);
+void ll_device_init (void);
+void ll_add_clock_time (u32 ms);
+int device_send_packet (u8 * p, u32 timeout, int retry, int pairing_link);
+
+extern int device_sync;
+extern unsigned int cpu_wakup_last_tick;
+
+#endif /* RF_LL_H_ */
diff --git a/ports/tc32/Makefile b/ports/tc32/Makefile
index 0c2ca4ffe6347..dc9b5d501c70c 100644
--- a/ports/tc32/Makefile
+++ b/ports/tc32/Makefile
@@ -3,8 +3,10 @@ include ../../py/mkenv.mk
BOARD ?= LT716
BOARD_DIR ?= boards/$(BOARD)
-TC32_HOME = /opt/pkg/tc32
-TC32_SDK = $(HOME)/src/8232_BLE_SDK/ble_sdk_hawk
+#TC32_HOME = /mnt/c/Users/ccaso/Documents/mygithub/stellar-L3N-etag/Firmware/tc32_linux
+#TC32_SDK = /mnt/c/Users/ccaso/Documents/mygithub/TSLR-Micropython/8232_BLE_SDK/ble_sdk_hawk
+TC32_HOME = $(HOME)/mygithub/stellar-L3N-etag/Firmware/tc32_linux
+TC32_SDK = $(HOME)/mygithub/TSLR-Micropython/8232_BLE_SDK/ble_sdk_hawk
CROSS_COMPILE = $(TC32_HOME)/bin/tc32-elf-
diff --git a/ports/tc32/makeit.sh b/ports/tc32/makeit.sh
new file mode 100644
index 0000000000000..c2c1494fa9b9e
--- /dev/null
+++ b/ports/tc32/makeit.sh
@@ -0,0 +1,6 @@
+ln /mnt/c/Users/ccaso/Documents/mygithub/ $HOME/mygithub
+cd $HOME/mygithub/TSLR-Micropython/ports/tc32
+export SDK_PATH=$HOME/mygithub/TSLR-Micropython/8232_BLE_SDK
+export COMPILER_PATH=$HOME/mygithub/stellar-L3N-etag/Firmware/tc32_linux
+make TC32_HOME=$COMPILER_PATH TC32SDK=$SDK_PATH/ble_sdk_hawk -j $(nproc)
+