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Commits on Apr 18, 2025

• SystemVerilog: --initial-zero

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Commits on Apr 15, 2025

• Merge pull request #1063 from diffblue/verilog-const

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• Merge pull request #1065 from diffblue/nexttime-to-ltl

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• Merge pull request #1064 from diffblue/smv-netlist-not-translated

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Commits on Apr 14, 2025

• translate s_always and ranged always into LTL

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• netlists: include properties that are not translated in map

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Commits on Apr 13, 2025

• SystemVerilog: const

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Commits on Apr 11, 2025

• Merge pull request #1061 from diffblue/smv-false-R-x

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• simplify false R ψ to G ψ

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• Merge pull request #1060 from diffblue/smv-lower

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• Merge pull request #1062 from diffblue/sva_sequence_property_expr_baset

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• sva_sequence_property_expr_baset

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Commits on Apr 10, 2025

• SMV: add a lowering pass

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Commits on Apr 9, 2025

• Merge pull request #1058 from diffblue/smv_netlist2

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• smv-netlist: use expr2smv for property

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• smv_netlist: cleanup

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• Merge pull request #1051 from diffblue/SVA_to_LTL

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• SMV netlist: translate some SVA to LTL

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Commits on Apr 8, 2025

• Merge pull request #1059 from diffblue/expr2smv-typecast

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• SMV: convert typecast expressions

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• Merge pull request #1057 from diffblue/LTL-to-CTL

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• Merge pull request #1056 from diffblue/smv_netlist

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• LTL to CTL conversion

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• extract code for outputting netlists as SMV

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• Merge pull request #1054 from diffblue/expr2smvt-resultt

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• Merge pull request #1049 from diffblue/sva-weak-strong

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• Merge pull request #1052 from diffblue/netlist-expr

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• SVA: sequence property expressions

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• Merge pull request #1053 from diffblue/expr2smv_class_h

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• Merge pull request #1055 from diffblue/expr2verilog-block-limit

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Commits on Apr 7, 2025

• Verilog: work around VS's block nesting limit

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• introduce expr2smvt::resultt

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• extract expr2smvt into a separate header file

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• netlists can now track properties with arbitrary shapes

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Commits on Apr 6, 2025

• Merge pull request #1041 from diffblue/verilog_sva_sequence

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