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IDF release/v5.1 5d78511eac
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117 files changed

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‎esp32/dio_qspi/include/sdkconfig.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1081,5 +1081,5 @@
10811081
#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
10821082
#define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
10831083
#define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
1084-
#define CONFIG_ARDUINO_IDF_COMMIT "25876e8f49"
1084+
#define CONFIG_ARDUINO_IDF_COMMIT "5d78511eac"
10851085
#define CONFIG_ARDUINO_IDF_BRANCH "release/v5.1"

‎esp32/flags/defines

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
-DESP_PLATFORM -DIDF_VER=\"v5.1-554-g25876e8f49\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1 -DTF_LITE_STATIC_MEMORY
1+
-DESP_PLATFORM -DIDF_VER=\"v5.1-562-g5d78511eac\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1 -DTF_LITE_STATIC_MEMORY

‎esp32/include/hal/esp32/include/hal/spi_ll.h

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -41,6 +41,7 @@ extern "C" {
4141

4242
#define SPI_LL_DMA_MAX_BIT_LEN (1 << 24) //reg len: 24 bits
4343
#define SPI_LL_CPU_MAX_BIT_LEN (16 * 32) //Fifo len: 16 words
44+
#define SPI_LL_MOSI_FREE_LEVEL 0 //Default level after bus initialized
4445

4546
/**
4647
* The data structure holding calculated clock configuration. Since the
@@ -123,21 +124,21 @@ static inline bool spi_ll_usr_is_done(spi_dev_t *hw)
123124
}
124125

125126
/**
126-
* Trigger start of user-defined transaction for master.
127+
* Apply the register configurations and wait until it's done
127128
*
128129
* @param hw Beginning address of the peripheral registers.
129130
*/
130-
static inline void spi_ll_master_user_start(spi_dev_t *hw)
131+
static inline void spi_ll_apply_config(spi_dev_t *hw)
131132
{
132-
hw->cmd.usr = 1;
133+
// 32 don't need this option
133134
}
134135

135136
/**
136-
* Trigger start of user-defined transaction for slave.
137+
* Trigger start of user-defined transaction.
137138
*
138139
* @param hw Beginning address of the peripheral registers.
139140
*/
140-
static inline void spi_ll_slave_user_start(spi_dev_t *hw)
141+
static inline void spi_ll_user_start(spi_dev_t *hw)
141142
{
142143
hw->cmd.usr = 1;
143144
}

‎esp32/lib/libcore.a

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‎esp32/lib/libdriver.a

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‎esp32/lib/libesp_app_format.a

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‎esp32/lib/libesp_system.a

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‎esp32/lib/libespnow.a

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‎esp32/lib/libhal.a

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‎esp32/lib/libmesh.a

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‎esp32/lib/libnet80211.a

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‎esp32/lib/libpp.a

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‎esp32/lib/libsmartconfig.a

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‎esp32/lib/libwapi.a

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‎esp32/platformio-build.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -369,7 +369,7 @@
369369

370370
CPPDEFINES=[
371371
"ESP_PLATFORM",
372-
("IDF_VER", '\\"v5.1-554-g25876e8f49\\"'),
372+
("IDF_VER", '\\"v5.1-562-g5d78511eac\\"'),
373373
("MBEDTLS_CONFIG_FILE", '\\"mbedtls/esp_config.h\\"'),
374374
("SOC_MMU_PAGE_SIZE", 'CONFIG_MMU_PAGE_SIZE'),
375375
"UNITY_INCLUDE_CONFIG_H",

‎esp32/qio_qspi/include/sdkconfig.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1081,5 +1081,5 @@
10811081
#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
10821082
#define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
10831083
#define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
1084-
#define CONFIG_ARDUINO_IDF_COMMIT "25876e8f49"
1084+
#define CONFIG_ARDUINO_IDF_COMMIT "5d78511eac"
10851085
#define CONFIG_ARDUINO_IDF_BRANCH "release/v5.1"

‎esp32c3/dio_qspi/include/sdkconfig.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1108,5 +1108,5 @@
11081108
#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
11091109
#define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
11101110
#define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
1111-
#define CONFIG_ARDUINO_IDF_COMMIT "25876e8f49"
1111+
#define CONFIG_ARDUINO_IDF_COMMIT "5d78511eac"
11121112
#define CONFIG_ARDUINO_IDF_BRANCH "release/v5.1"

‎esp32c3/flags/defines

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
-DESP_PLATFORM -DIDF_VER=\"v5.1-554-g25876e8f49\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1 -DTF_LITE_STATIC_MEMORY
1+
-DESP_PLATFORM -DIDF_VER=\"v5.1-562-g5d78511eac\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1 -DTF_LITE_STATIC_MEMORY

‎esp32c3/include/hal/esp32c3/include/hal/spi_ll.h

Lines changed: 22 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -40,6 +40,7 @@ extern "C" {
4040

4141
#define SPI_LL_DMA_MAX_BIT_LEN (1 << 18) //reg len: 18 bits
4242
#define SPI_LL_CPU_MAX_BIT_LEN (16 * 32) //Fifo len: 16 words
43+
#define SPI_LL_MOSI_FREE_LEVEL 1 //Default level after bus initialized
4344

4445
/**
4546
* The data structure holding calculated clock configuration. Since the
@@ -186,36 +187,44 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw)
186187
}
187188

188189
/**
189-
* Check whether user-defined transaction is done.
190+
* Determine and unify the default level of mosi line when bus free
190191
*
191192
* @param hw Beginning address of the peripheral registers.
192-
*
193-
* @return True if transaction is done, otherwise false.
194193
*/
195-
static inline bool spi_ll_usr_is_done(spi_dev_t *hw)
194+
static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level)
196195
{
197-
return hw->dma_int_raw.trans_done;
196+
hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state
198197
}
199198

200199
/**
201-
* Trigger start of user-defined transaction for master.
202-
* The synchronization between two clock domains is required in ESP32-S3
200+
* Apply the register configurations and wait until it's done
203201
*
204202
* @param hw Beginning address of the peripheral registers.
205203
*/
206-
static inline void spi_ll_master_user_start(spi_dev_t *hw)
204+
static inline void spi_ll_apply_config(spi_dev_t *hw)
207205
{
208206
hw->cmd.update = 1;
209-
while (hw->cmd.update);
210-
hw->cmd.usr = 1;
207+
while (hw->cmd.update); //waiting config applied
208+
}
209+
210+
/**
211+
* Check whether user-defined transaction is done.
212+
*
213+
* @param hw Beginning address of the peripheral registers.
214+
*
215+
* @return True if transaction is done, otherwise false.
216+
*/
217+
static inline bool spi_ll_usr_is_done(spi_dev_t *hw)
218+
{
219+
return hw->dma_int_raw.trans_done;
211220
}
212221

213222
/**
214-
* Trigger start of user-defined transaction for slave.
223+
* Trigger start of user-defined transaction.
215224
*
216225
* @param hw Beginning address of the peripheral registers.
217226
*/
218-
static inline void spi_ll_slave_user_start(spi_dev_t *hw)
227+
static inline void spi_ll_user_start(spi_dev_t *hw)
219228
{
220229
hw->cmd.usr = 1;
221230
}

‎esp32c3/lib/libcore.a

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‎esp32c3/lib/libdriver.a

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‎esp32c3/lib/libesp_app_format.a

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‎esp32c3/lib/libesp_lcd.a

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‎esp32c3/lib/libesp_system.a

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‎esp32c3/lib/libespnow.a

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‎esp32c3/lib/libhal.a

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‎esp32c3/lib/libmesh.a

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‎esp32c3/lib/libnet80211.a

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‎esp32c3/lib/libpp.a

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‎esp32c3/lib/libsmartconfig.a

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‎esp32c3/lib/libwapi.a

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‎esp32c3/platformio-build.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -359,7 +359,7 @@
359359

360360
CPPDEFINES=[
361361
"ESP_PLATFORM",
362-
("IDF_VER", '\\"v5.1-554-g25876e8f49\\"'),
362+
("IDF_VER", '\\"v5.1-562-g5d78511eac\\"'),
363363
("MBEDTLS_CONFIG_FILE", '\\"mbedtls/esp_config.h\\"'),
364364
("SOC_MMU_PAGE_SIZE", 'CONFIG_MMU_PAGE_SIZE'),
365365
"UNITY_INCLUDE_CONFIG_H",

‎esp32c3/qio_qspi/include/sdkconfig.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1108,5 +1108,5 @@
11081108
#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
11091109
#define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
11101110
#define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
1111-
#define CONFIG_ARDUINO_IDF_COMMIT "25876e8f49"
1111+
#define CONFIG_ARDUINO_IDF_COMMIT "5d78511eac"
11121112
#define CONFIG_ARDUINO_IDF_BRANCH "release/v5.1"

‎esp32c6/dio_qspi/include/sdkconfig.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1181,5 +1181,5 @@
11811181
#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
11821182
#define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
11831183
#define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
1184-
#define CONFIG_ARDUINO_IDF_COMMIT "25876e8f49"
1184+
#define CONFIG_ARDUINO_IDF_COMMIT "5d78511eac"
11851185
#define CONFIG_ARDUINO_IDF_BRANCH "release/v5.1"

‎esp32c6/flags/defines

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
-DESP_PLATFORM -DIDF_VER=\"v5.1-554-g25876e8f49\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1 -DTF_LITE_STATIC_MEMORY
1+
-DESP_PLATFORM -DIDF_VER=\"v5.1-562-g5d78511eac\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1 -DTF_LITE_STATIC_MEMORY

‎esp32c6/include/hal/esp32c6/include/hal/spi_ll.h

Lines changed: 21 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,7 @@ extern "C" {
4141

4242
#define SPI_LL_DMA_MAX_BIT_LEN (1 << 18) //reg len: 18 bits
4343
#define SPI_LL_CPU_MAX_BIT_LEN (16 * 32) //Fifo len: 16 words
44+
#define SPI_LL_MOSI_FREE_LEVEL 1 //Default level after bus initialized
4445

4546
/**
4647
* The data structure holding calculated clock configuration. Since the
@@ -190,36 +191,44 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw)
190191
}
191192

192193
/**
193-
* Check whether user-defined transaction is done.
194+
* Determine and unify the default level of mosi line when bus free
194195
*
195196
* @param hw Beginning address of the peripheral registers.
196-
*
197-
* @return True if transaction is done, otherwise false.
198197
*/
199-
static inline bool spi_ll_usr_is_done(spi_dev_t *hw)
198+
static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level)
200199
{
201-
return hw->dma_int_raw.trans_done;
200+
hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state
202201
}
203202

204203
/**
205-
* Trigger start of user-defined transaction for master.
206-
* The synchronization between two clock domains is required in ESP32-S3
204+
* Apply the register configurations and wait until it's done
207205
*
208206
* @param hw Beginning address of the peripheral registers.
209207
*/
210-
static inline void spi_ll_master_user_start(spi_dev_t *hw)
208+
static inline void spi_ll_apply_config(spi_dev_t *hw)
211209
{
212210
hw->cmd.update = 1;
213-
while (hw->cmd.update);
214-
hw->cmd.usr = 1;
211+
while (hw->cmd.update); //waiting config applied
212+
}
213+
214+
/**
215+
* Check whether user-defined transaction is done.
216+
*
217+
* @param hw Beginning address of the peripheral registers.
218+
*
219+
* @return True if transaction is done, otherwise false.
220+
*/
221+
static inline bool spi_ll_usr_is_done(spi_dev_t *hw)
222+
{
223+
return hw->dma_int_raw.trans_done;
215224
}
216225

217226
/**
218-
* Trigger start of user-defined transaction for slave.
227+
* Trigger start of user-defined transaction.
219228
*
220229
* @param hw Beginning address of the peripheral registers.
221230
*/
222-
static inline void spi_ll_slave_user_start(spi_dev_t *hw)
231+
static inline void spi_ll_user_start(spi_dev_t *hw)
223232
{
224233
hw->cmd.usr = 1;
225234
}

‎esp32c6/lib/libcore.a

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‎esp32c6/lib/libdriver.a

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‎esp32c6/lib/libesp_app_format.a

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‎esp32c6/lib/libesp_hw_support.a

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‎esp32c6/lib/libesp_lcd.a

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‎esp32c6/lib/libesp_system.a

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‎esp32c6/lib/libespnow.a

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‎esp32c6/lib/libhal.a

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‎esp32c6/lib/libmesh.a

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‎esp32c6/lib/libnet80211.a

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‎esp32c6/lib/libpp.a

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‎esp32c6/lib/libsmartconfig.a

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‎esp32c6/lib/libwapi.a

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‎esp32c6/platformio-build.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -360,7 +360,7 @@
360360

361361
CPPDEFINES=[
362362
"ESP_PLATFORM",
363-
("IDF_VER", '\\"v5.1-554-g25876e8f49\\"'),
363+
("IDF_VER", '\\"v5.1-562-g5d78511eac\\"'),
364364
("MBEDTLS_CONFIG_FILE", '\\"mbedtls/esp_config.h\\"'),
365365
("SOC_MMU_PAGE_SIZE", 'CONFIG_MMU_PAGE_SIZE'),
366366
"UNITY_INCLUDE_CONFIG_H",

‎esp32c6/qio_qspi/include/sdkconfig.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1181,5 +1181,5 @@
11811181
#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
11821182
#define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
11831183
#define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
1184-
#define CONFIG_ARDUINO_IDF_COMMIT "25876e8f49"
1184+
#define CONFIG_ARDUINO_IDF_COMMIT "5d78511eac"
11851185
#define CONFIG_ARDUINO_IDF_BRANCH "release/v5.1"

‎esp32h2/dio_qspi/include/sdkconfig.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1145,5 +1145,5 @@
11451145
#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
11461146
#define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
11471147
#define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
1148-
#define CONFIG_ARDUINO_IDF_COMMIT "25876e8f49"
1148+
#define CONFIG_ARDUINO_IDF_COMMIT "5d78511eac"
11491149
#define CONFIG_ARDUINO_IDF_BRANCH "release/v5.1"

‎esp32h2/flags/defines

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
-DESP_PLATFORM -DIDF_VER=\"v5.1-554-g25876e8f49\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1 -DTF_LITE_STATIC_MEMORY
1+
-DESP_PLATFORM -DIDF_VER=\"v5.1-562-g5d78511eac\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1 -DTF_LITE_STATIC_MEMORY

‎esp32h2/include/hal/esp32h2/include/hal/spi_ll.h

Lines changed: 21 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -43,6 +43,7 @@ extern "C" {
4343

4444
#define SPI_LL_DMA_MAX_BIT_LEN (1 << 18) //reg len: 18 bits
4545
#define SPI_LL_CPU_MAX_BIT_LEN (16 * 32) //Fifo len: 16 words
46+
#define SPI_LL_MOSI_FREE_LEVEL 1 //Default level after bus initialized
4647

4748
/**
4849
* The data structure holding calculated clock configuration. Since the
@@ -192,36 +193,44 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw)
192193
}
193194

194195
/**
195-
* Check whether user-defined transaction is done.
196+
* Determine and unify the default level of mosi line when bus free
196197
*
197198
* @param hw Beginning address of the peripheral registers.
198-
*
199-
* @return True if transaction is done, otherwise false.
200199
*/
201-
static inline bool spi_ll_usr_is_done(spi_dev_t *hw)
200+
static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level)
202201
{
203-
return hw->dma_int_raw.trans_done_int_raw;
202+
hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state
204203
}
205204

206205
/**
207-
* Trigger start of user-defined transaction for master.
208-
* The synchronization between two clock domains is required in ESP32-S3
206+
* Apply the register configurations and wait until it's done
209207
*
210208
* @param hw Beginning address of the peripheral registers.
211209
*/
212-
static inline void spi_ll_master_user_start(spi_dev_t *hw)
210+
static inline void spi_ll_apply_config(spi_dev_t *hw)
213211
{
214212
hw->cmd.update = 1;
215-
while (hw->cmd.update);
216-
hw->cmd.usr = 1;
213+
while (hw->cmd.update); //waiting config applied
214+
}
215+
216+
/**
217+
* Check whether user-defined transaction is done.
218+
*
219+
* @param hw Beginning address of the peripheral registers.
220+
*
221+
* @return True if transaction is done, otherwise false.
222+
*/
223+
static inline bool spi_ll_usr_is_done(spi_dev_t *hw)
224+
{
225+
return hw->dma_int_raw.trans_done_int_raw;
217226
}
218227

219228
/**
220-
* Trigger start of user-defined transaction for slave.
229+
* Trigger start of user-defined transaction.
221230
*
222231
* @param hw Beginning address of the peripheral registers.
223232
*/
224-
static inline void spi_ll_slave_user_start(spi_dev_t *hw)
233+
static inline void spi_ll_user_start(spi_dev_t *hw)
225234
{
226235
hw->cmd.usr = 1;
227236
}

‎esp32h2/lib/libdriver.a

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‎esp32h2/lib/libesp_app_format.a

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‎esp32h2/lib/libesp_hw_support.a

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‎esp32h2/lib/libesp_lcd.a

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‎esp32h2/lib/libesp_system.a

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‎esp32h2/lib/libhal.a

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‎esp32h2/platformio-build.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -356,7 +356,7 @@
356356

357357
CPPDEFINES=[
358358
"ESP_PLATFORM",
359-
("IDF_VER", '\\"v5.1-554-g25876e8f49\\"'),
359+
("IDF_VER", '\\"v5.1-562-g5d78511eac\\"'),
360360
("MBEDTLS_CONFIG_FILE", '\\"mbedtls/esp_config.h\\"'),
361361
("SOC_MMU_PAGE_SIZE", 'CONFIG_MMU_PAGE_SIZE'),
362362
"UNITY_INCLUDE_CONFIG_H",

‎esp32h2/qio_qspi/include/sdkconfig.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1145,5 +1145,5 @@
11451145
#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
11461146
#define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
11471147
#define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
1148-
#define CONFIG_ARDUINO_IDF_COMMIT "25876e8f49"
1148+
#define CONFIG_ARDUINO_IDF_COMMIT "5d78511eac"
11491149
#define CONFIG_ARDUINO_IDF_BRANCH "release/v5.1"

‎esp32s2/dio_qspi/include/sdkconfig.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -994,5 +994,5 @@
994994
#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
995995
#define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
996996
#define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
997-
#define CONFIG_ARDUINO_IDF_COMMIT "25876e8f49"
997+
#define CONFIG_ARDUINO_IDF_COMMIT "5d78511eac"
998998
#define CONFIG_ARDUINO_IDF_BRANCH "release/v5.1"

‎esp32s2/flags/defines

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
-DESP_PLATFORM -DIDF_VER=\"v5.1-554-g25876e8f49\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1 -DTF_LITE_STATIC_MEMORY
1+
-DESP_PLATFORM -DIDF_VER=\"v5.1-562-g5d78511eac\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1 -DTF_LITE_STATIC_MEMORY

‎esp32s2/include/arduino_tinyusb/tinyusb/src/device/usbd_pvt.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -59,7 +59,7 @@ typedef struct
5959
} usbd_class_driver_t;
6060

6161
// Invoked when initializing device stack to get additional class drivers.
62-
// Can optionally implemented by application to extend/overwrite class driver support.
62+
// Can be implemented by application to extend/overwrite class driver support.
6363
// Note: The drivers array must be accessible at all time when stack is active
6464
usbd_class_driver_t const* usbd_app_driver_get_cb(uint8_t* driver_count) TU_ATTR_WEAK;
6565

‎esp32s2/include/arduino_tinyusb/tinyusb/src/host/usbh_classdriver.h renamed to ‎esp32s2/include/arduino_tinyusb/tinyusb/src/host/usbh_pvt.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -62,6 +62,11 @@ typedef struct {
6262
void (* const close )(uint8_t dev_addr);
6363
} usbh_class_driver_t;
6464

65+
// Invoked when initializing host stack to get additional class drivers.
66+
// Can be implemented by application to extend/overwrite class driver support.
67+
// Note: The drivers array must be accessible at all time when stack is active
68+
usbh_class_driver_t const* usbh_app_driver_get_cb(uint8_t* driver_count) TU_ATTR_WEAK;
69+
6570
// Call by class driver to tell USBH that it has complete the enumeration
6671
void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num);
6772

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