IDF release/v5.1 2004bf4e11

Author: me-no-dev

esp32/bin/bootloader_dio_40m.elf

@@ -208,6 +208,7 @@
 #define CONFIG_SOC_BLE_SUPPORTED 1
 #define CONFIG_SOC_BLE_MESH_SUPPORTED 1
 #define CONFIG_SOC_BT_CLASSIC_SUPPORTED 1
+#define CONFIG_SOC_ULP_HAS_ADC 1
 #define CONFIG_IDF_CMAKE 1
 #define CONFIG_IDF_TARGET_ARCH_XTENSA 1
 #define CONFIG_IDF_TARGET_ARCH "xtensa"
@@ -641,6 +642,8 @@
 #define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
 #define CONFIG_HEAP_POISONING_LIGHT 1
 #define CONFIG_HEAP_TRACING_OFF 1
+#define CONFIG_IEEE802154_CCA_THRESHOLD -60
+#define CONFIG_IEEE802154_PENDING_TABLE_SIZE 20
 #define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1
 #define CONFIG_LOG_DEFAULT_LEVEL 1
 #define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
@@ -715,6 +718,7 @@
 #define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
 #define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384
 #define CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE 1
+#define CONFIG_MBEDTLS_PKCS7_C 1
 #define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE 1
 #define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL 1
 #define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_MAX_CERTS 200
@@ -1079,5 +1083,5 @@
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
 #define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
 #define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
-#define CONFIG_ARDUINO_IDF_COMMIT "420ebd208a"
+#define CONFIG_ARDUINO_IDF_COMMIT "2004bf4e11"
 #define CONFIG_ARDUINO_IDF_BRANCH "release/v5.1"

esp32/bin/bootloader_dio_80m.elf

@@ -208,6 +208,7 @@
 #define CONFIG_SOC_BLE_SUPPORTED 1
 #define CONFIG_SOC_BLE_MESH_SUPPORTED 1
 #define CONFIG_SOC_BT_CLASSIC_SUPPORTED 1
+#define CONFIG_SOC_ULP_HAS_ADC 1
 #define CONFIG_IDF_CMAKE 1
 #define CONFIG_IDF_TARGET_ARCH_XTENSA 1
 #define CONFIG_IDF_TARGET_ARCH "xtensa"
@@ -641,6 +642,8 @@
 #define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
 #define CONFIG_HEAP_POISONING_LIGHT 1
 #define CONFIG_HEAP_TRACING_OFF 1
+#define CONFIG_IEEE802154_CCA_THRESHOLD -60
+#define CONFIG_IEEE802154_PENDING_TABLE_SIZE 20
 #define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1
 #define CONFIG_LOG_DEFAULT_LEVEL 1
 #define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
@@ -715,6 +718,7 @@
 #define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
 #define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384
 #define CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE 1
+#define CONFIG_MBEDTLS_PKCS7_C 1
 #define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE 1
 #define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL 1
 #define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_MAX_CERTS 200
@@ -1079,5 +1083,5 @@
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
 #define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
 #define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
-#define CONFIG_ARDUINO_IDF_COMMIT "420ebd208a"
+#define CONFIG_ARDUINO_IDF_COMMIT "2004bf4e11"
 #define CONFIG_ARDUINO_IDF_BRANCH "release/v5.1"

esp32/bin/bootloader_dout_40m.elf

@@ -1 +1 @@
--DESP_PLATFORM -DIDF_VER=\"v5.1-dev-4528-g420ebd208a\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1 
+-DESP_PLATFORM -DIDF_VER=\"v5.1-dev-4708-g2004bf4e11\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1 

esp32/bin/bootloader_dout_80m.elf

@@ -334,7 +334,7 @@ typedef enum {
 /**
  * @brief Revokes the old signature digest. To be called in the application after the rollback logic.
  *
- * Relevant for Secure boot v2 on ESP32-S2, ESP32-S3, ESP32-C3, ESP32-H4 where upto 3 key digests can be stored (Key \#N-1, Key \#N, Key \#N+1).
+ * Relevant for Secure boot v2 on ESP32-S2, ESP32-S3, ESP32-C3, ESP32-C6, ESP32-H2 where upto 3 key digests can be stored (Key \#N-1, Key \#N, Key \#N+1).
  * When key \#N-1 used to sign an app is invalidated, an OTA update is to be sent with an app signed with key \#N-1 & Key \#N.
  * After successfully booting the OTA app should call this function to revoke Key \#N-1.
  *

esp32/bin/bootloader_qio_40m.elf

@@ -18,11 +18,6 @@ typedef enum {
     ESP_CHIP_ID_ESP32C3 = 0x0005, /*!< chip ID: ESP32-C3 */
     ESP_CHIP_ID_ESP32S3 = 0x0009, /*!< chip ID: ESP32-S3 */
     ESP_CHIP_ID_ESP32C2 = 0x000C, /*!< chip ID: ESP32-C2 */
-#if CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2
-    ESP_CHIP_ID_ESP32H4 = 0x000E, /*!< chip ID: ESP32-H4 Beta2*/  // ESP32H4-TODO: IDF-3475
-#elif CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1
-    ESP_CHIP_ID_ESP32H4 = 0x000A, /*!< chip ID: ESP32-H4 Beta1 */
-#endif
     ESP_CHIP_ID_ESP32C6 = 0x000D, /*!< chip ID: ESP32-C6 */
     ESP_CHIP_ID_INVALID = 0xFFFF /*!< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size) */
 } __attribute__((packed)) esp_chip_id_t;

esp32/bin/bootloader_qio_80m.elf

@@ -650,6 +650,7 @@ typedef enum {
 typedef enum{
     ESP_BLE_WHITELIST_REMOVE     = 0X00,    /*!< remove mac from whitelist */
     ESP_BLE_WHITELIST_ADD        = 0X01,    /*!< add address to whitelist */
+    ESP_BLE_WHITELIST_CLEAR      = 0x02,    /*!< clear all device in whitelist */
 } esp_ble_wl_operation_t;
 #if (BLE_42_FEATURE_SUPPORT == TRUE)
 typedef enum {

esp32/bin/bootloader_qout_40m.elf

@@ -61,7 +61,7 @@ typedef enum {
     ADC1_CHANNEL_9,     /*!< ADC1 channel 9 is GPIO10 */
     ADC1_CHANNEL_MAX,
 } adc1_channel_t;
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H4
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2
 typedef enum {
     ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO0 */
     ADC1_CHANNEL_1,     /*!< ADC1 channel 1 is GPIO1 */
@@ -97,7 +97,7 @@ typedef enum {
     ADC2_CHANNEL_9,     /*!< ADC2 channel 9 is GPIO26 (ESP32), GPIO20 (ESP32-S2) */
     ADC2_CHANNEL_MAX,
 } adc2_channel_t;
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H4
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2
 // ESP32C6 has no ADC2
 typedef enum {
     ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO5 */

esp32/bin/bootloader_qout_80m.elf

@@ -23,6 +23,7 @@ typedef struct rmt_encoder_t rmt_encoder_t;
  * @brief RMT encoding state
  */
 typedef enum {
+    RMT_ENCODING_RESET = 0,           /*!< The encoding session is in reset state */
     RMT_ENCODING_COMPLETE = (1 << 0), /*!< The encoding session is finished, the caller can continue with subsequent encoding */
     RMT_ENCODING_MEM_FULL = (1 << 1), /*!< The encoding artifact memory is full, the caller should return from current encoding session */
 } rmt_encode_state_t;

esp32/dio_qspi/include/sdkconfig.h

@@ -502,6 +502,42 @@ ssize_t esp_tls_get_bytes_avail(esp_tls_t *tls);
  */
 esp_err_t esp_tls_get_conn_sockfd(esp_tls_t *tls, int *sockfd);
 
+/**
+ * @brief       Sets the connection socket file descriptor for the esp_tls session
+ *
+ * @param[in]   tls          handle to esp_tls context
+ *
+ * @param[in]   sockfd       sockfd value to set.
+ *
+ * @return     - ESP_OK on success and value of sockfd for the tls connection shall updated withthe provided value
+ *             - ESP_ERR_INVALID_ARG if (tls == NULL || sockfd < 0)
+ */
+esp_err_t esp_tls_set_conn_sockfd(esp_tls_t *tls, int sockfd);
+
+/**
+ * @brief       Gets the connection state for the esp_tls session
+ *
+ * @param[in]   tls          handle to esp_tls context
+ *
+ * @param[out]   conn_state   pointer to the connection state value.
+ *
+ * @return     - ESP_OK on success and value of sockfd for the tls connection shall updated withthe provided value
+ *             - ESP_ERR_INVALID_ARG (Invalid arguments)
+ */
+esp_err_t esp_tls_get_conn_state(esp_tls_t *tls, esp_tls_conn_state_t *conn_state);
+
+/**
+ * @brief       Sets the connection state for the esp_tls session
+ *
+ * @param[in]   tls          handle to esp_tls context
+ *
+ * @param[in]   conn_state   connection state value to set.
+ *
+ * @return     - ESP_OK on success and value of sockfd for the tls connection shall updated withthe provided value
+ *             - ESP_ERR_INVALID_ARG (Invalid arguments)
+ */
+esp_err_t esp_tls_set_conn_state(esp_tls_t *tls, esp_tls_conn_state_t conn_state);
+
 /**
  * @brief       Returns the ssl context
  *

esp32/dio_qspi/libspi_flash.a

@@ -72,6 +72,12 @@
 #include "sys/time.h"
 #include "sdkconfig.h"
 
+/**
+ * @brief define for if chip supports camera
+ */
+#define ESP_CAMERA_SUPPORTED (CONFIG_IDF_TARGET_ESP32 | CONFIG_IDF_TARGET_ESP32S3 | \
+                             CONFIG_IDF_TARGET_ESP32S2)
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -85,7 +91,7 @@ typedef enum {
 } camera_grab_mode_t;
 
 /**
- * @brief Camera frame buffer location 
+ * @brief Camera frame buffer location
  */
 typedef enum {
     CAMERA_FB_IN_PSRAM,         /*!< Frame buffer is placed in external PSRAM */
@@ -99,7 +105,7 @@ typedef enum {
 typedef enum {
     CONV_DISABLE,
     RGB565_TO_YUV422,
-        
+
     YUV422_TO_RGB565,
     YUV422_TO_YUV420
 } camera_conv_mode_t;
@@ -194,14 +200,14 @@ esp_err_t esp_camera_init(const camera_config_t* config);
  *      - ESP_OK on success
  *      - ESP_ERR_INVALID_STATE if the driver hasn't been initialized yet
  */
-esp_err_t esp_camera_deinit();
+esp_err_t esp_camera_deinit(void);
 
 /**
  * @brief Obtain pointer to a frame buffer.
  *
  * @return pointer to the frame buffer
  */
-camera_fb_t* esp_camera_fb_get();
+camera_fb_t* esp_camera_fb_get(void);
 
 /**
  * @brief Return the frame buffer to be reused again.
@@ -215,22 +221,28 @@ void esp_camera_fb_return(camera_fb_t * fb);
  *
  * @return pointer to the sensor
  */
-sensor_t * esp_camera_sensor_get();
+sensor_t * esp_camera_sensor_get(void);
 
 /**
  * @brief Save camera settings to non-volatile-storage (NVS)
- * 
- * @param key   A unique nvs key name for the camera settings 
+ *
+ * @param key   A unique nvs key name for the camera settings
  */
 esp_err_t esp_camera_save_to_nvs(const char *key);
 
 /**
  * @brief Load camera settings from non-volatile-storage (NVS)
- * 
- * @param key   A unique nvs key name for the camera settings 
+ *
+ * @param key   A unique nvs key name for the camera settings
  */
 esp_err_t esp_camera_load_from_nvs(const char *key);
 
+/**
+ * @brief Return all frame buffers to be reused again.
+ */
+void esp_camera_return_all(void);
+
+
 #ifdef __cplusplus
 }
 #endif

esp32/dout_qspi/include/sdkconfig.h

@@ -24,7 +24,6 @@ typedef enum {
     CHIP_ESP32S2 = 2, //!< ESP32-S2
     CHIP_ESP32S3 = 9, //!< ESP32-S3
     CHIP_ESP32C3 = 5, //!< ESP32-C3
-    CHIP_ESP32H4 = 6, //!< ESP32-H4
     CHIP_ESP32C2 = 12, //!< ESP32-C2
     CHIP_ESP32C6 = 13, //!< ESP32-C6
     CHIP_ESP32H2 = 16, //!< ESP32-H2

esp32/dout_qspi/libspi_flash.a

@@ -14,20 +14,20 @@ extern "C" {
 #endif
 
 /**
- * @brief Degree of precision of frequency value to be returned by clk_tree_src_get_freq_hz()
+ * @brief Degree of precision of frequency value to be returned by esp_clk_tree_src_get_freq_hz()
  */
 typedef enum {
-    CLK_TREE_SRC_FREQ_PRECISION_CACHED,   /*< Get value from the data cached by the driver; If the data is 0, then a calibration will be performed */
-    CLK_TREE_SRC_FREQ_PRECISION_APPROX,   /*< Get its approxiamte frequency value */
-    CLK_TREE_SRC_FREQ_PRECISION_EXACT,    /*< Always perform a calibration */
-    CLK_TREE_SRC_FREQ_PRECISION_INVALID,  /*< Invalid degree of precision */
-} clk_tree_src_freq_precision_t;
+    ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED,   /*< Get value from the data cached by the driver; If the data is 0, then a calibration will be performed */
+    ESP_CLK_TREE_SRC_FREQ_PRECISION_APPROX,   /*< Get its approxiamte frequency value */
+    ESP_CLK_TREE_SRC_FREQ_PRECISION_EXACT,    /*< Always perform a calibration */
+    ESP_CLK_TREE_SRC_FREQ_PRECISION_INVALID,  /*< Invalid degree of precision */
+} esp_clk_tree_src_freq_precision_t;
 
 /**
  * @brief Get frequency of module clock source
  *
  * @param[in] clk_src Clock source available to modules, in soc_module_clk_t
- * @param[in] precision Degree of precision, one of clk_tree_src_freq_precision_t values
+ * @param[in] precision Degree of precision, one of esp_clk_tree_src_freq_precision_t values
  *                      This arg only applies to the clock sources that their frequencies can vary:
  *                      SOC_MOD_CLK_RTC_FAST, SOC_MOD_CLK_RTC_SLOW, SOC_MOD_CLK_RC_FAST, SOC_MOD_CLK_RC_FAST_D256,
  *                      SOC_MOD_CLK_XTAL32K
@@ -39,7 +39,7 @@ typedef enum {
  *      - ESP_ERR_INVALID_ARG  Parameter error
  *      - ESP_FAIL             Calibration failed
  */
-esp_err_t clk_tree_src_get_freq_hz(soc_module_clk_t clk_src, clk_tree_src_freq_precision_t precision,
+esp_err_t esp_clk_tree_src_get_freq_hz(soc_module_clk_t clk_src, esp_clk_tree_src_freq_precision_t precision,
 uint32_t *freq_value);
 
 #ifdef __cplusplus

esp32/flags/defines

@@ -40,8 +40,6 @@ typedef enum {
 #define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES
 #elif CONFIG_IDF_TARGET_ESP32C3
 #define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES
-#elif CONFIG_IDF_TARGET_ESP32H4
-#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32H4_UNIVERSAL_MAC_ADDRESSES
 #elif CONFIG_IDF_TARGET_ESP32C2
 #define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32C2_UNIVERSAL_MAC_ADDRESSES
 #elif CONFIG_IDF_TARGET_ESP32C6

esp32/include/app_update/include/esp_ota_ops.h

@@ -256,6 +256,17 @@ inline static bool esp_ptr_internal(const void *p) {
      * additional check is required */
     r |= ((intptr_t)p >= SOC_RTC_DRAM_LOW && (intptr_t)p < SOC_RTC_DRAM_HIGH);
 #endif
+
+#if CONFIG_ESP32S3_DATA_CACHE_16KB
+    /* For ESP32-S3, when the DCACHE size is set to 16 kB, the unused 48 kB is
+     * added to the heap in 2 blocks of 32 kB (from 0x3FCF0000) and 16 kB
+     * (from 0x3C000000 (SOC_DROM_LOW) - 0x3C004000).
+     * Though this memory lies in the external memory vaddr, it is no different
+     * from the internal RAM in terms of hardware attributes and it is a part of
+     * the internal RAM when added to the heap.*/
+    r |= ((intptr_t)p >= SOC_DROM_LOW && (intptr_t)p < (SOC_DROM_LOW + 0x4000));
+#endif
+
     return r;
 }
 
@@ -277,7 +288,17 @@ bool esp_ptr_external_ram(const void *p);
  */
 __attribute__((always_inline))
 inline static bool esp_ptr_in_drom(const void *p) {
-    return ((intptr_t)p >= SOC_DROM_LOW && (intptr_t)p < SOC_DROM_HIGH);
+    uint32_t drom_start_addr = SOC_DROM_LOW;
+#if CONFIG_ESP32S3_DATA_CACHE_16KB
+    /* For ESP32-S3, when the DCACHE size is set to 16 kB, the unused 48 kB is
+     * added to the heap in 2 blocks of 32 kB (from 0x3FCF0000) and 16 kB
+     * (from 0x3C000000 (SOC_DROM_LOW) - 0x3C004000).
+     * The drom_start_addr has to be moved by 0x4000 (16kB) to accomodate
+     * this addition. */
+    drom_start_addr += 0x4000;
+#endif
+
+    return ((intptr_t)p >= drom_start_addr && (intptr_t)p < SOC_DROM_HIGH);
 }
 
 /**