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46 files changed

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‎esp32/lib/libesp_app_format.a

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‎esp32c3/lib/libesp_app_format.a

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‎esp32c6/lib/libesp_app_format.a

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‎esp32h2/lib/libesp_app_format.a

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‎esp32s2/dio_qspi/include/sdkconfig.h

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -489,8 +489,6 @@
489489
#define CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE 1
490490
#define CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK 1
491491
#define CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP 1
492-
#define CONFIG_ESP_SYSTEM_MEMPROT_FEATURE 1
493-
#define CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK 1
494492
#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
495493
#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2048
496494
#define CONFIG_ESP_MAIN_TASK_STACK_SIZE 4096
@@ -927,8 +925,6 @@
927925
#define CONFIG_ESP32S2_DEBUG_OCDAWARE CONFIG_ESP_DEBUG_OCDAWARE
928926
#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_240 CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240
929927
#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
930-
#define CONFIG_ESP32S2_MEMPROT_FEATURE CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
931-
#define CONFIG_ESP32S2_MEMPROT_FEATURE_LOCK CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK
932928
#define CONFIG_ESP32S2_PANIC_PRINT_REBOOT CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT
933929
#define CONFIG_ESP32S2_RTC_CLK_CAL_CYCLES CONFIG_RTC_CLK_CAL_CYCLES
934930
#define CONFIG_ESP32S2_RTC_CLK_SRC_INT_RC CONFIG_RTC_CLK_SRC_INT_RC

‎esp32s2/include/arduino_tinyusb/tinyusb/src/common/tusb_common.h

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -53,6 +53,8 @@
5353
#define U32_TO_U8S_LE(_u32) TU_U32_BYTE0(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE3(_u32)
5454

5555
#define TU_BIT(n) (1UL << (n))
56+
57+
// Generate a mask with bit from high (31) to low (0) set, e.g TU_GENMASK(3, 0) = 0b1111
5658
#define TU_GENMASK(h, l) ( (UINT32_MAX << (l)) & (UINT32_MAX >> (31 - (h))) )
5759

5860
//--------------------------------------------------------------------+
@@ -99,21 +101,19 @@ TU_ATTR_WEAK extern void* tusb_app_phys_to_virt(void *phys_addr);
99101
#define tu_varclr(_var) tu_memclr(_var, sizeof(*(_var)))
100102

101103
// This is a backport of memset_s from c11
102-
TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count)
103-
{
104+
TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count) {
104105
// TODO may check if desst and src is not NULL
105-
if (count > destsz) {
106+
if ( count > destsz ) {
106107
return -1;
107108
}
108109
memset(dest, ch, count);
109110
return 0;
110111
}
111112

112113
// This is a backport of memcpy_s from c11
113-
TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, const void * src, size_t count )
114-
{
114+
TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, const void *src, size_t count) {
115115
// TODO may check if desst and src is not NULL
116-
if (count > destsz) {
116+
if ( count > destsz ) {
117117
return -1;
118118
}
119119
memcpy(dest, src, count);
@@ -169,6 +169,9 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align32 (uint32_t value) { retur
169169
TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align4k (uint32_t value) { return (value & 0xFFFFF000UL); }
170170
TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_offset4k(uint32_t value) { return (value & 0xFFFUL); }
171171

172+
TU_ATTR_ALWAYS_INLINE static inline bool tu_is_aligned32(uint32_t value) { return (value & 0x1FUL) == 0; }
173+
TU_ATTR_ALWAYS_INLINE static inline bool tu_is_aligned64(uint64_t value) { return (value & 0x3FUL) == 0; }
174+
172175
//------------- Mathematics -------------//
173176
TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_div_ceil(uint32_t v, uint32_t d) { return (v + d -1)/d; }
174177

‎esp32s2/include/arduino_tinyusb/tinyusb/src/host/hcd.h

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -110,15 +110,15 @@ typedef struct
110110

111111
// clean/flush data cache: write cache -> memory.
112112
// Required before an DMA TX transfer to make sure data is in memory
113-
void hcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
113+
bool hcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
114114

115115
// invalidate data cache: mark cache as invalid, next read will read from memory
116116
// Required BOTH before and after an DMA RX transfer
117-
void hcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
117+
bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
118118

119119
// clean and invalidate data cache
120120
// Required before an DMA transfer where memory is both read/write by DMA
121-
void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
121+
bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
122122

123123
//--------------------------------------------------------------------+
124124
// Controller API
@@ -171,6 +171,10 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
171171
// Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
172172
bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen);
173173

174+
// Abort a queued transfer. Note: it can only abort transfer that has not been started
175+
// Return true if a queued transfer is aborted, false if there is no transfer to abort
176+
bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr);
177+
174178
// Submit a special transfer to send 8-byte Setup Packet, when complete hcd_event_xfer_complete() must be invoked
175179
bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]);
176180

‎esp32s2/include/arduino_tinyusb/tinyusb/src/host/usbh.h

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -172,8 +172,12 @@ bool tuh_control_xfer(tuh_xfer_t* xfer);
172172
// - sync : blocking if complete callback is NULL.
173173
bool tuh_edpt_xfer(tuh_xfer_t* xfer);
174174

175-
// Open an non-control endpoint
176-
bool tuh_edpt_open(uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep);
175+
// Open a non-control endpoint
176+
bool tuh_edpt_open(uint8_t daddr, tusb_desc_endpoint_t const * desc_ep);
177+
178+
// Abort a queued transfer. Note: it can only abort transfer that has not been started
179+
// Return true if a queued transfer is aborted, false if there is no transfer to abort
180+
bool tuh_edpt_abort_xfer(uint8_t daddr, uint8_t ep_addr);
177181

178182
// Set Configuration (control transfer)
179183
// config_num = 0 will un-configure device. Note: config_num = config_descriptor_index + 1

‎esp32s2/include/arduino_tinyusb/tinyusb/src/portable/chipidea/ci_hs/ci_hs_imxrt.h

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -68,31 +68,34 @@ TU_ATTR_ALWAYS_INLINE static inline bool imxrt_is_cache_mem(uintptr_t addr) {
6868
return !(0x20000000 <= addr && addr < 0x20100000);
6969
}
7070

71-
TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean(void const* addr, uint32_t data_size) {
71+
TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_clean(void const* addr, uint32_t data_size) {
7272
const uintptr_t addr32 = (uintptr_t) addr;
7373
if (imxrt_is_cache_mem(addr32)) {
74+
TU_ASSERT(tu_is_aligned32(addr32));
7475
SCB_CleanDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size);
7576
}
77+
return true;
7678
}
7779

78-
TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_invalidate(void const* addr, uint32_t data_size) {
80+
TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_invalidate(void const* addr, uint32_t data_size) {
7981
const uintptr_t addr32 = (uintptr_t) addr;
8082
if (imxrt_is_cache_mem(addr32)) {
8183
// Invalidating does not push cached changes back to RAM so we need to be
8284
// *very* careful when we do it. If we're not aligned, then we risk resetting
8385
// values back to their RAM state.
84-
// if (addr32 % 32 != 0) {
85-
// TU_BREAKPOINT();
86-
// }
86+
TU_ASSERT(tu_is_aligned32(addr32));
8787
SCB_InvalidateDCache_by_Addr((void*) addr32, (int32_t) data_size);
8888
}
89+
return true;
8990
}
9091

91-
TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
92+
TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
9293
const uintptr_t addr32 = (uintptr_t) addr;
9394
if (imxrt_is_cache_mem(addr32)) {
95+
TU_ASSERT(tu_is_aligned32(addr32));
9496
SCB_CleanInvalidateDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size);
9597
}
98+
return true;
9699
}
97100

98101
#endif

‎esp32s2/include/arduino_tinyusb/tinyusb/src/portable/ehci/ehci.h

Lines changed: 12 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -289,12 +289,17 @@ enum {
289289
};
290290

291291
enum {
292-
EHCI_USBCMD_POS_RUN_STOP = 0,
293-
EHCI_USBCMD_POS_FRAMELIST_SIZE = 2,
294-
EHCI_USBCMD_POS_PERIOD_ENABLE = 4,
295-
EHCI_USBCMD_POS_ASYNC_ENABLE = 5,
296-
EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB = 15,
297-
EHCI_USBCMD_POS_INTERRUPT_THRESHOLD = 16
292+
EHCI_USBCMD_FRAMELIST_SIZE_SHIFT = 2, // [2..3]
293+
EHCI_USBCMD_CHIPIDEA_FRAMELIST_SIZE_MSB_SHIFT = 15,
294+
EHCI_USBCMD_INTERRUPT_THRESHOLD_SHIFT = 16
295+
};
296+
297+
enum {
298+
EHCI_USBCMD_RUN_STOP = TU_BIT(0), // [0..0] 1 = Run, 0 = Stop
299+
EHCI_USBCMD_HCRESET = TU_BIT(1), // [1..1] SW write 1 to reset HC, clear by HC when complete
300+
EHCI_USBCMD_PERIOD_SCHEDULE_ENABLE = TU_BIT(4), // [4..4] Enable periodic schedule
301+
EHCI_USBCMD_ASYNC_SCHEDULE_ENABLE = TU_BIT(5), // [5..5] Enable async schedule
302+
EHCI_USBCMD_INTR_ON_ASYNC_ADVANCE_DOORBELL = TU_BIT(6), // [6..6] Tell HC to interrupt next time it advances async list. Clear by HC
298303
};
299304

300305
enum {
@@ -306,7 +311,7 @@ enum {
306311
EHCI_PORTSC_MASK_FORCE_RESUME = TU_BIT(6),
307312
EHCI_PORTSC_MASK_PORT_SUSPEND = TU_BIT(7),
308313
EHCI_PORTSC_MASK_PORT_RESET = TU_BIT(8),
309-
ECHI_PORTSC_MASK_PORT_POWER = TU_BIT(12),
314+
EHCI_PORTSC_MASK_PORT_POWER = TU_BIT(12),
310315

311316
EHCI_PORTSC_MASK_W1C =
312317
EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE |

‎esp32s2/include/arduino_tinyusb/tinyusb/src/tusb_option.h

Lines changed: 11 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -295,15 +295,14 @@
295295
#define CFG_TUSB_DEBUG 0
296296
#endif
297297

298-
// TODO MEM_SECTION can be different for host and device controller
299-
// should use CFG_TUD_MEM_SECTION, CFG_TUH_MEM_SECTION
298+
// Memory section for placing buffer used for usb transferring. If MEM_SECTION is different for
299+
// host and device use: CFG_TUD_MEM_SECTION, CFG_TUH_MEM_SECTION instead
300300
#ifndef CFG_TUSB_MEM_SECTION
301301
#define CFG_TUSB_MEM_SECTION
302302
#endif
303303

304-
// alignment requirement of buffer used for endpoint transferring
305-
// TODO MEM_ALIGN can be different for host and device controller
306-
// should use CFG_TUD_MEM_ALIGN, CFG_TUH_MEM_ALIGN
304+
// Alignment requirement of buffer used for usb transferring. if MEM_ALIGN is different for
305+
// host and device controller use: CFG_TUD_MEM_ALIGN, CFG_TUH_MEM_ALIGN instead
307306
#ifndef CFG_TUSB_MEM_ALIGN
308307
#define CFG_TUSB_MEM_ALIGN TU_ATTR_ALIGNED(4)
309308
#endif
@@ -321,24 +320,14 @@
321320
// Device Options (Default)
322321
//--------------------------------------------------------------------
323322

324-
// Attribute to place data in accessible RAM for device controller
325-
// default to CFG_TUSB_MEM_SECTION for backward-compatible
323+
// Attribute to place data in accessible RAM for device controller (default: CFG_TUSB_MEM_SECTION)
326324
#ifndef CFG_TUD_MEM_SECTION
327-
#ifdef CFG_TUSB_MEM_SECTION
328-
#define CFG_TUD_MEM_SECTION CFG_TUSB_MEM_SECTION
329-
#else
330-
#define CFG_TUD_MEM_SECTION
331-
#endif
325+
#define CFG_TUD_MEM_SECTION CFG_TUSB_MEM_SECTION
332326
#endif
333327

334-
// Attribute to align memory for device controller
335-
// default to CFG_TUSB_MEM_ALIGN for backward-compatible
328+
// Attribute to align memory for device controller (default: CFG_TUSB_MEM_ALIGN)
336329
#ifndef CFG_TUD_MEM_ALIGN
337-
#ifdef CFG_TUSB_MEM_ALIGN
338-
#define CFG_TUD_MEM_ALIGN CFG_TUSB_MEM_ALIGN
339-
#else
340-
#define CFG_TUD_MEM_ALIGN TU_ATTR_ALIGNED(4)
341-
#endif
330+
#define CFG_TUD_MEM_ALIGN CFG_TUSB_MEM_ALIGN
342331
#endif
343332

344333
#ifndef CFG_TUD_ENDPOINT0_SIZE
@@ -419,23 +408,14 @@
419408
#endif
420409
#endif // CFG_TUH_ENABLED
421410

422-
// Attribute to place data in accessible RAM for host controller
423-
// default to CFG_TUSB_MEM_SECTION for backward-compatible
411+
// Attribute to place data in accessible RAM for host controller (default: CFG_TUSB_MEM_SECTION)
424412
#ifndef CFG_TUH_MEM_SECTION
425-
#ifdef CFG_TUSB_MEM_SECTION
426-
#define CFG_TUH_MEM_SECTION CFG_TUSB_MEM_SECTION
427-
#else
428-
#define CFG_TUH_MEM_SECTION
429-
#endif
413+
#define CFG_TUH_MEM_SECTION CFG_TUSB_MEM_SECTION
430414
#endif
431415

432416
// Attribute to align memory for host controller
433417
#ifndef CFG_TUH_MEM_ALIGN
434-
#ifdef CFG_TUSB_MEM_ALIGN
435-
#define CFG_TUH_MEM_ALIGN CFG_TUSB_MEM_ALIGN
436-
#else
437-
#define CFG_TUH_MEM_ALIGN TU_ATTR_ALIGNED(4)
438-
#endif
418+
#define CFG_TUH_MEM_ALIGN CFG_TUSB_MEM_ALIGN
439419
#endif
440420

441421
//------------- CLASS -------------//

‎esp32s2/lib/libarduino_tinyusb.a

8 Bytes
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‎esp32s2/lib/libesp_app_format.a

0 Bytes
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‎esp32s2/lib/libesp_system.a

-10.4 KB
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‎esp32s2/lib/libheap.a

0 Bytes
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‎esp32s2/qio_qspi/include/sdkconfig.h

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -489,8 +489,6 @@
489489
#define CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE 1
490490
#define CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK 1
491491
#define CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP 1
492-
#define CONFIG_ESP_SYSTEM_MEMPROT_FEATURE 1
493-
#define CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK 1
494492
#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
495493
#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2048
496494
#define CONFIG_ESP_MAIN_TASK_STACK_SIZE 4096
@@ -927,8 +925,6 @@
927925
#define CONFIG_ESP32S2_DEBUG_OCDAWARE CONFIG_ESP_DEBUG_OCDAWARE
928926
#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_240 CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240
929927
#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
930-
#define CONFIG_ESP32S2_MEMPROT_FEATURE CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
931-
#define CONFIG_ESP32S2_MEMPROT_FEATURE_LOCK CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK
932928
#define CONFIG_ESP32S2_PANIC_PRINT_REBOOT CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT
933929
#define CONFIG_ESP32S2_RTC_CLK_CAL_CYCLES CONFIG_RTC_CLK_CAL_CYCLES
934930
#define CONFIG_ESP32S2_RTC_CLK_SRC_INT_RC CONFIG_RTC_CLK_SRC_INT_RC

‎esp32s2/sdkconfig

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1056,8 +1056,7 @@ CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y
10561056
#
10571057
# Memory protection
10581058
#
1059-
CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=y
1060-
CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK=y
1059+
# CONFIG_ESP_SYSTEM_MEMPROT_FEATURE is not set
10611060
# end of Memory protection
10621061

10631062
CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32
@@ -2171,8 +2170,7 @@ CONFIG_ESP32S2_PANIC_PRINT_REBOOT=y
21712170
# CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set
21722171
# CONFIG_ESP32S2_PANIC_GDBSTUB is not set
21732172
CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP=y
2174-
CONFIG_ESP32S2_MEMPROT_FEATURE=y
2175-
CONFIG_ESP32S2_MEMPROT_FEATURE_LOCK=y
2173+
# CONFIG_ESP32S2_MEMPROT_FEATURE is not set
21762174
CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32
21772175
CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2048
21782176
CONFIG_MAIN_TASK_STACK_SIZE=4096

‎esp32s3/dio_opi/include/sdkconfig.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -900,8 +900,6 @@
900900
#define CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS 0
901901
#define CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK 1
902902
#define CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP 1
903-
#define CONFIG_ESP_SYSTEM_MEMPROT_FEATURE 1
904-
#define CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK 1
905903
#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
906904
#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2048
907905
#define CONFIG_ESP_MAIN_TASK_STACK_SIZE 4096

‎esp32s3/dio_opi/libesp_hw_support.a

-299 KB
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‎esp32s3/dio_opi/libesp_system.a

-5.42 KB
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‎esp32s3/dio_qspi/include/sdkconfig.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -898,8 +898,6 @@
898898
#define CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS 0
899899
#define CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK 1
900900
#define CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP 1
901-
#define CONFIG_ESP_SYSTEM_MEMPROT_FEATURE 1
902-
#define CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK 1
903901
#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
904902
#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2048
905903
#define CONFIG_ESP_MAIN_TASK_STACK_SIZE 4096

‎esp32s3/dio_qspi/libesp_hw_support.a

-299 KB
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‎esp32s3/dio_qspi/libesp_system.a

-5.42 KB
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‎esp32s3/include/arduino_tinyusb/tinyusb/src/common/tusb_common.h

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -53,6 +53,8 @@
5353
#define U32_TO_U8S_LE(_u32) TU_U32_BYTE0(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE3(_u32)
5454

5555
#define TU_BIT(n) (1UL << (n))
56+
57+
// Generate a mask with bit from high (31) to low (0) set, e.g TU_GENMASK(3, 0) = 0b1111
5658
#define TU_GENMASK(h, l) ( (UINT32_MAX << (l)) & (UINT32_MAX >> (31 - (h))) )
5759

5860
//--------------------------------------------------------------------+
@@ -99,21 +101,19 @@ TU_ATTR_WEAK extern void* tusb_app_phys_to_virt(void *phys_addr);
99101
#define tu_varclr(_var) tu_memclr(_var, sizeof(*(_var)))
100102

101103
// This is a backport of memset_s from c11
102-
TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count)
103-
{
104+
TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count) {
104105
// TODO may check if desst and src is not NULL
105-
if (count > destsz) {
106+
if ( count > destsz ) {
106107
return -1;
107108
}
108109
memset(dest, ch, count);
109110
return 0;
110111
}
111112

112113
// This is a backport of memcpy_s from c11
113-
TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, const void * src, size_t count )
114-
{
114+
TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, const void *src, size_t count) {
115115
// TODO may check if desst and src is not NULL
116-
if (count > destsz) {
116+
if ( count > destsz ) {
117117
return -1;
118118
}
119119
memcpy(dest, src, count);
@@ -169,6 +169,9 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align32 (uint32_t value) { retur
169169
TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align4k (uint32_t value) { return (value & 0xFFFFF000UL); }
170170
TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_offset4k(uint32_t value) { return (value & 0xFFFUL); }
171171

172+
TU_ATTR_ALWAYS_INLINE static inline bool tu_is_aligned32(uint32_t value) { return (value & 0x1FUL) == 0; }
173+
TU_ATTR_ALWAYS_INLINE static inline bool tu_is_aligned64(uint64_t value) { return (value & 0x3FUL) == 0; }
174+
172175
//------------- Mathematics -------------//
173176
TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_div_ceil(uint32_t v, uint32_t d) { return (v + d -1)/d; }
174177

‎esp32s3/include/arduino_tinyusb/tinyusb/src/host/hcd.h

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -110,15 +110,15 @@ typedef struct
110110

111111
// clean/flush data cache: write cache -> memory.
112112
// Required before an DMA TX transfer to make sure data is in memory
113-
void hcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
113+
bool hcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
114114

115115
// invalidate data cache: mark cache as invalid, next read will read from memory
116116
// Required BOTH before and after an DMA RX transfer
117-
void hcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
117+
bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
118118

119119
// clean and invalidate data cache
120120
// Required before an DMA transfer where memory is both read/write by DMA
121-
void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
121+
bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
122122

123123
//--------------------------------------------------------------------+
124124
// Controller API
@@ -171,6 +171,10 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
171171
// Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
172172
bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen);
173173

174+
// Abort a queued transfer. Note: it can only abort transfer that has not been started
175+
// Return true if a queued transfer is aborted, false if there is no transfer to abort
176+
bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr);
177+
174178
// Submit a special transfer to send 8-byte Setup Packet, when complete hcd_event_xfer_complete() must be invoked
175179
bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]);
176180

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