| 
46 | 46 |   //#define IR_USE_TIMER3   // tx = pin 9  | 
47 | 47 |   #define IR_USE_TIMER4_HS  // tx = pin 10  | 
48 | 48 | 
 
  | 
 | 49 | +// Teensy 3.0  | 
 | 50 | +#elif defined(__MK20DX128__)  | 
 | 51 | +  #define IR_USE_TIMER_CMT  // tx = pin 5  | 
 | 52 | + | 
49 | 53 | // Teensy++ 1.0 & 2.0  | 
50 | 54 | #elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__)  | 
51 | 55 |   //#define IR_USE_TIMER1   // tx = pin 25  | 
@@ -436,6 +440,54 @@ extern volatile irparams_t irparams;  | 
436 | 440 | #endif  | 
437 | 441 | 
 
  | 
438 | 442 | 
 
  | 
 | 443 | +// defines for special carrier modulator timer  | 
 | 444 | +#elif defined(IR_USE_TIMER_CMT)  | 
 | 445 | +#define TIMER_RESET ({			\  | 
 | 446 | +	uint8_t tmp = CMT_MSC;		\  | 
 | 447 | +	CMT_CMD2 = 30;			\  | 
 | 448 | +})  | 
 | 449 | +#define TIMER_ENABLE_PWM     CORE_PIN5_CONFIG = PORT_PCR_MUX(2)|PORT_PCR_DSE|PORT_PCR_SRE  | 
 | 450 | +#define TIMER_DISABLE_PWM    CORE_PIN5_CONFIG = PORT_PCR_MUX(1)|PORT_PCR_DSE|PORT_PCR_SRE  | 
 | 451 | +#define TIMER_ENABLE_INTR    NVIC_ENABLE_IRQ(IRQ_CMT)  | 
 | 452 | +#define TIMER_DISABLE_INTR   NVIC_DISABLE_IRQ(IRQ_CMT)  | 
 | 453 | +#define TIMER_INTR_NAME      cmt_isr  | 
 | 454 | +#ifdef ISR  | 
 | 455 | +#undef ISR  | 
 | 456 | +#endif  | 
 | 457 | +#define ISR(f) void f(void)  | 
 | 458 | +#if F_BUS == 48000000  | 
 | 459 | +#define CMT_PPS_VAL 5  | 
 | 460 | +#else  | 
 | 461 | +#define CMT_PPS_VAL 2  | 
 | 462 | +#endif  | 
 | 463 | +#define TIMER_CONFIG_KHZ(val) ({ 	\  | 
 | 464 | +	SIM_SCGC4 |= SIM_SCGC4_CMT;	\  | 
 | 465 | +	SIM_SOPT2 |= SIM_SOPT2_PTD7PAD;	\  | 
 | 466 | +	CMT_PPS = CMT_PPS_VAL;		\  | 
 | 467 | +	CMT_CGH1 = 2667 / val;		\  | 
 | 468 | +	CMT_CGL1 = 5333 / val;		\  | 
 | 469 | +	CMT_CMD1 = 0;			\  | 
 | 470 | +	CMT_CMD2 = 30;			\  | 
 | 471 | +	CMT_CMD3 = 0;			\  | 
 | 472 | +	CMT_CMD4 = 0;			\  | 
 | 473 | +	CMT_OC = 0x60;			\  | 
 | 474 | +	CMT_MSC = 0x01;			\  | 
 | 475 | +})  | 
 | 476 | +#define TIMER_CONFIG_NORMAL() ({	\  | 
 | 477 | +	SIM_SCGC4 |= SIM_SCGC4_CMT;	\  | 
 | 478 | +	CMT_PPS = CMT_PPS_VAL;		\  | 
 | 479 | +	CMT_CGH1 = 1;			\  | 
 | 480 | +	CMT_CGL1 = 1;			\  | 
 | 481 | +	CMT_CMD1 = 0;			\  | 
 | 482 | +	CMT_CMD2 = 30;			\  | 
 | 483 | +	CMT_CMD3 = 0;			\  | 
 | 484 | +	CMT_CMD4 = 19;			\  | 
 | 485 | +	CMT_OC = 0;			\  | 
 | 486 | +	CMT_MSC = 0x03;			\  | 
 | 487 | +})  | 
 | 488 | +#define TIMER_PWM_PIN        5  | 
 | 489 | + | 
 | 490 | + | 
439 | 491 | #else // unknown timer  | 
440 | 492 | #error "Internal code configuration error, no known IR_USE_TIMER# defined\n"  | 
441 | 493 | #endif  | 
 | 
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