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Initial S3 Support
Just so we can compile and test! Some things might/will not work. SPI and UART baud detect need to be looked at.
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boards.txt

Lines changed: 179 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -161,6 +161,185 @@ esp32c3.menu.DebugLevel.verbose.build.code_debug=5
161161

162162
##############################################################
163163

164+
esp32s3.name=ESP32S3 Dev Module
165+
esp32s3.vid.0=0x303a
166+
esp32s3.pid.0=0x0002
167+
168+
esp32s3.upload.tool=esptool_py
169+
esp32s3.upload.maximum_size=1310720
170+
esp32s3.upload.maximum_data_size=327680
171+
esp32s3.upload.flags=
172+
esp32s3.upload.extra_flags=
173+
esp32s3.upload.use_1200bps_touch=false
174+
esp32s3.upload.wait_for_upload_port=false
175+
176+
esp32s3.serial.disableDTR=false
177+
esp32s3.serial.disableRTS=false
178+
179+
esp32s3.build.tarch=xtensa
180+
esp32s3.build.bootloader_addr=0x1000
181+
esp32s3.build.target=esp32s3
182+
esp32s3.build.mcu=esp32s3
183+
esp32s3.build.core=esp32
184+
esp32s3.build.variant=esp32s3
185+
esp32s3.build.board=ESP32S3_DEV
186+
187+
esp32s3.build.cdc_on_boot=0
188+
esp32s3.build.msc_on_boot=0
189+
esp32s3.build.dfu_on_boot=0
190+
esp32s3.build.f_cpu=240000000L
191+
esp32s3.build.flash_size=4MB
192+
esp32s3.build.flash_freq=80m
193+
esp32s3.build.flash_mode=dio
194+
esp32s3.build.boot=qio
195+
esp32s3.build.partitions=default
196+
esp32s3.build.defines=
197+
esp32s3.build.loop_core=
198+
esp32s3.build.event_core=
199+
200+
esp32s3.menu.LoopCore.1=Core 1
201+
esp32s3.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
202+
esp32s3.menu.LoopCore.0=Core 0
203+
esp32s3.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
204+
205+
esp32s3.menu.EventsCore.1=Core 1
206+
esp32s3.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
207+
esp32s3.menu.EventsCore.0=Core 0
208+
esp32s3.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
209+
210+
esp32s3.menu.CDCOnBoot.default=Disabled
211+
esp32s3.menu.CDCOnBoot.default.build.cdc_on_boot=0
212+
esp32s3.menu.CDCOnBoot.cdc=Enabled
213+
esp32s3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
214+
215+
esp32s3.menu.MSCOnBoot.default=Disabled
216+
esp32s3.menu.MSCOnBoot.default.build.msc_on_boot=0
217+
esp32s3.menu.MSCOnBoot.msc=Enabled
218+
esp32s3.menu.MSCOnBoot.msc.build.msc_on_boot=1
219+
220+
esp32s3.menu.DFUOnBoot.default=Disabled
221+
esp32s3.menu.DFUOnBoot.default.build.dfu_on_boot=0
222+
esp32s3.menu.DFUOnBoot.dfu=Enabled
223+
esp32s3.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
224+
225+
esp32s3.menu.UploadMode.default=UART0
226+
esp32s3.menu.UploadMode.default.upload.use_1200bps_touch=false
227+
esp32s3.menu.UploadMode.default.upload.wait_for_upload_port=false
228+
esp32s3.menu.UploadMode.cdc=Internal USB
229+
esp32s3.menu.UploadMode.cdc.upload.use_1200bps_touch=true
230+
esp32s3.menu.UploadMode.cdc.upload.wait_for_upload_port=true
231+
232+
esp32s3.menu.PSRAM.disabled=Disabled
233+
esp32s3.menu.PSRAM.disabled.build.defines=
234+
esp32s3.menu.PSRAM.enabled=Enabled
235+
esp32s3.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
236+
237+
esp32s3.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
238+
esp32s3.menu.PartitionScheme.default.build.partitions=default
239+
esp32s3.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
240+
esp32s3.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
241+
esp32s3.menu.PartitionScheme.default_8MB=8M Flash (3MB APP/1.5MB FAT)
242+
esp32s3.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
243+
esp32s3.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
244+
esp32s3.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
245+
esp32s3.menu.PartitionScheme.minimal.build.partitions=minimal
246+
esp32s3.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
247+
esp32s3.menu.PartitionScheme.no_ota.build.partitions=no_ota
248+
esp32s3.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
249+
esp32s3.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
250+
esp32s3.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
251+
esp32s3.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
252+
esp32s3.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
253+
esp32s3.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
254+
esp32s3.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
255+
esp32s3.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
256+
esp32s3.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
257+
esp32s3.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
258+
esp32s3.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
259+
esp32s3.menu.PartitionScheme.huge_app.build.partitions=huge_app
260+
esp32s3.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
261+
esp32s3.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
262+
esp32s3.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
263+
esp32s3.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
264+
esp32s3.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FAT)
265+
esp32s3.menu.PartitionScheme.fatflash.build.partitions=ffat
266+
esp32s3.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
267+
esp32s3.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9MB FATFS)
268+
esp32s3.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
269+
esp32s3.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
270+
271+
esp32s3.menu.CPUFreq.240=240MHz (WiFi)
272+
esp32s3.menu.CPUFreq.240.build.f_cpu=240000000L
273+
esp32s3.menu.CPUFreq.160=160MHz (WiFi)
274+
esp32s3.menu.CPUFreq.160.build.f_cpu=160000000L
275+
esp32s3.menu.CPUFreq.80=80MHz (WiFi)
276+
esp32s3.menu.CPUFreq.80.build.f_cpu=80000000L
277+
esp32s3.menu.CPUFreq.40=40MHz
278+
esp32s3.menu.CPUFreq.40.build.f_cpu=40000000L
279+
esp32s3.menu.CPUFreq.20=20MHz
280+
esp32s3.menu.CPUFreq.20.build.f_cpu=20000000L
281+
esp32s3.menu.CPUFreq.10=10MHz
282+
esp32s3.menu.CPUFreq.10.build.f_cpu=10000000L
283+
284+
esp32s3.menu.FlashMode.qio=QIO
285+
esp32s3.menu.FlashMode.qio.build.flash_mode=dio
286+
esp32s3.menu.FlashMode.qio.build.boot=qio
287+
esp32s3.menu.FlashMode.dio=DIO
288+
esp32s3.menu.FlashMode.dio.build.flash_mode=dio
289+
esp32s3.menu.FlashMode.dio.build.boot=dio
290+
esp32s3.menu.FlashMode.qout=QOUT
291+
esp32s3.menu.FlashMode.qout.build.flash_mode=dout
292+
esp32s3.menu.FlashMode.qout.build.boot=qout
293+
esp32s3.menu.FlashMode.dout=DOUT
294+
esp32s3.menu.FlashMode.dout.build.flash_mode=dout
295+
esp32s3.menu.FlashMode.dout.build.boot=dout
296+
297+
esp32s3.menu.FlashFreq.80=80MHz
298+
esp32s3.menu.FlashFreq.80.build.flash_freq=80m
299+
esp32s3.menu.FlashFreq.40=40MHz
300+
esp32s3.menu.FlashFreq.40.build.flash_freq=40m
301+
302+
esp32s3.menu.FlashSize.4M=4MB (32Mb)
303+
esp32s3.menu.FlashSize.4M.build.flash_size=4MB
304+
esp32s3.menu.FlashSize.8M=8MB (64Mb)
305+
esp32s3.menu.FlashSize.8M.build.flash_size=8MB
306+
esp32s3.menu.FlashSize.8M.build.partitions=default_8MB
307+
esp32s3.menu.FlashSize.2M=2MB (16Mb)
308+
esp32s3.menu.FlashSize.2M.build.flash_size=2MB
309+
esp32s3.menu.FlashSize.2M.build.partitions=minimal
310+
esp32s3.menu.FlashSize.16M=16MB (128Mb)
311+
esp32s3.menu.FlashSize.16M.build.flash_size=16MB
312+
313+
esp32s3.menu.UploadSpeed.921600=921600
314+
esp32s3.menu.UploadSpeed.921600.upload.speed=921600
315+
esp32s3.menu.UploadSpeed.115200=115200
316+
esp32s3.menu.UploadSpeed.115200.upload.speed=115200
317+
esp32s3.menu.UploadSpeed.256000.windows=256000
318+
esp32s3.menu.UploadSpeed.256000.upload.speed=256000
319+
esp32s3.menu.UploadSpeed.230400.windows.upload.speed=256000
320+
esp32s3.menu.UploadSpeed.230400=230400
321+
esp32s3.menu.UploadSpeed.230400.upload.speed=230400
322+
esp32s3.menu.UploadSpeed.460800.linux=460800
323+
esp32s3.menu.UploadSpeed.460800.macosx=460800
324+
esp32s3.menu.UploadSpeed.460800.upload.speed=460800
325+
esp32s3.menu.UploadSpeed.512000.windows=512000
326+
esp32s3.menu.UploadSpeed.512000.upload.speed=512000
327+
328+
esp32s3.menu.DebugLevel.none=None
329+
esp32s3.menu.DebugLevel.none.build.code_debug=0
330+
esp32s3.menu.DebugLevel.error=Error
331+
esp32s3.menu.DebugLevel.error.build.code_debug=1
332+
esp32s3.menu.DebugLevel.warn=Warn
333+
esp32s3.menu.DebugLevel.warn.build.code_debug=2
334+
esp32s3.menu.DebugLevel.info=Info
335+
esp32s3.menu.DebugLevel.info.build.code_debug=3
336+
esp32s3.menu.DebugLevel.debug=Debug
337+
esp32s3.menu.DebugLevel.debug.build.code_debug=4
338+
esp32s3.menu.DebugLevel.verbose=Verbose
339+
esp32s3.menu.DebugLevel.verbose.build.code_debug=5
340+
341+
##############################################################
342+
164343
esp32s2.name=ESP32S2 Dev Module
165344
esp32s2.vid.0=0x303a
166345
esp32s2.pid.0=0x0002

cores/esp32/Esp.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,10 @@ extern "C" {
4040
#include "esp32s2/rom/spi_flash.h"
4141
#include "soc/efuse_reg.h"
4242
#define ESP_FLASH_IMAGE_BASE 0x1000
43+
#elif CONFIG_IDF_TARGET_ESP32S3
44+
#include "esp32s3/rom/spi_flash.h"
45+
#include "soc/efuse_reg.h"
46+
#define ESP_FLASH_IMAGE_BASE 0x1000
4347
#elif CONFIG_IDF_TARGET_ESP32C3
4448
#include "esp32c3/rom/spi_flash.h"
4549
#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c3 is located at 0x0000

cores/esp32/HardwareSerial.cpp

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@
1010
#ifndef SOC_RX0
1111
#if CONFIG_IDF_TARGET_ESP32
1212
#define SOC_RX0 3
13-
#elif CONFIG_IDF_TARGET_ESP32S2
13+
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
1414
#define SOC_RX0 44
1515
#elif CONFIG_IDF_TARGET_ESP32C3
1616
#define SOC_RX0 20
@@ -20,7 +20,7 @@
2020
#ifndef SOC_TX0
2121
#if CONFIG_IDF_TARGET_ESP32
2222
#define SOC_TX0 1
23-
#elif CONFIG_IDF_TARGET_ESP32S2
23+
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
2424
#define SOC_TX0 43
2525
#elif CONFIG_IDF_TARGET_ESP32C3
2626
#define SOC_TX0 21
@@ -35,7 +35,7 @@ void serialEvent(void) {}
3535
#ifndef RX1
3636
#if CONFIG_IDF_TARGET_ESP32
3737
#define RX1 9
38-
#elif CONFIG_IDF_TARGET_ESP32S2
38+
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
3939
#define RX1 18
4040
#elif CONFIG_IDF_TARGET_ESP32C3
4141
#define RX1 18
@@ -45,7 +45,7 @@ void serialEvent(void) {}
4545
#ifndef TX1
4646
#if CONFIG_IDF_TARGET_ESP32
4747
#define TX1 10
48-
#elif CONFIG_IDF_TARGET_ESP32S2
48+
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
4949
#define TX1 17
5050
#elif CONFIG_IDF_TARGET_ESP32C3
5151
#define TX1 19
@@ -60,12 +60,16 @@ void serialEvent1(void) {}
6060
#ifndef RX2
6161
#if CONFIG_IDF_TARGET_ESP32
6262
#define RX2 16
63+
#else
64+
#define RX2 -1
6365
#endif
6466
#endif
6567

6668
#ifndef TX2
6769
#if CONFIG_IDF_TARGET_ESP32
6870
#define TX2 17
71+
#else
72+
#define TX2 -1
6973
#endif
7074
#endif
7175

cores/esp32/esp32-hal-adc.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,10 @@ static uint8_t __analogVRefPin = 0;
3535
#include "esp32s2/rom/ets_sys.h"
3636
#include "soc/sens_reg.h"
3737
#include "soc/rtc_io_reg.h"
38+
#elif CONFIG_IDF_TARGET_ESP32S3
39+
#include "esp32s3/rom/ets_sys.h"
40+
#include "soc/sens_reg.h"
41+
#include "soc/rtc_io_reg.h"
3842
#elif CONFIG_IDF_TARGET_ESP32C3
3943
#include "esp32c3/rom/ets_sys.h"
4044
#else

cores/esp32/esp32-hal-cpu.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,9 @@
3333
#elif CONFIG_IDF_TARGET_ESP32S2
3434
#include "freertos/xtensa_timer.h"
3535
#include "esp32s2/rom/rtc.h"
36+
#elif CONFIG_IDF_TARGET_ESP32S3
37+
#include "freertos/xtensa_timer.h"
38+
#include "esp32s3/rom/rtc.h"
3639
#elif CONFIG_IDF_TARGET_ESP32C3
3740
#include "esp32c3/rom/rtc.h"
3841
#else

cores/esp32/esp32-hal-i2c-slave.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -127,7 +127,7 @@ typedef enum {
127127

128128
static inline i2c_stretch_cause_t i2c_ll_stretch_cause(i2c_dev_t *hw)
129129
{
130-
#if CONFIG_IDF_TARGET_ESP32C3
130+
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
131131
return hw->sr.stretch_cause;
132132
#elif CONFIG_IDF_TARGET_ESP32S2
133133
return hw->status_reg.stretch_cause;
@@ -164,7 +164,7 @@ static inline void i2c_ll_stretch_clr(i2c_dev_t *hw)
164164

165165
static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw)
166166
{
167-
#if CONFIG_IDF_TARGET_ESP32C3
167+
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
168168
return hw->sr.slave_addressed;
169169
#else
170170
return hw->status_reg.slave_addressed;
@@ -173,7 +173,7 @@ static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw)
173173

174174
static inline bool i2c_ll_slave_rw(i2c_dev_t *hw)//not exposed by hal_ll
175175
{
176-
#if CONFIG_IDF_TARGET_ESP32C3
176+
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
177177
return hw->sr.slave_rw;
178178
#else
179179
return hw->status_reg.slave_rw;

cores/esp32/esp32-hal-matrix.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,8 @@
2121
#include "esp32/rom/gpio.h"
2222
#elif CONFIG_IDF_TARGET_ESP32S2
2323
#include "esp32s2/rom/gpio.h"
24+
#elif CONFIG_IDF_TARGET_ESP32S3
25+
#include "esp32s3/rom/gpio.h"
2426
#elif CONFIG_IDF_TARGET_ESP32C3
2527
#include "esp32c3/rom/gpio.h"
2628
#else

cores/esp32/esp32-hal-misc.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,9 @@
4141
#elif CONFIG_IDF_TARGET_ESP32S2
4242
#include "esp32s2/rom/rtc.h"
4343
#include "driver/temp_sensor.h"
44+
#elif CONFIG_IDF_TARGET_ESP32S3
45+
#include "esp32s3/rom/rtc.h"
46+
#include "driver/temp_sensor.h"
4447
#elif CONFIG_IDF_TARGET_ESP32C3
4548
#include "esp32c3/rom/rtc.h"
4649
#include "driver/temp_sensor.h"

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