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Merge pull request ARMmbed#9870 from ChangwuShan/Re-enable_MPS2_platform
Re-enable MPS2 platform
2 parents 0b7d9af + 3d9b7df commit c961a5d

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33 files changed

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-265
lines changed

33 files changed

+4286
-265
lines changed

targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
#! armcc -E
22
;* MPS2 CMSIS Library
33
;*
4-
;* Copyright (c) 2006-2016 ARM Limited
4+
;* Copyright (c) 2006-2019 Arm Limited
55
;* All rights reserved.
66
;*
77
;* Redistribution and use in source and binary forms, with or without
@@ -44,11 +44,11 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region
4444
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
4545
*.o (RESET, +First)
4646
*(InRoot$$Sections)
47-
.ANY (+RO)
47+
*(+RO)
4848
}
4949
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
5050
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
51-
.ANY (+RW +ZI)
51+
*(+RW +ZI)
5252
}
5353
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
5454
}

targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/startup_MPS2.S

Lines changed: 36 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; MPS2 CMSIS Library
22
;
3-
; Copyright (c) 2006-2016 ARM Limited
3+
; Copyright (c) 2006-2019 Arm Limited
44
; All rights reserved.
55
;
66
; Redistribution and use in source and binary forms, with or without
@@ -38,29 +38,27 @@
3838
;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
3939
;
4040

41-
42-
; <h> Stack Configuration
43-
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
44-
; </h>
45-
46-
Stack_Size EQU 0x00004000
47-
48-
AREA STACK, NOINIT, READWRITE, ALIGN=3
49-
Stack_Mem SPACE Stack_Size
50-
__initial_sp
51-
52-
5341
; <h> Heap Configuration
5442
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
5543
; </h>
5644

57-
Heap_Size EQU 0x00001000
45+
Heap_Size EQU 0x00000400
5846

5947
AREA HEAP, NOINIT, READWRITE, ALIGN=3
6048
__heap_base
6149
Heap_Mem SPACE Heap_Size
6250
__heap_limit
6351

52+
; <h> Stack Configuration
53+
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
54+
; </h>
55+
56+
Stack_Size EQU 0x00001000
57+
58+
AREA STACK, NOINIT, READWRITE, ALIGN=3
59+
Stack_Mem SPACE Stack_Size
60+
61+
__initial_sp EQU 0x20400000
6462

6563
PRESERVE8
6664
THUMB
@@ -115,14 +113,14 @@ __Vectors DCD __initial_sp ; Top of Stack
115113
DCD UARTTX4_Handler ; UART 4 TX Handler
116114
DCD ADCSPI_Handler ; SHIELD ADC SPI exceptions Handler
117115
DCD SHIELDSPI_Handler ; SHIELD SPI exceptions Handler
118-
DCD PORT0_0_Handler ; GPIO Port 0 pin 0 Handler
119-
DCD PORT0_1_Handler ; GPIO Port 0 pin 1 Handler
120-
DCD PORT0_2_Handler ; GPIO Port 0 pin 2 Handler
121-
DCD PORT0_3_Handler ; GPIO Port 0 pin 3 Handler
122-
DCD PORT0_4_Handler ; GPIO Port 0 pin 4 Handler
123-
DCD PORT0_5_Handler ; GPIO Port 0 pin 5 Handler
124-
DCD PORT0_6_Handler ; GPIO Port 0 pin 6 Handler
125-
DCD PORT0_7_Handler ; GPIO Port 0 pin 7 Handler
116+
DCD PORT0_0_Handler ; GPIO Port 0 pin 0 Handler
117+
DCD PORT0_1_Handler ; GPIO Port 0 pin 1 Handler
118+
DCD PORT0_2_Handler ; GPIO Port 0 pin 2 Handler
119+
DCD PORT0_3_Handler ; GPIO Port 0 pin 3 Handler
120+
DCD PORT0_4_Handler ; GPIO Port 0 pin 4 Handler
121+
DCD PORT0_5_Handler ; GPIO Port 0 pin 5 Handler
122+
DCD PORT0_6_Handler ; GPIO Port 0 pin 6 Handler
123+
DCD PORT0_7_Handler ; GPIO Port 0 pin 7 Handler
126124
__Vectors_End
127125

128126
__Vectors_Size EQU __Vectors_End - __Vectors
@@ -217,22 +215,22 @@ UARTOVF_Handler
217215
ETHERNET_Handler
218216
I2S_Handler
219217
TSC_Handler
220-
PORT2_COMB_Handler
221-
PORT3_COMB_Handler
222-
UARTRX3_Handler
223-
UARTTX3_Handler
224-
UARTRX4_Handler
225-
UARTTX4_Handler
226-
ADCSPI_Handler
227-
SHIELDSPI_Handler
228-
PORT0_0_Handler
229-
PORT0_1_Handler
230-
PORT0_2_Handler
231-
PORT0_3_Handler
232-
PORT0_4_Handler
233-
PORT0_5_Handler
234-
PORT0_6_Handler
235-
PORT0_7_Handler
218+
PORT2_COMB_Handler
219+
PORT3_COMB_Handler
220+
UARTRX3_Handler
221+
UARTTX3_Handler
222+
UARTRX4_Handler
223+
UARTTX4_Handler
224+
ADCSPI_Handler
225+
SHIELDSPI_Handler
226+
PORT0_0_Handler
227+
PORT0_1_Handler
228+
PORT0_2_Handler
229+
PORT0_3_Handler
230+
PORT0_4_Handler
231+
PORT0_5_Handler
232+
PORT0_6_Handler
233+
PORT0_7_Handler
236234
B .
237235

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ENDP
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Original file line numberDiff line numberDiff line change
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1+
/*
2+
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*
6+
* Licensed under the Apache License, Version 2.0 (the License); you may
7+
* not use this file except in compliance with the License.
8+
* You may obtain a copy of the License at
9+
*
10+
* http://www.apache.org/licenses/LICENSE-2.0
11+
*
12+
* Unless required by applicable law or agreed to in writing, software
13+
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
14+
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15+
* See the License for the specific language governing permissions and
16+
* limitations under the License.
17+
*/
18+
19+
/*
20+
* This file is derivative of mbed-os V5.10.4 CM3DS MPS2.ld for GCC_ARM
21+
*
22+
* Linker script for AN382
23+
*/
24+
25+
26+
MEMORY
27+
{
28+
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00400000 /* 4MB ZBTSRAM1 */
29+
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00400000 /* 4MB ZBTSRAM2 & ZBTSRAM3 */
30+
}
31+
32+
/* Linker script to place sections and symbol values. Should be used together
33+
* with other linker script that defines memory regions FLASH and RAM.
34+
* It references following symbols, which must be defined in code:
35+
* Reset_Handler : Entry of reset handler
36+
*
37+
* It defines following symbols, which code can use without definition:
38+
* __exidx_start
39+
* __exidx_end
40+
* __etext
41+
* __data_start__
42+
* __preinit_array_start
43+
* __preinit_array_end
44+
* __init_array_start
45+
* __init_array_end
46+
* __fini_array_start
47+
* __fini_array_end
48+
* __data_end__
49+
* __bss_start__
50+
* __bss_end__
51+
* __end__
52+
* end
53+
* __HeapLimit
54+
* __StackLimit
55+
* __StackTop
56+
* __stack
57+
*/
58+
ENTRY(Reset_Handler)
59+
60+
HEAP_SIZE = 0x1000;
61+
STACK_SIZE = 0x400;
62+
63+
/* Size of the vector table in SRAM */
64+
NVIC_NUM_VECTORS = (16 + 48);
65+
M_VECTOR_RAM_SIZE = NVIC_NUM_VECTORS * 4;
66+
67+
SECTIONS
68+
{
69+
.isr_vector :
70+
{
71+
__vector_table = .;
72+
KEEP(*(.vector_table))
73+
. = ALIGN(4);
74+
} > FLASH
75+
76+
.text :
77+
{
78+
. = ALIGN(4);
79+
*(.text*)
80+
81+
KEEP(*(.init))
82+
KEEP(*(.fini))
83+
84+
/* .ctors */
85+
*crtbegin.o(.ctors)
86+
*crtbegin?.o(.ctors)
87+
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
88+
*(SORT(.ctors.*))
89+
*(.ctors)
90+
91+
/* .dtors */
92+
*crtbegin.o(.dtors)
93+
*crtbegin?.o(.dtors)
94+
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
95+
*(SORT(.dtors.*))
96+
*(.dtors)
97+
98+
*(.rodata*)
99+
100+
KEEP(*(.eh_frame*))
101+
} > FLASH
102+
103+
.ARM.extab :
104+
{
105+
*(.ARM.extab* .gnu.linkonce.armextab.*)
106+
} > FLASH
107+
108+
__exidx_start = .;
109+
.ARM.exidx :
110+
{
111+
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
112+
} > FLASH
113+
__exidx_end = .;
114+
115+
.interrupts_ram :
116+
{
117+
. = ALIGN(4);
118+
__VECTOR_RAM__ = .;
119+
__interrupts_ram_start__ = .; /* Create a global symbol at data start */
120+
. += M_VECTOR_RAM_SIZE;
121+
. = ALIGN(4);
122+
__interrupts_ram_end__ = .; /* Define a global symbol at data end */
123+
} > RAM
124+
125+
.data :
126+
{
127+
PROVIDE(__etext = LOADADDR(.data));
128+
. = ALIGN(4);
129+
__data_start__ = .;
130+
*(.data*)
131+
132+
. = ALIGN(4);
133+
/* preinit data */
134+
PROVIDE (__preinit_array_start = .);
135+
KEEP(*(.preinit_array))
136+
PROVIDE (__preinit_array_end = .);
137+
138+
. = ALIGN(4);
139+
/* init data */
140+
PROVIDE (__init_array_start = .);
141+
KEEP(*(SORT(.init_array.*)))
142+
KEEP(*(.init_array))
143+
PROVIDE (__init_array_end = .);
144+
145+
146+
. = ALIGN(4);
147+
/* finit data */
148+
PROVIDE (__fini_array_start = .);
149+
KEEP(*(SORT(.fini_array.*)))
150+
KEEP(*(.fini_array))
151+
PROVIDE (__fini_array_end = .);
152+
153+
. = ALIGN(4);
154+
/* All data end */
155+
__data_end__ = .;
156+
157+
} > RAM AT > FLASH
158+
159+
.uninitialized (NOLOAD):
160+
{
161+
. = ALIGN(32);
162+
__uninitialized_start = .;
163+
*(.uninitialized)
164+
KEEP(*(.keep.uninitialized))
165+
. = ALIGN(32);
166+
__uninitialized_end = .;
167+
} > RAM
168+
169+
.bss :
170+
{
171+
. = ALIGN(4);
172+
__START_BSS = .;
173+
__bss_start__ = .;
174+
*(.bss*)
175+
*(COMMON)
176+
. = ALIGN(4);
177+
__bss_end__ = .;
178+
__END_BSS = .;
179+
180+
} > RAM
181+
182+
bss_size = __bss_end__ - __bss_start__;
183+
184+
.heap :
185+
{
186+
. = ALIGN(8);
187+
__end__ = .;
188+
PROVIDE(end = .);
189+
__HeapBase = .;
190+
. += HEAP_SIZE;
191+
__HeapLimit = .;
192+
__heap_limit = .; /* Add for _sbrk */
193+
} > RAM
194+
195+
/* Set stack top to end of RAM, and stack limit move down by
196+
* size of stack_dummy section */
197+
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
198+
__StackLimit = __StackTop - STACK_SIZE;
199+
PROVIDE(__stack = __StackTop);
200+
201+
/* Check if data + heap + stack exceeds RAM limit */
202+
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
203+
204+
} /* End of sections */

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