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Merge pull request ARMmbed#1638 from dbestm/dev_xxx_f746xg_rtc
[xxx_F746XG] enhance RTC api
2 parents 53fd30a + 8a1a67d commit 43b94d2

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3 files changed

+38
-22
lines changed

3 files changed

+38
-22
lines changed

libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device.h

+1
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,7 @@
4848
#define DEVICE_SPISLAVE 1
4949

5050
#define DEVICE_RTC 1
51+
#define DEVICE_RTC_LSI 0
5152

5253
#define DEVICE_PWMOUT 1
5354

libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F746ZG/device.h

+1
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,7 @@
4949
#define DEVICE_SPISLAVE 1
5050

5151
#define DEVICE_RTC 1
52+
#define DEVICE_RTC_LSI 0
5253

5354
#define DEVICE_PWMOUT 1
5455

libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F7/rtc_api.c

+36-22
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,10 @@
3333

3434
#include "mbed_error.h"
3535

36+
#if DEVICE_RTC_LSI
37+
static int rtc_inited = 0;
38+
#endif
39+
3640
static RTC_HandleTypeDef RtcHandle;
3741

3842
void rtc_init(void)
@@ -52,33 +56,35 @@ void rtc_init(void)
5256
__HAL_RCC_BACKUPRESET_FORCE();
5357
__HAL_RCC_BACKUPRESET_RELEASE();
5458

59+
#if !DEVICE_RTC_LSI
5560
// Enable LSE Oscillator
5661
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
5762
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
5863
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
59-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
64+
RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
65+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) { // Check if LSE has started correctly
6066
// Connect LSE to RTC
6167
__HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSE);
6268
__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
6369
rtc_freq = LSE_VALUE;
6470
} else {
65-
// Enable LSI clock
66-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
67-
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
68-
RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
69-
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
70-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
71-
error("RTC error: LSI clock initialization failed.");
72-
}
73-
// Connect LSI to RTC
74-
__HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
75-
__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
76-
// [TODO] This value is LSI typical value. To be measured precisely using a timer input capture
77-
rtc_freq = LSI_VALUE;
71+
error("Cannot initialize RTC with LSE\n");
7872
}
79-
80-
// Check if RTC is already initialized
81-
if ((RTC->ISR & RTC_ISR_INITS) == RTC_ISR_INITS) return;
73+
#else
74+
// Enable LSI clock
75+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
76+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
77+
RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
78+
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
79+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
80+
error("Cannot initialize RTC with LSI\n");
81+
}
82+
// Connect LSI to RTC
83+
__HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
84+
__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
85+
// This value is LSI typical value. To be measured precisely using a timer input capture for example.
86+
rtc_freq = LSI_VALUE;
87+
#endif
8288

8389
// Enable RTC
8490
__HAL_RCC_RTC_ENABLE();
@@ -117,15 +123,23 @@ void rtc_free(void)
117123
RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
118124
RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
119125
HAL_RCC_OscConfig(&RCC_OscInitStruct);
126+
127+
#if DEVICE_RTC_LSI
128+
rtc_inited = 0;
129+
#endif
120130
}
121131

122132
int rtc_isenabled(void)
123133
{
124-
if(RTC->ISR != 7) {
125-
return 1;
126-
} else {
127-
return 0;
128-
}
134+
#if DEVICE_RTC_LSI
135+
return rtc_inited;
136+
#else
137+
if ((RTC->ISR & RTC_ISR_INITS) == RTC_ISR_INITS) {
138+
return 1;
139+
} else {
140+
return 0;
141+
}
142+
#endif
129143
}
130144

131145
/*

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