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Merge pull request ARMmbed#3755 from ARMmbed/release-candidate
Release candidate for mbed-os-5.3.5
2 parents 269f58d + bd70614 commit bcf7085

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‎.travis.yml

+1
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@ script:
55
- make -C events/equeue test clean
66
- PYTHONPATH=. python tools/test/config_test/config_test.py
77
- PYTHONPATH=. python tools/test/build_api/build_api_test.py
8+
- PYTHONPATH=. python tools/test/targets/target_test.py
89
- python tools/test/pylint.py
910
- py.test tools/test/toolchains/api.py
1011
- python tools/test/memap/memap_test.py

‎cmsis/core_cmSecureAccess.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@
4242
/* ########################### Core Secure Access ########################### */
4343

4444
#ifdef FEATURE_UVISOR
45-
#include "uvisor-lib.h"
45+
#include "uvisor-lib/uvisor-lib.h"
4646

4747
/* Secure uVisor implementation. */
4848

‎features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_STM/TARGET_STM32F4/TARGET_F429_F439/stm32f4_eth_init.c renamed to ‎features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F429ZI/stm32f4_eth_init.c

File renamed without changes.

‎features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F439ZI/stm32f4_eth_init.c

+87
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,87 @@
1+
#include "stm32f4xx_hal.h"
2+
3+
/**
4+
* Override HAL Eth Init function
5+
*/
6+
void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
7+
{
8+
GPIO_InitTypeDef GPIO_InitStructure;
9+
if (heth->Instance == ETH) {
10+
11+
/* Enable GPIOs clocks */
12+
__HAL_RCC_GPIOA_CLK_ENABLE();
13+
__HAL_RCC_GPIOB_CLK_ENABLE();
14+
__HAL_RCC_GPIOC_CLK_ENABLE();
15+
__HAL_RCC_GPIOG_CLK_ENABLE();
16+
17+
/** ETH GPIO Configuration
18+
RMII_REF_CLK ----------------------> PA1
19+
RMII_MDIO -------------------------> PA2
20+
RMII_MDC --------------------------> PC1
21+
RMII_MII_CRS_DV -------------------> PA7
22+
RMII_MII_RXD0 ---------------------> PC4
23+
RMII_MII_RXD1 ---------------------> PC5
24+
RMII_MII_RXER ---------------------> PG2
25+
RMII_MII_TX_EN --------------------> PG11
26+
RMII_MII_TXD0 ---------------------> PG13
27+
RMII_MII_TXD1 ---------------------> PB13
28+
*/
29+
/* Configure PA1, PA2 and PA7 */
30+
GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
31+
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
32+
GPIO_InitStructure.Pull = GPIO_NOPULL;
33+
GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
34+
GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
35+
HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
36+
37+
/* Configure PB13 */
38+
GPIO_InitStructure.Pin = GPIO_PIN_13;
39+
HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
40+
41+
/* Configure PC1, PC4 and PC5 */
42+
GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
43+
HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
44+
45+
/* Configure PG2, PG11 and PG13 */
46+
GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13;
47+
HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
48+
49+
/* Enable the Ethernet global Interrupt */
50+
HAL_NVIC_SetPriority(ETH_IRQn, 0x7, 0);
51+
HAL_NVIC_EnableIRQ(ETH_IRQn);
52+
53+
/* Enable ETHERNET clock */
54+
__HAL_RCC_ETH_CLK_ENABLE();
55+
}
56+
}
57+
58+
/**
59+
* Override HAL Eth DeInit function
60+
*/
61+
void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
62+
{
63+
if (heth->Instance == ETH) {
64+
/* Peripheral clock disable */
65+
__HAL_RCC_ETH_CLK_DISABLE();
66+
67+
/** ETH GPIO Configuration
68+
RMII_REF_CLK ----------------------> PA1
69+
RMII_MDIO -------------------------> PA2
70+
RMII_MDC --------------------------> PC1
71+
RMII_MII_CRS_DV -------------------> PA7
72+
RMII_MII_RXD0 ---------------------> PC4
73+
RMII_MII_RXD1 ---------------------> PC5
74+
RMII_MII_RXER ---------------------> PG2
75+
RMII_MII_TX_EN --------------------> PG11
76+
RMII_MII_TXD0 ---------------------> PG13
77+
RMII_MII_TXD1 ---------------------> PB13
78+
*/
79+
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
80+
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13);
81+
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
82+
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13);
83+
84+
/* Disable the Ethernet global Interrupt */
85+
NVIC_DisableIRQ(ETH_IRQn);
86+
}
87+
}

‎features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/stm32f7_eth_init.c renamed to ‎features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F746ZG/stm32f7_eth_init.c

File renamed without changes.

‎features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F756ZG/stm32f7_eth_init.c

+89
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,89 @@
1+
#include "stm32f7xx_hal.h"
2+
3+
/**
4+
* Override HAL Eth Init function
5+
*/
6+
void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
7+
{
8+
GPIO_InitTypeDef GPIO_InitStructure;
9+
if (heth->Instance == ETH) {
10+
/* Disable DCache for STM32F7 family */
11+
SCB_DisableDCache();
12+
13+
/* Enable GPIOs clocks */
14+
__HAL_RCC_GPIOA_CLK_ENABLE();
15+
__HAL_RCC_GPIOB_CLK_ENABLE();
16+
__HAL_RCC_GPIOC_CLK_ENABLE();
17+
__HAL_RCC_GPIOG_CLK_ENABLE();
18+
19+
/** ETH GPIO Configuration
20+
RMII_REF_CLK ----------------------> PA1
21+
RMII_MDIO -------------------------> PA2
22+
RMII_MDC --------------------------> PC1
23+
RMII_MII_CRS_DV -------------------> PA7
24+
RMII_MII_RXD0 ---------------------> PC4
25+
RMII_MII_RXD1 ---------------------> PC5
26+
RMII_MII_RXER ---------------------> PG2
27+
RMII_MII_TX_EN --------------------> PG11
28+
RMII_MII_TXD0 ---------------------> PG13
29+
RMII_MII_TXD1 ---------------------> PB13
30+
*/
31+
/* Configure PA1, PA2 and PA7 */
32+
GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
33+
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
34+
GPIO_InitStructure.Pull = GPIO_NOPULL;
35+
GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
36+
GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
37+
HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
38+
39+
/* Configure PB13 */
40+
GPIO_InitStructure.Pin = GPIO_PIN_13;
41+
HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
42+
43+
/* Configure PC1, PC4 and PC5 */
44+
GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
45+
HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
46+
47+
/* Configure PG2, PG11 and PG13 */
48+
GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13;
49+
HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
50+
51+
/* Enable the Ethernet global Interrupt */
52+
HAL_NVIC_SetPriority(ETH_IRQn, 0x7, 0);
53+
HAL_NVIC_EnableIRQ(ETH_IRQn);
54+
55+
/* Enable ETHERNET clock */
56+
__HAL_RCC_ETH_CLK_ENABLE();
57+
}
58+
}
59+
60+
/**
61+
* Override HAL Eth DeInit function
62+
*/
63+
void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
64+
{
65+
if (heth->Instance == ETH) {
66+
/* Peripheral clock disable */
67+
__HAL_RCC_ETH_CLK_DISABLE();
68+
69+
/** ETH GPIO Configuration
70+
RMII_REF_CLK ----------------------> PA1
71+
RMII_MDIO -------------------------> PA2
72+
RMII_MDC --------------------------> PC1
73+
RMII_MII_CRS_DV -------------------> PA7
74+
RMII_MII_RXD0 ---------------------> PC4
75+
RMII_MII_RXD1 ---------------------> PC5
76+
RMII_MII_RXER ---------------------> PG2
77+
RMII_MII_TX_EN --------------------> PG11
78+
RMII_MII_TXD0 ---------------------> PG13
79+
RMII_MII_TXD1 ---------------------> PB13
80+
*/
81+
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
82+
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13);
83+
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
84+
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13);
85+
86+
/* Disable the Ethernet global Interrupt */
87+
NVIC_DisableIRQ(ETH_IRQn);
88+
}
89+
}

‎features/FEATURE_UVISOR/includes/uvisor-lib/rtx/rtx_box_index.h

+1
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@
1818
#define __RTX_BOX_INDEX_H__
1919

2020
#include "cmsis_os.h"
21+
#include "api/inc/vmpu_exports.h"
2122

2223
#ifdef __cplusplus
2324
extern "C" {

‎features/unsupported/USBDevice/USBAudio/USBAudio.cpp

+12-12
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,7 @@ bool USBAudio::readWrite(uint8_t * buf_read, uint8_t * buf_write) {
8585
SOF_handler = false;
8686
writeIN = false;
8787
if (interruptIN) {
88-
USBDevice::writeNB(EP3IN, buf_write, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
88+
USBDevice::writeNB(EPISO_IN, buf_write, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
8989
} else {
9090
buf_stream_out = buf_write;
9191
}
@@ -102,7 +102,7 @@ bool USBAudio::write(uint8_t * buf) {
102102
writeIN = false;
103103
SOF_handler = false;
104104
if (interruptIN) {
105-
USBDevice::writeNB(EP3IN, buf, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
105+
USBDevice::writeNB(EPISO_IN, buf, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
106106
} else {
107107
buf_stream_out = buf;
108108
}
@@ -115,13 +115,13 @@ bool USBAudio::write(uint8_t * buf) {
115115

116116
void USBAudio::writeSync(uint8_t *buf)
117117
{
118-
USBDevice::writeNB(EP3IN, buf, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
118+
USBDevice::writeNB(EPISO_IN, buf, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
119119
}
120120

121121
uint32_t USBAudio::readSync(uint8_t *buf)
122122
{
123123
uint32_t size = 0;
124-
USBDevice::readEP(EP3OUT, (uint8_t *)buf, &size, PACKET_SIZE_ISO_IN);
124+
USBDevice::readEP(EPISO_OUT, (uint8_t *)buf, &size, PACKET_SIZE_ISO_IN);
125125
return size;
126126
}
127127

@@ -134,15 +134,15 @@ bool USBAudio::EPISO_OUT_callback() {
134134
uint32_t size = 0;
135135
interruptOUT = true;
136136
if (buf_stream_in != NULL) {
137-
readEP(EP3OUT, (uint8_t *)buf_stream_in, &size, PACKET_SIZE_ISO_IN);
137+
readEP(EPISO_OUT, (uint8_t *)buf_stream_in, &size, PACKET_SIZE_ISO_IN);
138138
available = true;
139139
buf_stream_in = NULL;
140140
}
141141
else {
142142
if (rxDone)
143143
rxDone.call();
144144
}
145-
readStart(EP3OUT, PACKET_SIZE_ISO_IN);
145+
readStart(EPISO_OUT, PACKET_SIZE_ISO_IN);
146146
return false;
147147
}
148148

@@ -164,10 +164,10 @@ void USBAudio::SOF(int frameNumber) {
164164
if (!interruptOUT) {
165165
// read the isochronous endpoint
166166
if (buf_stream_in != NULL) {
167-
if (USBDevice::readEP_NB(EP3OUT, (uint8_t *)buf_stream_in, &size, PACKET_SIZE_ISO_IN)) {
167+
if (USBDevice::readEP_NB(EPISO_OUT, (uint8_t *)buf_stream_in, &size, PACKET_SIZE_ISO_IN)) {
168168
if (size) {
169169
available = true;
170-
readStart(EP3OUT, PACKET_SIZE_ISO_IN);
170+
readStart(EPISO_OUT, PACKET_SIZE_ISO_IN);
171171
buf_stream_in = NULL;
172172
}
173173
}
@@ -177,7 +177,7 @@ void USBAudio::SOF(int frameNumber) {
177177
if (!interruptIN) {
178178
// write if needed
179179
if (buf_stream_out != NULL) {
180-
USBDevice::writeNB(EP3IN, (uint8_t *)buf_stream_out, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
180+
USBDevice::writeNB(EPISO_IN, (uint8_t *)buf_stream_out, PACKET_SIZE_ISO_OUT, PACKET_SIZE_ISO_OUT);
181181
buf_stream_out = NULL;
182182
}
183183
}
@@ -194,11 +194,11 @@ bool USBAudio::USBCallback_setConfiguration(uint8_t configuration) {
194194
}
195195

196196
// Configure isochronous endpoint
197-
realiseEndpoint(EP3OUT, PACKET_SIZE_ISO_IN, ISOCHRONOUS);
198-
realiseEndpoint(EP3IN, PACKET_SIZE_ISO_OUT, ISOCHRONOUS);
197+
realiseEndpoint(EPISO_OUT, PACKET_SIZE_ISO_IN, ISOCHRONOUS);
198+
realiseEndpoint(EPISO_IN, PACKET_SIZE_ISO_OUT, ISOCHRONOUS);
199199

200200
// activate readings on this endpoint
201-
readStart(EP3OUT, PACKET_SIZE_ISO_IN);
201+
readStart(EPISO_OUT, PACKET_SIZE_ISO_IN);
202202
return true;
203203
}
204204

‎features/unsupported/USBDevice/USBDevice/TARGET_STM/USBHAL_STM_TARGET.h

+13-3
Original file line numberDiff line numberDiff line change
@@ -15,17 +15,27 @@
1515
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
1616
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
1717
*/
18+
1819
#ifdef TARGET_STM32F303ZE
1920
#include "USBHAL_STM32F303ZE.h"
2021
#endif
21-
#if defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F446ZE) || defined(TARGET_STM32F207ZG) \
22-
|| defined(TARGET_STM32F767ZI) || defined (TARGET_STM32F746ZG) || defined(TARGET_STM32F411RE) \
23-
|| defined(TARGET_STM32F407VG) || defined(TARGET_STM32F401RE)
22+
23+
#if defined(TARGET_STM32F207ZG) || \
24+
defined(TARGET_STM32F401RE) || \
25+
defined(TARGET_STM32F407VG) || \
26+
defined(TARGET_STM32F411RE) || \
27+
defined(TARGET_STM32F412ZG) || \
28+
defined(TARGET_STM32F429ZI) || \
29+
defined(TARGET_STM32F446ZE) || \
30+
defined(TARGET_STM32F746ZG) || \
31+
defined(TARGET_STM32F767ZI)
2432
#include "USBHAL_STM_144_64pins.h"
2533
#endif
34+
2635
#ifdef TARGET_STM32L476VG
2736
#include "USBHAL_STM32L476VG.h"
2837
#endif
38+
2939
#ifdef TARGET_STM32F769NI
3040
#include "USBHAL_STM32F769NI.h"
3141
#endif

‎features/unsupported/USBDevice/USBDevice/USBHAL_STM32F4.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,7 @@ USBHAL::USBHAL(void) {
4848
// Enable power and clocking
4949
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
5050

51-
#if defined(TARGET_STM32F407VG) || defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F429ZI)
51+
#if defined(TARGET_STM32F407VG) || defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F412ZG) || defined(TARGET_STM32F429ZI)
5252
pin_function(PA_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS));
5353
pin_function(PA_9, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLDOWN, GPIO_AF10_OTG_FS));
5454
pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS));

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