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variant(u5): add generic U595Z(I-J)TxQ, U599Z(I-J)TxQ, U5A5ZJTxQ and U5A9ZJTxQ
Signed-off-by: patricklaf <[email protected]> Co-authored-by: Frederic Pillon <[email protected]>
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‎README.md

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@@ -778,6 +778,11 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| :green_heart: | STM32U585AIIxQ | Generic Board | *2.1.0* | |
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| :green_heart: | STM32U585CIx | Generic Board | *2.7.0* | |
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| :green_heart: | STM32U585ZITxQ | Generic Board | *2.1.0* | |
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| :yellow_heart: | STM32U595ZITxQ<br>STM32U595ZJTxQ | Generic Board | **2.11.0** | |
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| :yellow_heart: | STM32U599ZITxQ<br>STM32U599ZJTxQ | Generic Board | **2.11.0** | |
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| :yellow_heart: | STM32U5A5ZJTxQ | Generic Board | **2.11.0** | |
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| :yellow_heart: | STM32U5A9ZJTxQ | Generic Board | **2.11.0** | |
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### Generic STM32WB boards
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‎boards.txt

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@@ -12757,6 +12757,60 @@ GenU5.menu.pnum.GENERIC_U585ZITXQ.build.product_line=STM32U585xx
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GenU5.menu.pnum.GENERIC_U585ZITXQ.build.variant=STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ
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GenU5.menu.pnum.GENERIC_U585ZITXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U585.svd
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# Generic U595ZITxQ
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GenU5.menu.pnum.GENERIC_U595ZITXQ=Generic U595ZITxQ
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GenU5.menu.pnum.GENERIC_U595ZITXQ.upload.maximum_size=2097152
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GenU5.menu.pnum.GENERIC_U595ZITXQ.upload.maximum_data_size=2555904
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GenU5.menu.pnum.GENERIC_U595ZITXQ.build.board=GENERIC_U595ZITXQ
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GenU5.menu.pnum.GENERIC_U595ZITXQ.build.product_line=STM32U595xx
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GenU5.menu.pnum.GENERIC_U595ZITXQ.build.variant=STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ
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GenU5.menu.pnum.GENERIC_U595ZITXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U595.svd
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# Generic U595ZJTxQ
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GenU5.menu.pnum.GENERIC_U595ZJTXQ=Generic U595ZJTxQ
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GenU5.menu.pnum.GENERIC_U595ZJTXQ.upload.maximum_size=4194304
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GenU5.menu.pnum.GENERIC_U595ZJTXQ.upload.maximum_data_size=2555904
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GenU5.menu.pnum.GENERIC_U595ZJTXQ.build.board=GENERIC_U595ZJTXQ
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GenU5.menu.pnum.GENERIC_U595ZJTXQ.build.product_line=STM32U595xx
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GenU5.menu.pnum.GENERIC_U595ZJTXQ.build.variant=STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ
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GenU5.menu.pnum.GENERIC_U595ZJTXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U595.svd
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# Generic U599ZITxQ
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GenU5.menu.pnum.GENERIC_U599ZITXQ=Generic U599ZITxQ
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GenU5.menu.pnum.GENERIC_U599ZITXQ.upload.maximum_size=2097152
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GenU5.menu.pnum.GENERIC_U599ZITXQ.upload.maximum_data_size=2555904
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GenU5.menu.pnum.GENERIC_U599ZITXQ.build.board=GENERIC_U599ZITXQ
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GenU5.menu.pnum.GENERIC_U599ZITXQ.build.product_line=STM32U599xx
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GenU5.menu.pnum.GENERIC_U599ZITXQ.build.variant=STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ
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GenU5.menu.pnum.GENERIC_U599ZITXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U599.svd
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# Generic U599ZJTxQ
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GenU5.menu.pnum.GENERIC_U599ZJTXQ=Generic U599ZJTxQ
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GenU5.menu.pnum.GENERIC_U599ZJTXQ.upload.maximum_size=4194304
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GenU5.menu.pnum.GENERIC_U599ZJTXQ.upload.maximum_data_size=2555904
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GenU5.menu.pnum.GENERIC_U599ZJTXQ.build.board=GENERIC_U599ZJTXQ
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GenU5.menu.pnum.GENERIC_U599ZJTXQ.build.product_line=STM32U599xx
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GenU5.menu.pnum.GENERIC_U599ZJTXQ.build.variant=STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ
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GenU5.menu.pnum.GENERIC_U599ZJTXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U599.svd
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# Generic U5A5ZJTxQ
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GenU5.menu.pnum.GENERIC_U5A5ZJTXQ=Generic U5A5ZJTxQ
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GenU5.menu.pnum.GENERIC_U5A5ZJTXQ.upload.maximum_size=4194304
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GenU5.menu.pnum.GENERIC_U5A5ZJTXQ.upload.maximum_data_size=2555904
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GenU5.menu.pnum.GENERIC_U5A5ZJTXQ.build.board=GENERIC_U5A5ZJTXQ
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GenU5.menu.pnum.GENERIC_U5A5ZJTXQ.build.product_line=STM32U5A5xx
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GenU5.menu.pnum.GENERIC_U5A5ZJTXQ.build.variant=STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ
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GenU5.menu.pnum.GENERIC_U5A5ZJTXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U5A5.svd
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# Generic U5A9ZJTxQ
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GenU5.menu.pnum.GENERIC_U5A9ZJTXQ=Generic U5A9ZJTxQ
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GenU5.menu.pnum.GENERIC_U5A9ZJTXQ.upload.maximum_size=4194304
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GenU5.menu.pnum.GENERIC_U5A9ZJTXQ.upload.maximum_data_size=2555904
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GenU5.menu.pnum.GENERIC_U5A9ZJTXQ.build.board=GENERIC_U5A9ZJTXQ
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GenU5.menu.pnum.GENERIC_U5A9ZJTXQ.build.product_line=STM32U5A9xx
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GenU5.menu.pnum.GENERIC_U5A9ZJTXQ.build.variant=STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ
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GenU5.menu.pnum.GENERIC_U5A9ZJTXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U5A9.svd
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# Upload menu
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GenU5.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
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GenU5.menu.upload_method.swdMethod.upload.protocol=swd

‎variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/CMakeLists.txt

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@@ -21,6 +21,7 @@ target_link_libraries(variant INTERFACE variant_usage)
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add_library(variant_bin STATIC EXCLUDE_FROM_ALL
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generic_clock.c
2323
PeripheralPins.c
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PeripheralPins_NUCLEO_U5A5ZJ_Q.c
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variant_generic.cpp
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)
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target_link_libraries(variant_bin PUBLIC variant_usage)

‎variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/generic_clock.c

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*/
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WEAK void SystemClock_Config(void)
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{
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/* SystemClock_Config can be generated by STM32CubeMX */
26-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
27+
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
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/** Configure the main internal regulator output voltage
30+
*/
31+
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) {
32+
Error_Handler();
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}
34+
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/** Initializes the CPU, AHB and APB buses clocks
36+
*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI
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| RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_MSI;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.LSIState = RCC_LSI_ON;
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RCC_OscInitStruct.MSIState = RCC_MSI_ON;
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RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_0;
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RCC_OscInitStruct.LSIDiv = RCC_LSI_DIV1;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
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RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV4;
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RCC_OscInitStruct.PLL.PLLM = 3;
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RCC_OscInitStruct.PLL.PLLN = 10;
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RCC_OscInitStruct.PLL.PLLP = 4;
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RCC_OscInitStruct.PLL.PLLQ = 2;
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RCC_OscInitStruct.PLL.PLLR = 1;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_1;
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RCC_OscInitStruct.PLL.PLLFRACN = 0;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
58+
Error_Handler();
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}
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/** Initializes the CPU, AHB and APB buses clocks
61+
*/
62+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
64+
| RCC_CLOCKTYPE_PCLK3;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
72+
Error_Handler();
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}
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_DAC1
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| RCC_PERIPHCLK_CLK48 | RCC_PERIPHCLK_LPUART1;
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PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
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PeriphClkInit.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_HSI;
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PeriphClkInit.Dac1ClockSelection = RCC_DAC1CLKSOURCE_LSI;
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PeriphClkInit.IclkClockSelection = RCC_CLK48CLKSOURCE_HSI48;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
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Error_Handler();
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}
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}
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#endif /* ARDUINO_GENERIC_* */

‎variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/ldscript.ld

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/*
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******************************************************************************
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**
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** File : LinkerScript.ld
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**
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** Author : STM32CubeIDE
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**
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** Abstract : Linker script for STM32U595xI Device from STM32U5 series
9+
** 2048Kbytes FLASH
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** 2512Kbytes RAM
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**
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** Set heap size, stack size and stack location according
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** to application requirements.
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**
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** Set memory bank area and size if external memory is used.
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**
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** Target : STMicroelectronics STM32
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**
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** Distribution: The file is distributed as is without any warranty
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** of any kind.
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**
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*****************************************************************************
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** @attention
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**
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** Copyright (c) 2024 STMicroelectronics.
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** All rights reserved.
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**
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** This software is licensed under terms that can be found in the LICENSE file
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** in the root directory of this software component.
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** If no LICENSE file comes with this software, it is provided AS-IS.
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**
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*****************************************************************************
33+
*/
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/* Entry Point */
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ENTRY(Reset_Handler)
37+
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/* Highest address of the user mode stack */
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_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
40+
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_Min_Heap_Size = 0x200; /* required amount of heap */
42+
_Min_Stack_Size = 0x400; /* required amount of stack */
43+
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/* Memories definition */
45+
MEMORY
46+
{
47+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
48+
SRAM4 (xrw) : ORIGIN = 0x28000000, LENGTH = 16K
49+
FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
50+
}
51+
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/* Sections */
53+
SECTIONS
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{
55+
/* The startup code into "FLASH" Rom type memory */
56+
.isr_vector :
57+
{
58+
KEEP(*(.isr_vector)) /* Startup code */
59+
} >FLASH
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/* The program code and other data into "FLASH" Rom type memory */
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.text :
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{
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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_etext = .; /* define a global symbols at end of code */
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} >FLASH
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/* Constant data into "FLASH" Rom type memory */
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.rodata :
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{
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
80+
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
81+
} >FLASH
82+
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.ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
84+
{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
86+
} >FLASH
87+
.ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
88+
{
89+
__exidx_start = .;
90+
*(.ARM.exidx*)
91+
__exidx_end = .;
92+
} >FLASH
93+
94+
.preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
95+
{
96+
PROVIDE_HIDDEN (__preinit_array_start = .);
97+
KEEP (*(.preinit_array*))
98+
PROVIDE_HIDDEN (__preinit_array_end = .);
99+
} >FLASH
100+
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.init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
102+
{
103+
PROVIDE_HIDDEN (__init_array_start = .);
104+
KEEP (*(SORT(.init_array.*)))
105+
KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
107+
} >FLASH
108+
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.fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
110+
{
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PROVIDE_HIDDEN (__fini_array_start = .);
112+
KEEP (*(SORT(.fini_array.*)))
113+
KEEP (*(.fini_array*))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} >FLASH
116+
117+
/* Used by the startup to initialize data */
118+
_sidata = LOADADDR(.data);
119+
120+
/* Initialized data sections into "RAM" Ram type memory */
121+
.data :
122+
{
123+
_sdata = .; /* create a global symbol at data start */
124+
*(.data) /* .data sections */
125+
*(.data*) /* .data* sections */
126+
*(.RamFunc) /* .RamFunc sections */
127+
*(.RamFunc*) /* .RamFunc* sections */
128+
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_edata = .; /* define a global symbol at data end */
130+
} >RAM AT> FLASH
131+
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/* Uninitialized data section into "RAM" Ram type memory */
133+
.bss :
134+
{
135+
/* This is used by the startup in order to initialize the .bss section */
136+
_sbss = .; /* define a global symbol at bss start */
137+
__bss_start__ = _sbss;
138+
*(.bss)
139+
*(.bss*)
140+
*(COMMON)
141+
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_ebss = .; /* define a global symbol at bss end */
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__bss_end__ = _ebss;
144+
} >RAM
145+
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/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
147+
._user_heap_stack :
148+
{
149+
. = ALIGN(8);
150+
PROVIDE ( end = . );
151+
PROVIDE ( _end = . );
152+
. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
154+
. = ALIGN(8);
155+
} >RAM
156+
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/* Remove information from the compiler libraries */
158+
/DISCARD/ :
159+
{
160+
libc.a ( * )
161+
libm.a ( * )
162+
libgcc.a ( * )
163+
}
164+
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.ARM.attributes 0 : { *(.ARM.attributes) }
166+
}

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