Extracting sub-string from a string in SystemVerilog

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How do you extract a portion of string in SystemVerilog?

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This can be done using the string method substr(int i, int j).

string str = "porcupine tree";
string new_str;

new_str = str.substr(10, str.len()-1);
$display("new_str = %s", new_str);

Output:

new_str = tree

Check out this link for more about SystemVerilog string methods and examples:
https://www.systemverilog.io/verification/systemverilog-string-methods/