LP5 Columns

[justincdas]

I have a basic doubt in LP5 Spec
in LP5 per Row Page we have 64 columns (6 bits required to address those)
In the command truth table also there are 6 bits for column addressing (c5-c0)
But for burst start address in the case of READ32 BG/16B mode the c0 column address bit is used.
If we use the c0 bit for burst start address how the column address LSB bit is handled?

[justincdas]

I think i got it, as it is 32n burst we are using two columns together, hence we dont need the c0 bit

[subbdue]

@justincdas Thanks for replying with your findings!