Add assembler support for x86 lfence and sfence

https://bugs.webkit.org/show_bug.cgi?id=181311
<rdar://problem/36301780>

Reviewed by Michael Saboff.

Useful for testing performance of serializing instructions (hint:
it's not good).

* assembler/MacroAssemblerX86Common.h:
(JSC::MacroAssemblerX86Common::lfence):
(JSC::MacroAssemblerX86Common::sfence):
* assembler/X86Assembler.h:
(JSC::X86Assembler::lfence):
(JSC::X86Assembler::sfence):


git-svn-id: http://svn.webkit.org/repository/webkit/trunk@226428 268f45cc-cd09-0410-ab3c-d52691b4dbfc

Author: [email protected]

Source/JavaScriptCore/ChangeLog

@@ -1,3 +1,21 @@
+2018-01-04  JF Bastien  <[email protected]>
+
+        Add assembler support for x86 lfence and sfence
+        https://bugs.webkit.org/show_bug.cgi?id=181311
+        <rdar://problem/36301780>
+
+        Reviewed by Michael Saboff.
+
+        Useful for testing performance of serializing instructions (hint:
+        it's not good).
+
+        * assembler/MacroAssemblerX86Common.h:
+        (JSC::MacroAssemblerX86Common::lfence):
+        (JSC::MacroAssemblerX86Common::sfence):
+        * assembler/X86Assembler.h:
+        (JSC::X86Assembler::lfence):
+        (JSC::X86Assembler::sfence):
+
 2018-01-04  Saam Barati  <[email protected]>
 
         Add a new pattern matching rule to Graph::methodOfGettingAValueProfileFor for SetLocal(@nodeWithHeapPrediction)

Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h

@@ -3886,11 +3886,21 @@ class MacroAssemblerX86Common : public AbstractMacroAssembler<X86Assembler> {
         s_avxCheckState = (flags & (1 << 28)) ? CPUIDCheckState::Set : CPUIDCheckState::Clear;
     }
 
+    void lfence()
+    {
+        m_assembler.lfence();
+    }
+
     void mfence()
     {
         m_assembler.mfence();
     }
 
+    void sfence()
+    {
+        m_assembler.sfence();
+    }
+
     void rdtsc()
     {
         m_assembler.rdtsc();

Source/JavaScriptCore/assembler/X86Assembler.h

@@ -344,7 +344,9 @@ class X86Assembler {
     typedef enum {
         OP3_ROUNDSS_VssWssIb = 0x0A,
         OP3_ROUNDSD_VsdWsdIb = 0x0B,
+        OP3_LFENCE           = 0xE8,
         OP3_MFENCE           = 0xF0,
+        OP3_SFENCE           = 0xF8,
     } ThreeByteOpcodeID;
 
     struct VexPrefix {
@@ -3541,12 +3543,22 @@ class X86Assembler {
         m_formatter.twoByteOp64(OP2_XADD, src, base, index, scale, offset);
     }
 #endif // CPU(X86_64)
-    
+
+    void lfence()
+    {
+        m_formatter.threeByteOp(OP2_3BYTE_ESCAPE_AE, OP3_LFENCE);
+    }
+
     void mfence()
     {
         m_formatter.threeByteOp(OP2_3BYTE_ESCAPE_AE, OP3_MFENCE);
     }
 
+    void sfence()
+    {
+        m_formatter.threeByteOp(OP2_3BYTE_ESCAPE_AE, OP3_SFENCE);
+    }
+
     void rdtsc()
     {
         m_formatter.twoByteOp(OP2_RDTSC);