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Commit Date  
[r524] by evanvennn

Tidy up prior to next release. Remove two errant files (also removed from v0.95.010.RC3 build.

2016-10-16 06:17:40 Tree
[r523] by w_cholmondeley

Fixed bit variable comparison

2016-10-15 15:12:59 Tree
[r522] by evanvennn

Uploading for safety for Release Candidate v0.95.010_RC2
Not production ready code.
- Latest chipfiles
- Latest Help
- Latest GLCD drivers with new SH1106 driver includes the revised files
- Latest 7segment.h 9(awaiting completion of test program by Theo)
- Latest A-D.h - this is required for v0.95.010
- Latest PWM with a load of new features
- Latest RS232 with new SerPrint Long support
- Latest Cores to support 12F

This is all included in v.0.95.010 release

2016-10-15 06:58:58 Tree
[r521] by w_cholmondeley

Allow tris instruction to handle PORTD and PORTE on larger 12-bit core chips (example: 16F59)

2016-10-14 14:53:22 Tree
[r520] by w_cholmondeley

Fix for issue in overloaded functions - compiler was calling the other overloaded version when return value was manipulated
Fix for pagesel being assembled incorrectly on 12F1/16F1 chips with 2048 or less words of program memory - gcasm now ignores pagesel on these chips, as MPASM does

2016-10-12 12:00:09 Tree
[r519] by w_cholmondeley

Fix for insufficient common RAM warning when ReadAD is overloaded
Fix for pagesel being assembled incorrectly on PIC 12F/16F with less than 2048 words of program memory

2016-10-11 13:55:16 Tree
[r518] by evanvennn
2016-10-10 17:11:39 Tree
[r517] by evanvennn

Added CCP5 support with help of Isay Goltman... again

2016-10-10 17:03:11 Tree
[r516] by evanvennn

Added CCP5 support with help of Isay Goltman

2016-10-10 16:45:38 Tree
[r515] by evanvennn

GCB does not load saved calibration data into OSCCAL register on Baseline PIC. Therefore the FOSC is inaccurate when using internal RC oscillator.
Solution: Add following as the FIRST lines in the INITSYS sub in the System.h file
#Ifdef PIC
#Ifdef Var(OSCCAL)
movwf OSCCAL
#Endif
#Endif
This loads the saved calibration data from the last flash memory location at POR or any time the chip is reset.
Bill

2016-10-04 05:57:19 Tree
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