SEU Simulation Framework for Xilinx FPGA: First Step towards Testing Fault Tolerant Systems.

Martin Straka Jan Kastil Zdenek Kotásek SEU Simulation Framework for Xilinx FPGA: First Step towards Testing Fault Tolerant Systems. 223-230 2011 DSD https://doi.org/10.1109/DSD.2011.32 https://doi.ieeecomputersociety.org/10.1109/DSD.2011.32 conf/dsd/2011 db/conf/dsd/dsd2011.html#StrakaKK11