


default search action
"Design of a high speed, low power synchronously clocked NOR-based JK ..."
Krishnendu Dhar (2014)
- Krishnendu Dhar:

Design of a high speed, low power synchronously clocked NOR-based JK flip-flop using modified GDI technique in 45nm technology. ICACCI 2014: 600-606

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.


Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID












