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jonnor opened this issue Apr 12, 2025 · 5 comments
Open

Add/test support for RISC-V #35

jonnor opened this issue Apr 12, 2025 · 5 comments
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enhancement New feature or request

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@jonnor
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jonnor commented Apr 12, 2025

It seems that the natmod support for RISC-V architecture may have gotten into a useful place now in MicroPython after 1.24. This is the architecture used by chips such as ESP32-C3, ESP32-C6

This should be possible by doing a build with ARCH=rv32imc.
We also need to set up the relevant toolchain on CI to automate the builds.

@jonnor jonnor added the enhancement New feature or request label Apr 12, 2025
@jonnor
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jonnor commented Apr 14, 2025

Testing with MicroPython v1.24.0-542-g9ee2ef510

Most of the modules, such as emlearn_fft, fail on relocations, such as

Traceback (most recent call last):
  File "/home/jon/projects/micropython/tools/mpy_ld.py", line 1516, in <module>
    main()
    ~~~~^^
  File "/home/jon/projects/micropython/tools/mpy_ld.py", line 1512, in main
    do_link(args)
    ~~~~~~~^^^^^^
  File "/home/jon/projects/micropython/tools/mpy_ld.py", line 1480, in do_link
    link_objects(env, len(native_qstr_vals))
    ~~~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  File "/home/jon/projects/micropython/tools/mpy_ld.py", line 1251, in link_objects
    do_relocation_text(env, sec.addr, r)
    ~~~~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^^^
  File "/home/jon/projects/micropython/tools/mpy_ld.py", line 703, in do_relocation_text
    (addr, value) = process_riscv32_relocation(env, text_addr, r)
                    ~~~~~~~~~~~~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^^^^
  File "/home/jon/projects/micropython/tools/mpy_ld.py", line 903, in process_riscv32_relocation
    assert 0, r
           ^
AssertionError: <Relocation (RELA): Container({'r_offset': 30, 'r_info': 24859, 'r_info_sym': 97, 'r_info_type': 27, 'r_addend': 0})>

A couple of modules, such as eml_iir_q15, pass the linker - but then fail with mpy-cross. Presumably this is because we have some Python code that is to be embedded in the module. And it seems this is not supported on rv32imc at the moment

/home/jon/projects/micropython/mpy-cross/build/mpy-cross -march=rv32imc -o build/iir_filter.mpy iir_filter.py
usage: /home/jon/projects/micropython/mpy-cross/build/mpy-cross [<opts>] [-X <implopt>] [--] <input filename>
Options:
--version : show version information
-o : output file for compiled bytecode (defaults to input filename with .mpy extension, or stdout if input is stdin)
-s : source filename to embed in the compiled bytecode (defaults to input file)
-v : verbose (trace various operations); can be multiple
-O[N] : apply bytecode optimizations of level N

Target specific options:
-msmall-int-bits=number : set the maximum bits used to encode a small-int
-march=<arch> : set architecture for native emitter; x86, x64, armv6, armv6m, armv7m, armv7em, armv7emsp, armv7emdp, xtensa, xtensawin

Implementation specific options:
  emit={bytecode,native,viper} -- set the default code emitter
  heapsize=<n> -- set the heap size for the GC (default 2097152)

So this will require some work upstream in MicroPython to get working

@jonnor
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jonnor commented Apr 14, 2025

In the short, term in might be that #18 is the way forward

@jonnor
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jonnor commented Apr 14, 2025

On Arch Linux, the rv32imc GCC compiler has a different name than what py/dynruntime.mk. I had to change CROSS = riscv64-unknown-elf- to CROSS = riscv64-elf-.

@jonnor
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jonnor commented Apr 21, 2025

This could now be re-tested using the newly added support for building as external C modules. https://emlearn-micropython.readthedocs.io/en/latest/external_modules.html

But I am also hoping that dynamic native modules will be possible, so I am keeping this open at least until we have managed to file issues upstream in MicroPython and heard back about that.

@bhcuong2008
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bhcuong2008 commented Apr 28, 2025

Please refer to my issue, micropython/micropython#17046
In file, esp32_common.cmake, https://github.com/micropython/micropython/blob/master/ports/esp32/esp32_common.cmake, please check the latest and update your file (1.24.1 not have this), they have included RISCV related for RISCV native code,

# Define mpy-cross flags, for use with frozen code.
if(CONFIG_IDF_TARGET_ARCH_XTENSA)
    set(MICROPY_CROSS_FLAGS -march=xtensawin)
elseif(CONFIG_IDF_TARGET_ARCH_RISCV)
    set(MICROPY_CROSS_FLAGS -march=rv32imc)
endif()


# RISC-V specific inclusions
if(CONFIG_IDF_TARGET_ARCH_RISCV)
    list(APPEND MICROPY_SOURCE_LIB
        ${MICROPY_DIR}/shared/runtime/gchelper_native.c
        ${MICROPY_DIR}/shared/runtime/gchelper_rv32i.s
    )
endif()

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