Merge branch 'master' into master

Author: igrr

README.md

@@ -64,17 +64,17 @@ python get.py
 
 [PlatformIO](http://platformio.org) is an open source ecosystem for IoT
 development with cross platform build system, library manager and full support
-for Espressif (ESP8266) development. It works on the popular host OS: Mac OS X, Windows,
+for Espressif (ESP8266) development. It works on the popular host OS: macOS, Windows,
 Linux 32/64, Linux ARM (like Raspberry Pi, BeagleBone, CubieBoard).
 
-- [What is PlatformIO?](http://docs.platformio.org/en/stable/what-is-platformio.html)
+- [What is PlatformIO?](http://docs.platformio.org/page/what-is-platformio.html)
 - [PlatformIO IDE](http://platformio.org/platformio-ide)
-- Quick Start with [PlatformIO IDE](http://docs.platformio.org/en/stable/ide/atom.html#quick-start) or [PlatformIO CLI](http://docs.platformio.org/en/stable/quickstart.html)
-- [Advanced using](http://docs.platformio.org/en/stable/platforms/espressif.html) -
+- Quick Start with [PlatformIO IDE](http://docs.platformio.org/page/ide/atom.html#quick-start) or [PlatformIO Core](http://docs.platformio.org/page/core.html)
+- [Advanced using](http://docs.platformio.org/page/platforms/espressif.html) -
   custom settings, uploading to SPIFFS, Over-the-Air (OTA) or using stage version
-- [Integration with other IDE](http://docs.platformio.org/en/stable/ide.html) -
-  Atom, CLion, Eclipse, Emacs, NetBeans, Qt Creator, Sublime Text, VIM and Visual Studio
-- [Project Examples](http://docs.platformio.org/en/stable/platforms/espressif.html#examples)
+- [Integration with Cloud and Standalone IDEs](http://docs.platformio.org/page/ide.html) -
+  Cloud9, Codeanywhere, Eclipse Che (Codenvy), Atom, CLion, Eclipse, Emacs, NetBeans, Qt Creator, Sublime Text, VIM and Visual Studio
+- [Project Examples](http://docs.platformio.org/page/platforms/espressif.html#examples)
 
 ### Building with make
 

cores/esp8266/Esp.cpp

@@ -83,6 +83,7 @@ EspClass ESP;
 
 void EspClass::wdtEnable(uint32_t timeout_ms)
 {
+    (void) timeout_ms;
     /// This API can only be called if software watchdog is stopped
     system_soft_wdt_restart();
 }
@@ -432,7 +433,7 @@ uint32_t EspClass::getSketchSize() {
         section_index < image_header.num_segments;
         ++section_index)
     {
-        section_header_t section_header = {0};
+        section_header_t section_header = {0, 0};
         if (spi_flash_read(pos, (uint32_t*) &section_header, sizeof(section_header))) {
             return 0;
         }

cores/esp8266/Schedule.cpp

@@ -16,6 +16,7 @@ static int sCount = 0;
 
 static void init_lists()
 {
+    (void) init_lists;
     if (sCount != 0) {
         return;
     }

cores/esp8266/abi.cpp

@@ -104,11 +104,13 @@ void __throw_bad_alloc()
 
 void __throw_logic_error(const char* str)
 {
+    (void) str;
     panic();
 }
 
 void __throw_out_of_range(const char* str)
 {
+    (void) str;
     panic();
 }
 }

cores/esp8266/cont_util.c

@@ -32,7 +32,7 @@ void ICACHE_RAM_ATTR cont_init(cont_t* cont) {
     cont->struct_start = (unsigned*) cont;
 
     // fill stack with magic values to check high water mark
-    for(int pos = 0; pos < sizeof(cont->stack) / 4; pos++)
+    for(int pos = 0; pos < (int)(sizeof(cont->stack) / 4); pos++)
     {
         cont->stack[pos] = CONT_STACKGUARD;
     }

cores/esp8266/core_esp8266_main.cpp

@@ -52,6 +52,7 @@ const char* core_release =
 } // extern "C"
 
 int atexit(void (*func)()) {
+    (void) func;
     return 0;
 }
 
@@ -125,6 +126,7 @@ static void loop_wrapper() {
 }
 
 static void loop_task(os_event_t *events) {
+    (void) events;
     g_micros_at_task_start = system_get_time();
     cont_run(&g_cont, &loop_wrapper);
     if (cont_check(&g_cont) != 0) {

cores/esp8266/core_esp8266_phy.c

@@ -25,6 +25,8 @@
  #include <stdbool.h>
  #include <string.h>
  #include "c_types.h"
+ #include "ets_sys.h"
+ #include "spi_flash.h"
 
 static const uint8_t ICACHE_FLASH_ATTR phy_init_data[128] =
 {
@@ -228,7 +230,7 @@ static const uint8_t ICACHE_FLASH_ATTR phy_init_data[128] =
     // 3: auto measure frequency offset and correct it,  bbpll is 160M, it only can correct + frequency offset.
     // 5: use 113 byte force_freq_offset to correct frequency offset, bbpll is 168M, it can correct + and - frequency offset.
     // 7: use 113 byte force_freq_offset to correct frequency offset, bbpll is 160M , it only can correct + frequency offset.
-    [112] = 3,
+    [112] = 0,
 
     // force_freq_offset
     // signed, unit is 8kHz
@@ -250,14 +252,20 @@ static const uint8_t ICACHE_FLASH_ATTR phy_init_data[128] =
 #define __get_rf_mode _Z13__get_rf_modev
 #define __run_user_rf_pre_init _Z22__run_user_rf_pre_initv
 
-extern int __real_register_chipv6_phy(uint8_t* init_data);
-extern int __wrap_register_chipv6_phy(uint8_t* init_data)
+static bool spoof_init_data = false;
+
+extern int __real_spi_flash_read(uint32_t addr, uint32_t* dst, size_t size);
+extern int ICACHE_RAM_ATTR __wrap_spi_flash_read(uint32_t addr, uint32_t* dst, size_t size);
+
+extern int ICACHE_RAM_ATTR __wrap_spi_flash_read(uint32_t addr, uint32_t* dst, size_t size)
 {
-    if (init_data != NULL) {
-      memcpy(init_data, phy_init_data, sizeof(phy_init_data));
-      init_data[107] = __get_adc_mode();
+    if (!spoof_init_data || size != 128) {
+        return __real_spi_flash_read(addr, dst, size);
     }
-    return __real_register_chipv6_phy(init_data);
+
+    memcpy(dst, phy_init_data, sizeof(phy_init_data));
+    ((uint8_t*)dst)[107] = __get_adc_mode();
+    return 0;
 }
 
 extern int __get_rf_mode(void)  __attribute__((weak));
@@ -278,10 +286,16 @@ extern void __run_user_rf_pre_init(void)
     return; // default do noting
 }
 
+uint32_t user_rf_cal_sector_set(void)
+{
+    spoof_init_data = true;
+    return flashchip->chip_size/SPI_FLASH_SEC_SIZE - 4;
+}
+
 void user_rf_pre_init()
 {
     // *((volatile uint32_t*) 0x60000710) = 0;
-
+    spoof_init_data = false;
     volatile uint32_t* rtc_reg = (volatile uint32_t*) 0x60001000;
     if((rtc_reg[24] >> 16) > 4) {
         rtc_reg[24] &= 0xFFFF;
@@ -295,3 +309,7 @@ void user_rf_pre_init()
     }
     __run_user_rf_pre_init();
 }
+
+
+void ICACHE_RAM_ATTR user_spi_flash_dio_to_qio_pre_init() {}
+

cores/esp8266/core_esp8266_postmortem.c

@@ -46,6 +46,9 @@ static void print_stack(uint32_t start, uint32_t end);
 //static void print_pcs(uint32_t start, uint32_t end);
 
 extern void __custom_crash_callback( struct rst_info * rst_info, uint32_t stack, uint32_t stack_end ) {
+    (void) rst_info;
+    (void) stack;
+    (void) stack_end;
 }
 
 extern void custom_crash_callback( struct rst_info * rst_info, uint32_t stack, uint32_t stack_end ) __attribute__ ((weak, alias("__custom_crash_callback")));
@@ -183,6 +186,7 @@ void abort(){
 }
 
 void __assert_func(const char *file, int line, const char *func, const char *what) {
+    (void) what;
     s_panic_file = file;
     s_panic_line = line;
     s_panic_func = func;

cores/esp8266/core_esp8266_timer.c

@@ -30,6 +30,7 @@
 static volatile timercallback timer1_user_cb = NULL;
 
 void ICACHE_RAM_ATTR timer1_isr_handler(void *para){
+    (void) para;
     if ((T1C & ((1 << TCAR) | (1 << TCIT))) == 0) TEIE &= ~TEIE1;//edge int disable
     T1I = 0;
     if (timer1_user_cb) {
@@ -77,6 +78,7 @@ void ICACHE_RAM_ATTR timer1_disable(){
 static volatile timercallback timer0_user_cb = NULL;
 
 void ICACHE_RAM_ATTR timer0_isr_handler(void* para){
+    (void) para;
     if (timer0_user_cb) {
         // to make ISR compatible to Arduino AVR model where interrupts are disabled
         // we disable them before we call the client ISR

cores/esp8266/core_esp8266_wiring.c

@@ -36,6 +36,7 @@ static uint32_t micros_overflow_count = 0;
 #define REPEAT 1
 
 void delay_end(void* arg) {
+    (void) arg;
     esp_schedule();
 }
 
@@ -53,6 +54,7 @@ void delay(unsigned long ms) {
 }
 
 void micros_overflow_tick(void* arg) {
+    (void) arg;
     uint32_t m = system_get_time();
     if(m < micros_at_last_overflow_tick)
         ++micros_overflow_count;

cores/esp8266/core_esp8266_wiring_digital.c

@@ -115,6 +115,7 @@ static interrupt_handler_t interrupt_handlers[16];
 static uint32_t interrupt_reg = 0;
 
 void ICACHE_RAM_ATTR interrupt_handler(void *arg) {
+  (void) arg;
   uint32_t status = GPIE;
   GPIEC = status;//clear them interrupts
   uint32_t levels = GPI;

cores/esp8266/heap.c

@@ -10,46 +10,60 @@
 
 void* _malloc_r(struct _reent* unused, size_t size)
 {
+    (void) unused;
     return malloc(size);
 }
 
 void _free_r(struct _reent* unused, void* ptr)
 {
+    (void) unused;
     return free(ptr);
 }
 
 void* _realloc_r(struct _reent* unused, void* ptr, size_t size)
 {
+    (void) unused;
     return realloc(ptr, size);
 }
 
 void* _calloc_r(struct _reent* unused, size_t count, size_t size)
 {
+    (void) unused;
     return calloc(count, size);
 }
 
 void* ICACHE_RAM_ATTR pvPortMalloc(size_t size, const char* file, int line)
 {
+    (void) file;
+    (void) line;
     return malloc(size);
 }
 
 void ICACHE_RAM_ATTR vPortFree(void *ptr, const char* file, int line)
 {
+    (void) file;
+    (void) line;
     free(ptr);
 }
 
 void* ICACHE_RAM_ATTR pvPortCalloc(size_t count, size_t size, const char* file, int line)
 {
+    (void) file;
+    (void) line;
     return calloc(count, size);
 }
 
 void* ICACHE_RAM_ATTR pvPortRealloc(void *ptr, size_t size, const char* file, int line)
 {
+    (void) file;
+    (void) line;
     return realloc(ptr, size);
 }
 
 void* ICACHE_RAM_ATTR pvPortZalloc(size_t size, const char* file, int line)
 {
+    (void) file;
+    (void) line;
     return calloc(1, size);
 }
 

cores/esp8266/libc_replacements.c

@@ -83,6 +83,7 @@ int ICACHE_RAM_ATTR _read_r(struct _reent* unused, int file, char *ptr, int len)
 }
 
 int ICACHE_RAM_ATTR _write_r(struct _reent* r, int file, char *ptr, int len) {
+    (void) r;
     if (file == STDOUT_FILENO) {
         while(len--) {
             ets_putc(*ptr);
@@ -93,6 +94,7 @@ int ICACHE_RAM_ATTR _write_r(struct _reent* r, int file, char *ptr, int len) {
 }
 
 int ICACHE_RAM_ATTR _putc_r(struct _reent* r, int c, FILE* file) {
+    (void) r;
     if (file->_file == STDOUT_FILENO) {
         return ets_putc(c);
     }

cores/esp8266/spiffs/spiffs_hydrogen.c

@@ -22,6 +22,7 @@ static s32_t spiffs_fflush_cache(spiffs *fs, spiffs_file fh);
 
 #if SPIFFS_BUFFER_HELP
 u32_t SPIFFS_buffer_bytes_for_filedescs(spiffs *fs, u32_t num_descs) {
+  (void) fs;
   return num_descs * sizeof(spiffs_fd);
 }
 #if SPIFFS_CACHE

cores/esp8266/spiffs_api.h

@@ -49,13 +49,13 @@ class SPIFFSImpl : public FSImpl
 {
 public:
     SPIFFSImpl(uint32_t start, uint32_t size, uint32_t pageSize, uint32_t blockSize, uint32_t maxOpenFds)
-        : _fs({0})
-    , _start(start)
+        : _start(start)
     , _size(size)
     , _pageSize(pageSize)
     , _blockSize(blockSize)
     , _maxOpenFds(maxOpenFds)
     {
+        memset(&_fs, 0, sizeof(_fs));
     }
 
     FileImplPtr open(const char* path, OpenMode openMode, AccessMode accessMode) override;
@@ -176,7 +176,8 @@ class SPIFFSImpl : public FSImpl
 
     bool _tryMount()
     {
-        spiffs_config config = {0};
+        spiffs_config config;
+        memset(&config, 0, sizeof(config));
 
         config.hal_read_f       = &spiffs_hal_read;
         config.hal_write_f      = &spiffs_hal_write;
@@ -242,6 +243,11 @@ class SPIFFSImpl : public FSImpl
     static void _check_cb(spiffs_check_type type, spiffs_check_report report,
                           uint32_t arg1, uint32_t arg2)
     {
+        (void) type;
+        (void) report;
+        (void) arg1;
+        (void) arg2;
+        
         // TODO: spiffs doesn't pass any context pointer along with _check_cb,
         // so we can't do anything useful here other than perhaps
         // feeding the watchdog
@@ -268,9 +274,9 @@ class SPIFFSFileImpl : public FileImpl
     SPIFFSFileImpl(SPIFFSImpl* fs, spiffs_file fd)
         : _fs(fs)
         , _fd(fd)
-        , _stat({0})
     , _written(false)
     {
+        memset(&_stat, 0, sizeof(_stat));
         _getStat();
     }
 
@@ -376,7 +382,7 @@ class SPIFFSFileImpl : public FileImpl
         auto rc = SPIFFS_fstat(_fs->getFs(), _fd, &_stat);
         if (rc != SPIFFS_OK) {
             DEBUGV("SPIFFS_fstat rc=%d\r\n", rc);
-            _stat = {0};
+            memset(&_stat, 0, sizeof(_stat));
         }
         _written = false;
     }

cores/esp8266/time.c

@@ -77,6 +77,7 @@ void configTime(int timezone, int daylightOffset_sec, const char* server1, const
 
 int clock_gettime(clockid_t unused, struct timespec *tp)
 {
+    (void) unused;
     tp->tv_sec  = millis() / 1000;
     tp->tv_nsec = micros() * 1000;
     return 0;
@@ -94,6 +95,8 @@ time_t time(time_t * t)
 
 int _gettimeofday_r(struct _reent* unused, struct timeval *tp, void *tzp)
 {
+    (void) unused;
+    (void) tzp;
     if (tp)
     {
         ensureBootTimeIsSet();

cores/esp8266/uart.c

@@ -480,6 +480,7 @@ bool uart_rx_enabled(uart_t* uart)
 
 static void uart_ignore_char(char c)
 {
+    (void) c;
 }
 
 static void uart0_write_char(char c)

libraries/ESP8266WebServer/src/Parsing.cpp

@@ -361,7 +361,7 @@ uint8_t ESP8266WebServer::_uploadReadByte(WiFiClient& client){
 }
 
 bool ESP8266WebServer::_parseForm(WiFiClient& client, String boundary, uint32_t len){
-
+  (void) len;
 #ifdef DEBUG_ESP_HTTP_SERVER
   DEBUG_OUTPUT.print("Parse Form: Boundary: ");
   DEBUG_OUTPUT.print(boundary);