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22 | 22 | ******************************************************************************
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23 | 23 | * @attention
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24 | 24 | *
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25 |
| -* <h2><center>© Copyright (c) 2017 STMicroelectronics. |
26 |
| - * All rights reserved.</center></h2> |
| 25 | + * Copyright (c) 2017 STMicroelectronics. |
| 26 | + * All rights reserved. |
27 | 27 | *
|
28 |
| - * This software component is licensed by ST under BSD 3-Clause license, |
29 |
| - * the "License"; You may not use this file except in compliance with the |
30 |
| - * License. You may obtain a copy of the License at: |
31 |
| - * opensource.org/licenses/BSD-3-Clause |
| 28 | + * This software is licensed under terms that can be found in the LICENSE file |
| 29 | + * in the root directory of this software component. |
| 30 | + * If no LICENSE file comes with this software, it is provided AS-IS. |
32 | 31 | *
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33 | 32 | ******************************************************************************
|
34 | 33 | */
|
|
87 | 86 | /* #define VECT_TAB_BASE_ADDRESS 0x08000000 */
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88 | 87 |
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89 | 88 | /*!< Uncomment the following line if you need to relocate your vector Table
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90 |
| - in Sram else user remap will be done by default in Flash. */ |
| 89 | + in Sram else user remap will be done in Flash. */ |
91 | 90 | /* #define VECT_TAB_SRAM */
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92 | 91 |
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93 | 92 | #ifndef VECT_TAB_OFFSET
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@@ -235,7 +234,7 @@ void SystemInit(void)
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235 | 234 | */
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236 | 235 | void SystemCoreClockUpdate(void)
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237 | 236 | {
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238 |
| - uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; |
| 237 | + uint32_t tmp, pllvco, pllp, pllsource, pllm; |
239 | 238 |
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240 | 239 | /* Get SYSCLK source -------------------------------------------------------*/
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241 | 240 | tmp = RCC->CFGR & RCC_CFGR_SWS;
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@@ -761,4 +760,3 @@ void SystemInit_ExtMemCtl(void)
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761 | 760 | /**
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762 | 761 | * @}
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763 | 762 | */
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764 |
| -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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