Portfolio Optimisation Without the Approximations: Solving Cardinality-Constrained Problems with CMOS Annealing Hardware
Portfolio Optimisation Without the Approximations
The problem is familiar. You build a mean-variance or risk-parity model, add the constraints your investment policy actually requires — a cardinality limit of k assets from a universe of n, sector exposure caps, turnover bounds, minimum lot sizes — and the solver either runs past your rebalancing window or returns a solution to a simplified problem that quietly discards the constraints you care about most.
That trade-off is not a failure of implementation. It is a structural one. Cardinality constraints convert a quadratic programme into a Mixed-Integer Quadratic Programme (MIQP). The binary selection variables — asset i is held (1) or not held (0) — introduce combinatorial complexity that scales exponentially with the number of candidates. For portfolios drawn from a universe of a few hundred securities with realistic side constraints, the feasible set is simply too large for branch-and-bound methods to search exhaustively within practical time limits. Relaxing the problem to recover tractability means solving something that resembles, but is not, the problem you set out to solve.
Why the Structure Maps Naturally onto QUBO
A Quadratic Unconstrained Binary Optimisation (QUBO) formulation treats exactly this class of problem as a first-class citizen. Binary decision variables, pairwise interaction terms between assets (capturing covariance structure), and penalty terms encoding your constraints are assembled into a single n × n, Q-matrix. The objective — find the binary vector x that minimises xᵀQx — is then handed directly to the annealing hardware.
Crucially, no relaxation is required. The cardinality limit, sector caps, and transaction-cost penalties enter the Q-matrix as quadratic penalty terms, not as post-hoc adjustments. The solver searches the binary solution space as formulated, not a continuous approximation of it.
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What CMOS Annealing Hardware Does Differently
The FPGA-based CMOS annealing engine is purpose-built to minimise QUBO and Ising Hamiltonians. Rather than traversing the solution space sequentially — as a classical branch-and-bound solver must — the hardware runs a massively parallel stochastic search, using simulated annealing dynamics implemented at the logic-gate level. This approach is particularly well-suited to the dense, fully connected covariance structure typical of financial optimisation problems, where interactions between variables are not sparse.
The relevant comparison is against classical heuristics — simulated annealing in software, genetic algorithms, Tabu search — rather than against exact solvers on small problems. For the latter, classical methods remain perfectly adequate. The case for dedicated annealing hardware is made by problem instances where the constraint count, universe size, or rebalancing frequency pushes classical heuristics into a regime of inconsistent or low-quality solutions.
Practical Entry Points
Portfolio selection (choose k from n), index tracking (minimise tracking error subject to cardinality and weight bounds), and risk-parity with discrete rebalancing constraints all admit natural QUBO formulations. So do related scheduling problems — optimal execution timing, margin call sequencing — where binary decisions and quadratic cost interactions appear together.
If your team is already formulating these problems as MIQPs, the translation to QUBO is largely mechanical. Qubitor’s engineering team can assist with that mapping and advise on problem sizing relative to current hardware capacity.
Interested in exploring a pilot formulation?
Contact the Qubitor team at www.qubitor.com
