Your CPU Chose Your Number System. Here’s How to Choose Your Own.

SIMD, SWAR, balanced ternary, and the engineering compromises behind running different arithmetic on binary hardware.

Ternary inside a binary register can cost you nearly half your storage capacity.

Here’s why it might still be worth doing.

Start with a decision that exposes the entire problem.

Four balanced ternary digits have 81 possible values. Five have 243. Both fit inside an eight-bit byte.

Five trits per byte are denser than four.

So why would anyone deliberately choose four?

Because representation design is not simply about fitting the maximum number of values into the minimum number of bits. It is also about the cost of accessing, transforming, combining, and executing those values.

Four-trit grouping produces base-81 digits. Five-trit grouping produces base-243 digits. Neither is automatically superior.

The hardware gives us bytes. Mathematics gives us possible encodings. Engineering determines which compromise is useful.

That’s the distinction this investigation is about.

1. SIMD: Parallelism Provided by Hardware

SIMD means Single Instruction, Multiple Data.

Modern processors can apply one instruction to multiple values simultaneously.

A vector register might hold eight integers, sixteen smaller integers, or another supported arrangement.

One instruction can operate on multiple lanes.

This is central to graphics, numerical computing, signal processing, and machine-learning inference.

SIMD does not change the underlying number system.

It changes how the hardware organizes parallel computation.

But it introduces a useful idea: a register need not represent one number.

2. SWAR: Parallelism Defined by Software

SWAR means SIMD Within A Register.

Rather than relying entirely on dedicated vector instructions, SWAR uses ordinary integer instructions to manipulate several packed values.

A 64-bit register could represent one 64-bit integer, eight 8-bit values, or a custom collection of smaller fields.

Masks, shifts, and carefully designed arithmetic transformations establish the boundaries between those fields.

The complication is carry propagation.

If an addition allows a carry to cross a logical field boundary, supposedly independent values can interfere with one another.

Software must prevent that.

SWAR demonstrates that a register’s physical width does not uniquely determine its logical interpretation.

And that raises another question.

Why must the values inside those fields be binary digits interpreted in conventional ways?

3. Balanced Ternary: Three Arithmetic States

Balanced ternary uses three digit values:

• −1
• 0
• +1

An integer represented by (n) balanced trits is:

[
x=\sum_{i=0}^{n-1}t_i3^i
]

where each (t_i) belongs to ({-1,0,+1}).

A four-trit value spans −40 through +40, giving 81 distinct values.

Negation exchanges positive and negative trits while leaving zeros unchanged.

This symmetry is mathematically useful.

But conventional binary processors already implement signed arithmetic efficiently.

Balanced ternary’s symmetry alone is not a performance argument.

The interesting question is whether particular operations benefit from having these three states represented explicitly.

4. What the Storage Actually Costs

Each trit contains:

[
\log_2(3)\approx1.585
]

bits of information.

Using two physical bits per trit yields:

[
\frac{\log_2(3)}{2}\approx79.2%
]

information efficiency.

Three-bit cells yield approximately 52.8%.

A 64-bit register can accommodate 21 three-bit trit cells, consuming 63 physical bits.

Those 21 trits have approximately 33.3 bits of information capacity.

Their balanced integer range is:

[
-\frac{3^{21}-1}{2}
\quad\text{through}\quad
+\frac{3^{21}-1}{2}
]

or:

[
-5,230,176,601
\quad\text{through}\quad
+5,230,176,601
]

That range exceeds signed 32-bit capacity.

A conventional signed binary integer needs at least 34 bits to represent every value in this range, so a typical implementation would use a 64-bit integer.

There are therefore two different comparisons.

At equal physical register width, the representations have unequal numerical capacity.

At equal numerical range, they may require different physical storage and instruction sequences.

Both comparisons are legitimate.

Neither tells the whole story by itself.

5. Base-81 Is a Choice, Not a Density Optimum

The T81 research program explores several ternary representations, including base-81.

Four trits form 81 possible states.

Five form 243.

A byte can store either group, so base-81 cannot claim to maximize byte-level information density.

Its potential value lies elsewhere: regular four-trit grouping, particular lookup-table structures, and arithmetic or implementation strategies that may be convenient for a chosen workload.

Those are hypotheses to evaluate, not universal advantages.

A base-81 design that performs well for one operation might lose to base-243 or a two-bit-per-trit representation for another.

This is a general principle of substrate engineering:

Every representation has costs. The objective is not to hide them, but to determine whether the operations you gain justify the costs you accept.

6. The Interesting Operation: A Ternary Dot Product Without General Multiplication

Consider a dot product:

[
y=\sum_{i=0}^{N-1}w_ix_i
]

Now restrict the weights to balanced ternary:

[
w_i\in{-1,0,+1}
]

Each multiplication has only three possible behaviors.

If the weight is +1, add the input.

If it is −1, subtract the input.

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If it is zero, do nothing.

The inner loop no longer needs a general multiplication operation.

A straightforward implementation is:

int64_t dot_ternary(
    const int8_t *weights,
    const int32_t *inputs,
    size_t n)
{
    int64_t sum = 0;

    for (size_t i = 0; i < n; ++i) {
        if (weights[i] == 1)
            sum += inputs[i];
        else if (weights[i] == -1)
            sum -= inputs[i];
    }
    return sum;
}

This code illustrates the arithmetic simplification, not the packed implementation.

The same optimization is available to binary software whenever the weights are restricted to −1, 0, and +1.

So eliminating multiplication does not, by itself, prove that ternary packing is faster.

The real opportunity is to encode multiple ternary weights compactly and process them with fewer instructions, less memory traffic, or better parallelism than competing implementations.

That is why ternary-weight neural-network approaches such as BitNet are relevant to this investigation. They demonstrate the practical importance of restricted-weight arithmetic, although their results do not establish an advantage for T81’s particular encodings.

A packed implementation must pay for extracting or decoding coefficients, selecting additions and subtractions, and managing accumulators.

It might recover those costs through parallel processing or reduced memory traffic.

Or it might not.

The experiment is whether the packed representation adds a measurable advantage beyond the multiplier-free arithmetic that binary software can already exploit.

That is a much narrower claim.

It is also testable.

7. Three Layers of Freedom

The progression is now clear.

SIMD: Hardware supplies parallel execution across multiple data lanes.

SWAR: Software constructs logical lanes inside ordinary registers.

Ternary representation: Software chooses a different set of arithmetic states and encodes them within the available hardware.

None of these eliminates physical constraints.

An encoded ternary operation is still executed by binary circuitry.

It may require more instructions than the corresponding native binary operation.

But it gives the programmer control over representation, and sometimes that control is useful.

The value must be demonstrated at the level of actual workloads.

8. The Experiment I Intend to Publish

The next experiment will compare packed ternary multiply-accumulate operations against optimized binary implementations on the same machine.

The ternary candidate will use 21 balanced trits packed into a 64-bit register using three-bit cells.

The study will include two distinct controls.

Control A: Matched register width

Compare ternary and binary implementations using the same physical register width.

This measures the performance consequences of different representations under a common hardware allocation.

It does not imply equal numerical capacity.

Control B: Matched numerical range

Compare implementations capable of representing the same required numerical values and producing equivalent outputs.

For 21 balanced trits, the range exceeds signed 32-bit capacity, so the binary baseline must support at least 34 signed bits.

A conventional 64-bit signed integer is sufficient.

This control prevents a narrower binary baseline from being treated as equivalent when it cannot represent the full ternary range.

Arithmetic and packing controls

The study will also distinguish between general binary multiplication, binary implementations specialized for ternary weights, and genuinely packed ternary processing.

This is essential.

If ternary wins only because it avoids multiplication, while a binary implementation with the same restricted weights achieves the same benefit, the result does not establish a packing advantage.

The experiment will specify input distributions, accumulator widths, overflow behavior, compiler settings, warm-up procedures, and timing methodology before results are accepted.

Measurements will include throughput, execution time, storage overhead, and instruction counts where supported.

Packing and conversion costs will be measured separately and included in end-to-end comparisons.

Correctness will be verified independently.

The results will be published whether ternary wins, loses, or ties.

9. A Negative Result Is Still a Result

This commitment needs an implementation policy.

A benchmark that loses must not disappear into a footnote while successful results receive permanent documentation.

The T81 research repository should maintain a common experiment register containing successful, unsuccessful, inconclusive, and blocked investigations.

Every completed experiment should preserve its protocol, source revision, environment, measurements, correctness evidence, limitations, and final disposition.

Negative findings should receive the same archival treatment and visibility as positive findings.

Earlier T81 investigations, including comparisons involving INT8 and other binary baselines, illustrate why this matters.

An unfavorable comparison can establish a useful boundary: a workload, representation, or implementation strategy for which a claimed advantage is not supported.

That boundary helps prevent the next experiment from repeating the same mistake.

A research program becomes more credible when its failures remain visible.

10. What T81 Is Actually Building Toward

T81 Foundation investigates ternary arithmetic, representation, execution, and the constraints imposed by existing computing platforms.

Its objective is not to declare binary obsolete.

It is to establish which alternative representations, if any, provide measurable benefits and under what conditions.

A mathematically correct representation is not necessarily efficient.

A faster isolated operation does not necessarily justify a complete architecture.

And a software result on binary hardware does not predict the performance of a hypothetical native ternary processor.

Those are separate research questions requiring separate evidence.

The long-term possibility of different hardware is worth exploring.

But the immediate responsibility is to measure what exists.

11. Where the Substrate Ends and Choice Begins

A CPU imposes real limits.

Registers have fixed widths. Instructions have defined behavior. Memory systems have measurable costs.

Software cannot simply wish those constraints away.

But it can choose how values are represented within them.

SIMD demonstrates hardware parallelism.

SWAR demonstrates software-organized parallelism.

Packed ternary arithmetic explores software-defined numerical representation.

The question is not whether one number system is universally superior.

It is whether a chosen representation can reduce the cost of a specific computation after all its compromises are counted.

Sometimes binary will win.

Sometimes ternary might.

Sometimes a result will reveal that the original hypothesis was wrong.

All three outcomes advance the investigation.

The CPU provides the substrate. We choose the representation. Measurement determines whether the choice was worthwhile.

The next step is to publish the numbers.

Research: T81 Foundation.