Pande Tresna·Nov 2Paint-by-Numbers for AI ChipsThree ways of grouping numbers (single link, Ward and DBSCAN), worked out by hand on eleven weights, and what each one means for a tiny AI…A response icon2A response icon2
Bishal Goutam·Sep 23Combinational and Sequential Logic: Building Blocks of Digital IC DesignFrom Boolean functions and propagation delay to registers, state machines, RTL, synthesis, and physical hardware
Tsungyu Liu·Sep 24, 2025Direct Memory MappingIn the world of CPU, we store important data and instruction in cache to decrease the time when instruction trying to get the data. And we…
Tsungyu Liu·Apr 22, 2025Hardware Emulation Platforms — Zebu and PalladiumWhen you’re designing a chip or SoC, finishing the RTL isn’t the hardest part — verifying it is.
Tsungyu Liu·Mar 2, 2025ROB: Ensuring In-Order Commit in OoO ExecutionExplore the ROB’s role, its internal structure, and why it ensures in-order commit while allowing out-of-order execution.
Ganray·Jul 14, 2024[Verilog] Implementation of A Simple Frequency Divider by N or N/2.This article aims at the case of constant N is an odd number.