Scribd
Upload
32 views5 pages

Lab 7 DSD

This document summarizes a digital systems design lab experiment. The student was tasked with implementing an ALU module that performs basic operations on input values A and B based on an opcode. In the first part, the ALU module was tested by reading inputs from a ROM module. In the second part, one input was read from ROM while the other came from RAM, and the output was written back to RAM. Block memories were used to implement the ROM and RAM modules. The student concluded they learned how to generate and interface with block ROM and RAM in FPGA designs.

Uploaded by

Rohaid
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
32 views5 pages

Lab 7 DSD

This document summarizes a digital systems design lab experiment. The student was tasked with implementing an ALU module that performs basic operations on input values A and B based on an opcode. In the first part, the ALU module was tested by reading inputs from a ROM module. In the second part, one input was read from ROM while the other came from RAM, and the output was written back to RAM. Block memories were used to implement the ROM and RAM modules. The student concluded they learned how to generate and interface with block ROM and RAM in FPGA designs.

Uploaded by

Rohaid
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 5

Digital System Design

CPE – 344
Lab 7

Name Rohaid Ahmed Mirza

Registration Number FA19-BCE-006

Class BCE – 7A

Instructor’s Name Sir Bilal Qasim


In lab:
Main Code:
module alu(
output reg [2:0] out,
output reg cout,
output reg v,
output reg z,
output reg g,
output reg l,
input [2:0] A,
input [2:0] B,
input [2:0] opcode,
input clk
);

always@(posedge clk)
begin
case(opcode)
0: {cout,out} <= A + B;
1: out <= A - B;
2: out <= A & B;
3: out <= A | B;
4: out <= A ^ B;
default: out <= 0;
endcase

if (cout)
v <= 1;
if (A == B)
begin
z = 1;
l = 0;
g = 0;
end
else if (A < B)
begin
z = 0;
l = 1;
g = 0;
end
else if (A > B)
begin
z = 0;
l = 0;
g = 1;
end

end

endmodule

module main(
output [2:0] out,
output cout,
output v,
output z,
output g,
output l,
//input [15:0] A1,
//input [15:0] B1,
input [2:0] opcode,
input clk
);

alu alu1(out,cout,v,z,g,l,A,B,opcode,clk);
mem1 rom1(clk,A1,A);
mem1 rom2(clk,B1,B);

endmodule

Post lab 1:
Main Code:
module alu(
output reg [2:0] out,
output reg cout,
output reg v,
output reg z,
output reg g,
output reg l,
input [2:0] A,
input [2:0] B,
input [2:0] opcode,
input clk
);

always@(posedge clk)
begin
case(opcode)
0: {cout,out} <= A + B;
1: out <= A - B;
2: out <= A & B;
3: out <= A | B;
4: out <= A ^ B;
default: out <= 0;
endcase

if (cout)
v <= 1;
if (A == B)
begin
z = 1;
l = 0;
g = 0;
end
else if (A < B)
begin
z = 0;
l = 1;
g = 0;
end
else if (A > B)
begin
z = 0;
l = 0;
g = 1;
end

end

endmodule

module main(
output [2:0] out,
output cout,
output v,
output z,
output g,
output l,
input [15:0] A1,
input [15:0] B1,
input [15:0] ramAdd1,
input [15:0] ramAdd2,
input [2:0] opcode,
input write,
input din,
input clk
);

alu alu1(out,cout,v,z,g,l,A,B,opcode,clk);
mem1 rom1(clk,A1,A);
//mem1 rom2(clk,B1,B);
mem2 ram1(clk,write,ramAdd1,din,B);
mem2 ram2(clk,write,ramAdd2,out,);

endmodule

Post lab 1:
function create_coe(data, filename,bitsNo)
fd = fopen(filename,'w');
fprintf(fd, 'memory_initialization_radix=2;\n');
fprintf(fd, 'memory_initialization_radix=\n');
[~,b] = size(data);
for k=1:b
fprintf(fd,'&x', de2bi(data(k),bitsNo, 'left-msb'));
if(k==b)
fprintf(fd,':\n');
else
fprintf(fd,':\n');
end
end
fclose(fd);
Conclusion:
In this lab, we learnt about the use of Block Memories, how to make Block ROM/RAM using
the Block Memory Generator. We performed the two tasks. In task 1, we took data from the
ROM, performed the ALU operation. In task 2, we took inputs from RAM and ROM both,
performed an ALU operation and saved it in RAM.

You might also like