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Chap 7 Parallel Processing Multicore Computers

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13 views9 pages

Chap 7 Parallel Processing Multicore Computers

cpu

Uploaded by

mle011204
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Chapter 7

Parallel Processing and Multicore Computers

1
Parallel Organizations

2
Parallel Organizations
— Single instruction, single data (SISD) stream
§ Single processor executes a single instruction stream to operate on data stored in a
single memory
§ Uniprocessors fall into this category
— Single instruction, multiple data (SIMD) stream
§ A single machine instruction controls the simultaneous execution of a number of
processing elements on a lockstep basis
§ Vector and array processors fall into this category
— Multiple instruction, single data (MISD) stream
§ A sequence of data is transmitted to a set of processors, each of which executes a
different instruction sequence
§ Not commercially implemented
— Multiple instruction, multiple data (MIMD) stream
§ A set of processors simultaneously execute different instruction sequences on different
data sets
3 § SMPs, clusters and NUMA systems fit this category
Parallel Organizations

4
Symmetric Multiprocessor (SMP)
— Two or more similar processors of comparable capacity
— Processors share same memory and I/O facilities
§ Processors are connected by a bus or other internal connection
§ Memory access time is approximately the same for each processor

— All processors share access to I/O devices


§ Either through same channels or different channels giving paths to same
devices
— All processors can perform the same functions
— System controlled by integrated operating system
§ Provides interaction between processors and their programs at job, task, file
and data element levels

5
Symmetric Multiprocessor (SMP)

6
Multicore Computers
— Multicore CPU: CPU has some cores running concurrently.
— The use of multiple processors on the same chip provides the
potential to increase performance without increasing the clock
rate
— Strategy is to use two simpler processors on the chip rather than
one more complex processor
— With two processors larger caches are justified
— As caches became larger it made performance sense to create two
and then three levels of cache on a chip

7
Amdahl’s Law
— Deals with the potential speedup of a program using multiple
processors compared to a single processor
— Illustrates the problems facing industry in the development of
multi-core machines
— Software must be adapted to a highly parallel execution
environment to exploit the power of parallel processing
— Can be generalized to evaluate and design technical improvement
in a computer system

N: No of processors
f: Percent of program can
be processed in parallel
8
Amdahl’s Law

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