vllm.models.minimax_m3 ¶
MiniMax M3 model — hardware-isolated entry point.
The implementation lives under nvidia/ and amd/; this module picks the right one for the current platform and re-exports the public classes used by the model registry. (Mirrors vllm.models.deepseek_v4.)
Modules:
Classes:
-
MiniMaxM3MTP– -
MiniMaxM3SparseForCausalLM–MiniMax M3 (sparse/dense backbone) for causal language modeling.
-
MiniMaxM3SparseForConditionalGeneration–Top-level (VL) entry point for MiniMax M3.
MiniMaxM3MTP ¶
Bases: Module
Source code in vllm/models/minimax_m3/amd/mtp.py
163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 | |
_get_mtp_layer_idx_from_weight_name(name) ¶
Return the MTP layer index in .mtp.layers.{idx}., else None.
Source code in vllm/models/minimax_m3/amd/mtp.py
_map_checkpoint_name(name) ¶
Map a full checkpoint key to this MTP module's parameter name.
The MTP module only owns the .mtp.layers. weights plus the token embedding and LM head, which the checkpoint shares with the main model. Everything else belongs to other modules and is ignored here by returning None.
Source code in vllm/models/minimax_m3/amd/mtp.py
MiniMaxM3SparseForCausalLM ¶
Bases: Module, SupportsPP, SupportsEagle3
MiniMax M3 (sparse/dense backbone) for causal language modeling.
Source code in vllm/models/minimax_m3/amd/model.py
MiniMaxM3SparseForConditionalGeneration ¶
Bases: Module, SupportsMultiModal, SupportsPP, SupportsEagle3
Top-level (VL) entry point for MiniMax M3.
Owns the shared MiniMax-M3 vision tower on ROCm and delegates text generation to the AMD language-model path.
Source code in vllm/models/minimax_m3/amd/model.py
1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 | |