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* [DAGCombine] Check the uses of negated floating constant and remove the hackQingShan Zhang2020-06-261-11/+15
* [PPCAsmPrinter] support 'L' output template for memory operandsNick Desaulniers2020-06-251-2/+5
* [AArch64] Change AArch64 Windows EH UnwindHelp object to be a fixed objectDaniel Frampton2020-06-251-15/+38
* [AArch64] Fix mismatch in prologue and epilogue for funclets on WindowsDaniel Frampton2020-06-251-28/+20
* Provide anchor for compiler extensionsSerge Guelton2020-06-251-0/+15
* [RISCV] Fix incorrect FP base CFI offset for variable argument functionsShiva Chen2020-06-251-2/+2
* [RISCV64] Emit correct lib call for fp(float/double) to ui/siKamlesh Kumar2020-06-251-0/+34
* [LegalizeTypes][RISCV] Correctly sign-extend comparison for ATOMIC_CMP_XCHGAlex Bradbury2020-06-251-1/+13
* [X86] Add an Unoptimized Load Value Injection (LVI) Load Hardening PassScott Constable2020-06-243-1/+82
* [X86] Add Support for Load Hardening to Mitigate Load Value Injection (LVI)Scott Constable2020-06-241-3/+306
* [X86] Add a Pass that builds a Condensed CFG for Load Value Injection (LVI) G...Scott Constable2020-06-247-0/+984
* [X86] Fix to X86LoadValueInjectionRetHardeningPass for possible segfaultScott Constable2020-06-241-0/+3
* Revert "[X86] Add a Pass that builds a Condensed CFG for Load Value Injection...Craig Topper2020-06-247-1035/+0
* Revert "[X86] Add Support for Load Hardening to Mitigate Load Value Injection...Craig Topper2020-06-241-277/+5
* [X86] Add Support for Load Hardening to Mitigate Load Value Injection (LVI)Scott Constable2020-06-241-5/+277
* [X86] Add a Pass that builds a Condensed CFG for Load Value Injection (LVI) G...Scott Constable2020-06-247-0/+1035
* [X86] Add RET-hardening Support to mitigate Load Value Injection (LVI)Scott Constable2020-06-244-0/+145
* [X86] Add Indirect Thunk Support to X86 to mitigate Load Value Injection (LVI)Scott Constable2020-06-244-8/+68
* [X86] Refactor X86IndirectThunks.cpp to Accommodate Mitigations other than Re...Scott Constable2020-06-241-125/+157
* [X86][NFC] Generalize the naming of "Retpoline Thunks" and related code to "I...Scott Constable2020-06-2414-113/+135
* Move RDF from Hexagon to CodegenScott Constable2020-06-2414-1386/+29
* [InstCombine] prevent infinite loop with sub/abs of constant expressionTom Stellard2020-06-231-1/+1
* [BasicAA] Make BasicAA a cfg pass.Alina Sbirlea2020-06-231-2/+3
* [PowerPC] Do not assume operand of ADDI is an immediateNemanja Ivanovic2020-06-231-0/+4
* [BPF] fix incorrect type in BPFISelDAGToDAG readonly load optimizationYonghong Song2020-06-231-1/+1
* [BPF] fix a bug for BTF pointee type pruningYonghong Song2020-06-231-0/+32
* [PowerPC] Unaligned FP default should apply to scalars onlyNemanja Ivanovic2020-06-231-1/+2
* Fixed false ThinLTO cache misses problem (PR 45819).romanova-ekaterina2020-06-221-4/+24
* [PowerPC] Prevent legalization loop from promoting SELECT_CC from v4i32 to v4i32Nemanja Ivanovic2020-06-221-0/+1
* [PowerPC] Add missing handling for half precisionTom Stellard2020-06-223-1/+41
* [PowerPC] Add support for vmsumudmAhsan Saghir2020-06-222-0/+5
* Update compiler extension integration into the build systemserge-sans-paille2020-06-177-1/+27
* [AARch64] Add Marvell ThunderX3T110 supportWei Zhao2020-06-1714-15/+2056
* [X86] make sure POP has implicit def/use of stack pointer when materializing ...Yuanfang Chen2020-06-171-0/+2
* [IndVarSimplify][LoopUtils] Avoid TOCTOU/ordering issues (PR45835)Tom Stellard2020-06-161-34/+60
* [AArch64] Fix BTI instruction emission.Daniel Kiss2020-06-161-3/+5
* [AArch64] Fix BTI landing pad generation.Daniel Kiss2020-06-161-0/+4
* [X86] Fold undef elts to 0 in getTargetVShiftByConstNode.Craig Topper2020-06-161-3/+6
* [X86] Teach combineVectorShiftImm to constant fold undef elements to 0 not un...Craig Topper2020-06-161-2/+10
* ValueMapper does not preserve inline assembly dialect when remapping the typeCraig Topper2020-06-111-1/+2
* [X86] Add x, t and g modifiers for inline asmCraig Topper2020-06-111-1/+45
* Don't jump to landing pads in Control Flow OptimizerArthur Eubanks2020-05-281-8/+10
* [arm] Add big-endian version of pcrel fixups for adr instructionsupstream/llvmorg-10.0.1-rc1llvmorg-10.0.1-rc1Dimitry Andric2020-05-191-12/+8
* [ARM] Only produce qadd8b under hasV6OpsDavid Green2020-05-191-1/+1
* [PowerPC] Do not attempt to reuse load for 64-bit FP_TO_UINT without FPCVTNemanja Ivanovic2020-05-191-2/+3
* [WebAssembly] Add section names for some DWARF5 sectionsDerek Schuff2020-05-191-1/+11
* [globalopt] Don't emit DWARF fragments for membersDavid Spickett2020-05-181-6/+10
* Backport 4878aa36d4a [ValueLattice] Add new state for undef constants.Florian Hahn2020-05-182-8/+10
* Enable IBT(Indirect Branch Tracking) in JIT with CET(Control-flow Enforcement...Xiang1 Zhang2020-05-183-8/+23
* CET for Exception HandlePengfei Wang2020-05-181-3/+10
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