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VinayakPrakashh/README.md

Hi i'm Vinayak

A Digital Design Enthusiast from India

vinayakprakashh

vinayakprakashh

(Use dark theme to find my socials :D)

Vinayak | LinkedIn Vinayak | Instagram Vinayak | Twitter

📫 How to reach me: [email protected]

Languages and Tools:

c cplusplus firebase git java photoshop python

📊 GitHub Stats:



🔝 Top Contributed Repo

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  1. RISC_V_SINGLE_CORE RISC_V_SINGLE_CORE Public

    Verilog 3

  2. RISC_V_PIPELINE_CORE_BRANCH_PREDICTOR RISC_V_PIPELINE_CORE_BRANCH_PREDICTOR Public

    Verilog

  3. N_bit_booth_multiplier N_bit_booth_multiplier Public

    Verilog 1

  4. RTL_TO_GDSII_ASYNCHRONOUS_FIFO RTL_TO_GDSII_ASYNCHRONOUS_FIFO Public

    Verilog