STM32N6:Enable USB and UDC OTGPHY clock #90362
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- Reset specific configuration bits in USB1_HS_PHYC->USBPHYC_CR before setting new values. - Set the Frequency Selection (FSEL) bits to operate the USB PHY Control Register at 24 MHz for proper communication. - Enable the OTGPHY1 peripheral clock using LL_AHB5_GRP1_EnableClock. Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <[email protected]>
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These modifications resolve the USB/UDC initialization error encountered during normal boot mode, allowing the application to successfully enable USB/UDC functionality on the stm32n6570_dk and nucleo_n657x0_q boards.
Fix the issue.