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drivers: udc_dwc2: Execute post enable quirk after enable #90598

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Merged
merged 1 commit into from
Jun 3, 2025

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tmon-nordic
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Device can be considered enabled only after the Soft Disconnect bit is cleared. Move the post enable quirk past the SftDiscon bit clear.

Device can be considered enabled only after the Soft Disconnect bit is
cleared. Move the post enable quirk past the SftDiscon bit clear.

Signed-off-by: Tomasz Moń <[email protected]>
@github-actions github-actions bot added the area: USB Universal Serial Bus label May 26, 2025
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@raffarost
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Tested on ESP32, with no apparent problems. As PHY clock and pads are currently being enabled at dwc2_quirk_post_enable() I couldn't be sure of this change (thinking HW settling down first, then enabling SW when everything is ready).

@tmon-nordic
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@raffarost the difference is the UTMI+ OpMode signal being 00 (Normal) instead of 01 (Non-Driving). You could check with your HW design team if the OpMode being Normal before dwc2_quirk_post_enable() has any negative impact on ESP32.

@kartben kartben merged commit 2248396 into zephyrproject-rtos:main Jun 3, 2025
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4 participants