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cy-vivekp
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Description

When PSoC6 enters deepsleep

  • Configure RTS and TX GPIO DR register to drive output (high)
    When PSoC6 exits deepsleep
  • Return SCB control on TX and RTS pins

Pull request type

[ ] Fix
[ ] Refactor
[X] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change

Reviewers

@satya1957 @svozcy @cydriftcloud

Release Notes

When PSoC enters deepsleep, in uart driver
  - deassert RTS, set RTS to output high
  - set TX to output high
@ciarmcom
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@cy-vivekp, thank you for your changes.
@ARMmbed/mbed-os-maintainers please review.

@ciarmcom ciarmcom requested a review from a team March 29, 2019 02:00
@cmonr
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cmonr commented Mar 29, 2019

CI started

@mbed-ci
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mbed-ci commented Mar 30, 2019

Test run: SUCCESS

Summary: 13 of 13 test jobs passed
Build number : 1
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@NirSonnenschein
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CI has passed on this one: @satya1957 @svozcy @cydriftcloud would you like to review this before it is merged?

@cmonr
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cmonr commented Apr 9, 2019

@satya1957 @svozcy @cydriftcloud Please review.

@cmonr
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cmonr commented Apr 9, 2019

CI restarted since results are now stale

@mbed-ci
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mbed-ci commented Apr 9, 2019

Test run: SUCCESS

Summary: 11 of 11 test jobs passed
Build number : 2
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@0xc0170
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0xc0170 commented Apr 10, 2019

Waiting for approvals from reviewers

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@svozcy svozcy left a comment

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The changes looks good for me!

@0xc0170 0xc0170 merged commit ffe9ddf into ARMmbed:master Apr 10, 2019
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7 participants