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STM32H7: system power supply configuration #14003

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Merged
merged 1 commit into from
Dec 9, 2020
Merged

STM32H7: system power supply configuration #14003

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4 changes: 0 additions & 4 deletions targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/system_clock.c
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Original file line number Diff line number Diff line change
Expand Up @@ -89,8 +89,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

/* Supply configuration update enable */
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
/* Configure the main internal regulator output voltage */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

Expand Down Expand Up @@ -160,8 +158,6 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;

/*!< Supply configuration update enable */
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
/* Configure the main internal regulator output voltage */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
Expand Down
4 changes: 0 additions & 4 deletions targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/system_clock.c
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Original file line number Diff line number Diff line change
Expand Up @@ -89,8 +89,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

/* Supply configuration update enable */
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
/* Configure the main internal regulator output voltage */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

Expand Down Expand Up @@ -163,8 +161,6 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;

/*!< Supply configuration update enable */
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
/* Configure the main internal regulator output voltage */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
Expand Down
4 changes: 0 additions & 4 deletions targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/system_clock.c
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Original file line number Diff line number Diff line change
Expand Up @@ -88,8 +88,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

/* Supply configuration update enable */
HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
/* Configure the main internal regulator output voltage */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

Expand Down Expand Up @@ -165,8 +163,6 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;

/* Supply configuration update enable */
HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
/* Configure the main internal regulator output voltage */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

Expand Down
4 changes: 0 additions & 4 deletions targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/system_clock.c
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Original file line number Diff line number Diff line change
Expand Up @@ -88,8 +88,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

/* Supply configuration update enable */
HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
/* Configure the main internal regulator output voltage */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

Expand Down Expand Up @@ -165,8 +163,6 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;

/* Supply configuration update enable */
HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
/* Configure the main internal regulator output voltage */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

Expand Down
5 changes: 0 additions & 5 deletions targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7A3xIQ/system_clock.c
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Original file line number Diff line number Diff line change
Expand Up @@ -84,9 +84,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

/* Supply configuration update enable */
HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);

/* Configure the main internal regulator output voltage */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);

Expand Down Expand Up @@ -156,8 +153,6 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;

/*!< Supply configuration update enable */
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
/* Configure the main internal regulator output voltage */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
Expand Down
17 changes: 17 additions & 0 deletions targets/TARGET_STM/mbed_overrides.c
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Original file line number Diff line number Diff line change
Expand Up @@ -174,6 +174,15 @@ void mbed_sdk_init()
LSEDriveConfig();
}
#endif

#if defined(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
#if IS_PWR_SUPPLY(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
HAL_PWREx_ConfigSupply(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY);
#else
#error system_power_supply not configured
#endif
#endif

SetSysClock();
SystemCoreClockUpdate();

Expand Down Expand Up @@ -202,6 +211,14 @@ void mbed_sdk_init()
}
#endif

#if defined(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
#if IS_PWR_SUPPLY(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
HAL_PWREx_ConfigSupply(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY);
#else
#error system_power_supply not configured
#endif
#endif

SetSysClock();
SystemCoreClockUpdate();
#endif /* DUAL_CORE */
Expand Down
26 changes: 22 additions & 4 deletions targets/targets.json
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Original file line number Diff line number Diff line change
Expand Up @@ -2722,6 +2722,12 @@
"lse_drive_load_level": {
"help": "HSE drive load level RCC_LSEDRIVE_LOW | RCC_LSEDRIVE_MEDIUMLOW | RCC_LSEDRIVE_MEDIUMHIGH | RCC_LSEDRIVE_HIGH",
"value": "RCC_LSEDRIVE_LOW"
},
"system_power_supply": {
"expected_value1": "PWR_LDO_SUPPLY | PWR_DIRECT_SMPS_SUPPLY",
"expected_value2": "PWR_SMPS_1V8_SUPPLIES_LDO | PWR_SMPS_2V5_SUPPLIES_LDO | PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO | PWR_SMPS_2V5_SUPPLIES_EXT_AND_LDO",
"expected_value3": "PWR_SMPS_1V8_SUPPLIES_EXT | PWR_SMPS_2V5_SUPPLIES_EXT | PWR_EXTERNAL_SOURCE_SUPPLY",
"value": "NC"
}
},
"components_add": [
Expand Down Expand Up @@ -2758,7 +2764,10 @@
],
"macros_add": [
"STM32H743xx"
]
],
"overrides": {
"system_power_supply": "PWR_LDO_SUPPLY"
}
},
"NUCLEO_H743ZI2": {
"inherits": [
Expand Down Expand Up @@ -2800,7 +2809,10 @@
],
"macros_add": [
"STM32H745xx"
]
],
"overrides": {
"system_power_supply": "PWR_DIRECT_SMPS_SUPPLY"
}
},
"MCU_STM32H745xI_CM4": {
"inherits": [
Expand Down Expand Up @@ -2846,7 +2858,10 @@
],
"macros_add": [
"STM32H747xx"
]
],
"overrides": {
"system_power_supply": "PWR_DIRECT_SMPS_SUPPLY"
}
},
"MCU_STM32H747xI_CM7": {
"inherits": [
Expand Down Expand Up @@ -2948,7 +2963,10 @@
],
"macros_add": [
"STM32H7A3xxQ"
]
],
"overrides": {
"system_power_supply": "PWR_DIRECT_SMPS_SUPPLY"
}
},
"NUCLEO_H7A3ZI_Q": {
"inherits": [
Expand Down