Shift Right registers

• System shift right registers (Sys-SR): from 2 to 32 bits
• System shift right registers with reset (Sys-SR-rst): from 2 to 32 bits
• System shift right registers with load (Sys-SR-ld): from 2 to 32 bits
• System shift right registers with load and reset (Sys-SR-ld-rst): from 2 to 32 bits
• Shift right register (SR): from 2 to 32 bits
• Shift right register with reset (SR-rst): from 2 to 32 bits
• Shift right register with load (SR-ld): from 2 to 32 bits
• Shift right register with load and reset (SR-ld-rst): from 2 to 32 bits

Shift Left registers

• System shift left registers (Sys-SL): from 2 to 32 bits
• System shift left registers with reset (Sys-SL-rst): from 2 to 32 bits
• System shift left registers with load (Sys-SL-ld): from 2 to 32 bits
• System shift left registers with load and reset (Sys-SL-ld-rst): from 2 to 32 bits
• Shift left register (SL): from 2 to 32 bits
• Shift left register with reset (SL-rst): from 2 to 32 bits
• Shift left register with load (SL-ld): from 2 to 32 bits
• Shift left register with load and reset (SL-ld-rst): from 2 to 32 bits

Shift Left right registers

• System shift left right registers (Sys-SLR): from 2 to 32 bits
• System shift left right registers with reset (Sys-SLR-rst): from 2 to 32 bits
• System shift left right registers with load (Sys-SLR-ld): from 2 to 32 bits
• System shift left right registers with load and reset (Sys-SLR-ld-rst): from 2 to 32 bits
• Shift left right register (SLR): from 2 to 32 bits
• Shift left right register with reset (SLR-rst): from 2 to 32 bits
• Shift left right register with load (SLR-ld): from 2 to 32 bits
• Shift left right register with load and reset (SLR-ld-rst): from 2 to 32 bits

Examples for the boards:

• Alhambra-II