[None][feat] Add FP8 rowwise GEMMs for B200 #8332
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Signed-off-by: Aurelien Chartier <[email protected]>
📝 WalkthroughWalkthroughThe change set broadens FP8 support and dispatch across SM versions by lowering thresholds from 120 to 100, adjusts compile-time/run-time gating to include SM 100-series, updates build CUDA architectures to add 100f, and removes a test skip decorator. No public APIs are altered. Changes
Sequence Diagram(s)sequenceDiagram
autonumber
actor Test as Test/Caller
participant Runner as Fp8RowwiseGemmRunner
participant Heur as Cutlass Heuristic
participant Kernel as FP8 Rowwise GEMM Kernel
Test->>Runner: run(m, n, k, sm, grouped?)
Runner->>Heur: get_candidate_tiles(sm, grouped, dtype=FP8)
alt SM >= 100
Heur-->>Runner: tiles for 100–120+
Runner->>Kernel: dispatch to SM89/SM10/SM12 path
Kernel-->>Runner: execute
else SM < 100
Heur-->>Runner: tiles for pre-100 (no FP8 path)
Runner-->>Test: fallback/unsupported path
end
Estimated code review effort🎯 3 (Moderate) | ⏱️ ~25 minutes Pre-merge checks and finishing touches❌ Failed checks (1 warning)
✅ Passed checks (2 passed)
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🧹 Nitpick comments (1)
cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_rowwise_gemm/fp8_rowwise_gemm_kernel_template_sm89.h (1)
109-118: LGTM! Compile-time check correctly expanded for B200 support.The conditional now properly includes SM10x (SM100-109) devices in addition to SM89 and SM12x, and the error message accurately reflects "Blackwell devices." The logic aligns with the runtime dispatch changes in
fp8_rowwise_gemm_template.h.Optional: Consider renaming the struct.
The struct name
Sm89_12xOnlyis now slightly misleading since it also supports SM10x devices. A name likeSm89_Blackwellwould be more accurate, though this is a low-priority refactor.
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cpp/tensorrt_llm/kernels/cutlass_kernels/CMakeLists.txt(1 hunks)cpp/tensorrt_llm/kernels/cutlass_kernels/cutlass_heuristic.cpp(2 hunks)cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_rowwise_gemm/fp8_rowwise_gemm_kernel_template_sm89.h(1 hunks)cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_rowwise_gemm/fp8_rowwise_gemm_template.h(2 hunks)tests/unittest/_torch/thop/parallel/test_fp8_rowwise_linear.py(1 hunks)
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cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_rowwise_gemm/fp8_rowwise_gemm_kernel_template_sm89.h (3)
cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/mxfp8_mxfp4_gemm_template_sm100.h (2)
tensorrt_llm(44-294)kernels(46-293)cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/nvfp4_nvfp4_gemm_template_sm120.h (2)
tensorrt_llm(42-262)kernels(44-261)cpp/include/tensorrt_llm/kernels/archCondition.h (2)
tensorrt_llm(19-113)arch(72-111)
cpp/tensorrt_llm/kernels/cutlass_kernels/cutlass_heuristic.cpp (1)
cpp/tests/unit_tests/kernels/mixtureOfExpertsTest.cu (4)
sm(1112-1139)sm(1112-1112)sm(1141-1179)sm(1141-1141)
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🔇 Additional comments (4)
cpp/tensorrt_llm/kernels/cutlass_kernels/CMakeLists.txt (1)
203-203: LGTM! B200 architecture support added correctly.The addition of
100fto the CUDA architectures enables FP8 rowwise GEMM compilation for SM100 (B200) devices with forward compatibility.tests/unittest/_torch/thop/parallel/test_fp8_rowwise_linear.py (1)
3-3: LGTM! Test now enabled for Blackwell devices.Removing the
skip_blackwellimport allows this test to run on B200 and other Blackwell devices, providing appropriate test coverage for the new FP8 rowwise GEMM support.cpp/tensorrt_llm/kernels/cutlass_kernels/fp8_rowwise_gemm/fp8_rowwise_gemm_template.h (1)
511-511: Verify SM100+ devices should use SM89 implementation.The dispatch logic now routes SM100+ devices (including B200 and SM120+) to the SM89 kernel implementation, while SM90 continues using TMA-based kernels. This appears intentional, but please confirm:
- SM100 (B200) devices lack TMA-based FP8 rowwise kernels and should use SM89 implementation?
- SM120+ devices should also use SM89 implementation rather than dedicated SM120 kernels?
The changes are consistent across both
dispatchToArch(Line 511) andgetConfigs(Line 578) methods.Also applies to: 578-578
cpp/tensorrt_llm/kernels/cutlass_kernels/cutlass_heuristic.cpp (1)
178-178: LGTM! Tile configuration heuristics updated for B200 support.The candidate tile selection for FP8 GEMMs now correctly includes SM100+ devices alongside SM89, ensuring they receive appropriate tile configurations. This change aligns with the dispatch logic updates in
fp8_rowwise_gemm_template.h.Also applies to: 196-196
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Summary by CodeRabbit
New Features
Tests
Description
Add FP8 rowwise GEMMs for B200
Test Coverage
test_fp8_rowwise_linear
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