InTowards AIbySrinivas kodali·5d agoPCIe in AI Inference: Where It Shines and Where It LagsNov 7, 2026 · @Srinivas Kodali
Joshi Sumit·Oct 14Building AI Accelerators: Infrastructure, Compilers, and HW-SW Co-Design — Part 1A: PCIe Hardware…DMA as a Distributed System
Abdulrahman Maslmany·Oct 12PCIe 4.0 x8/x8 vs x16/x16 for Dual GPUs: Does Bandwidth Choke Local LLM Tensor Parallelism?An engineering audit on bus bifurcation, NCCL AllReduce synchronization bubbles, and 70B token generation velocity.
Om Narasimhan·Aug 21A deep dive into PERST# — The Signal That Decides Whether Your PCIe Link Ever TrainsMost PCIe bring-up debug efforts eventually trace back to one net: PERST#. Beginners take it as an unassuming active-low signal that is…
Abhishekojha·Aug 8Building a QEMU PCIe Device from ScratchBuilding a PCIe Device from Scratch Inside QEMU
