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Adam Taylor

Adam Taylor

·

Jun 5, 2020

How To Implement A Real-time Human Detection Application at the Edge Using Zynq UltraScale+ MPSoC…

The ability to perform real-time, low-latency and deterministic processing at the edge is increasingly important for a range of…

How To Implement A Real-time Human Detection Application at the Edge Using Zynq UltraScale+ MPSoC…

Adam Taylor

·

Apr 6, 2020

MicroZed Chronicles: PetaLinux Build

Having looked at creating the virtual machine and the different build elements of PetaLinux.

MicroZed Chronicles: PetaLinux Build

Adam Taylor

·

Mar 20, 2020

MicroZed Chronicles: PetaLinux Edition — Build Elements & Configuration

Having demonstrated how to get create a PetaLinux build environment, we are now in position to be able to start creating embedded Linux…

MicroZed Chronicles: PetaLinux Edition — Build Elements & Configuration

Adam Taylor

·

Mar 6, 2020

MicroZed Chronicles: PetaLinux Edition— Getting Set Up

To get started creating a our PetaLinux solution we need to use a Linux Machine. In this blog we are going to look at how we can create a…

MicroZed Chronicles: PetaLinux Edition— Getting Set Up

Adam Taylor

·

Feb 21, 2020

MicroZed Chronicles: PetaLinux Edition

Over the years we have looked a lot at how we can use PetaLinux to create embedded Linux solutions for our Zynq, Zynq MPSoC and MicroBlaze…

MicroZed Chronicles: PetaLinux Edition

Adam Taylor

·

Nov 8, 2019

High Level Synthesis Made Easier: Deeper Dive

In my last blog looking into Silexica’s SLX FPGA tool, I introduced the tool, its concepts and of course the benefits it brought in…

High Level Synthesis Made Easier: Deeper Dive

Adam Taylor

·

Oct 2, 2019

MicroZed Chronicles: XDF and VITIS

Since the announcement of the Versal ACAP at XDF18, there has been great interest in the software environment which developers will use to…

MicroZed Chronicles: XDF and VITIS

Adam Taylor

·

Sep 25, 2019

MicroZed Chronicles: Optimizing Our HLS Design with the Analysis Perspective

Last week we looked at how we could work with loops in our HLS source code, exploring how we can flatten, merge and unroll loops.

MicroZed Chronicles: Optimizing Our HLS Design with the Analysis Perspective

Adam Taylor

·

Sep 18, 2019

MicroZed Chronicles: HLS Working with Loops

When we write code intended for HLS implementations we tend to implement repetitive algorithms which process blocks of data for example…

MicroZed Chronicles: HLS Working with Loops

Adam Taylor

·

Sep 13, 2019

High Level Synthesis Made Easier!

I have recently been evaluating the SLX FPGA tool from Silexica. If you are not familiar with SLX FPGA it is designed to work with both…

High Level Synthesis Made Easier!

Adam Taylor

Adam Taylor

Adam Taylor is an expert in design and development of embedded systems and FPGA's for several end applications. He is the founder of Adiuvo Engineering Ltd

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