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drivers: spi: introduce basic spi driver for wch #90243
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Only tested on ch32v203 for now, will test more later. |
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Looking good, thanks!
drivers/spi/spi_wch.c
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struct spi_wch_config { | ||
SPI_TypeDef *regs; | ||
const struct pinctrl_dev_config *pcfg; |
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nit: for consistency with the other WCH drivers, call this 'pin_cfg'.
drivers/spi/spi_wch.c
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SPI_TypeDef *regs; | ||
const struct pinctrl_dev_config *pcfg; | ||
const struct device *clk_dev; | ||
uint8_t clk_id; |
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nit: s/clk_id/clock_id/
drivers/spi/spi_wch.c
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#include <ch32fun.h> | ||
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#define SPI_CTLR1_LSBFIRST ((uint16_t)0x0080) |
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nit: Zephyr style seems to be to use BIT(7).
drivers/spi/spi_wch.c
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uint8_t div = 0; | ||
int div_val = 2; | ||
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for (;div < 8; div++) { |
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nit: use for (div = 0; div < 8; div++)
so the initialisation is next to the first use.
drivers/spi/spi_wch.c
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} | ||
div_val *= 2; | ||
} | ||
return div; |
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nit: blank line before
drivers/spi/spi_wch.c
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spi_context_cs_control(&data->ctx, true); | ||
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/* Start SPI *AFTER* setting CS */ | ||
cfg->regs->CTLR1 |= SPI_CTLR1_SPE; |
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Add a SPI_Typedef *regs = cfg->regs
above and use it everywhere.
drivers/spi/spi_wch.c
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while (spi_context_tx_on(&data->ctx) || spi_context_rx_on(&data->ctx)) { | ||
if (spi_context_tx_buf_on(&data->ctx)) { | ||
cfg->regs->DATAR = *(uint8_t *)(data->ctx.tx_buf); | ||
while(!(cfg->regs->STATR & SPI_STATR_TXE)) {} |
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For consistency, use while ((regs->STATR & SPI_START_TXE) != 0U) { }
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not quite... more like while ((regs->STATR & SPI_START_TXE) == 0U) { }
drivers/spi/spi_wch.c
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cfg->regs->DATAR = *(uint8_t *)(data->ctx.tx_buf); | ||
while(!(cfg->regs->STATR & SPI_STATR_TXE)) {} | ||
} else { | ||
cfg->regs->DATAR = 0; |
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I'm pretty sure this should still wait for TXE before writing, even if it's writing a zero.
drivers/spi/spi_wch.c
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cfg->regs->DATAR = 0; | ||
} | ||
spi_context_update_tx(&data->ctx, 1, 1); | ||
while(!(cfg->regs->STATR & SPI_STATR_RXNE)) {} |
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ditto re: testing for a flag.
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(all changes you suggested were done @nzmichaelh) |
CH32V00x pinctrl for SPI looks very wrong |
Tested working on ch32v006 with st7567 so ill assume it works on everything else. |
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LGTM, thanks!
dts/riscv/wch/ch32v203/ch32v203.dtsi
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spi2: spi@40003800 { | ||
compatible = "wch,spi"; | ||
reg = <40003800 0x24>; |
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reg = <40003800 0x24>; | |
reg = <0x40003800 0x24>; |
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done
introduces a basic SPI driver for CH32 series Signed-off-by: Camille BAUD <[email protected]>
This fixes incorrect/incomplete pinctrl for CH32V006 Signed-off-by: Camille BAUD <[email protected]>
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introduces a basic SPI driver for CH32 series