Advancements in Photonics

AI holds great potential for the semiconductor industry and will kick-start the next round of innovation for faster, cheaper and more energy-efficient computation – that was my message today at SPIE Advanced Lithography + Patterning. I discussed the potential and the challenges that AI holds for our industry.   The potential is clearly huge. AI is rapidly integrated into applications, and high-performance compute is expected to underpin growth towards $1 trillion of semiconductor sales by 2030. The challenges are around the computing needs of AI models and related energy consumption. The compute workload of training a leading AI model has increased 16x every 2 years in recent years – much faster than the increase in computing power delivered by Moore’s law, which is about 2x every 2 years. The energy needed to train a leading model has not grown so steeply but still rose 10x every 2 years. This computing need has been met by building supercomputers and massive data centers. If you extrapolate these trends, training a leading AI model would need the entire world-wide electricity supply in about 10 years. That’s clearly not realistic, so the trend has to break, by training algorithms becoming more efficient and by chips becoming more efficient. In other words, the needs of AI will stimulate immense innovation in chip design and manufacturing – and the potential value of AI to our society will put urgency and funding behind that drive. As a consequence, chip makers are pulling all levers to accelerate semiconductor scaling. This includes lithographic “2D” scaling: shrinking the dimensions of transistors to pack more into a square millimeter. It will also include “3D” integration, with innovations like backside power delivery, transistor designs like gate-all-around, as well as stacking chips in the package, where holistic lithography will play a critical role to deliver performance requirements. ASML will support these trends through a comprehensive, holistic lithography portfolio. Our 0.33 NA/0.55 NA EUV lithography systems allow chip makers to shrink dimensions at the lowest possible cost on their critical layers, while tightly matched and highly productive DUV systems will continue to reduce cost. More than ever, metrology and inspections tools – whose data is fed into lithography control solutions that keep the patterning process operating within tight specs to deliver the highest possible production yields – will be essential to deliver 2D scaling and 3D integration processes. 3D integration requires wafer-to-wafer bonding, and we have demonstrated the capability to map the stresses and distortions that bonding creates and to compensate for them, reducing overlay errors for post-bonding patterning by 10x or more.   It was a pleasure catching up with the industry’s lithography and patterning experts in San Jose. I’m excited to see our collective innovation power having a go at these challenges. Together, we will push technology forward.

Using light as a neural network, as this viral video depicts, is actually closer than you think. In 5-10yrs, we could have matrix multiplications in constant time O(1) with 95% less energy. This is the next era of Moore's Law. Let's talk about Silicon Photonics... The core concept: Replace electrical signals with photons. While current processors push electrons through metal pathways, photonic systems use light beams, operating at fundamentally higher speeds (electronic signals in copper are 3x slower) with minimal heat generation. It's way faster. While traditional chips operate at 3-5 GHz, photonic devices can achieve >100 GHz switching speeds. Current interconnects max out at ~100 Gb/s. Photonic links have demonstrated 2+ Tb/s on a single channel. A single optical path can carry 64+ signals. It's way more energy efficient. Current chip-to-chip communication costs ~1-10pJ/bit. Photonic interconnects demonstrate 0.01-0.1pJ/bit. For data centers processing exabytes, this 200x improvement means the difference between megawatt and kilowatt power requirements. The AI acceleration potential is revolutionary. Matrix operations, fundamental to deep learning, become near-instantaneous: Traditional chips: O(n²) operations. Photonic chips: O(1) - parallel processing through optical interference. 1000×1000 matmuls in picoseconds. Where are we today? Real products are shipping: — Intel's 400G transceivers use silicon photonics. — Ayar Labs demonstrates 2Tb/s chip-to-chip links with AMD EPYC processors. Performance scales with wavelength count, not just frequency like traditional electronics. The manufacturing challenges are immense. — Current yield is ~30%. Silicon's terrible at emitting light and bonding III-V materials to it lowers yield — Temp control is a barrier. A 1°C change shifts frequencies by ~10GHz. — Cost/device is $1000s To reach mass production we need: 90%+ yield rates, sub-$100 per device costs, automated testing solutions, and reliable packaging techniques. Current packaging alone can cost more than the chip itself. We're 5+ years from hitting these targets. Companies to watch: ASML (manufacturing), Intel (data center), Lightmatter (AI), Ayar Labs (chip interconnects). The technology requires major investment, but the potential returns are enormous as we hit traditional electronics' physical limits.

🔬 𝗘𝗽𝗶𝘀𝗼𝗱𝗲 𝟭𝟭𝟳 — 𝗛𝗼𝘄 𝗗𝗼 𝗪𝗲 𝗚𝗲𝘁 𝗟𝗶𝗴𝗵𝘁 𝗢𝗻𝘁𝗼 𝗮 𝗣𝗵𝗼𝘁𝗼𝗻𝗶𝗰 𝗖𝗵𝗶𝗽? A standard optical fiber carries light in a mode roughly 𝟭𝟬 𝝻𝗺 𝗮𝗰𝗿𝗼𝘀𝘀 𝗮𝘁 𝟭𝟱𝟱𝟬 𝗻𝗺. A silicon photonic waveguide can be only a 𝗳𝗲𝘄 𝗵𝘂𝗻𝗱𝗿𝗲𝗱 𝗻𝗮𝗻𝗼𝗺𝗲𝘁𝗲𝗿𝘀 𝘄𝗶𝗱𝗲. So how do we efficiently connect the two? This is fundamentally a 𝗺𝗼𝗱𝗲-𝗺𝗮𝘁𝗰𝗵𝗶𝗻𝗴 𝗽𝗿𝗼𝗯𝗹𝗲𝗺, and two important solutions are: 🔹 𝗘𝗱𝗴𝗲 𝗖𝗼𝘂𝗽𝗹𝗶𝗻𝗴 — light enters through the chip facet, while an inverse taper or spot-size converter gradually transforms the optical mode to improve overlap with the fiber. 🔹 𝗚𝗿𝗮𝘁𝗶𝗻𝗴 𝗖𝗼𝘂𝗽𝗹𝗶𝗻𝗴 — a periodic nanostructure diffracts light between a fiber above the chip and an on-chip waveguide. Neither approach is universally better. Edge coupling can offer 𝗹𝗼𝘄 𝗹𝗼𝘀𝘀 𝗮𝗻𝗱 𝗯𝗿𝗼𝗮𝗱 𝗯𝗮𝗻𝗱𝘄𝗶𝗱𝘁𝗵, but demands precise alignment and careful packaging. Grating couplers provide flexible placement and are attractive for 𝘄𝗮𝗳𝗲𝗿-𝗹𝗲𝘃𝗲𝗹 𝘁𝗲𝘀𝘁𝗶𝗻𝗴 𝗮𝗻𝗱 𝘀𝗰𝗮𝗹𝗮𝗯𝗹𝗲 𝗼𝗽𝘁𝗶𝗰𝗮𝗹 𝗜/𝗢, but introduce trade-offs involving efficiency, bandwidth, wavelength, and polarization. As silicon photonics expands into 𝗼𝗽𝘁𝗶𝗰𝗮𝗹 𝗶𝗻𝘁𝗲𝗿𝗰𝗼𝗻𝗻𝗲𝗰𝘁𝘀, 𝗔𝗜 𝗵𝗮𝗿𝗱𝘄𝗮𝗿𝗲, 𝗾𝘂𝗮𝗻𝘁𝘂𝗺 𝗽𝗵𝗼𝘁𝗼𝗻𝗶𝗰𝘀, 𝗮𝗻𝗱 𝗰𝗼-𝗽𝗮𝗰𝗸𝗮𝗴𝗲𝗱 𝗼𝗽𝘁𝗶𝗰𝘀, this tiny fiber-chip interface becomes a major engineering challenge. The question isn't simply 𝗲𝗱𝗴𝗲 𝗼𝗿 𝗴𝗿𝗮𝘁𝗶𝗻𝗴? It's how we achieve 𝗹𝗼𝘄 𝗹𝗼𝘀𝘀, 𝗵𝗶𝗴𝗵 𝗯𝗮𝗻𝗱𝘄𝗶𝗱𝘁𝗵, 𝗮𝗻𝗱 𝘀𝗰𝗮𝗹𝗮𝗯𝗹𝗲 𝗽𝗮𝗰𝗸𝗮𝗴𝗶𝗻𝗴 𝗮𝘁 𝘁𝗵𝗲 𝘀𝗮𝗺𝗲 𝘁𝗶𝗺𝗲. 🎥 𝗘𝗽𝗶𝘀𝗼𝗱𝗲 𝟭𝟭𝟳 𝗼𝗳 𝗺𝘆 𝗤𝘂𝗮𝗻𝘁𝘂𝗺 𝗦𝗲𝗿𝗶𝗲𝘀: “𝗛𝗼𝘄 𝗗𝗼 𝗪𝗲 𝗚𝗲𝘁 𝗟𝗶𝗴𝗵𝘁 𝗢𝗻𝘁𝗼 𝗮 𝗣𝗵𝗼𝘁𝗼𝗻𝗶𝗰 𝗖𝗵𝗶𝗽?” #IntegratedPhotonics #SiliconPhotonics #Photonics #OpticalInterconnects #OpticalIO #PhotonicsPackaging #QuantumPhotonics #OpticalEngineering #ScienceCommunication

MIT Unveils AI Chip That Operates Entirely on Light, Not Electricity Researchers at MIT have created a revolutionary AI accelerator chip that performs computations entirely using light rather than electricity potentially slashing energy consumption in data centers by over 90%. This photonic AI chip leverages arrays of nano-optic waveguides and micro-ring modulators to process data using beams of modulated light. At its core, the chip replaces electrical transistors with tiny optical interference units that manipulate light’s phase and amplitude. Matrix multiplications, the backbone of neural networks, are executed as light passes through a mesh of these units, eliminating resistive heating entirely. The chip has no moving parts and transmits information at the speed of light, literally. Initial tests showed the photonic processor performing convolutional neural network (CNN) tasks at 10 teraflops per watt far surpassing Nvidia’s top-tier GPUs. What’s more, it generates no heat beyond the laser source itself, drastically simplifying cooling and thermal design. MIT’s prototype uses silicon photonics and is fully compatible with existing CMOS processes, making it scalable for commercial production. Future versions may be paired with on-chip photonic memory, enabling entirely light-driven inference systems. The team envisions hyperscale data centers running vast language models on these chips with almost no electricity use, ushering in a post-electronic computing era. Note: The opinions expressed here are solely my own and do not represent my employer.

Say Goodbye to Hackers: Quantum Secure Communication is the Future Thanks to DRDO and IIT Delhi Imagine sending a secret message that can't be intercepted or decoded by anyone. Recently, a team from DRDO and IIT Delhi achieved a major milestone in quantum secure communication. They successfully sent a secure message over a distance of more than I km using a phenomenon called quantum entanglement. This means that the message was encoded in a way that makes it virtually impossible to hack or intercept. How does it work? The researchers used a technology called free-space Quantum Key Distribution (QKD) to send the secure message. This means they didn't need to lay down expensive optical fibers, making it a more practical solution for challenging environments. What does this mean for the future? This breakthrough has the potential to transform the way we secure data in industries like defence, finance, and telecommunications. It's a game-changer for anyone who needs to send sensitive information.

No fibre. No RF. No pre-positioned ground antenna. A jet over southern France locks a narrow pencil beam onto a satellite 36,000 km away, and holds a 2.6 Gbps connection. Bit-error-free. For minutes. Same orbit as last week's GEO voice call. Completely different physics. ESA, Airbus, TNO and TESAT pulled this off in December 2025 over Nîmes. The part that shouldn't work is the pointing: keeping a microradian-precise beam stable from a vibrating, banking aircraft. But it did. 2.6 Gbps from aircraft to GEO. The previous record was 50 Mbps in 2006. Two GEO firsts in a few weeks. A voice call. A gigabit laser. Both 36,000 km up. GEO isn't dead. It's specialising. The future of satcom isn't LEO vs GEO. It's multi-orbital. Each layer doing what it does best. #Satcom #NTN #LaserCommunications #Aerospace #ESA

HUNTING SUBMARINES - SUBMARINE CABLES ARE NOW THOUSANDS OF MILES OF (ACTIVE) PASSIVE SONAR ARRAYS - (2 Clips) - 1. US, EU navies turning 750,000 miles of seafloor cables into submarine-hunting sonars - Undersea fiber-optic cables, which stretch over 1.2 million kilometers (750,000 miles) across the ocean floor, are being used in a new way for anti-submarine warfare. A developing technology called Distributed Acoustic Sensing (DAS) is making this possible. - Originally designed for communications, these cables are now adapted to act as giant, passive sonar arrays capable of detecting, classifying, and tracking submarines, surface vessels, and other undersea activity across sea lanes.  - Turning cables into giant sonar arrays DAS works by using standard fiber-optic cables as long chains of acoustic sensors. When a pulsed laser is sent through the cable, tiny backscattered signals vary based on vibrations or stress caused by nearby sound waves.  By analyzing these patterns, advanced algorithms can detect and localize undersea sounds such as submarine engines, ship propellers, or seismic activity. - The technology effectively converts existing telecommunications cables into a continuous, distributed, real-time monitoring system, capable of listening to the ocean over thousands of miles, at a fraction of the cost of traditional sonar systems or hydrophone networks. - Beyond military use, DAS can detect cable tampering, natural disasters such as earthquakes, and even illegal underwater activity, offering both strategic and commercial benefits. - A new undersea battlespace China and Russia are also believed to be exploring DAS capabilities. - Russia, has warned that DAS-enabled networks could threaten its strategic submarines. - Several incidents involving damaged undersea cables, have further underscored how these fiber networks are becoming a new front in geopolitical competition. - Analysts say DAS offers several advantages: it uses existing infrastructure, provides persistent and covert coverage, and scales easily over massive oceanic distances. - There are growing concerns that adversaries might attempt to jam, spoof, or map DAS-enabled cables or even target them physically in conflict scenarios. - Experts believe the proliferation of DAS could transform undersea warfare and intelligence operations.  - By effectively turning global communications cables into acoustic tripwires, militaries may soon be able to detect submarine movements across straits, chokepoints, and critical shipping routes in near real time. - https://lnkd.in/e4vsN2w5 2. Seafloor fiber optic cables can work like seismometers - Anything that shakes the cable can be detected with the right setup. - https://lnkd.in/ePrTnwn3

🔬 Every pixel since the first CCD does one thing: detect OR emit light. ETH Zürich just ended this 6 decade-old constraint. In a 10µm element. 👇 Current pixels control only one property of light at a time time Cameras measure intensity. Displays emit it. Spatial light modulators shift the phase. etc... But no single element has ever handled amplitude, phase, and polarization simultaneously, nor enable both sensing and generation at the same time. This new type of pixel can do it all. ❓ Why does this matter? Light carries information in all three parameters. If your pixel ignores two of them, you're working with a fraction of what the light field is actually telling you. This is the fundamental bottleneck in adaptive optics, polarization imaging, and holographic displays; they all need separate bulky components for each function. 🔧 𝗛𝗼𝘄 𝗶𝘁 𝘄𝗼𝗿𝗸𝘀 The Norris group at ETH Zurich uses surface plasmon polariton waves, coherent electromagnetic waves propagating along metallic surfaces, as intermediaries. When these plasmons hit precisely designed wavy microstructures, they scatter into arbitrary optical wavefronts. Run it in reverse, and incoming light couples back into the plasmons, fully characterizing the field. What is impressive is that designing it is actually quite simple, the design requires no electromagnetic simulation. The inverse Fourier transform of the wavefront you want gives you the surface profile to fabricate. ~1 day from concept to working device. 🎯 𝗞𝗲𝘆 𝗿𝗲𝘀𝘂𝗹𝘁𝘀 🔹 Full control over amplitude, phase AND polarization, in both sensing and generation 🔹 >40% power efficiency across 500–700 nm 🔹 Complete Stokes polarimetry in a single 10×10 µm² element 🔹 Vortex beam generation up to topological charge q = +5 🔹 Works in silver (plasmonic) AND silicon nitride, meaning photonic chip integration is already on the table The paper explicitly targets adaptive optics, holographic AR displays, optical communications, and quantum information processing. Personally, for optical manipulation, it would be great to have a single element that simultaneously maps amplitude, phase, and polarization of your beam. ❓ And you what would you use it for? 🔗 Paper in first comment. #Photonics #Optics #Microscopy #AdaptiveOptics #Nanophotonics #Plasmonics #QuantumPhotonics #DeepTech #Semiconductors #OpticalEngineering

What's inside a Photonic Integrated Circuit Module? 𝗧𝗘𝗖𝗛 𝗢𝗩𝗘𝗥𝗩𝗜𝗘𝗪 An integrated circuit is chip containing electronic components that form a functional circuit, such as those embedded inside your smart phone, computer, and other electronic devices; a photonic integrated circuit (PIC) is a chip that contains photonic components, which are components that work with light (photons). In an electronic chip, electron flux passes through electrical components such as resistors, inductors, transistors, and capacitors; in a photonic chip, photons pass through optical components such as waveguides (equivalent to a resistor or electrical wire), lasers (equivalent to transistors), polarizers, and phase shifters. Inside a Photonic Integrated Circuit (PIC) module, you find a miniaturized optical system on a chip, integrating components like lasers, waveguides, modulators, and photodetectors on a single substrate (often silicon or silicon nitride), using photons instead of electrons for high-speed data handling, connected to digital ICs via flex cables and lens arrays for focusing light from fibers to the chip, enabling complex optical functions in a tiny package. 🧩 𝗖𝗼𝗺𝗽𝗼𝗻𝗲𝗻𝘁𝘀 𝗶𝗻 𝘁𝗵𝗲 𝗣𝗜𝗖 𝗠𝗼𝗱𝘂𝗹𝗲 𝗣𝗮𝗰𝗸𝗮𝗴𝗲 The PIC module itself is a complete package that includes the photonic chip and all the necessary interfaces for real-world application, such as:  ▪️ The Photonic Chip (PIC): The core of the module, where light is generated, guided, processed, and detected. The chip contains tiny optical pathways called waveguides that route light between functional blocks. ▪️ Optical Interfaces: Couplers (like grating or edge couplers) are used to get light into and out of the chip, typically connecting to external optical fibers. ▪️ Electrical Connections: Wire bonding or other techniques are used to provide power and control signals to the active components on the chip (e.g., lasers, modulators, detectors). ▪️ Electronic ICs: Digital Signal Processors (DSPs) handle data conversion and control. ▪️ Lens Arrays: Silicon lens arrays help focus light between fibers and the chip. ▪️ Driver Electronics: Often, the module includes a printed circuit board (PCB) with the necessary electronic control architecture and driver electronics to operate the PIC. ▪️ Thermal Management: Mechanisms such as heat sinks may be integrated to manage the heat generated by the electronic and active photonic components. ▪️ Housing/Packaging: A robust, and often hermetic, sealed housing protects the sensitive chip and components from the environment. #PhotonicIntegratedCircuit #PhotonicCircuits #Circuits #Engineering

CNC laser cutting = precision & every detail matters Material instability as "tipping" or thermal deformation presents a significant challenge to toolpath integrity. A single displaced part creates a mechanical interference that threatens the optical assembly. Traditional fail-safe is reactive: an impact sensor triggers an emergency stop after physical contact. Smart transitioning to predictive motion control through integrated real-time monitoring: ✅ Dynamic Surface Mapping: Continuous sensor feedback identifies height deviations in the material plane ✅ Adaptive Z-Axis Response: The system executes micro-adjustments to the cutting head height in real-time, maintaining clearance without interrupting the cycle. ✅ Collision Avoidance Logic: Real-time trajectory recalculation prevents contact with displaced geometry before it enters the tool's envelope. by Ashkan Sardar via CTO ROBOTICS Media #automation